From ca60b88ea0e3666aad6d3ebbcb630dfa7fdaedb4 Mon Sep 17 00:00:00 2001 From: Armando Date: Thu, 13 Jun 2024 11:54:38 +0800 Subject: [PATCH 001/113] feat(psram): support APS3204L --- components/esp_psram/esp32s3/esp_psram_impl_quad.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/components/esp_psram/esp32s3/esp_psram_impl_quad.c b/components/esp_psram/esp32s3/esp_psram_impl_quad.c index 12a428d3d77..3496a90bc5f 100644 --- a/components/esp_psram/esp32s3/esp_psram_impl_quad.c +++ b/components/esp_psram/esp32s3/esp_psram_impl_quad.c @@ -62,6 +62,7 @@ static const char* TAG = "quad_psram"; #define PSRAM_IS_VALID(id) (PSRAM_KGD(id) == PSRAM_ID_KGD) #define PSRAM_IS_64MBIT_TRIAL(id) (PSRAM_EID(id) == 0x26) +#define PSRAM_IS_2T_APS3204(id) ((((id) >> 21) && 0xfffff) == 1) // IO-pins for PSRAM. // WARNING: PSRAM shares all but the CS and CLK pins with the flash, so these defines @@ -327,6 +328,8 @@ esp_err_t esp_psram_impl_enable(void) //psram init if (PSRAM_IS_64MBIT_TRIAL(s_psram_id)) { s_psram_size = PSRAM_SIZE_8MB; + } else if (PSRAM_IS_2T_APS3204(s_psram_id)) { + s_psram_size = PSRAM_SIZE_4MB; } else { uint8_t density = PSRAM_SIZE_ID(s_psram_id); s_psram_size = density == 0x0 ? PSRAM_SIZE_2MB : From 96d011cdfc30a7e7094be678037d1f1b479689db Mon Sep 17 00:00:00 2001 From: "nilesh.kale" Date: Tue, 28 May 2024 12:24:08 +0530 Subject: [PATCH 002/113] fix(hal): updated ecdsa reset api to execute correctly This commit updated API to ensure ECDSA peripheral resets and waits until the state returns to idle. --- components/hal/esp32p4/include/hal/ecdsa_ll.h | 24 +++++++++++-------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/components/hal/esp32p4/include/hal/ecdsa_ll.h b/components/hal/esp32p4/include/hal/ecdsa_ll.h index 898ce1fd275..f3429cf1b28 100644 --- a/components/hal/esp32p4/include/hal/ecdsa_ll.h +++ b/components/hal/esp32p4/include/hal/ecdsa_ll.h @@ -71,6 +71,16 @@ typedef enum { ECDSA_MODE_SHA_CONTINUE } ecdsa_ll_sha_mode_t; +/** + * @brief Get the state of ECDSA peripheral + * + * @return State of ECDSA + */ +static inline uint32_t ecdsa_ll_get_state(void) +{ + return REG_GET_FIELD(ECDSA_STATE_REG, ECDSA_BUSY); +} + /** * @brief Enable the bus clock for ECDSA peripheral module * @@ -95,6 +105,10 @@ static inline void ecdsa_ll_reset_register(void) // Clear reset on parent crypto, otherwise ECDSA is held in reset HP_SYS_CLKRST.hp_rst_en2.reg_rst_en_crypto = 0; + + while (ecdsa_ll_get_state() != ECDSA_STATE_IDLE) { + ; + } } /** @@ -273,16 +287,6 @@ static inline void ecdsa_ll_set_stage(ecdsa_ll_stage_t stage) } } -/** - * @brief Get the state of ECDSA peripheral - * - * @return State of ECDSA - */ -static inline uint32_t ecdsa_ll_get_state(void) -{ - return REG_GET_FIELD(ECDSA_STATE_REG, ECDSA_BUSY); -} - /** * @brief Set the SHA type * From 0b272072ecfadcf6ba70e3406fdd08ac3e77e41d Mon Sep 17 00:00:00 2001 From: Jakub Kocka Date: Mon, 1 Jul 2024 16:16:51 +0200 Subject: [PATCH 003/113] docs(jtag_debugging): Rewrite of configure part for Windows to reflect changes Related PR of new drivers for wrover-b kit https://github.com/espressif/esp-win-usb-drivers/pull/2 Closes https://github.com/espressif/idf-installer/issues/204 --- .../jtag-debugging/configure-ft2232h-jtag.rst | 20 +++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/docs/en/api-guides/jtag-debugging/configure-ft2232h-jtag.rst b/docs/en/api-guides/jtag-debugging/configure-ft2232h-jtag.rst index 8137dd625ff..52e3e47f4ed 100644 --- a/docs/en/api-guides/jtag-debugging/configure-ft2232h-jtag.rst +++ b/docs/en/api-guides/jtag-debugging/configure-ft2232h-jtag.rst @@ -37,11 +37,21 @@ Windows 2. Wait until USB ports of |devkit-name| are recognized by Windows and drives are installed. If they do not install automatically, then download them from https://ftdichip.com/drivers/d2xx-drivers/ and install manually. -3. Download Zadig tool (Zadig_X.X.exe) from https://zadig.akeo.ie/ and run it. +3. Download |devkit-name| driver from https://github.com/espressif/esp-win-usb-drivers/releases. Extract the driver files and `install the driver `_. This should change the driver for Dual RS232-HS (Interface 0). -4. In Zadig tool go to "Options" and check "List All Devices". +4. Now |devkit-name|'s JTAG interface should be available to the OpenOCD. To carry on with the debugging environment setup, proceed to section :ref:`jtag-debugging-run-openocd`. -5. Check the list of devices that should contain two |devkit-name| specific USB entries: "Dual RS232-HS (Interface 0)" and "Dual RS232-HS (Interface 1)". The driver name would be "FTDIBUS (vxxxx)" and USB ID: 0403 6010. +.. note:: + If the driver installation fails or OpenOCD is not working try the following manual driver change. Otherwise, this can be skipped. + +Windows - manual driver change +"""""""""""""""""""""""""""""" + +1. Download Zadig tool (Zadig_X.X.exe) from https://zadig.akeo.ie/ and run it. + +2. In Zadig tool go to "Options" and check "List All Devices". + +3. Check the list of devices that should contain two |devkit-name| specific USB entries: "Dual RS232-HS (Interface 0)" and "Dual RS232-HS (Interface 1)". The driver name would be "FTDIBUS (vxxxx)" and USB ID: 0403 6010. .. figure:: ../../../_static/jtag-usb-configuration-zadig.jpg :align: center @@ -50,14 +60,12 @@ Windows Configuration of JTAG USB driver in Zadig tool -6. The first device (Dual RS232-HS (Interface 0)) is connected to the JTAG port of the {IDF_TARGET_NAME}. Original "FTDIBUS (vxxxx)" driver of this device should be replaced with "WinUSB (v6xxxxx)". To do so, select "Dual RS232-HS (Interface 0) and reinstall attached driver to the "WinUSB (v6xxxxx)", see picture above. +4. The first device (Dual RS232-HS (Interface 0)) is connected to the JTAG port of the {IDF_TARGET_NAME}. Original "FTDIBUS (vxxxx)" driver of this device should be replaced with "WinUSB (v6xxxxx)". To do so, select "Dual RS232-HS (Interface 0) and reinstall attached driver to the "WinUSB (v6xxxxx)", see picture above. .. note:: Do not change the second device "Dual RS232-HS (Interface 1)". It is routed to {IDF_TARGET_NAME}'s serial port (UART) used for upload of application to {IDF_TARGET_NAME}'s flash. -Now |devkit-name|'s JTAG interface should be available to the OpenOCD. To carry on with debugging environment setup, proceed to section :ref:`jtag-debugging-run-openocd`. - Linux """"" From 6c097b58129935ca476bd268253988ce4c8f0aa9 Mon Sep 17 00:00:00 2001 From: zwl Date: Thu, 4 Jul 2024 21:11:23 +0800 Subject: [PATCH 004/113] feat(bluetooth/controller): optimize bt hci layer code --- components/bt/CMakeLists.txt | 59 +- components/bt/host/bluedroid/hci/hci_hal_h4.c | 39 - .../transport/driver/common/hci_driver_h4.c | 356 ++++++++++ .../transport/driver/common/hci_driver_mem.c | 55 ++ .../transport/driver/common/hci_driver_util.c | 225 ++++++ .../transport/driver/uart/hci_driver_uart.c | 222 ++++++ .../transport/driver/uart/hci_driver_uart.h | 97 +++ .../driver/uart/hci_driver_uart_config.c | 40 ++ .../driver/uart/hci_driver_uart_dma.c | 670 ++++++++++++++++++ .../transport/driver/vhci/hci_driver_nimble.c | 61 ++ .../driver/vhci/hci_driver_standard.c | 149 ++++ .../driver/vhci/hci_driver_tamplete.c | 133 ++++ .../transport/include/common/hci_driver_h4.h | 75 ++ .../transport/include/common/hci_driver_mem.h | 25 + .../include/common/hci_driver_util.h | 18 + .../transport/include/esp_hci_driver.h | 52 ++ .../transport/include/esp_hci_internal.h | 121 ++++ .../transport/include/esp_hci_transport.h | 83 +++ .../bt/porting/transport/include/hci_uart.h | 100 --- .../bt/porting/transport/src/hci_transport.c | 175 +++++ .../bt/porting/transport/uart/hci_uart.c | 207 ------ 21 files changed, 2599 insertions(+), 363 deletions(-) create mode 100644 components/bt/porting/transport/driver/common/hci_driver_h4.c create mode 100644 components/bt/porting/transport/driver/common/hci_driver_mem.c create mode 100644 components/bt/porting/transport/driver/common/hci_driver_util.c create mode 100644 components/bt/porting/transport/driver/uart/hci_driver_uart.c create mode 100644 components/bt/porting/transport/driver/uart/hci_driver_uart.h create mode 100644 components/bt/porting/transport/driver/uart/hci_driver_uart_config.c create mode 100644 components/bt/porting/transport/driver/uart/hci_driver_uart_dma.c create mode 100644 components/bt/porting/transport/driver/vhci/hci_driver_nimble.c create mode 100644 components/bt/porting/transport/driver/vhci/hci_driver_standard.c create mode 100644 components/bt/porting/transport/driver/vhci/hci_driver_tamplete.c create mode 100644 components/bt/porting/transport/include/common/hci_driver_h4.h create mode 100644 components/bt/porting/transport/include/common/hci_driver_mem.h create mode 100644 components/bt/porting/transport/include/common/hci_driver_util.h create mode 100644 components/bt/porting/transport/include/esp_hci_driver.h create mode 100644 components/bt/porting/transport/include/esp_hci_internal.h create mode 100644 components/bt/porting/transport/include/esp_hci_transport.h delete mode 100644 components/bt/porting/transport/include/hci_uart.h create mode 100644 components/bt/porting/transport/src/hci_transport.c delete mode 100644 components/bt/porting/transport/uart/hci_uart.c diff --git a/components/bt/CMakeLists.txt b/components/bt/CMakeLists.txt index 6dd5ef9b378..24e1517aa3e 100644 --- a/components/bt/CMakeLists.txt +++ b/components/bt/CMakeLists.txt @@ -117,6 +117,7 @@ if(CONFIG_BT_ENABLED) common/btc/include common/include porting/mem/ + porting/include ) list(APPEND include_dirs ${common_include_dirs}) @@ -573,29 +574,51 @@ if(CONFIG_BT_ENABLED) if(CONFIG_BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT) + list(APPEND srcs + "porting/npl/freertos/src/npl_os_freertos.c" + "porting/mem/os_msys_init.c" + "porting/transport/src/hci_transport.c" + ) + + if(CONFIG_BT_CONTROLLER_DISABLED) list(APPEND srcs - "porting/npl/freertos/src/npl_os_freertos.c" - "porting/mem/os_msys_init.c" + "host/nimble/nimble/porting/nimble/src/hal_uart.c" ) - - if(CONFIG_BT_CONTROLLER_DISABLED) + elseif(CONFIG_BT_LE_HCI_INTERFACE_USE_RAM) + if(CONFIG_BT_NIMBLE_ENABLED) list(APPEND srcs - "host/nimble/nimble/porting/nimble/src/hal_uart.c" - ) + "porting/transport/driver/vhci/hci_driver_nimble.c" + "host/nimble/nimble/nimble/transport/esp_ipc/src/hci_esp_ipc.c" + ) + else() + list(APPEND srcs + "porting/transport/driver/vhci/hci_driver_standard.c" + ) endif() - list(APPEND include_dirs - porting/include - porting/npl/freertos/include - porting/transport/include - ) - - if(CONFIG_BT_LE_HCI_INTERFACE_USE_UART) + elseif(CONFIG_BT_LE_HCI_INTERFACE_USE_UART) list(APPEND srcs - "porting/transport/uart/hci_uart.c" - ) + "porting/transport/driver/common/hci_driver_util.c" + "porting/transport/driver/common/hci_driver_h4.c" + "porting/transport/driver/common/hci_driver_mem.c" + "porting/transport/driver/uart/hci_driver_uart_config.c" + ) + if(CONFIG_BT_LE_UART_HCI_DMA_MODE) + list(APPEND srcs + "porting/transport/driver/uart/hci_driver_uart_dma.c" + ) + else() + list(APPEND srcs + "porting/transport/driver/uart/hci_driver_uart.c" + ) endif() - endif() + endif() + list(APPEND include_dirs + porting/include + porting/npl/freertos/include + porting/transport/include + ) + endif() if(NOT (CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS OR CONFIG_BT_NIMBLE_CRYPTO_STACK_MBEDTLS)) list(APPEND include_dirs @@ -621,7 +644,6 @@ if(CONFIG_BT_ENABLED) if(CONFIG_BT_NIMBLE_ENABLED) list(APPEND include_dirs - host/nimble/nimble/nimble/host/include host/nimble/nimble/nimble/include host/nimble/nimble/nimble/host/services/ans/include @@ -725,10 +747,12 @@ if(CONFIG_BT_ENABLED) "host/nimble/nimble/porting/npl/freertos/src/nimble_port_freertos.c" "host/nimble/port/src/nvs_port.c" ) + list(APPEND include_dirs host/nimble/nimble/porting/nimble/include host/nimble/port/include host/nimble/nimble/nimble/transport/include + host/nimble/nimble/nimble/include ) if(CONFIG_BT_CONTROLLER_DISABLED) @@ -762,6 +786,7 @@ if(CONFIG_BT_ENABLED) if(CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE AND CONFIG_BT_CONTROLLER_ENABLED) list(APPEND srcs "host/nimble/esp-hci/src/esp_nimble_hci.c" + "host/nimble/nimble/nimble/transport/esp_ipc_legacy/src/hci_esp_ipc_legacy.c" ) list(APPEND include_dirs ${nimble_hci_include_dirs}) endif() diff --git a/components/bt/host/bluedroid/hci/hci_hal_h4.c b/components/bt/host/bluedroid/hci/hci_hal_h4.c index 9663126ad62..47717803aea 100644 --- a/components/bt/host/bluedroid/hci/hci_hal_h4.c +++ b/components/bt/host/bluedroid/hci/hci_hal_h4.c @@ -35,10 +35,6 @@ #include "esp_bluedroid_hci.h" #include "stack/hcimsgs.h" -#if ((BT_CONTROLLER_INCLUDED == TRUE) && SOC_ESP_NIMBLE_CONTROLLER) -#include "ble_hci_trans.h" -#endif - #if (C2H_FLOW_CONTROL_INCLUDED == TRUE) #include "l2c_int.h" #endif ///C2H_FLOW_CONTROL_INCLUDED == TRUE @@ -622,42 +618,7 @@ static int host_recv_pkt_cb(uint8_t *data, uint16_t len) return 0; } -#if ((BT_CONTROLLER_INCLUDED == TRUE) && SOC_ESP_NIMBLE_CONTROLLER) - -int -ble_hs_hci_rx_evt(uint8_t *hci_ev, void *arg) -{ - if(esp_bluedroid_get_status() == ESP_BLUEDROID_STATUS_UNINITIALIZED) { - ble_hci_trans_buf_free(hci_ev); - return 0; - } - uint16_t len = hci_ev[1] + 3; - uint8_t *data = (uint8_t *)malloc(len); - assert(data != NULL); - data[0] = 0x04; - memcpy(&data[1], hci_ev, len - 1); - ble_hci_trans_buf_free(hci_ev); - host_recv_pkt_cb(data, len); - free(data); - return 0; -} - - -int -ble_hs_rx_data(struct os_mbuf *om, void *arg) -{ - uint16_t len = OS_MBUF_PKTHDR(om)->omp_len + 1; - uint8_t *data = (uint8_t *)malloc(len); - assert(data != NULL); - data[0] = 0x02; - os_mbuf_copydata(om, 0, len - 1, &data[1]); - host_recv_pkt_cb(data, len); - free(data); - os_mbuf_free_chain(om); - return 0; -} -#endif static const esp_bluedroid_hci_driver_callbacks_t hci_host_cb = { .notify_host_send_available = host_send_pkt_available_cb, .notify_host_recv = host_recv_pkt_cb, diff --git a/components/bt/porting/transport/driver/common/hci_driver_h4.c b/components/bt/porting/transport/driver/common/hci_driver_h4.c new file mode 100644 index 00000000000..c31b71164e6 --- /dev/null +++ b/components/bt/porting/transport/driver/common/hci_driver_h4.c @@ -0,0 +1,356 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#include +#include +#include +#include +#include +#include "common/hci_driver_h4.h" + +#ifndef min +#define min(a, b) ((a) < (b) ? (a) : (b)) +#endif + +#ifndef max +#define max(a, b) ((a) > (b) ? (a) : (b)) +#endif + +#define HCI_H4_SM_W4_PKT_TYPE 0 +#define HCI_H4_SM_W4_HEADER 1 +#define HCI_H4_SM_W4_PAYLOAD 2 +#define HCI_H4_SM_COMPLETED 3 + +struct hci_h4_input_buffer { + const uint8_t *buf; + uint16_t len; +}; + +static int +hci_h4_frame_start(struct hci_h4_sm *rxs, uint8_t pkt_type) +{ + rxs->pkt_type = pkt_type; + rxs->len = 0; + rxs->exp_len = 0; + + switch (rxs->pkt_type) { + case HCI_H4_CMD: + rxs->min_len = 3; + break; + case HCI_H4_ACL: + case HCI_H4_ISO: + rxs->min_len = 4; + break; + case HCI_H4_EVT: + rxs->min_len = 2; + break; + default: + /* !TODO: Sync loss. Need to wait for reset. */ + return -1; + } + + return 0; +} + +static int +hci_h4_ib_consume(struct hci_h4_input_buffer *ib, uint16_t len) +{ + assert(ib->len >= len); + + ib->buf += len; + ib->len -= len; + + return len; +} + +static int +hci_h4_ib_pull_min_len(struct hci_h4_sm *rxs, + struct hci_h4_input_buffer *ib) +{ + uint16_t len; + + len = min(ib->len, rxs->min_len - rxs->len); + memcpy(&rxs->hdr[rxs->len], ib->buf, len); + + rxs->len += len; + hci_h4_ib_consume(ib, len); + + + return rxs->len != rxs->min_len; +} + +static int +hci_h4_sm_w4_header(struct hci_h4_sm *h4sm, struct hci_h4_input_buffer *ib) +{ + int rc; + + rc = hci_h4_ib_pull_min_len(h4sm, ib); + if (rc) { + /* need more data */ + return 1; + } + + switch (h4sm->pkt_type) { + case HCI_H4_CMD: + assert(h4sm->allocs && h4sm->allocs->cmd); + h4sm->buf = h4sm->allocs->cmd(); + if (!h4sm->buf) { + return -1; + } + + memcpy(h4sm->buf, h4sm->hdr, h4sm->len); + h4sm->exp_len = h4sm->hdr[2] + 3; + + break; + case HCI_H4_ACL: + assert(h4sm->allocs && h4sm->allocs->acl); + h4sm->om = h4sm->allocs->acl(); + if (!h4sm->om) { + return -1; + } + + os_mbuf_append(h4sm->om, h4sm->hdr, h4sm->len); + h4sm->exp_len = get_le16(&h4sm->hdr[2]) + 4; + break; +#if !CONFIG_BT_CONTROLLER_ENABLED + case HCI_H4_EVT: + if (h4sm->hdr[0] == BLE_HCI_EVCODE_LE_META) { + /* For LE Meta event we need 3 bytes to parse header */ + h4sm->min_len = 3; + rc = hci_h4_ib_pull_min_len(h4sm, ib); + if (rc) { + /* need more data */ + return 1; + } + } + + assert(h4sm->allocs && h4sm->allocs->evt); + + /* We can drop legacy advertising events if there's no free buffer in + * discardable pool. + */ + if (h4sm->hdr[2] == BLE_HCI_LE_SUBEV_ADV_RPT) { + h4sm->buf = h4sm->allocs->evt(1); + } else { + h4sm->buf = h4sm->allocs->evt(0); + if (!h4sm->buf) { + return -1; + } + } + + if (h4sm->buf) { + memcpy(h4sm->buf, h4sm->hdr, h4sm->len); + } + + h4sm->exp_len = h4sm->hdr[1] + 2; + break; +#endif // !CONFIG_BT_CONTROLLER_ENABLED + case HCI_H4_ISO: + assert(h4sm->allocs && h4sm->allocs->iso); + h4sm->om = h4sm->allocs->iso(); + if (!h4sm->om) { + return -1; + } + + os_mbuf_append(h4sm->om, h4sm->hdr, h4sm->len); + h4sm->exp_len = (get_le16(&h4sm->hdr[2]) & 0x7fff) + 4; + break; + default: + assert(0); + break; + } + + return 0; +} + +static int +hci_h4_sm_w4_payload(struct hci_h4_sm *h4sm, + struct hci_h4_input_buffer *ib) +{ + uint16_t mbuf_len; + uint16_t len; + int rc; + + len = min(ib->len, h4sm->exp_len - h4sm->len); + + + switch (h4sm->pkt_type) { + case HCI_H4_CMD: + case HCI_H4_EVT: + if (h4sm->buf) { + memcpy(&h4sm->buf[h4sm->len], ib->buf, len); + } + break; + case HCI_H4_ACL: + case HCI_H4_ISO: + assert(h4sm->om); + + mbuf_len = OS_MBUF_PKTLEN(h4sm->om); + rc = os_mbuf_append(h4sm->om, ib->buf, len); + if (rc) { + /* Some data may already be appended so need to adjust h4sm only by + * the size of appended data. + */ + len = OS_MBUF_PKTLEN(h4sm->om) - mbuf_len; + h4sm->len += len; + hci_h4_ib_consume(ib, len); + + return -1; + } + break; + default: + assert(0); + break; + } + + h4sm->len += len; + hci_h4_ib_consume(ib, len); + + /* return 1 if need more data */ + return h4sm->len != h4sm->exp_len; +} + +static void +hci_h4_sm_completed(struct hci_h4_sm *h4sm) +{ + int rc; + + switch (h4sm->pkt_type) { +#if CONFIG_BT_CONTROLLER_ENABLED + case HCI_H4_CMD: + if (h4sm->buf) { + assert(h4sm->frame_cb); + rc = h4sm->frame_cb(h4sm->pkt_type, h4sm->buf); + assert(rc == 0); + h4sm->buf = NULL; + } + break; + case HCI_H4_ACL: + case HCI_H4_ISO: + if (h4sm->om) { + assert(h4sm->frame_cb); + rc = h4sm->frame_cb(h4sm->pkt_type, h4sm->om); + assert(rc == 0); + h4sm->om = NULL; + } + break; +#else + case HCI_H4_CMD: + case HCI_H4_EVT: + if (h4sm->buf) { + assert(h4sm->frame_cb); + rc = h4sm->frame_cb(h4sm->pkt_type, h4sm->buf); + if (rc != 0) { + ble_transport_free(h4sm->buf); + } + h4sm->buf = NULL; + } + break; + case HCI_H4_ACL: + case HCI_H4_ISO: + if (h4sm->om) { + assert(h4sm->frame_cb); + rc = h4sm->frame_cb(h4sm->pkt_type, h4sm->om); + if (rc != 0) { + os_mbuf_free_chain(h4sm->om); + } + h4sm->om = NULL; + } + break; +#endif // CONFIG_BT_CONTROLLER_ENABLED + default: + assert(0); + break; + } +} + +int +hci_h4_sm_rx(struct hci_h4_sm *h4sm, const uint8_t *buf, uint16_t len) +{ + struct hci_h4_input_buffer ib = { + .buf = buf, + .len = len, + }; + + int rc = 0; + while (ib.len && (rc >= 0)) { + rc = 0; + switch (h4sm->state) { + case HCI_H4_SM_W4_PKT_TYPE: + if (hci_h4_frame_start(h4sm, ib.buf[0]) < 0) { + return -1; + } + + hci_h4_ib_consume(&ib, 1); + h4sm->state = HCI_H4_SM_W4_HEADER; + /* no break */ + case HCI_H4_SM_W4_HEADER: + rc = hci_h4_sm_w4_header(h4sm, &ib); + assert(rc >= 0); + if (rc) { + break; + } + h4sm->state = HCI_H4_SM_W4_PAYLOAD; + /* no break */ + case HCI_H4_SM_W4_PAYLOAD: + rc = hci_h4_sm_w4_payload(h4sm, &ib); + assert(rc >= 0); + if (rc) { + break; + } + h4sm->state = HCI_H4_SM_COMPLETED; + /* no break */ + case HCI_H4_SM_COMPLETED: + hci_h4_sm_completed(h4sm); + h4sm->state = HCI_H4_SM_W4_PKT_TYPE; + break; + default: + return -1; + } + } + + /* Calculate consumed bytes + * + * Note: we should always consume some bytes unless there is an oom error. + * It's also possible that we have an oom error but already consumed some + * data, in such case just return success and error will be returned on next + * pass. + */ + len = len - ib.len; + if (len == 0) { + assert(rc < 0); + return -1; + } + + return len; +} + +void +hci_h4_sm_init(struct hci_h4_sm *h4sm, const struct hci_h4_allocators *allocs, + hci_h4_frame_cb *frame_cb) +{ + memset(h4sm, 0, sizeof(*h4sm)); + h4sm->allocs = allocs; + h4sm->frame_cb = frame_cb; +} diff --git a/components/bt/porting/transport/driver/common/hci_driver_mem.c b/components/bt/porting/transport/driver/common/hci_driver_mem.c new file mode 100644 index 00000000000..acfdf793f67 --- /dev/null +++ b/components/bt/porting/transport/driver/common/hci_driver_mem.c @@ -0,0 +1,55 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include +#include +#include "common/hci_driver_mem.h" +#include "common/hci_driver_h4.h" +#include "esp_hci_internal.h" + +void * +hci_driver_mem_cmd_alloc(void) +{ + return r_ble_hci_trans_buf_alloc(ESP_HCI_INTERNAL_BUF_CMD); +} + +void * +hci_driver_mem_evt_alloc(int discardable) +{ + /* The controller shouldn't invoke this. */ + assert(0); + return NULL; +} + +struct os_mbuf * +hci_driver_mem_acl_alloc(void) +{ + return os_msys_get_pkthdr(0, ESP_HCI_INTERNAL_ACL_MBUF_LEADINGSPCAE); +} + +struct os_mbuf * +hci_driver_mem_acl_len_alloc(uint32_t len) +{ + return os_msys_get_pkthdr(len, ESP_HCI_INTERNAL_ACL_MBUF_LEADINGSPCAE); +} + +struct os_mbuf * +hci_driver_mem_iso_alloc(void) +{ + return os_msys_get_pkthdr(0, ESP_HCI_INTERNAL_ACL_MBUF_LEADINGSPCAE); +} + +struct os_mbuf * +hci_driver_mem_iso_len_alloc(uint32_t len) +{ + return os_msys_get_pkthdr(len, ESP_HCI_INTERNAL_ACL_MBUF_LEADINGSPCAE); +} + +const struct hci_h4_allocators s_hci_driver_mem_alloc = { + .cmd = hci_driver_mem_cmd_alloc, + .evt = hci_driver_mem_evt_alloc, + .acl = hci_driver_mem_acl_alloc, + .iso = hci_driver_mem_iso_alloc, +}; diff --git a/components/bt/porting/transport/driver/common/hci_driver_util.c b/components/bt/porting/transport/driver/common/hci_driver_util.c new file mode 100644 index 00000000000..30fe8d13c46 --- /dev/null +++ b/components/bt/porting/transport/driver/common/hci_driver_util.c @@ -0,0 +1,225 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include +#include +#include "esp_log.h" +#include "os/os.h" +#include "os/os_mempool.h" +#include "esp_hci_driver.h" +#include "esp_hci_internal.h" +#include "common/hci_driver_util.h" + +#define TAG "HCI_UTIL" +#define HCI_DRIVER_UTIL_TX_POOL_NUM \ + (CONFIG_BT_LE_ACL_BUF_COUNT + CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT + CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT) + +#ifndef min +#define min(a, b) ((a) < (b) ? (a) : (b)) +#endif + +/** + * @brief Structure representing HCI TX data. + */ +typedef struct hci_driver_util_tx_entry { + hci_driver_data_type_t data_type; ///< Type of the HCI TX data. + uint8_t *data; ///< Pointer to the TX data. + uint32_t length; ///< Length of the TX data. + STAILQ_ENTRY(hci_driver_util_tx_entry) next; ///< Next element in the linked list. +} hci_driver_util_tx_entry_t; + +/* The list for hci_driver_util_tx_entry */ +STAILQ_HEAD(hci_driver_util_tx_list, hci_driver_util_tx_entry); + +typedef struct { + struct hci_driver_util_tx_list tx_head; + struct hci_driver_util_tx_entry *cur_tx_entry; + uint32_t cur_tx_off; + struct os_mempool *tx_entry_pool; + uint8_t *tx_entry_mem; +} hci_driver_util_env_t; + +static hci_driver_util_env_t s_hci_driver_util_env; + +static void +hci_driver_util_memory_deinit(void) +{ + if (s_hci_driver_util_env.tx_entry_pool) { + free(s_hci_driver_util_env.tx_entry_pool); + s_hci_driver_util_env.tx_entry_pool = NULL; + } + if (s_hci_driver_util_env.tx_entry_mem) { + free(s_hci_driver_util_env.tx_entry_mem); + s_hci_driver_util_env.tx_entry_mem = NULL; + } +} + +static int +hci_driver_util_memory_init(void) +{ + int rc; + + s_hci_driver_util_env.tx_entry_pool = (struct os_mempool *)malloc(sizeof(struct os_mempool)); + if (!s_hci_driver_util_env.tx_entry_pool) { + ESP_LOGE(TAG, "No memory for tx pool"); + goto init_err; + } + + s_hci_driver_util_env.tx_entry_mem = malloc(OS_MEMPOOL_SIZE(HCI_DRIVER_UTIL_TX_POOL_NUM, + sizeof(hci_driver_util_tx_entry_t)) * sizeof(os_membuf_t)); + if (!s_hci_driver_util_env.tx_entry_mem) { + ESP_LOGE(TAG, "No memory for tx pool buffer"); + goto init_err; + } + + rc = os_mempool_init(s_hci_driver_util_env.tx_entry_pool, HCI_DRIVER_UTIL_TX_POOL_NUM, + sizeof(hci_driver_util_tx_entry_t), s_hci_driver_util_env.tx_entry_mem, + "hci_tx_entry_pool"); + if (rc) { + ESP_LOGE(TAG, "Failed to initialize tx pool"); + goto init_err; + } + + return 0; + +init_err: + hci_driver_util_memory_deinit(); + return -1; +} + +void +hci_driver_util_tx_list_enqueue(hci_driver_data_type_t type, uint8_t *data, uint32_t len) +{ + os_sr_t sr; + hci_driver_util_tx_entry_t *tx_entry; + + tx_entry = os_memblock_get(s_hci_driver_util_env.tx_entry_pool); + assert(tx_entry != NULL); + tx_entry->data_type = type; + tx_entry->data = data; + tx_entry->length = len; + /* If the txbuf is command status event or command complete event, we should send firstly. + * The tx list maybe used in the controller task and hci task. Therefore, enter critical area. + */ + if ((type == HCI_DRIVER_TYPE_EVT) && ((data[0] == 0x0E) || (data[0] == 0x0F))) { + OS_ENTER_CRITICAL(sr); + STAILQ_INSERT_HEAD(&s_hci_driver_util_env.tx_head, tx_entry, next); + OS_EXIT_CRITICAL(sr); + } else { + OS_ENTER_CRITICAL(sr); + STAILQ_INSERT_TAIL(&s_hci_driver_util_env.tx_head, tx_entry, next); + OS_EXIT_CRITICAL(sr); + } +} + +uint32_t +hci_driver_util_tx_list_dequeue(uint32_t max_tx_len, void **tx_data, bool *last_frame) +{ + os_sr_t sr; + uint32_t tx_len; + uint32_t data_len; + uint16_t out_off; + struct os_mbuf *om; + hci_driver_util_tx_entry_t *tx_entry; + + /* Check if there is any remaining data that hasn't been sent completely. If it has been completed, + * free the corresponding memory. Therefore, the HCI TX entry needs to be sent one by one; multiple + * entries cannot be sent together. + */ + tx_len = 0; + tx_entry = s_hci_driver_util_env.cur_tx_entry; + if (tx_entry) { + data_len = tx_entry->length; + if (tx_entry->data_type == HCI_DRIVER_TYPE_ACL) { + om = (struct os_mbuf *)tx_entry->data; + if (s_hci_driver_util_env.cur_tx_off >= data_len) { + os_mbuf_free_chain(om); + } else { + om = os_mbuf_off(om, s_hci_driver_util_env.cur_tx_off, &out_off); + tx_len = min(max_tx_len, om->om_len - out_off); + *tx_data = (void *)&om->om_data[out_off]; + } + } else if (tx_entry->data_type == HCI_DRIVER_TYPE_EVT) { + if (s_hci_driver_util_env.cur_tx_off >= data_len) { + r_ble_hci_trans_buf_free(tx_entry->data); + } else { + tx_len = min(max_tx_len, data_len - s_hci_driver_util_env.cur_tx_off); + *tx_data = &tx_entry->data[s_hci_driver_util_env.cur_tx_off]; + } + } else { + assert(0); + } + /* If this is the last frame, inform the invoker not to call this API until the current data + * has been completely sent. + */ + if (tx_len) { + s_hci_driver_util_env.cur_tx_off += tx_len; + + if (s_hci_driver_util_env.cur_tx_off >= data_len) { + *last_frame = true; + } else { + *last_frame = false; + } + } else { + os_memblock_put(s_hci_driver_util_env.tx_entry_pool, (void *)tx_entry); + s_hci_driver_util_env.cur_tx_entry = NULL; + } + } + + /* Find a new entry. */ + if (!tx_len && !STAILQ_EMPTY(&s_hci_driver_util_env.tx_head)) { + OS_ENTER_CRITICAL(sr); + tx_entry = STAILQ_FIRST(&s_hci_driver_util_env.tx_head); + STAILQ_REMOVE_HEAD(&s_hci_driver_util_env.tx_head, next); + OS_EXIT_CRITICAL(sr); + + *tx_data = &tx_entry->data_type; + s_hci_driver_util_env.cur_tx_entry = tx_entry; + s_hci_driver_util_env.cur_tx_off = 0; + tx_len = 1; + *last_frame = false; + } + + return tx_len; +} + +int +hci_driver_util_init(void) +{ + memset(&s_hci_driver_util_env, 0, sizeof(hci_driver_util_env_t)); + + if (hci_driver_util_memory_init()) { + return -1; + } + + STAILQ_INIT(&s_hci_driver_util_env.tx_head); + + return 0; +} + +void +hci_driver_util_deinit(void) +{ + hci_driver_util_tx_entry_t *tx_entry; + hci_driver_util_tx_entry_t *next_entry; + + /* Free all of controller buffers which haven't been sent yet. The whole mempool will be freed. + * Therefore, it's unnecessary to put the tx_entry into mempool. + */ + tx_entry = STAILQ_FIRST(&s_hci_driver_util_env.tx_head); + while (tx_entry) { + next_entry = STAILQ_NEXT(tx_entry, next); + if (tx_entry->data_type == HCI_DRIVER_TYPE_ACL) { + os_mbuf_free_chain((struct os_mbuf *)tx_entry->data); + } else if (tx_entry->data_type == HCI_DRIVER_TYPE_EVT) { + r_ble_hci_trans_buf_free(tx_entry->data); + } + tx_entry = next_entry; + } + + hci_driver_util_memory_deinit(); + + memset(&s_hci_driver_util_env, 0, sizeof(hci_driver_util_env_t)); +} diff --git a/components/bt/porting/transport/driver/uart/hci_driver_uart.c b/components/bt/porting/transport/driver/uart/hci_driver_uart.c new file mode 100644 index 00000000000..6ac2a462fa1 --- /dev/null +++ b/components/bt/porting/transport/driver/uart/hci_driver_uart.c @@ -0,0 +1,222 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include "freertos/FreeRTOS.h" +#include "freertos/queue.h" +#include "freertos/task.h" +#include "freertos/semphr.h" +#include "esp_log.h" +#include "driver/uart.h" +#include "esp_hci_transport.h" +#include "esp_hci_internal.h" +#include "common/hci_driver_h4.h" +#include "common/hci_driver_util.h" +#include "common/hci_driver_mem.h" +#include "hci_driver_uart.h" + +static const char *TAG = "hci_uart"; + +#define CONFIG_BT_LE_HCI_RX_PROC_DATA_LEN (256) + +typedef struct { + TaskHandle_t tx_task_handler; + TaskHandle_t rx_task_handler; + hci_driver_uart_params_config_t *hci_uart_params; + SemaphoreHandle_t tx_sem; + QueueHandle_t rx_event_queue; + uint8_t *rx_data; + struct hci_h4_sm *h4_sm; + hci_driver_forward_fn *forward_cb; +} hci_driver_uart_env_t; + +static hci_driver_uart_env_t s_hci_driver_uart_env; +static struct hci_h4_sm s_hci_driver_uart_h4_sm; +static uint8_t s_hci_driver_uart_rx_data[CONFIG_BT_LE_HCI_RX_PROC_DATA_LEN]; +static hci_driver_uart_params_config_t hci_driver_uart_params = BT_HCI_DRIVER_UART_CONFIG_DEFAULT(); + +static int +hci_driver_uart_tx(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length, + hci_driver_direction_t dir) +{ + /* By now, this layer is only used by controller. */ + assert(dir == HCI_DRIVER_DIR_C2H); + ESP_LOGD(TAG, "controller tx len:%d\n", length); + + hci_driver_util_tx_list_enqueue(data_type, data, length); + xSemaphoreGive(s_hci_driver_uart_env.tx_sem); + + return 0; +} + +static int +hci_driver_uart_h4_frame_cb(uint8_t pkt_type, void *data) +{ + hci_driver_forward_fn *forward_cb; + + forward_cb = s_hci_driver_uart_env.forward_cb; + if (!forward_cb) { + return -1; + } + ESP_LOGD(TAG, "h4 frame\n"); + return forward_cb(pkt_type, data, 0, HCI_DRIVER_DIR_H2C); +} + +static void +hci_driver_uart_tx_task(void *p) +{ + void *data; + bool last_frame; + uint32_t tx_len; + uart_port_t port; + + port = s_hci_driver_uart_env.hci_uart_params->hci_uart_port; + while (true) { + xSemaphoreTake(s_hci_driver_uart_env.tx_sem, portMAX_DELAY); + while (true) { + tx_len = hci_driver_util_tx_list_dequeue(0xffffff, &data, &last_frame); + if (tx_len == 0) { + break; + } + ESP_LOGD(TAG, "uart tx"); + ESP_LOG_BUFFER_HEXDUMP(TAG, data, tx_len, ESP_LOG_DEBUG); + uart_write_bytes(port, data, tx_len); + } + } +} + +static void +hci_driver_uart_rx_task(void *p) +{ + void *data; + int read_len; + int ret; + uart_port_t port; + uart_event_t uart_event; + + port = s_hci_driver_uart_env.hci_uart_params->hci_uart_port; + while (true) { + xQueueReceive(s_hci_driver_uart_env.rx_event_queue, &uart_event, portMAX_DELAY); + data = s_hci_driver_uart_env.rx_data; + while (true) { + read_len = uart_read_bytes(port, data, CONFIG_BT_LE_HCI_RX_PROC_DATA_LEN, 0); + if (read_len == 0) { + break; + } + ESP_LOGD(TAG, "uart rx"); + ESP_LOG_BUFFER_HEXDUMP(TAG, data, read_len, ESP_LOG_DEBUG); + ret = hci_h4_sm_rx(s_hci_driver_uart_env.h4_sm, data, read_len); + if (ret < 0) { + r_ble_ll_hci_ev_hw_err(ESP_HCI_SYNC_LOSS_ERR); + } + } + } +} + +static int +hci_driver_uart_task_create(void) +{ + /* !TODO: Set the core id by menuconfig */ + xTaskCreatePinnedToCore(hci_driver_uart_tx_task, "hci_driver_uart_tx_task", + CONFIG_BT_LE_HCI_TRANS_TASK_STACK_SIZE, NULL, + ESP_TASK_BT_CONTROLLER_PRIO, &s_hci_driver_uart_env.tx_task_handler, + 0); + assert(s_hci_driver_uart_env.tx_task_handler); + + xTaskCreatePinnedToCore(hci_driver_uart_rx_task, "hci_driver_uart_rx_task", + CONFIG_BT_LE_HCI_TRANS_TASK_STACK_SIZE, NULL, + ESP_TASK_BT_CONTROLLER_PRIO, &s_hci_driver_uart_env.rx_task_handler, + 0); + assert(s_hci_driver_uart_env.rx_task_handler); + + ESP_LOGI(TAG, "hci transport task create successfully, prio:%d, stack size: %ld", + ESP_TASK_BT_CONTROLLER_PRIO, CONFIG_BT_LE_HCI_TRANS_TASK_STACK_SIZE); + + return 0; +} + +static void +hci_driver_uart_deinit(void) +{ + if (s_hci_driver_uart_env.tx_task_handler) { + vTaskDelete(s_hci_driver_uart_env.tx_task_handler); + s_hci_driver_uart_env.tx_task_handler = NULL; + } + + if (s_hci_driver_uart_env.rx_task_handler) { + vTaskDelete(s_hci_driver_uart_env.rx_task_handler); + s_hci_driver_uart_env.rx_task_handler = NULL; + } + + ESP_ERROR_CHECK(uart_driver_delete(s_hci_driver_uart_env.hci_uart_params->hci_uart_port)); + + if (!s_hci_driver_uart_env.tx_sem) { + vSemaphoreDelete(s_hci_driver_uart_env.tx_sem); + } + + hci_driver_util_deinit(); + memset(&s_hci_driver_uart_env, 0, sizeof(hci_driver_uart_env_t)); +} + +static int +hci_driver_uart_init(hci_driver_forward_fn *cb) +{ + int rc; + memset(&s_hci_driver_uart_env, 0, sizeof(hci_driver_uart_env_t)); + + s_hci_driver_uart_env.h4_sm = &s_hci_driver_uart_h4_sm; + hci_h4_sm_init(s_hci_driver_uart_env.h4_sm, &s_hci_driver_mem_alloc, hci_driver_uart_h4_frame_cb); + + rc = hci_driver_util_init(); + if (rc) { + goto error; + } + + s_hci_driver_uart_env.tx_sem = xSemaphoreCreateBinary(); + if (!s_hci_driver_uart_env.tx_sem) { + goto error; + } + + s_hci_driver_uart_env.rx_data = s_hci_driver_uart_rx_data; + s_hci_driver_uart_env.forward_cb = cb; + s_hci_driver_uart_env.hci_uart_params = &hci_driver_uart_params; + hci_driver_uart_config(&hci_driver_uart_params); + /* Currently, the queue size is set to 1. It will be considered as semaphore. */ + ESP_ERROR_CHECK(uart_driver_install(s_hci_driver_uart_env.hci_uart_params->hci_uart_port, + CONFIG_BT_LE_HCI_UART_RX_BUFFER_SIZE, + CONFIG_BT_LE_HCI_UART_TX_BUFFER_SIZE, + 1, &s_hci_driver_uart_env.rx_event_queue, + 0)); + + rc = hci_driver_uart_task_create(); + if (rc) { + goto error; + } + + return 0; + +error: + hci_driver_uart_deinit(); + return rc; +} + +int +hci_driver_uart_reconfig_pin(int tx_pin, int rx_pin, int cts_pin, int rts_pin) +{ + hci_driver_uart_params_config_t *uart_param = s_hci_driver_uart_env.hci_uart_params; + uart_param->hci_uart_tx_pin = tx_pin; + uart_param->hci_uart_rx_pin = rx_pin; + uart_param->hci_uart_rts_pin = rts_pin; + uart_param->hci_uart_cts_pin = cts_pin; + return hci_driver_uart_config(uart_param); +} + +hci_driver_ops_t hci_driver_uart_ops = { + .hci_driver_tx = hci_driver_uart_tx, + .hci_driver_init = hci_driver_uart_init, + .hci_driver_deinit = hci_driver_uart_deinit, +}; diff --git a/components/bt/porting/transport/driver/uart/hci_driver_uart.h b/components/bt/porting/transport/driver/uart/hci_driver_uart.h new file mode 100644 index 00000000000..8b5f5eb8560 --- /dev/null +++ b/components/bt/porting/transport/driver/uart/hci_driver_uart.h @@ -0,0 +1,97 @@ +/* + * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif +#include +#include "driver/uart.h" +#include "os/os_mbuf.h" +#include "esp_bt.h" +#include "esp_hci_transport.h" + +/** + * @brief UART configuration parameters for the HCI driver + */ +typedef struct hci_driver_uart_params_config +{ + uint8_t hci_uart_port; /*!< Port of UART for HCI */ + uint8_t hci_uart_data_bits; /*!< Data bits of UART for HCI */ + uint8_t hci_uart_stop_bits; /*!< Stop bits of UART for HCI */ + uint8_t hci_uart_flow_ctrl; /*!< Flow control of UART for HCI */ + uint8_t hci_uart_parity; /*!< UART parity */ + uint8_t hci_uart_driver_mode; /*!< UART driver mode */ + uint32_t hci_uart_baud; /*!< Baudrate of UART for HCI */ + int hci_uart_tx_pin; /*!< Tx Pin number of UART for HCI */ + int hci_uart_rx_pin; /*!< Rx Pin number of UART for HCI */ + int hci_uart_rts_pin; /*!< RTS Pin number of UART for HCI */ + int hci_uart_cts_pin; /*!< CTS Pin number of UART for HCI */ +} hci_driver_uart_params_config_t; + +#define BT_HCI_DRIVER_UART_CONFIG_DEFAULT() { \ + .hci_uart_port = DEFAULT_BT_LE_HCI_UART_PORT, \ + .hci_uart_baud = DEFAULT_BT_LE_HCI_UART_BAUD, \ + .hci_uart_tx_pin = DEFAULT_BT_LE_HCI_UART_TX_PIN , \ + .hci_uart_rx_pin = DEFAULT_BT_LE_HCI_UART_RX_PIN, \ + .hci_uart_cts_pin = DEFAULT_BT_LE_HCI_UART_CTS_PIN, \ + .hci_uart_rts_pin = DEFAULT_BT_LE_HCI_UART_RTS_PIN, \ + .hci_uart_data_bits = DEFAULT_BT_LE_HCI_UART_DATA_BITS, \ + .hci_uart_stop_bits = DEFAULT_BT_LE_HCI_UART_STOP_BITS, \ + .hci_uart_flow_ctrl = DEFAULT_BT_LE_HCI_UART_FLOW_CTRL, \ + .hci_uart_parity = DEFAULT_BT_LE_HCI_UART_PARITY, \ +} + +/** + * @brief Configures the HCI driver UART parameters. + * This function sets up the UART interface according to the specified configuration parameters. + * + * @param uart_config A pointer to a structure containing the UART configuration parameters. + * The structure should include details such as baud rate, parity, stop bits, and flow control. + * Ensure that the uart_config structure is correctly initialized before calling this function. + * + * @return int Returns 0 on success, or a non-zero error code on failure. + * + * @note This function should be called before any UART communication is initiated. + */ +int hci_driver_uart_config(hci_driver_uart_params_config_t *uart_config); + +#if CONFIG_BT_LE_UART_HCI_DMA_MODE +/** + * @brief Reconfigure the UART pins for the HCI driver. + * + * This function changes the UART pin configuration for the HCI driver. + * + * @param tx_pin The pin number for the UART TX (transmit) line. + * @param rx_pin The pin number for the UART RX (receive) line. + * @param cts_pin The pin number for the UART CTS (clear to send) line. + * @param rts_pin The pin number for the UART RTS (request to send) line. + * + * @return int Returns 0 on success, or a negative error code on failure. + */ +int hci_driver_uart_dma_reconfig_pin(int tx_pin, int rx_pin, int cts_pin, int rts_pin); +#define hci_uart_reconfig_pin hci_driver_uart_dma_reconfig_pin +#else +/** + * @brief Reconfigure the UART pins for the HCI driver. + * + * This function changes the UART pin configuration for the HCI driver. + * + * @param tx_pin The pin number for the UART TX (transmit) line. + * @param rx_pin The pin number for the UART RX (receive) line. + * @param cts_pin The pin number for the UART CTS (clear to send) line. + * @param rts_pin The pin number for the UART RTS (request to send) line. + * + * @return int Returns 0 on success, or a negative error code on failure. + */ +int hci_driver_uart_reconfig_pin(int tx_pin, int rx_pin, int cts_pin, int rts_pin); +#define hci_uart_reconfig_pin hci_driver_uart_reconfig_pin +#endif // CONFIG_BT_LE_UART_HCI_DMA_MODE + +#ifdef __cplusplus +} +#endif diff --git a/components/bt/porting/transport/driver/uart/hci_driver_uart_config.c b/components/bt/porting/transport/driver/uart/hci_driver_uart_config.c new file mode 100644 index 00000000000..aae33634647 --- /dev/null +++ b/components/bt/porting/transport/driver/uart/hci_driver_uart_config.c @@ -0,0 +1,40 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include "esp_log.h" +#include "driver/uart.h" +#include "hci_driver_uart.h" + + +static const char *TAG = "hci_uart_config"; +static uart_config_t s_uart_cfg; + +int hci_driver_uart_config(hci_driver_uart_params_config_t *uart_config) +{ + uart_config_t *uart_cfg; + uart_cfg = &s_uart_cfg; + uart_cfg->baud_rate = uart_config->hci_uart_baud; + uart_cfg->data_bits = uart_config->hci_uart_data_bits; + uart_cfg->stop_bits = uart_config->hci_uart_stop_bits; + uart_cfg->parity = uart_config->hci_uart_parity; + uart_cfg->flow_ctrl = uart_config->hci_uart_flow_ctrl; + uart_cfg->source_clk= UART_SCLK_DEFAULT; + uart_cfg->rx_flow_ctrl_thresh = UART_HW_FIFO_LEN(uart_config->hci_uart_port) - 1; + + + ESP_LOGI(TAG,"set uart pin tx:%d, rx:%d.\n", uart_config->hci_uart_tx_pin, uart_config->hci_uart_rx_pin); + ESP_LOGI(TAG,"set rts:%d, cts:%d.\n", uart_config->hci_uart_rts_pin, uart_config->hci_uart_cts_pin); + ESP_LOGI(TAG,"set baud_rate:%d.\n", uart_config->hci_uart_baud); + ESP_LOGI(TAG,"set flow_ctrl:%d.\n", uart_config->hci_uart_flow_ctrl); + + ESP_ERROR_CHECK(uart_driver_delete(uart_config->hci_uart_port)); + ESP_ERROR_CHECK(uart_param_config(uart_config->hci_uart_port, uart_cfg)); + ESP_ERROR_CHECK(uart_set_pin(uart_config->hci_uart_port, uart_config->hci_uart_tx_pin, uart_config->hci_uart_rx_pin, + uart_config->hci_uart_rts_pin, uart_config->hci_uart_cts_pin)); + return 0; +} diff --git a/components/bt/porting/transport/driver/uart/hci_driver_uart_dma.c b/components/bt/porting/transport/driver/uart/hci_driver_uart_dma.c new file mode 100644 index 00000000000..a90fb749a11 --- /dev/null +++ b/components/bt/porting/transport/driver/uart/hci_driver_uart_dma.c @@ -0,0 +1,670 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include "freertos/FreeRTOS.h" +#include "freertos/queue.h" +#include "freertos/task.h" +#include "freertos/semphr.h" +#include "esp_log.h" +#include "driver/uart.h" +#include "esp_hci_transport.h" +#include "esp_hci_internal.h" +#include "common/hci_driver_h4.h" +#include "common/hci_driver_util.h" +#include "common/hci_driver_mem.h" +#include "hci_driver_uart.h" + +#include "ble_hci_trans.h" +#include "esp_private/periph_ctrl.h" +#include "esp_private/gdma.h" +#include "hal/uhci_ll.h" + +/* + * UART DMA Desc struct + * + * -------------------------------------------------------------- + * | own | EoF | sub_sof | 5'b0 | length [11:0] | size [11:0] | + * -------------------------------------------------------------- + * | buf_ptr [31:0] | + * -------------------------------------------------------------- + * | next_desc_ptr [31:0] | + * -------------------------------------------------------------- + */ + +/* this bitfield is start from the LSB!!! */ +typedef struct uhci_lldesc_s { + volatile uint32_t size : 12, + length: 12, + offset: 5, /* h/w reserved 5bit, s/w use it as offset in buffer */ + sosf : 1, /* start of sub-frame */ + eof : 1, /* end of frame */ + owner : 1; /* hw or sw */ + volatile const uint8_t *buf; /* point to buffer data */ + union { + volatile uint32_t empty; + STAILQ_ENTRY(uhci_lldesc_s) qe; /* pointing to the next desc */ + }; +} uhci_lldesc_t; + +/** + * @brief Enumeration of HCI transport transmission states. + */ +typedef enum { + HCI_TRANS_TX_IDLE, ///< HCI Transport TX is in idle state. + HCI_TRANS_TX_START, ///< HCI Transport TX is starting transmission. + HCI_TRANS_TX_END, ///< HCI Transport TX has completed transmission. +} hci_trans_tx_state_t; + +typedef struct { + TaskHandle_t task_handler; + hci_driver_uart_params_config_t *hci_uart_params; + SemaphoreHandle_t process_sem; + struct hci_h4_sm *h4_sm; + hci_driver_forward_fn *forward_cb; + struct os_mempool *hci_rx_data_pool; /*!< Init a memory pool for rx_data cache */ + uint8_t *hci_rx_data_buffer; + struct os_mempool *hci_rxinfo_pool; /*!< Init a memory pool for rxinfo cache */ + os_membuf_t *hci_rxinfo_buffer; + volatile bool rxinfo_mem_exhausted; /*!< Indicate rxinfo memory does not exist */ + volatile bool is_continue_rx; /*!< Continue to rx */ + volatile hci_trans_tx_state_t hci_tx_state; /*!< HCI Tx State */ + struct os_mempool lldesc_mem_pool;/*!< Init a memory pool for uhci_lldesc_t */ + uhci_lldesc_t *lldesc_mem; +} hci_driver_uart_dma_env_t; + +#define ESP_BT_HCI_TL_STATUS_OK (0) /*!< HCI_TL Tx/Rx operation status OK */ +/* The number of lldescs pool */ +#define HCI_LLDESCS_POOL_NUM (CONFIG_BT_LE_HCI_LLDESCS_POOL_NUM) +/* Default block size for HCI RX data */ +#define HCI_RX_DATA_BLOCK_SIZE (DEFAULT_BT_LE_ACL_BUF_SIZE + BLE_HCI_TRANS_CMD_SZ) +#define HCI_RX_DATA_POOL_NUM (CONFIG_BT_LE_HCI_TRANS_RX_MEM_NUM) +#define HCI_RX_INFO_POOL_NUM (CONFIG_BT_LE_HCI_TRANS_RX_MEM_NUM + 1) + +/** + * @brief callback function for HCI Transport Layer send/receive operations + */ +typedef void (* esp_bt_hci_tl_callback_t) (void *arg, uint8_t status); + +struct uart_txrxchannel { + esp_bt_hci_tl_callback_t callback; + void *arg; + uhci_lldesc_t *link_head; +}; + +struct uart_env_tag { + struct uart_txrxchannel tx; + struct uart_txrxchannel rx; +}; + +typedef struct hci_message { + void *ptr; ///< Pointer to the message data. + uint32_t length; ///< Length of the message data. + STAILQ_ENTRY(hci_message) next; ///< Next element in the linked list. +} hci_message_t; + +static void hci_driver_uart_dma_recv_async(uint8_t *buf, uint32_t size, esp_bt_hci_tl_callback_t callback, void *arg); +int hci_driver_uart_dma_rx_start(uint8_t *rx_data, uint32_t length); +int hci_driver_uart_dma_tx_start(esp_bt_hci_tl_callback_t callback, void *arg); + +static const char *TAG = "uart_dma"; +static hci_driver_uart_dma_env_t s_hci_driver_uart_dma_env; +static struct hci_h4_sm s_hci_driver_uart_h4_sm; +static hci_driver_uart_params_config_t hci_driver_uart_dma_params = BT_HCI_DRIVER_UART_CONFIG_DEFAULT(); + +/* The list for hci_rx_data */ +STAILQ_HEAD(g_hci_rxinfo_list, hci_message); + +DRAM_ATTR struct g_hci_rxinfo_list g_hci_rxinfo_head; +static DRAM_ATTR struct uart_env_tag uart_env; +static volatile uhci_dev_t *s_uhci_hw = &UHCI0; +static DRAM_ATTR gdma_channel_handle_t s_rx_channel; +static DRAM_ATTR gdma_channel_handle_t s_tx_channel; + +static int hci_driver_uart_dma_memory_deinit(void) +{ + + if (s_hci_driver_uart_dma_env.hci_rxinfo_buffer) { + free(s_hci_driver_uart_dma_env.hci_rxinfo_buffer); + s_hci_driver_uart_dma_env.hci_rxinfo_buffer = NULL; + } + + if (s_hci_driver_uart_dma_env.hci_rxinfo_pool) { + free(s_hci_driver_uart_dma_env.hci_rxinfo_pool); + s_hci_driver_uart_dma_env.hci_rxinfo_pool = NULL; + } + + if (s_hci_driver_uart_dma_env.hci_rx_data_buffer) { + free(s_hci_driver_uart_dma_env.hci_rx_data_buffer); + s_hci_driver_uart_dma_env.hci_rx_data_buffer = NULL; + } + + if (s_hci_driver_uart_dma_env.hci_rx_data_pool) { + free(s_hci_driver_uart_dma_env.hci_rx_data_pool); + s_hci_driver_uart_dma_env.hci_rx_data_pool = NULL; + } + + if (s_hci_driver_uart_dma_env.lldesc_mem) { + free(s_hci_driver_uart_dma_env.lldesc_mem); + s_hci_driver_uart_dma_env.lldesc_mem = NULL; + } + + return 0; +} + +static int hci_driver_uart_dma_memory_init(void) +{ + int rc = 0; + + s_hci_driver_uart_dma_env.lldesc_mem = malloc(OS_MEMPOOL_SIZE(HCI_LLDESCS_POOL_NUM, + sizeof (uhci_lldesc_t)) * sizeof(os_membuf_t)); + if (!s_hci_driver_uart_dma_env.lldesc_mem) { + return -1; + } + + rc = os_mempool_init(&s_hci_driver_uart_dma_env.lldesc_mem_pool, HCI_LLDESCS_POOL_NUM, + sizeof (uhci_lldesc_t), s_hci_driver_uart_dma_env.lldesc_mem, "hci_lldesc_pool"); + if (rc) { + goto init_err; + } + + s_hci_driver_uart_dma_env.hci_rx_data_pool = (struct os_mempool *)malloc(sizeof(struct os_mempool)); + if (!s_hci_driver_uart_dma_env.hci_rx_data_pool) { + goto init_err; + } + + memset(s_hci_driver_uart_dma_env.hci_rx_data_pool, 0, sizeof(struct os_mempool)); + s_hci_driver_uart_dma_env.hci_rx_data_buffer = malloc(OS_MEMPOOL_SIZE(HCI_RX_DATA_POOL_NUM, + HCI_RX_DATA_BLOCK_SIZE) * sizeof(os_membuf_t)); + if (!s_hci_driver_uart_dma_env.hci_rx_data_buffer) { + goto init_err; + } + + memset(s_hci_driver_uart_dma_env.hci_rx_data_buffer, 0, OS_MEMPOOL_SIZE(HCI_RX_DATA_POOL_NUM, + HCI_RX_DATA_BLOCK_SIZE) * sizeof(os_membuf_t)); + rc = os_mempool_init(s_hci_driver_uart_dma_env.hci_rx_data_pool, HCI_RX_DATA_POOL_NUM, + HCI_RX_DATA_BLOCK_SIZE, s_hci_driver_uart_dma_env.hci_rx_data_buffer, + "hci_rx_data_pool"); + if (rc) { + goto init_err; + } + + + /* Malloc hci rxinfo pool */ + s_hci_driver_uart_dma_env.hci_rxinfo_pool = (struct os_mempool *)malloc(sizeof(struct os_mempool)); + if (!s_hci_driver_uart_dma_env.hci_rxinfo_pool) { + goto init_err; + } + + memset(s_hci_driver_uart_dma_env.hci_rxinfo_pool, 0, sizeof(struct os_mempool)); + s_hci_driver_uart_dma_env.hci_rxinfo_buffer = malloc(OS_MEMPOOL_SIZE(HCI_RX_INFO_POOL_NUM, + sizeof(hci_message_t)) * sizeof(os_membuf_t)); + if (!s_hci_driver_uart_dma_env.hci_rxinfo_buffer) { + goto init_err; + } + + memset(s_hci_driver_uart_dma_env.hci_rxinfo_buffer, 0, OS_MEMPOOL_SIZE(HCI_RX_INFO_POOL_NUM, + sizeof(hci_message_t)) * sizeof(os_membuf_t)); + rc = os_mempool_init(s_hci_driver_uart_dma_env.hci_rxinfo_pool, HCI_RX_INFO_POOL_NUM, + sizeof(hci_message_t), s_hci_driver_uart_dma_env.hci_rxinfo_buffer, + "hci_rxinfo_pool"); + if (rc) { + goto init_err; + } + + return rc; +init_err: + hci_driver_uart_dma_memory_deinit(); + return rc; +} + +static IRAM_ATTR bool hci_uart_tl_rx_eof_callback(gdma_channel_handle_t dma_chan, gdma_event_data_t *event_data, void *user_data) +{ + esp_bt_hci_tl_callback_t callback = uart_env.rx.callback; + void *arg = uart_env.rx.arg; + assert(dma_chan == s_rx_channel); + assert(uart_env.rx.callback != NULL); + // clear callback pointer + uart_env.rx.callback = NULL; + uart_env.rx.arg = NULL; + // call handler + callback(arg, ESP_BT_HCI_TL_STATUS_OK); + return true; +} + +static IRAM_ATTR bool hci_uart_tl_tx_eof_callback(gdma_channel_handle_t dma_chan, gdma_event_data_t *event_data, void *user_data) +{ + esp_bt_hci_tl_callback_t callback = uart_env.tx.callback; + assert(dma_chan == s_tx_channel); + assert(uart_env.tx.callback != NULL); + // clear callback pointer + uart_env.tx.callback = NULL; + // call handler + callback(uart_env.tx.arg, ESP_BT_HCI_TL_STATUS_OK); + uart_env.tx.arg = NULL; + return true; +} + +uint8_t * IRAM_ATTR hci_driver_uart_dma_rxdata_memory_get(void) +{ + uint8_t *rx_data; + rx_data = os_memblock_get(s_hci_driver_uart_dma_env.hci_rx_data_pool); + return rx_data; +} + +hci_message_t * IRAM_ATTR hci_driver_uart_dma_rxinfo_memory_get(void) +{ + hci_message_t *rx_info; + rx_info = os_memblock_get(s_hci_driver_uart_dma_env.hci_rxinfo_pool); + return rx_info; +} + +void IRAM_ATTR hci_driver_uart_dma_cache_rxinfo(hci_message_t *hci_rxinfo) +{ + os_sr_t sr; + + OS_ENTER_CRITICAL(sr); + STAILQ_INSERT_TAIL(&g_hci_rxinfo_head, hci_rxinfo, next); + OS_EXIT_CRITICAL(sr); +} + +void IRAM_ATTR hci_driver_uart_dma_continue_rx_enable(bool enable) +{ + os_sr_t sr; + OS_ENTER_CRITICAL(sr); + s_hci_driver_uart_dma_env.is_continue_rx = enable; + OS_EXIT_CRITICAL(sr); +} + +void IRAM_ATTR hci_driver_uart_dma_rxinfo_mem_exhausted_set(bool is_exhausted) +{ + os_sr_t sr; + OS_ENTER_CRITICAL(sr); + s_hci_driver_uart_dma_env.rxinfo_mem_exhausted = is_exhausted; + OS_EXIT_CRITICAL(sr); +} + +void IRAM_ATTR hci_driver_uart_dma_recv_callback(void *arg, uint8_t status) +{ + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + hci_message_t *hci_rxinfo; + uint8_t *rx_data; + + if (s_hci_driver_uart_dma_env.rxinfo_mem_exhausted) { + ESP_LOGE(TAG, "Will lost rx data, need adjust rxinfo memory count\n"); + assert(0); + } + + hci_rxinfo = hci_driver_uart_dma_rxinfo_memory_get(); + if (!hci_rxinfo) { + ESP_LOGW(TAG, "set rxinfo mem exhausted flag\n"); + hci_driver_uart_dma_rxinfo_mem_exhausted_set(true); + xSemaphoreGiveFromISR(s_hci_driver_uart_dma_env.process_sem, &xHigherPriorityTaskWoken); + return; + } + + hci_rxinfo->ptr = (void *)uart_env.rx.link_head->buf; + hci_rxinfo->length = uart_env.rx.link_head->length; + hci_driver_uart_dma_cache_rxinfo(hci_rxinfo); + xSemaphoreGiveFromISR(s_hci_driver_uart_dma_env.process_sem, &xHigherPriorityTaskWoken); + rx_data = hci_driver_uart_dma_rxdata_memory_get(); + if (!rx_data) { + hci_driver_uart_dma_continue_rx_enable(true); + }else { + hci_driver_uart_dma_rx_start(rx_data, HCI_RX_DATA_BLOCK_SIZE); + } +} + +void IRAM_ATTR hci_driver_uart_dma_txstate_set(hci_trans_tx_state_t tx_state) +{ + os_sr_t sr; + OS_ENTER_CRITICAL(sr); + s_hci_driver_uart_dma_env.hci_tx_state = tx_state; + OS_EXIT_CRITICAL(sr); +} + +void IRAM_ATTR hci_driver_uart_dma_send_callback(void *arg, uint8_t status) +{ + uhci_lldesc_t *lldesc_head; + uhci_lldesc_t *lldesc_nxt; + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + + lldesc_head = uart_env.tx.link_head; + while (lldesc_head) { + lldesc_nxt = lldesc_head->qe.stqe_next; + os_memblock_put(&s_hci_driver_uart_dma_env.lldesc_mem_pool, lldesc_head); + lldesc_head = lldesc_nxt; + } + + uart_env.tx.link_head = NULL; + hci_driver_uart_dma_txstate_set(HCI_TRANS_TX_IDLE); + xSemaphoreGiveFromISR(s_hci_driver_uart_dma_env.process_sem, &xHigherPriorityTaskWoken); +} + +static IRAM_ATTR void hci_driver_uart_dma_recv_async(uint8_t *buf, uint32_t size, esp_bt_hci_tl_callback_t callback, void *arg) +{ + uhci_lldesc_t *lldesc_head; + assert(buf != NULL); + assert(size != 0); + assert(callback != NULL); + uart_env.rx.callback = callback; + uart_env.rx.arg = arg; + lldesc_head = uart_env.rx.link_head; + + while (lldesc_head) { + os_memblock_put(&s_hci_driver_uart_dma_env.lldesc_mem_pool, lldesc_head), + lldesc_head = lldesc_head->qe.stqe_next; + } + + uart_env.rx.link_head = NULL; + lldesc_head = os_memblock_get(&s_hci_driver_uart_dma_env.lldesc_mem_pool); + assert(lldesc_head); + memset(lldesc_head, 0, sizeof(uhci_lldesc_t)); + lldesc_head->buf = buf; + lldesc_head->size = size; + lldesc_head->eof = 0; + s_uhci_hw->pkt_thres.pkt_thrs = size; + uart_env.rx.link_head = lldesc_head; + gdma_start(s_rx_channel, (intptr_t)(uart_env.rx.link_head)); +} + +int IRAM_ATTR hci_driver_uart_dma_rx_start(uint8_t *rx_data, uint32_t length) +{ + hci_driver_uart_dma_recv_async(rx_data, length, hci_driver_uart_dma_recv_callback, NULL); + return 0; +} + +int hci_driver_uart_dma_tx_start(esp_bt_hci_tl_callback_t callback, void *arg) +{ + void *data; + bool last_frame; + bool head_is_setted; + uint32_t tx_len; + uhci_lldesc_t *lldesc_data; + uhci_lldesc_t *lldesc_head; + uhci_lldesc_t *lldesc_tail; + + lldesc_head = NULL; + lldesc_tail = NULL; + head_is_setted = false; + last_frame = false; + while (true) { + tx_len = hci_driver_util_tx_list_dequeue(0xffffff, &data, &last_frame); + if (!tx_len) { + break; + } + + lldesc_data = os_memblock_get(&s_hci_driver_uart_dma_env.lldesc_mem_pool); + /* According to the current processing logic， It should not be empty */ + assert(lldesc_data); + memset(lldesc_data, 0, sizeof(uhci_lldesc_t)); + lldesc_data->length = tx_len; + lldesc_data->buf = data; + lldesc_data->eof = 0; + if (!head_is_setted) { + lldesc_head = lldesc_data; + head_is_setted = true; + } else { + lldesc_tail->qe.stqe_next = lldesc_data; + } + + lldesc_tail = lldesc_data; + if (last_frame) { + break; + } + } + + if (lldesc_head) { + lldesc_tail->eof = 1; + uart_env.tx.link_head = lldesc_head; + uart_env.tx.callback = callback; + uart_env.tx.arg = arg; + gdma_start(s_tx_channel, (intptr_t)(uart_env.tx.link_head)); + return 0; + } else { + return -1; + } +} + +static void hci_driver_uart_dma_install(void) +{ + periph_module_enable(PERIPH_UHCI0_MODULE); + periph_module_reset(PERIPH_UHCI0_MODULE); + // install DMA driver + gdma_channel_alloc_config_t tx_channel_config = { + .flags.reserve_sibling = 1, + .direction = GDMA_CHANNEL_DIRECTION_TX, + }; + + ESP_ERROR_CHECK(gdma_new_channel(&tx_channel_config, &s_tx_channel)); + gdma_channel_alloc_config_t rx_channel_config = { + .direction = GDMA_CHANNEL_DIRECTION_RX, + .sibling_chan = s_tx_channel, + }; + + ESP_ERROR_CHECK(gdma_new_channel(&rx_channel_config, &s_rx_channel)); + gdma_connect(s_tx_channel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_UHCI, 0)); + gdma_connect(s_rx_channel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_UHCI, 0)); + gdma_strategy_config_t strategy_config = { + .auto_update_desc = false, + .owner_check = false + }; + + gdma_apply_strategy(s_tx_channel, &strategy_config); + gdma_apply_strategy(s_rx_channel, &strategy_config); + gdma_rx_event_callbacks_t rx_cbs = { + .on_recv_eof = hci_uart_tl_rx_eof_callback + }; + + gdma_register_rx_event_callbacks(s_rx_channel, &rx_cbs, NULL); + gdma_tx_event_callbacks_t tx_cbs = { + .on_trans_eof = hci_uart_tl_tx_eof_callback + }; + + gdma_register_tx_event_callbacks(s_tx_channel, &tx_cbs, NULL); + // configure UHCI + uhci_ll_init((uhci_dev_t *)s_uhci_hw); + // uhci_ll_set_eof_mode((uhci_dev_t *)s_uhci_hw, UHCI_RX_LEN_EOF); + uhci_ll_set_eof_mode((uhci_dev_t *)s_uhci_hw, UHCI_RX_IDLE_EOF); + // disable software flow control + s_uhci_hw->escape_conf.val = 0; + uhci_ll_attach_uart_port((uhci_dev_t *)s_uhci_hw, s_hci_driver_uart_dma_env.hci_uart_params->hci_uart_port); +} + +static int +hci_driver_uart_dma_tx(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length, + hci_driver_direction_t dir) +{ + /* By now, this layer is only used by controller. */ + assert(dir == HCI_DRIVER_DIR_C2H); + ESP_LOGD(TAG, "dma tx:"); + ESP_LOG_BUFFER_HEXDUMP(TAG, data, length, ESP_LOG_DEBUG); + + hci_driver_util_tx_list_enqueue(data_type, data, length); + xSemaphoreGive(s_hci_driver_uart_dma_env.process_sem); + return 0; +} + +static int +hci_driver_uart_dma_h4_frame_cb(uint8_t pkt_type, void *data) +{ + hci_driver_forward_fn *forward_cb; + forward_cb = s_hci_driver_uart_dma_env.forward_cb; + if (!forward_cb) { + return -1; + } + ESP_LOGD(TAG, "h4 frame\n"); + return forward_cb(pkt_type, data, 0, HCI_DRIVER_DIR_H2C); +} + +static void +hci_driver_uart_dma_process_task(void *p) +{ + hci_message_t *rxinfo_container; + os_sr_t sr; + int ret; + uint8_t* rx_data; + uint32_t rx_len; + + while (true) { + xSemaphoreTake(s_hci_driver_uart_dma_env.process_sem, portMAX_DELAY); + ESP_LOGD(TAG, "task run:%d\n",s_hci_driver_uart_dma_env.hci_tx_state); + if (s_hci_driver_uart_dma_env.rxinfo_mem_exhausted) { + rx_data = (void *)uart_env.rx.link_head->buf; + rx_len = uart_env.rx.link_head->length; + ESP_LOGD(TAG, "rxinfo exhausted:"); + ESP_LOG_BUFFER_HEXDUMP(TAG, rx_data, rx_len, ESP_LOG_DEBUG); + ret = hci_h4_sm_rx(s_hci_driver_uart_dma_env.h4_sm, rx_data, rx_len); + hci_driver_uart_dma_rx_start(rx_data, HCI_RX_DATA_BLOCK_SIZE); + hci_driver_uart_dma_rxinfo_mem_exhausted_set(false); + if (ret < 0) { + ESP_LOGW(TAG, "parse rx data error!\n"); + r_ble_ll_hci_ev_hw_err(ESP_HCI_SYNC_LOSS_ERR); + } + } + + while (!STAILQ_EMPTY(&g_hci_rxinfo_head)) { + OS_ENTER_CRITICAL(sr); + rxinfo_container = STAILQ_FIRST(&g_hci_rxinfo_head); + STAILQ_REMOVE_HEAD(&g_hci_rxinfo_head, next); + OS_EXIT_CRITICAL(sr); + + rx_data = rxinfo_container->ptr; + rx_len = rxinfo_container->length; + ESP_LOGD(TAG, "uart rx"); + ESP_LOG_BUFFER_HEXDUMP(TAG, rx_data, rx_len, ESP_LOG_DEBUG); + ret = hci_h4_sm_rx(s_hci_driver_uart_dma_env.h4_sm, rx_data, rx_len); + if (ret < 0) { + ESP_LOGW(TAG, "parse rx data error!\n"); + r_ble_ll_hci_ev_hw_err(ESP_HCI_SYNC_LOSS_ERR); + } + + os_memblock_put(s_hci_driver_uart_dma_env.hci_rxinfo_pool, rxinfo_container); + /* No need to enter CRITICAL */ + if (s_hci_driver_uart_dma_env.is_continue_rx) { + /* We should set continux rx flag first, RX interrupted may happened when rx start soon */ + hci_driver_uart_dma_continue_rx_enable(false); + hci_driver_uart_dma_rx_start(rx_data, HCI_RX_DATA_BLOCK_SIZE); + } else { + os_memblock_put(s_hci_driver_uart_dma_env.hci_rx_data_pool, rx_data); + } + } + + /* Process Tx data */ + if (s_hci_driver_uart_dma_env.hci_tx_state == HCI_TRANS_TX_IDLE) { + ret = hci_driver_uart_dma_tx_start(hci_driver_uart_dma_send_callback, (void*)&uart_env); + if (!ret) { + s_hci_driver_uart_dma_env.hci_tx_state = HCI_TRANS_TX_START; + } + } + } +} + +static int +hci_driver_uart_dma_task_create(void) +{ + /* !TODO: Set the core id by menuconfig */ + xTaskCreatePinnedToCore(hci_driver_uart_dma_process_task, "hci_driver_uart_dma_process_task", + CONFIG_BT_LE_HCI_TRANS_TASK_STACK_SIZE, NULL, + ESP_TASK_BT_CONTROLLER_PRIO, &s_hci_driver_uart_dma_env.task_handler, + 0); + assert(s_hci_driver_uart_dma_env.task_handler); + + ESP_LOGI(TAG, "hci transport task create successfully, prio:%d, stack size: %ld", + ESP_TASK_BT_CONTROLLER_PRIO, CONFIG_BT_LE_HCI_TRANS_TASK_STACK_SIZE); + + return 0; +} + + +static void +hci_driver_uart_dma_deinit(void) +{ + if (s_hci_driver_uart_dma_env.task_handler) { + vTaskDelete(s_hci_driver_uart_dma_env.task_handler); + s_hci_driver_uart_dma_env.task_handler = NULL; + } + + ESP_ERROR_CHECK(uart_driver_delete(s_hci_driver_uart_dma_env.hci_uart_params->hci_uart_port)); + hci_driver_uart_dma_memory_deinit(); + if (!s_hci_driver_uart_dma_env.process_sem) { + vSemaphoreDelete(s_hci_driver_uart_dma_env.process_sem); + } + + hci_driver_util_deinit(); + memset(&s_hci_driver_uart_dma_env, 0, sizeof(hci_driver_uart_dma_env_t)); +} + + +static int +hci_driver_uart_dma_init(hci_driver_forward_fn *cb) +{ + int rc; + + memset(&s_hci_driver_uart_dma_env, 0, sizeof(hci_driver_uart_dma_env_t)); + + s_hci_driver_uart_dma_env.h4_sm = &s_hci_driver_uart_h4_sm; + hci_h4_sm_init(s_hci_driver_uart_dma_env.h4_sm, &s_hci_driver_mem_alloc, hci_driver_uart_dma_h4_frame_cb); + + rc = hci_driver_util_init(); + if (rc) { + goto error; + } + + s_hci_driver_uart_dma_env.process_sem = xSemaphoreCreateBinary(); + if (!s_hci_driver_uart_dma_env.process_sem) { + goto error; + } + + rc = hci_driver_uart_dma_memory_init(); + if (rc) { + goto error; + } + + s_hci_driver_uart_dma_env.forward_cb = cb; + s_hci_driver_uart_dma_env.hci_uart_params = &hci_driver_uart_dma_params; + hci_driver_uart_config(&hci_driver_uart_dma_params); + + ESP_LOGI(TAG, "uart attach uhci!"); + hci_driver_uart_dma_install(); + + STAILQ_INIT(&g_hci_rxinfo_head); + + rc = hci_driver_uart_dma_task_create(); + if (rc) { + goto error; + } + + s_hci_driver_uart_dma_env.hci_tx_state = HCI_TRANS_TX_IDLE; + s_hci_driver_uart_dma_env.rxinfo_mem_exhausted = false; + s_hci_driver_uart_dma_env.is_continue_rx = false; + hci_driver_uart_dma_rx_start(os_memblock_get(s_hci_driver_uart_dma_env.hci_rx_data_pool), + HCI_RX_DATA_BLOCK_SIZE); + return 0; + +error: + hci_driver_uart_dma_deinit(); + return rc; +} + +int +hci_driver_uart_dma_reconfig_pin(int tx_pin, int rx_pin, int cts_pin, int rts_pin) +{ + hci_driver_uart_params_config_t *uart_param = s_hci_driver_uart_dma_env.hci_uart_params; + uart_param->hci_uart_tx_pin = tx_pin; + uart_param->hci_uart_rx_pin = rx_pin; + uart_param->hci_uart_rts_pin = rts_pin; + uart_param->hci_uart_cts_pin = cts_pin; + return hci_driver_uart_config(uart_param); +} + + +hci_driver_ops_t hci_driver_uart_dma_ops = { + .hci_driver_tx = hci_driver_uart_dma_tx, + .hci_driver_init = hci_driver_uart_dma_init, + .hci_driver_deinit = hci_driver_uart_dma_deinit, +}; diff --git a/components/bt/porting/transport/driver/vhci/hci_driver_nimble.c b/components/bt/porting/transport/driver/vhci/hci_driver_nimble.c new file mode 100644 index 00000000000..9a117eb88a5 --- /dev/null +++ b/components/bt/porting/transport/driver/vhci/hci_driver_nimble.c @@ -0,0 +1,61 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include +#include +#include "esp_hci_internal.h" +#include "esp_hci_driver.h" + +typedef struct { + hci_driver_forward_fn *forward_cb; +} hci_driver_vhci_env_t; + +static hci_driver_vhci_env_t s_hci_driver_vhci_env; + +static int +hci_driver_vhci_controller_tx(hci_driver_data_type_t data_type, uint8_t *data) +{ + /* The length is contained in the data. */ + return s_hci_driver_vhci_env.forward_cb(data_type, data, 0, HCI_DRIVER_DIR_C2H); +} + +static int +hci_driver_vhci_host_tx(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length) +{ + return s_hci_driver_vhci_env.forward_cb(data_type, data, length, HCI_DRIVER_DIR_H2C); +} + +static int +hci_driver_vhci_tx(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length, + hci_driver_direction_t dir) +{ + int rc; + + if (dir == HCI_DRIVER_DIR_C2H) { + rc = hci_driver_vhci_controller_tx(data_type, data); + } else { + rc = hci_driver_vhci_host_tx(data_type, data, length); + } + return rc; +} + +static int +hci_driver_vhci_init(hci_driver_forward_fn *cb) +{ + s_hci_driver_vhci_env.forward_cb = cb; + return 0; +} + +static void +hci_driver_vhci_deinit(void) +{ + memset(&s_hci_driver_vhci_env, 0, sizeof(hci_driver_vhci_env_t)); +} + +hci_driver_ops_t hci_driver_vhci_ops = { + .hci_driver_tx = hci_driver_vhci_tx, + .hci_driver_init = hci_driver_vhci_init, + .hci_driver_deinit = hci_driver_vhci_deinit, +}; diff --git a/components/bt/porting/transport/driver/vhci/hci_driver_standard.c b/components/bt/porting/transport/driver/vhci/hci_driver_standard.c new file mode 100644 index 00000000000..2cdab4359e5 --- /dev/null +++ b/components/bt/porting/transport/driver/vhci/hci_driver_standard.c @@ -0,0 +1,149 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include +#include +#include "os/os_mbuf.h" +#include "esp_hci_transport.h" +#include "esp_hci_internal.h" +#include "esp_hci_driver.h" +#include "esp_bt.h" + +typedef struct { + hci_driver_forward_fn *forward_cb; + const esp_vhci_host_callback_t *host_recv_cb; +} hci_driver_vhci_env_t; + +static hci_driver_vhci_env_t s_hci_driver_vhci_env; + +static int +hci_driver_vhci_controller_tx(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length) +{ + int rc; + uint16_t buf_len = 0; + uint8_t *buf = NULL; + struct os_mbuf *om; + + if (data_type == HCI_DRIVER_TYPE_ACL) { + om = (struct os_mbuf *)data; + buf_len = length + 1; + buf = malloc(buf_len); + /* TODO: If there is no memory, should handle it in the controller. */ + assert(buf); + buf[0] = HCI_DRIVER_TYPE_ACL; + os_mbuf_copydata(om, 0, length, &buf[1]); + os_mbuf_free_chain(om); + } else if (data_type == HCI_DRIVER_TYPE_EVT) { + buf_len = length + 1; + buf = malloc(buf_len); + /* TODO: If there is no memory, should handle it in the controller. */ + assert(buf != NULL); + buf[0] = HCI_DRIVER_TYPE_EVT; + memcpy(&buf[1], data, length); + r_ble_hci_trans_buf_free(data); + } + + rc = s_hci_driver_vhci_env.forward_cb(data_type, buf, buf_len, HCI_DRIVER_DIR_C2H); + free(buf); + + return rc; +} + +static int +hci_driver_vhci_host_tx(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length) +{ + uint8_t *cmd; + struct os_mbuf *om; + + if (data_type == HCI_DRIVER_TYPE_ACL) { + om = os_msys_get_pkthdr(length, ESP_HCI_INTERNAL_ACL_MBUF_LEADINGSPCAE); + assert(om); + assert(os_mbuf_append(om, &data[1], length - 1) == 0); + data = (uint8_t *)om; + } else if (data_type == HCI_DRIVER_TYPE_CMD) { + cmd = r_ble_hci_trans_buf_alloc(ESP_HCI_INTERNAL_BUF_CMD); + assert(cmd); + memcpy(cmd, data + 1, length - 1); + data = cmd; + } + + return s_hci_driver_vhci_env.forward_cb(data_type, data, length, HCI_DRIVER_DIR_H2C); +} + +static int +hci_driver_vhci_tx(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length, + hci_driver_direction_t dir) +{ + int rc; + + if (dir == HCI_DRIVER_DIR_C2H) { + rc = hci_driver_vhci_controller_tx(data_type, data, length); + } else { + rc = hci_driver_vhci_host_tx(data_type, data, length); + } + return rc; +} + +static int +hci_driver_vhci_init(hci_driver_forward_fn *cb) +{ + memset(&s_hci_driver_vhci_env, 0, sizeof(hci_driver_vhci_env_t)); + s_hci_driver_vhci_env.forward_cb = cb; + return 0; +} + +static void +hci_driver_vhci_deinit(void) +{ + memset(&s_hci_driver_vhci_env, 0, sizeof(hci_driver_vhci_env_t)); +} + +hci_driver_ops_t hci_driver_vhci_ops = { + .hci_driver_tx = hci_driver_vhci_tx, + .hci_driver_init = hci_driver_vhci_init, + .hci_driver_deinit = hci_driver_vhci_deinit, +}; + +/* Special APIs declared in the `esp_bt.h'. */ +static int +hci_driver_vhci_host_recv_cb(hci_trans_pkt_ind_t type, uint8_t *data, uint16_t len) +{ + static const esp_vhci_host_callback_t *host_recv_cb; + + host_recv_cb = s_hci_driver_vhci_env.host_recv_cb; + if (host_recv_cb) { + return host_recv_cb->notify_host_recv(data, len); + } + + return -1; +} + +esp_err_t +esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback) +{ + if (esp_bt_controller_get_status() != ESP_BT_CONTROLLER_STATUS_ENABLED) { + return ESP_FAIL; + } + + s_hci_driver_vhci_env.host_recv_cb = callback; + if(hci_transport_host_callback_register(hci_driver_vhci_host_recv_cb)) { + s_hci_driver_vhci_env.host_recv_cb = NULL; + return ESP_FAIL; + } + + return ESP_OK; +} + +void +esp_vhci_host_send_packet(uint8_t *data, uint16_t len) +{ + hci_driver_vhci_tx(data[0], data, len, HCI_DRIVER_DIR_H2C); +} + +bool +esp_vhci_host_check_send_available(void) +{ + return true; +} diff --git a/components/bt/porting/transport/driver/vhci/hci_driver_tamplete.c b/components/bt/porting/transport/driver/vhci/hci_driver_tamplete.c new file mode 100644 index 00000000000..63feb934dad --- /dev/null +++ b/components/bt/porting/transport/driver/vhci/hci_driver_tamplete.c @@ -0,0 +1,133 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include +#include +#include "os/os_mbuf.h" +#include "esp_hci_transport.h" +#include "esp_hci_internal.h" +#include "esp_hci_driver.h" + +typedef struct { + hci_driver_forward_fn *forward_cb; +} hci_driver_vhci_env_t; + +static hci_driver_vhci_env_t s_hci_driver_vhci_env; + +static int +hci_driver_vhci_controller_tx(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length) +{ + int rc; + uint16_t len = 0; + uint8_t *buf = NULL; + struct os_mbuf *om; + + if (data_type == HCI_DRIVER_TYPE_ACL) { + /* The ACL data will be packaged as structure of `os_mbuf`. + * 1. Allocate a buffer suitable for the host. Use the following method to copy the data + * from the os_mbuf to the newly allocated memory. + * ```c + * buf = malloc(length); + * os_mbuf_copydata(om, 0, length, buf); + * ``` + * 2. Free the controller's os_mbuf + * ```c + * os_mbuf_free_chain(om); + * ``` + */ + } else if (data_type == HCI_DRIVER_TYPE_EVT) { + /* The event data will be packaged as an array. + * 1. Allocate a buffer suitable for the host. Use the following method to copy the data + * from the controller buffer to the newly allocated memory. + * ```c + * buf = malloc(length); + * memcpy(buf, data, length); + * ``` + * 2. Free the controller's buffer. + * ```c + * r_ble_hci_trans_buf_free(data); + * ``` + */ + } else { + assert(0); + } + + rc = s_hci_driver_vhci_env.forward_cb(data_type, buf, len, HCI_DRIVER_DIR_C2H); + free(buf); + + return rc; +} + +static int +hci_driver_vhci_host_tx(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length) +{ + uint8_t *hci_data; + struct os_mbuf *om; + + if (data_type == HCI_DRIVER_TYPE_ACL) { + /* The ACL data needs to be packaged as structure of `os_mbuf`. + * 1. Get an os_mbuf in the following way. + * ```c + * om = os_msys_get_pkthdr(length, ESP_HCI_INTERNAL_ACL_MBUF_LEADINGSPCAE); + * ``` + * 2. Copy the host's data into this os_mbuf using the following method. + * ```c + * assert(os_mbuf_append(om, data, length) == 0); + * hci_data = (uint8_t *)om; + * ``` + * 3. Free the host's buffer if needed. + */ + } else if (data_type == HCI_DRIVER_TYPE_CMD) { + /* The COMMAND data needs to be packaged as an array. + * 1. Get a command buffer from the controller. + * ```c + * hci_data = r_ble_hci_trans_buf_alloc(ESP_HCI_INTERNAL_BUF_CMD); + * ``` + * 2. Copy the host's data into this buffer. + * ```c + * memcpy(hci_data, data, length); + * ``` + * 3. Free the host's buffer if needed. + */ + } else { + assert(0); + } + + return s_hci_driver_vhci_env.forward_cb(data_type, hci_data, length, HCI_DRIVER_DIR_H2C); +} + +static int +hci_driver_vhci_tx(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length, + hci_driver_direction_t dir) +{ + int rc; + + if (dir == HCI_DRIVER_DIR_C2H) { + rc = hci_driver_vhci_controller_tx(data_type, data, length); + } else { + rc = hci_driver_vhci_host_tx(data_type, data, length); + } + return rc; +} + +static int +hci_driver_vhci_init(hci_driver_forward_fn *cb) +{ + memset(&s_hci_driver_vhci_env, 0, sizeof(hci_driver_vhci_env_t)); + s_hci_driver_vhci_env.forward_cb = cb; + return 0; +} + +static void +hci_driver_vhci_deinit(void) +{ + memset(&s_hci_driver_vhci_env, 0, sizeof(hci_driver_vhci_env_t)); +} + +hci_driver_ops_t hci_driver_vhci_ops = { + .hci_driver_tx = hci_driver_vhci_tx, + .hci_driver_init = hci_driver_vhci_init, + .hci_driver_deinit = hci_driver_vhci_deinit, +}; diff --git a/components/bt/porting/transport/include/common/hci_driver_h4.h b/components/bt/porting/transport/include/common/hci_driver_h4.h new file mode 100644 index 00000000000..32d2dd8ba6c --- /dev/null +++ b/components/bt/porting/transport/include/common/hci_driver_h4.h @@ -0,0 +1,75 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/* + * Licensed to the Apache Software Foundation (ASF) under one + * or more contributor license agreements. See the NOTICE file + * distributed with this work for additional information + * regarding copyright ownership. The ASF licenses this file + * to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY + * KIND, either express or implied. See the License for the + * specific language governing permissions and limitations + * under the License. + */ + +#ifndef _HCI_H4_H_ +#define _HCI_H4_H_ + +#include + +#define HCI_H4_NONE 0x00 +#define HCI_H4_CMD 0x01 +#define HCI_H4_ACL 0x02 +#define HCI_H4_EVT 0x04 +#define HCI_H4_ISO 0x05 + +typedef void *(hci_h4_alloc_cmd)(void); +typedef void *(hci_h4_alloc_evt)(int); +typedef struct os_mbuf *(hci_h4_alloc_acl)(void); +typedef struct os_mbuf *(hci_h4_alloc_iso)(void); + +struct hci_h4_allocators { + hci_h4_alloc_cmd *cmd; + hci_h4_alloc_acl *acl; + hci_h4_alloc_evt *evt; + hci_h4_alloc_iso *iso; +}; + +extern const struct hci_h4_allocators hci_h4_allocs_from_ll; +extern const struct hci_h4_allocators hci_h4_allocs_from_hs; + +typedef int (hci_h4_frame_cb)(uint8_t pkt_type, void *data); + +struct hci_h4_sm { + uint8_t state; + uint8_t pkt_type; + uint8_t min_len; + uint16_t len; + uint16_t exp_len; + uint8_t hdr[4]; + union { + uint8_t *buf; + struct os_mbuf *om; + }; + + const struct hci_h4_allocators *allocs; + hci_h4_frame_cb *frame_cb; +}; + +void hci_h4_sm_init(struct hci_h4_sm *h4sm, + const struct hci_h4_allocators *allocs, + hci_h4_frame_cb *frame_cb); + +int hci_h4_sm_rx(struct hci_h4_sm *h4sm, const uint8_t *buf, uint16_t len); + +#endif /* _HCI_H4_H_ */ diff --git a/components/bt/porting/transport/include/common/hci_driver_mem.h b/components/bt/porting/transport/include/common/hci_driver_mem.h new file mode 100644 index 00000000000..769b18369eb --- /dev/null +++ b/components/bt/porting/transport/include/common/hci_driver_mem.h @@ -0,0 +1,25 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef _H_HCI_DRIVER_MEM_ +#define _H_HCI_DRIVER_MEM_ +#include +#include "os/os_mbuf.h" + +void *hci_driver_mem_cmd_alloc(void); + +void *hci_driver_mem_evt_alloc(int discardable); + +struct os_mbuf *hci_driver_mem_acl_alloc(void); + +struct os_mbuf *hci_driver_mem_acl_len_alloc(uint32_t len); + +struct os_mbuf *hci_driver_mem_iso_alloc(void); + +struct os_mbuf *hci_driver_mem_iso_len_alloc(uint32_t len); + +extern const struct hci_h4_allocators s_hci_driver_mem_alloc; + +#endif // _H_HCI_DRIVER_MEM_ diff --git a/components/bt/porting/transport/include/common/hci_driver_util.h b/components/bt/porting/transport/include/common/hci_driver_util.h new file mode 100644 index 00000000000..05b7abd5023 --- /dev/null +++ b/components/bt/porting/transport/include/common/hci_driver_util.h @@ -0,0 +1,18 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef _H_HCI_DRIVER_UTIL_ +#define _H_HCI_DRIVER_UTIL_ +#include + +int hci_driver_util_init(void); + +void hci_driver_util_deinit(void); + +void hci_driver_util_tx_list_enqueue(hci_driver_data_type_t type, uint8_t *data, uint32_t len); + +uint32_t hci_driver_util_tx_list_dequeue(uint32_t max_tx_len, void **tx_data, bool *last_frame); + +#endif // _H_HCI_DRIVER_UTIL_ diff --git a/components/bt/porting/transport/include/esp_hci_driver.h b/components/bt/porting/transport/include/esp_hci_driver.h new file mode 100644 index 00000000000..09102edff83 --- /dev/null +++ b/components/bt/porting/transport/include/esp_hci_driver.h @@ -0,0 +1,52 @@ +/* + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef H_ESP_HCI_DRIVER_ +#define H_ESP_HCI_DRIVER_ +#include + +/** + * @brief Enumeration of HCI transport direction. + */ +typedef enum { + HCI_DRIVER_DIR_C2H = 0x00, ///< From controller to host. + HCI_DRIVER_DIR_H2C, ///< From host to controller. +} hci_driver_direction_t; + +typedef enum { + HCI_DRIVER_TYPE_CMD = 0x01, ///< HCI Command Indicator. + HCI_DRIVER_TYPE_ACL, ///< HCI ACL Data Indicator. + HCI_DRIVER_TYPE_SYNC, ///< HCI Synchronous Data Indicator. + HCI_DRIVER_TYPE_EVT, ///< HCI Event Indicator. + HCI_DRIVER_TYPE_ISO, ///< HCI Isochronous Data Indicator. + HCI_DRIVER_TYPE_VENDOR, ///< HCI Vendor data Indicator. +} hci_driver_data_type_t; + +typedef int hci_driver_forward_fn(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length, + hci_driver_direction_t dir); + +/** + * @brief Structure of HCI driver operations. + */ +typedef struct hci_driver_ops { + int (*hci_driver_tx)(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length, + hci_driver_direction_t dir); + int (*hci_driver_init)(hci_driver_forward_fn *cb); + void (*hci_driver_deinit)(void); +} hci_driver_ops_t; + + +#if CONFIG_BT_LE_HCI_INTERFACE_USE_RAM +extern hci_driver_ops_t hci_driver_vhci_ops; +#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_RAM + +#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART +extern hci_driver_ops_t hci_driver_uart_ops; +#if CONFIG_BT_LE_UART_HCI_DMA_MODE +extern hci_driver_ops_t hci_driver_uart_dma_ops; +#endif // CONFIG_BT_LE_UART_HCI_DMA_MODE +#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART + +#endif // H_ESP_HCI_DRIVER_ diff --git a/components/bt/porting/transport/include/esp_hci_internal.h b/components/bt/porting/transport/include/esp_hci_internal.h new file mode 100644 index 00000000000..2b1c3353082 --- /dev/null +++ b/components/bt/porting/transport/include/esp_hci_internal.h @@ -0,0 +1,121 @@ +/* + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef H_ESP_HCI_INTERNAL_ +#define H_ESP_HCI_INTERNAL_ + +#ifdef __cplusplus +extern "C" { +#endif +#include +#include "os/os_mbuf.h" + + +/* The leadingspace in user info header for ACL data */ +#define ESP_HCI_INTERNAL_ACL_MBUF_LEADINGSPCAE (4) + +#define ESP_HCI_INTERNAL_BUF_CMD (3) + +/** + * @brief Define the HCI hardware error code for synchronization loss. + * This error code is used to indicate a loss of synchronization between the controller and the host. + */ +#define ESP_HCI_SYNC_LOSS_ERR (0x1) +/** Callback function types; executed when HCI packets are received. */ +typedef int esp_hci_internal_rx_cmd_fn(uint8_t *cmd, void *arg); +typedef int esp_hci_internal_rx_acl_fn(struct os_mbuf *om, void *arg); + +/** + * Configures the HCI transport to operate with a host. The transport will + * execute specified callbacks upon receiving HCI packets from the controller. + * + * @param evt_cb The callback to execute upon receiving an HCI + * event. + * @param evt_arg Optional argument to pass to the event + * callback. + * @param acl_cb The callback to execute upon receiving ACL + * data. + * @param acl_arg Optional argument to pass to the ACL + * callback. + */ +void r_ble_hci_trans_cfg_hs(esp_hci_internal_rx_cmd_fn *evt_cb, void *evt_arg, + esp_hci_internal_rx_acl_fn *acl_cb, void *acl_arg); +/** + * Sends ACL data from host to controller. + * + * @param om The ACL data packet to send. + * + * @return 0 on success; + * A BLE_ERR_[...] error code on failure. + */ +int r_ble_hci_trans_hs_acl_tx(struct os_mbuf *om); + +/** + * Sends an HCI command from the host to the controller. + * + * @param cmd The HCI command to send. This buffer must be + * allocated via ble_hci_trans_buf_alloc(). + * + * @return 0 on success; + * A BLE_ERR_[...] error code on failure. + */ +int r_ble_hci_trans_hs_cmd_tx(uint8_t *cmd); + +/** + * Allocates a flat buffer of the specified type. + * + * @param type The type of buffer to allocate; one of the + * BLE_HCI_TRANS_BUF_[...] constants. + * + * @return The allocated buffer on success; + * NULL on buffer exhaustion. + */ +uint8_t * r_ble_hci_trans_buf_alloc(int type); + +/** + * Frees the specified flat buffer. The buffer must have been allocated via + * ble_hci_trans_buf_alloc(). + * + * @param buf The buffer to free. + */ +void r_ble_hci_trans_buf_free(uint8_t *buf); + +/** + * Configures a callback to get executed whenever an ACL data packet is freed. + * The function is called immediately before the free occurs. + * + * @param cb The callback to configure. + * @param arg An optional argument to pass to the callback. + * + * @return 0 on success; + * BLE_ERR_UNSUPPORTED if the transport does not + * support this operation. + */ +int r_ble_hci_trans_set_acl_free_cb(os_mempool_put_fn *cb, void *arg); + +/** + * @brief Handle an HCI hardware error event. + * This function processes a hardware error code and generates the appropriate HCI hardware error event. + * + * @param hw_err The hardware error code that needs to be processed. The specific meaning of the error code + * depends on the implementation and the hardware. + * + * @return int Returns 0 on success, or a non-zero error code on failure. + * + * @note This function should be called whenever a hardware error is detected in the HCI Layer. + */ +int r_ble_ll_hci_ev_hw_err(uint8_t hw_err); + +//!TODO: Check what this API is used for +int r_ble_hci_trans_reset(void); + +//!TODO: Should we initialize the hci layer in IDF ? +void esp_ble_hci_trans_init(uint8_t); + +#ifdef __cplusplus +} +#endif +#endif /* H_ESP_HCI_INTERNAL_ */ diff --git a/components/bt/porting/transport/include/esp_hci_transport.h b/components/bt/porting/transport/include/esp_hci_transport.h new file mode 100644 index 00000000000..044ebfdfb80 --- /dev/null +++ b/components/bt/porting/transport/include/esp_hci_transport.h @@ -0,0 +1,83 @@ +/* + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef H_ESP_HCI_TRANSPORT_ +#define H_ESP_HCI_TRANSPORT_ + +#ifdef __cplusplus +extern "C" { +#endif +#include +#include "os/os_mbuf.h" +#include "esp_hci_driver.h" + +/** + * @brief Enumeration of HCI packet indicators + */ +typedef enum { + HCI_CMD_IND = 0x01, /*!< HCI Command Indicator */ + HCI_ACL_IND, /*!< HCI ACL Data Indicator */ + HCI_SYNC_IND, /*!< HCI Synchronous Data Indicator */ + HCI_EVT_IND, /*!< HCI Event Indicator */ + HCI_ISO_IND, /*!< HCI Isochronous Data Indicator */ + HCI_VENDOR_IND, /*!< HCI Vendor data Indicator */ +} hci_trans_pkt_ind_t; + +/** + * @brief Enumeration of HCI Transport Mode + */ +typedef enum { + HCI_TRANSPORT_VHCI, /*!< VHCI Transport Mode */ + HCI_TRANSPORT_UART_NO_DMA, /*!< UART_NO_DMA Transport Mode */ + HCI_TRANSPORT_UART_UHCI, /*!< UART_UHCI Transport Mode */ + HCI_TRANSPORT_SDIO, /*!< SDIO Transport Mode */ + HCI_TRANSPORT_USB, /*!< USB Transport Mode */ +} hci_trans_mode_t; + +typedef int hci_transport_host_recv_fn(hci_trans_pkt_ind_t type, uint8_t *data, uint16_t len); + +/** + * @brief Initialize the HCI transport layer. + * It should be called before using any other functions in the transport layer. + * + * @param hci_transport_mode The mode in which the HCI transport should operate. + * + * @return int Returns 0 on success, or a non-zero error code on failure. + */ +int hci_transport_init(uint8_t hci_transport_mode); + +/** + * @brief Deinitialize the HCI transport layer for releasing any allocated resources. + */ +void hci_transport_deinit(void); + +/** + * @brief Set the host's HCI callback which will be invoked when receiving ACL/Events from controller. + * @param callback hci_transport_host_recv_fn type variable + * @return int 0 on success, non-zero error code on failure. + */ +int hci_transport_host_callback_register(hci_transport_host_recv_fn *callback); + +/** + * @brief Called to send HCI commands form host to controller. + * @param data Point to the commands data + * @param length Length of data + * @return int 0 on success, non-zero error code on failure. + */ +int hci_transport_host_cmd_tx(uint8_t *data, uint32_t length); + +/** + * @brief Called to send HCI ACL form host to controller. + * @param data Point to the ACL data + * @param length Length of data + * @return int 0 on success, non-zero error code on failure. + */ +int hci_transport_host_acl_tx(uint8_t *data, uint32_t length); + +#ifdef __cplusplus +} +#endif +#endif /* H_ESP_HCI_TRANSPORT_ */ diff --git a/components/bt/porting/transport/include/hci_uart.h b/components/bt/porting/transport/include/hci_uart.h deleted file mode 100644 index 02bc91b4033..00000000000 --- a/components/bt/porting/transport/include/hci_uart.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include "driver/uart.h" - -/** - * Function prototype for UART driver to ask for more data to send. - * Returns -1 if no more data is available for TX. - * Driver must call this with interrupts disabled. - */ -typedef int (*hci_uart_tx_char)(void *arg); - -/** - * Function prototype for UART driver to report that transmission is - * complete. This should be called when transmission of last byte is - * finished. - * Driver must call this with interrupts disabled. - */ -typedef void (*hci_uart_tx_done)(void *arg); - -/** - * Function prototype for UART driver to report incoming byte of data. - * Returns -1 if data was dropped. - * Driver must call this with interrupts disabled. - */ -typedef int (*hci_uart_rx_char)(void *arg, uint8_t byte); - - -/** - * Initializes given uart. Mapping of logical UART number to physical - * UART/GPIO pins is in BSP. - */ -int hci_uart_init_cbs(int uart, hci_uart_tx_char tx_func, - hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg); - - -/** - * Applies given configuration to UART. - * - * @param port_num The UART number to configure - * @param speed The baudrate in bps to configure - * @param databits The number of databits to send per byte - * @param stopbits The number of stop bits to send - * @param parity The UART parity - * @param flow_ctl Flow control settings on the UART - * - * @return 0 on success, non-zero error code on failure - */ -int hci_uart_config(int port_num, int32_t baud_rate, uint8_t data_bits, uint8_t stop_bits, - uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl); - -/** - * Close UART port. Can call hal_uart_config() with different settings after - * calling this. - * - * @param port_num The UART number to close - */ -int hci_uart_close(int port_num); - -/** - * More data queued for transmission. UART driver will start asking for that - * data. - * - * @param port_num The UART number to start TX on - */ -void hci_uart_start_tx(int port_num); - -/** - * Upper layers have consumed some data, and are now ready to receive more. - * This is meaningful after uart_rx_char callback has returned -1 telling - * that no more data can be accepted. - * - * @param port_num The UART number to begin RX on - */ -void hci_uart_start_rx(int port_num); - -/** - * @brief reconfig hci uart pin - * - * @param tx_pin The Tx pin - * @param rx_pin The Rx pin - * @param cts_pin The CTS pin - * @param rts_pin The RTS pin - * @return int 0 on success, non-zero error code on failure - */ -int hci_uart_reconfig_pin(int tx_pin, int rx_pin, int cts_pin, int rts_pin); - -#ifdef __cplusplus -} -#endif diff --git a/components/bt/porting/transport/src/hci_transport.c b/components/bt/porting/transport/src/hci_transport.c new file mode 100644 index 00000000000..df8b5db009c --- /dev/null +++ b/components/bt/porting/transport/src/hci_transport.c @@ -0,0 +1,175 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include +#include +#include "esp_log.h" +#include "esp_hci_transport.h" +#include "esp_hci_internal.h" +#include "esp_bt.h" + +typedef struct hci_transport_env +{ + hci_transport_host_recv_fn *host_recv_cb; + hci_driver_ops_t *driver_ops; +} hci_transport_env_t; + +static hci_transport_env_t s_hci_transport_env; + +/* Functions for packets Rx. */ +static int +hci_transport_controller_packet_rx(hci_driver_data_type_t data_type, uint8_t *data) +{ + if (data_type == HCI_DRIVER_TYPE_CMD) { + r_ble_hci_trans_hs_cmd_tx(data); + } + + if (data_type == HCI_DRIVER_TYPE_ACL) { + r_ble_hci_trans_hs_acl_tx((struct os_mbuf *) data); + } + return 0; +} + +static int +hci_transport_host_packet_rx(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length) +{ + if (!s_hci_transport_env.host_recv_cb) { + return -1; + } + return s_hci_transport_env.host_recv_cb((hci_trans_pkt_ind_t)data_type, data, length); +} + +static int +hci_transport_packet_rx(hci_driver_data_type_t data_type, uint8_t *data, uint32_t length, + hci_driver_direction_t dir) +{ + int rc; + if (esp_bt_controller_get_status() != ESP_BT_CONTROLLER_STATUS_ENABLED) { + return -1; + } + + if (dir == HCI_DRIVER_DIR_C2H) { + rc = hci_transport_host_packet_rx(data_type, data, length); + } else { + rc = hci_transport_controller_packet_rx(data_type, data); + } + + return rc; +} + +/* Functions for controller Tx. */ +static int +hci_transport_controller_tx_dummy(void *data, void *arg) +{ + return -1; +} + +static int +hci_transport_controller_evt_tx(uint8_t *hci_ev, void *arg) +{ + uint32_t len; + + if (esp_bt_controller_get_status() != ESP_BT_CONTROLLER_STATUS_ENABLED) { + return -1; + } + + len = hci_ev[1] + 2; + return s_hci_transport_env.driver_ops->hci_driver_tx(HCI_DRIVER_TYPE_EVT, hci_ev, len, + HCI_DRIVER_DIR_C2H); +} + +static int +hci_transport_controller_acl_tx(struct os_mbuf *om, void *arg) +{ + uint16_t len; + if (esp_bt_controller_get_status() != ESP_BT_CONTROLLER_STATUS_ENABLED) { + return -1; + } + + len = OS_MBUF_PKTHDR(om)->omp_len; + return s_hci_transport_env.driver_ops->hci_driver_tx(HCI_DRIVER_TYPE_ACL, (uint8_t *)om, len, + HCI_DRIVER_DIR_C2H); +} + +/* Functions for host Tx. */ +int +hci_transport_host_cmd_tx(uint8_t *data, uint32_t length) +{ + return s_hci_transport_env.driver_ops->hci_driver_tx(HCI_DRIVER_TYPE_CMD, data, length, + HCI_DRIVER_DIR_H2C); +} + +int +hci_transport_host_acl_tx(uint8_t *data, uint32_t length) +{ + return s_hci_transport_env.driver_ops->hci_driver_tx(HCI_DRIVER_TYPE_ACL, data, length, + HCI_DRIVER_DIR_H2C); +} + +int +hci_transport_host_callback_register(hci_transport_host_recv_fn *callback) +{ + s_hci_transport_env.host_recv_cb = callback; + return 0; +} + +int +hci_transport_init(uint8_t hci_transport_mode) +{ + int rc; + hci_driver_ops_t *ops; + + memset(&s_hci_transport_env, 0, sizeof(hci_transport_env_t)); + + switch(hci_transport_mode) { +#if CONFIG_BT_LE_HCI_INTERFACE_USE_RAM + case HCI_TRANSPORT_VHCI: + ops = &hci_driver_vhci_ops; + break; +#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_RAM +#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART +#if CONFIG_BT_LE_UART_HCI_DMA_MODE + case HCI_TRANSPORT_UART_UHCI: + ops = &hci_driver_uart_dma_ops; + break; +#else + case HCI_TRANSPORT_UART_NO_DMA: + ops = &hci_driver_uart_ops; + break; +#endif // CONFIG_BT_LE_UART_HCI_DMA_MODE +#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART + default: + assert(0); + } + + rc = ops->hci_driver_init(hci_transport_packet_rx); + if (rc) { + goto error; + } + + s_hci_transport_env.driver_ops = ops; + r_ble_hci_trans_cfg_hs(hci_transport_controller_evt_tx, NULL, hci_transport_controller_acl_tx, NULL); + + return 0; + +error: + hci_transport_deinit(); + return rc; +} + +void +hci_transport_deinit(void) +{ + hci_driver_ops_t *ops; + + r_ble_hci_trans_cfg_hs((esp_hci_internal_rx_cmd_fn *)hci_transport_controller_tx_dummy, NULL, + (esp_hci_internal_rx_acl_fn *)hci_transport_controller_tx_dummy, NULL); + + ops = s_hci_transport_env.driver_ops; + if (ops) { + ops->hci_driver_deinit(); + } + memset(&s_hci_transport_env, 0, sizeof(hci_transport_env_t)); +} diff --git a/components/bt/porting/transport/uart/hci_uart.c b/components/bt/porting/transport/uart/hci_uart.c deleted file mode 100644 index c202e0a5041..00000000000 --- a/components/bt/porting/transport/uart/hci_uart.c +++ /dev/null @@ -1,207 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include "freertos/FreeRTOS.h" -#include "freertos/task.h" -#include "freertos/queue.h" -#include "driver/uart.h" -#include "hci_uart.h" -#include "esp_log.h" -#include "esp_attr.h" - -#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART - -static const char *TAG = "hci_uart"; - -#define BUF_SIZE (1024) -#define RD_BUF_SIZE (BUF_SIZE) - -#define HCI_UART_TX_PIN CONFIG_BT_LE_HCI_UART_TX_PIN -#define HCI_UART_RX_PIN CONFIG_BT_LE_HCI_UART_RX_PIN - - -#ifdef CONFIG_BT_LE_HCI_UART_FLOWCTRL -#define HCI_UART_FLOWCTRL UART_HW_FLOWCTRL_CTS_RTS -#define HCI_UART_RTS_PIN CONFIG_BT_LE_HCI_UART_RTS_PIN -#define HCI_UART_CTS_PIN CONFIG_BT_LE_HCI_UART_CTS_PIN -#else -#define HCI_UART_FLOWCTRL UART_HW_FLOWCTRL_DISABLE -#define HCI_UART_RTS_PIN (-1) -#define HCI_UART_CTS_PIN (-1) -#endif - - -typedef struct { - bool uart_opened; - uart_port_t port; - uart_config_t cfg; - QueueHandle_t evt_queue; - TaskHandle_t rx_task_handler; - hci_uart_tx_char tx_char; - hci_uart_tx_done tx_done; - hci_uart_rx_char rx_char; - void *u_func_arg; - -} hci_uart_t; - -static hci_uart_t hci_uart; - -static void IRAM_ATTR hci_uart_rx_task(void *pvParameters) -{ - uart_event_t event; - uint8_t *dtmp = (uint8_t *) malloc(RD_BUF_SIZE); - while (hci_uart.uart_opened) { - //Waiting for UART event. - if (xQueueReceive(hci_uart.evt_queue, (void * )&event, (TickType_t)portMAX_DELAY)) { - bzero(dtmp, RD_BUF_SIZE); - ESP_LOGD(TAG, "uart[%d] event:", hci_uart.port); - switch (event.type) { - //Event of UART receving data - /*We'd better handler data event fast, there would be much more data events than - other types of events. If we take too much time on data event, the queue might - be full.*/ - case UART_DATA: - // ESP_LOGI(TAG, "[UART DATA]: %d", event.size); - uart_read_bytes(hci_uart.port, dtmp, event.size, portMAX_DELAY); - for (int i = 0 ; i < event.size; i++) { - hci_uart.rx_char(hci_uart.u_func_arg, dtmp[i]); - } - break; - //Event of HW FIFO overflow detected - case UART_FIFO_OVF: - ESP_LOGI(TAG, "hw fifo overflow"); - // If fifo overflow happened, you should consider adding flow control for your application. - // The ISR has already reset the rx FIFO, - uart_flush_input(hci_uart.port); - xQueueReset(hci_uart.evt_queue); - break; - //Event of UART ring buffer full - case UART_BUFFER_FULL: - ESP_LOGI(TAG, "ring buffer full"); - // If buffer full happened, you should consider encreasing your buffer size - uart_flush_input(hci_uart.port); - xQueueReset(hci_uart.evt_queue); - break; - //Event of UART RX break detected - case UART_BREAK: - ESP_LOGI(TAG, "uart rx break"); - break; - //Event of UART parity check error - case UART_PARITY_ERR: - ESP_LOGI(TAG, "uart parity error"); - break; - //Event of UART frame error - case UART_FRAME_ERR: - ESP_LOGI(TAG, "uart frame error"); - break; - //Others - default: - ESP_LOGI(TAG, "uart event type: %d", event.type); - break; - } - } - } - free(dtmp); - dtmp = NULL; - hci_uart.rx_task_handler = NULL; - vTaskDelete(NULL); -} - -int hci_uart_config(int port_num, int32_t baud_rate, uint8_t data_bits, uint8_t stop_bits, - uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl) -{ - uart_config_t uart_cfg = { - .baud_rate = baud_rate, - .data_bits = data_bits, - .parity = parity, - .stop_bits = stop_bits, - .flow_ctrl = HCI_UART_FLOWCTRL, - .source_clk = UART_SCLK_DEFAULT, - .rx_flow_ctrl_thresh = UART_HW_FIFO_LEN(port_num) - 1, - }; - hci_uart.port = port_num; - hci_uart.cfg = uart_cfg; - - int intr_alloc_flags = 0; - intr_alloc_flags = ESP_INTR_FLAG_IRAM; - - printf("set uart pin tx:%d, rx:%d.\n", HCI_UART_TX_PIN, HCI_UART_RX_PIN); - printf("set rts:%d, cts:%d.\n", HCI_UART_RTS_PIN, HCI_UART_CTS_PIN); - printf("set baud_rate:%d.\n", baud_rate); - - ESP_ERROR_CHECK(uart_driver_delete(port_num)); - ESP_ERROR_CHECK(uart_driver_install(port_num, BUF_SIZE * 2, BUF_SIZE * 2, 20, &hci_uart.evt_queue, intr_alloc_flags)); - ESP_ERROR_CHECK(uart_param_config(port_num, &hci_uart.cfg)); - ESP_ERROR_CHECK(uart_set_pin(port_num, HCI_UART_TX_PIN, HCI_UART_RX_PIN, HCI_UART_RTS_PIN, HCI_UART_CTS_PIN)); - - hci_uart.uart_opened = true; - - //Create a task to handler UART event from ISR - xTaskCreate(hci_uart_rx_task, "hci_uart_rx_task", 2048, NULL, 12, &hci_uart.rx_task_handler); - return 0; -} - -void IRAM_ATTR hci_uart_start_tx(int port_num) -{ - int data; - uint8_t u8_data = 0; - while (1) { - data = hci_uart.tx_char(hci_uart.u_func_arg); - if (data >= 0) { - u8_data = data; - uart_write_bytes(port_num, (char *)&u8_data, 1); - } else { - break; - } - } - if (hci_uart.tx_done) { - hci_uart.tx_done(hci_uart.u_func_arg); - } -} - -int hci_uart_init_cbs(int port_num, hci_uart_tx_char tx_func, - hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg) -{ - hci_uart.tx_char = tx_func; - hci_uart.rx_char = rx_func; - hci_uart.tx_done = tx_done; - hci_uart.u_func_arg = arg; - return 0; -} - -int hci_uart_close(int port_num) -{ - uart_event_t uart_event; - uart_event.type = UART_BREAK; - hci_uart.uart_opened = false; - // Stop uart rx task - if (hci_uart.rx_task_handler != NULL) { - xQueueSend(hci_uart.evt_queue, (void *)&uart_event, 1000); - ESP_LOGW(TAG, "Waiting for uart task finish..."); - } - while (hci_uart.rx_task_handler != NULL); - - uart_driver_delete(port_num); - ESP_LOGI(TAG, "hci uart close success."); - return 0; -} - -int hci_uart_reconfig_pin(int tx_pin, int rx_pin, int cts_pin, int rts_pin) -{ - int port_num = hci_uart.port; - int32_t baud_rate = hci_uart.cfg.baud_rate; - uint8_t data_bits = hci_uart.cfg.data_bits; - uint8_t stop_bits = hci_uart.cfg.stop_bits; - uart_parity_t parity = hci_uart.cfg.parity; - uart_hw_flowcontrol_t flow_ctl = hci_uart.cfg.flow_ctrl; - hci_uart_close(port_num); - hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl); - ESP_ERROR_CHECK(uart_set_pin(port_num, tx_pin, rx_pin, rts_pin, cts_pin)); - return 0; -} -#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART From 8504040869e2235deaee9c3fb61108d1757f7c47 Mon Sep 17 00:00:00 2001 From: zwl Date: Thu, 4 Jul 2024 21:12:38 +0800 Subject: [PATCH 005/113] feat(bluetooth/controller): adopting new HCI layer code on ESP32-C2 --- components/bt/controller/esp32c2/Kconfig.in | 30 ++- components/bt/controller/esp32c2/bt.c | 188 ++---------------- components/bt/controller/esp32c2/esp_bt_cfg.h | 19 +- .../bt/controller/lib_esp32c2/esp32c2-bt-lib | 2 +- .../bt/include/esp32c2/include/esp_bt.h | 9 +- components/esp_rom/esp32c2/ld/esp32c2.rom.ld | 1 - 6 files changed, 59 insertions(+), 190 deletions(-) diff --git a/components/bt/controller/esp32c2/Kconfig.in b/components/bt/controller/esp32c2/Kconfig.in index 9a04ae6394c..8699b6b56c5 100644 --- a/components/bt/controller/esp32c2/Kconfig.in +++ b/components/bt/controller/esp32c2/Kconfig.in @@ -2,15 +2,15 @@ menu "HCI Config" choice BT_LE_HCI_INTERFACE - prompt "Select HCI interface" + prompt "HCI mode" default BT_LE_HCI_INTERFACE_USE_RAM config BT_LE_HCI_INTERFACE_USE_RAM - bool "ram" + bool "VHCI" help Use RAM as HCI interface config BT_LE_HCI_INTERFACE_USE_UART - bool "uart" + bool "UART(H4)" help Use UART as HCI interface endchoice @@ -73,12 +73,26 @@ menu "HCI Config" UART_PARITY_ODD endchoice - config BT_LE_HCI_UART_TASK_STACK_SIZE - int "HCI uart task stack size" - depends on BT_LE_HCI_INTERFACE_USE_UART - default 1000 + config BT_LE_HCI_UART_RX_BUFFER_SIZE + int "The size of rx ring buffer memory" + depends on !BT_LE_HCI_INTERFACE_USE_RAM + default 512 + help + The size of rx ring buffer memory + + config BT_LE_HCI_UART_TX_BUFFER_SIZE + int "The size of tx ring buffer memory" + depends on !BT_LE_HCI_INTERFACE_USE_RAM + default 256 + help + The size of tx ring buffer memory + + config BT_LE_HCI_TRANS_TASK_STACK_SIZE + int "HCI transport task stack size" + depends on !BT_LE_HCI_INTERFACE_USE_RAM + default 1024 help - Set the size of uart task stack + This configures stack size of hci transport task endmenu config BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT diff --git a/components/bt/controller/esp32c2/bt.c b/components/bt/controller/esp32c2/bt.c index 29c3332604b..8333a8a2b11 100644 --- a/components/bt/controller/esp32c2/bt.c +++ b/components/bt/controller/esp32c2/bt.c @@ -31,7 +31,7 @@ #endif #include "nimble/nimble_npl_os.h" -#include "ble_hci_trans.h" +#include "esp_hci_transport.h" #include "os/endian.h" #include "esp_bt.h" @@ -44,13 +44,8 @@ #include "soc/syscon_reg.h" #include "soc/modem_clkrst_reg.h" #include "esp_private/periph_ctrl.h" -#include "hci_uart.h" #include "bt_osi_mem.h" -#ifdef CONFIG_BT_BLUEDROID_ENABLED -#include "hci/hci_hal.h" -#endif - #if CONFIG_FREERTOS_USE_TICKLESS_IDLE #include "esp_private/sleep_modem.h" #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE @@ -67,6 +62,7 @@ #include "hal/efuse_ll.h" #include "soc/rtc.h" + /* Macro definition ************************************************************************ */ @@ -79,12 +75,6 @@ #define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5 #define BT_ASSERT_PRINT ets_printf - -#ifdef CONFIG_BT_BLUEDROID_ENABLED -/* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */ -#define ACL_DATA_MBUF_LEADINGSPCAE 4 -#endif // CONFIG_BT_BLUEDROID_ENABLED - typedef enum ble_rtc_slow_clk_src { BT_SLOW_CLK_SRC_MAIN_XTAL, BT_SLOW_CLK_SRC_32K_XTAL_ON_PIN0, @@ -108,12 +98,12 @@ struct ext_funcs_t { int (*_esp_intr_free)(void **ret_handle); void *(* _malloc)(size_t size); void (*_free)(void *p); - void (*_hal_uart_start_tx)(int); - int (*_hal_uart_init_cbs)(int, hci_uart_tx_char, hci_uart_tx_done, hci_uart_rx_char, void *); - int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, uart_parity_t, uart_hw_flowcontrol_t); - int (*_hal_uart_close)(int); - void (*_hal_uart_blocking_tx)(int, uint8_t); - int (*_hal_uart_init)(int, void *); + void (*_rsv1)(int); + int (*_rsv2)(int, int (*)(void *arg), int (*)(void *arg, uint8_t byte), int (*)(void *arg, uint8_t byte), void *); + int (*_rsv3)(int, int32_t, uint8_t, uint8_t, int, int); + int (*_rsv4)(int); + void (*_rsv5)(int, uint8_t); + int (*_rsv6)(int, void *); int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id); void (* _task_delete)(void *task_handle); void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2); @@ -191,16 +181,6 @@ static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status); static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status); static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id); static void task_delete_wrapper(void *task_handle); -#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART -static void hci_uart_start_tx_wrapper(int uart_no); -static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func, - hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg); -static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits, - uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl); -static int hci_uart_close_wrapper(int uart_no); -static void hci_uart_blocking_tx_wrapper(int port, uint8_t data); -static int hci_uart_init_wrapper(int uart_no, void *cfg); -#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in); static int esp_intr_free_wrapper(void **ret_handle); @@ -218,7 +198,6 @@ static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, b */ /* Static variable declare */ static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE; - #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED const static uint32_t log_bufs_size[] = {CONFIG_BT_LE_LOG_CTRL_BUF1_SIZE, CONFIG_BT_LE_LOG_HCI_BUF_SIZE, CONFIG_BT_LE_LOG_CTRL_BUF2_SIZE}; #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED @@ -232,7 +211,6 @@ static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL; #define BLE_RTC_DELAY_US (1800) - static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = { ._magic = OSI_COEX_MAGIC_VALUE, ._version = OSI_COEX_VERSION, @@ -248,14 +226,6 @@ struct ext_funcs_t ext_funcs_ro = { ._esp_intr_free = esp_intr_free_wrapper, ._malloc = bt_osi_mem_malloc_internal, ._free = bt_osi_mem_free, -#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART - ._hal_uart_start_tx = hci_uart_start_tx_wrapper, - ._hal_uart_init_cbs = hci_uart_init_cbs_wrapper, - ._hal_uart_config = hci_uart_config_wrapper, - ._hal_uart_close = hci_uart_close_wrapper, - ._hal_uart_blocking_tx = hci_uart_blocking_tx_wrapper, - ._hal_uart_init = hci_uart_init_wrapper, -#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART ._task_create = task_create_wrapper, ._task_delete = task_delete_wrapper, ._osi_assert = osi_assert_wrapper, @@ -302,83 +272,6 @@ static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status) #endif // CONFIG_SW_COEXIST_ENABLE } -#ifdef CONFIG_BT_BLUEDROID_ENABLED -bool esp_vhci_host_check_send_available(void) -{ - if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { - return false; - } - return true; -} - -/** - * Allocates an mbuf for use by the nimble host. - */ -static struct os_mbuf *ble_hs_mbuf_gen_pkt(uint16_t leading_space) -{ - struct os_mbuf *om; - int rc; - - om = os_msys_get_pkthdr(0, 0); - if (om == NULL) { - return NULL; - } - - if (om->om_omp->omp_databuf_len < leading_space) { - rc = os_mbuf_free_chain(om); - assert(rc == 0); - return NULL; - } - - om->om_data += leading_space; - - return om; -} - -/** - * Allocates an mbuf suitable for an HCI ACL data packet. - * - * @return An empty mbuf on success; null on memory - * exhaustion. - */ -struct os_mbuf *ble_hs_mbuf_acl_pkt(void) -{ - return ble_hs_mbuf_gen_pkt(4 + 1); -} - -void esp_vhci_host_send_packet(uint8_t *data, uint16_t len) -{ - if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { - return; - } - - if (*(data) == DATA_TYPE_COMMAND) { - struct ble_hci_cmd *cmd = NULL; - cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD); - assert(cmd); - memcpy((uint8_t *)cmd, data + 1, len - 1); - ble_hci_trans_hs_cmd_tx((uint8_t *)cmd); - } - - if (*(data) == DATA_TYPE_ACL) { - struct os_mbuf *om = os_msys_get_pkthdr(len, ACL_DATA_MBUF_LEADINGSPCAE); - assert(om); - assert(os_mbuf_append(om, &data[1], len - 1) == 0); - ble_hci_trans_hs_acl_tx(om); - } -} - -esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback) -{ - if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { - return ESP_FAIL; - } - - ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL); - - return ESP_OK; -} -#endif // CONFIG_BT_BLUEDROID_ENABLED static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id) { return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < CONFIG_FREERTOS_NUMBER_OF_CORES ? core_id : tskNO_AFFINITY)); @@ -408,56 +301,6 @@ static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer return rc; } -#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART -static void hci_uart_start_tx_wrapper(int uart_no) -{ - hci_uart_start_tx(uart_no); -} - -static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func, - hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg) -{ - int rc = -1; - rc = hci_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg); - return rc; -} - - -static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits, - uint8_t stop_bits,uart_parity_t parity, - uart_hw_flowcontrol_t flow_ctl) -{ - int rc = -1; - rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl); - return rc; -} - -static int hci_uart_close_wrapper(int uart_no) -{ - int rc = -1; - rc = hci_uart_close(uart_no); - return rc; -} - -static void hci_uart_blocking_tx_wrapper(int port, uint8_t data) -{ - //This function is nowhere to use. -} - -static int hci_uart_init_wrapper(int uart_no, void *cfg) -{ - //This function is nowhere to use. - return 0; -} - -#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART - -static int ble_hci_unregistered_hook(void*, void*) -{ - ESP_LOGD(NIMBLE_PORT_LOG_TAG,"%s ble hci rx_evt is not registered.",__func__); - return 0; -} - static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in) { int rc = esp_intr_alloc(source, flags | ESP_INTR_FLAG_IRAM, handler, arg, (intr_handle_t *)ret_handle_in); @@ -635,6 +478,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) esp_err_t ret = ESP_OK; ble_npl_count_info_t npl_info; ble_rtc_slow_clk_src_t rtc_clk_src; + uint8_t hci_transport_mode; memset(&npl_info, 0, sizeof(ble_npl_count_info_t)); if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) { @@ -757,10 +601,19 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED; - ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL, - (ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL); +#if CONFIG_BT_LE_HCI_INTERFACE_USE_RAM + hci_transport_mode = HCI_TRANSPORT_VHCI; +#elif CONFIG_BT_LE_HCI_INTERFACE_USE_UART + hci_transport_mode = HCI_TRANSPORT_UART_NO_DMA; +#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_RAM + ret = hci_transport_init(hci_transport_mode); + if (ret) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "hci transport init failed %d", ret); + goto free_controller; + } return ESP_OK; free_controller: + hci_transport_deinit(); controller_sleep_deinit(); #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED controller_init_err: @@ -789,6 +642,7 @@ esp_err_t esp_bt_controller_deinit(void) return ESP_FAIL; } + hci_transport_deinit(); controller_sleep_deinit(); #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED diff --git a/components/bt/controller/esp32c2/esp_bt_cfg.h b/components/bt/controller/esp32c2/esp_bt_cfg.h index 0cb4168e030..ff0db7c8919 100644 --- a/components/bt/controller/esp32c2/esp_bt_cfg.h +++ b/components/bt/controller/esp32c2/esp_bt_cfg.h @@ -28,7 +28,6 @@ extern "C" { #else #define BLE_LL_SCAN_PHY_NUMBER_N (1) #endif - #define DEFAULT_BT_LE_MAX_PERIODIC_ADVERTISER_LIST MYNEWT_VAL(BLE_MAX_PERIODIC_ADVERTISER_LIST) #define DEFAULT_BT_LE_MAX_PERIODIC_SYNCS MYNEWT_VAL(BLE_MAX_PERIODIC_SYNCS) #define DEFAULT_BT_LE_MAX_CONNECTIONS MYNEWT_VAL(BLE_MAX_CONNECTIONS) @@ -152,6 +151,20 @@ extern "C" { #else #define DEFAULT_BT_LE_ROLE_OBSERVER (0) #endif + #if defined (CONFIG_BT_LE_HCI_UART_FLOWCTRL) + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (CONFIG_BT_LE_HCI_UART_FLOWCTRL) + #if DEFAULT_BT_LE_HCI_UART_FLOW_CTRL + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (CONFIG_BT_LE_HCI_UART_CTS_PIN) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (CONFIG_BT_LE_HCI_UART_RTS_PIN) + #else + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1) + #endif + #else + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1) + #endif #endif #define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF @@ -192,8 +205,6 @@ extern "C" { #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (UART_DATA_8_BITS) #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (UART_STOP_BITS_1) #define DEFAULT_BT_LE_HCI_UART_PARITY (0) - #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (CONFIG_BT_LE_HCI_UART_TASK_STACK_SIZE) - #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) #else #define DEFAULT_BT_LE_HCI_UART_TX_PIN (0) #define DEFAULT_BT_LE_HCI_UART_RX_PIN (0) @@ -202,8 +213,6 @@ extern "C" { #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (0) #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (0) #define DEFAULT_BT_LE_HCI_UART_PARITY (0) - #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (0) - #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) #endif /* Unchanged configuration */ diff --git a/components/bt/controller/lib_esp32c2/esp32c2-bt-lib b/components/bt/controller/lib_esp32c2/esp32c2-bt-lib index e597ae52976..fc65dbee209 160000 --- a/components/bt/controller/lib_esp32c2/esp32c2-bt-lib +++ b/components/bt/controller/lib_esp32c2/esp32c2-bt-lib @@ -1 +1 @@ -Subproject commit e597ae529761d270f10d0616c375faa0e4b7ca13 +Subproject commit fc65dbee2093051bdf8dd45fd4346811a39a4ff8 diff --git a/components/bt/include/esp32c2/include/esp_bt.h b/components/bt/include/esp32c2/include/esp_bt.h index ee1bede7e4d..c73d4cb9243 100644 --- a/components/bt/include/esp32c2/include/esp_bt.h +++ b/components/bt/include/esp32c2/include/esp_bt.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -262,13 +262,6 @@ typedef struct { .controller_run_cpu = 0, \ .enable_qa_test = RUN_QA_TEST, \ .enable_bqb_test = RUN_BQB_TEST, \ - .enable_uart_hci = HCI_UART_EN, \ - .ble_hci_uart_port = DEFAULT_BT_LE_HCI_UART_PORT, \ - .ble_hci_uart_baud = DEFAULT_BT_LE_HCI_UART_BAUD, \ - .ble_hci_uart_data_bits = DEFAULT_BT_LE_HCI_UART_DATA_BITS, \ - .ble_hci_uart_stop_bits = DEFAULT_BT_LE_HCI_UART_STOP_BITS, \ - .ble_hci_uart_flow_ctrl = DEFAULT_BT_LE_HCI_UART_FLOW_CTRL, \ - .ble_hci_uart_uart_parity = DEFAULT_BT_LE_HCI_UART_PARITY, \ .enable_tx_cca = DEFAULT_BT_LE_TX_CCA_ENABLED, \ .cca_rssi_thresh = 256 - DEFAULT_BT_LE_CCA_RSSI_THRESH, \ .sleep_en = NIMBLE_SLEEP_ENABLE, \ diff --git a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld index e876d872fbd..336246649c2 100644 --- a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld +++ b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld @@ -753,7 +753,6 @@ r_ble_ll_hci_ev_send_adv_set_terminated = 0x40000ff4; r_ble_ll_hci_ev_send_scan_req_recv = 0x40000ff8; r_ble_ll_hci_ev_send_scan_timeout = 0x40000ffc; r_ble_ll_hci_ev_send_vendor_err = 0x40001000; -r_ble_ll_hci_event_send = 0x40001004; r_ble_ll_hci_ext_scan_set_enable = 0x40001008; r_ble_ll_hci_get_num_cmd_pkts = 0x4000100c; r_ble_ll_hci_info_params_cmd_proc = 0x40001010; From e154fa0af2d9cee814062d804b2d72f783300899 Mon Sep 17 00:00:00 2001 From: zwl Date: Thu, 4 Jul 2024 21:14:14 +0800 Subject: [PATCH 006/113] feat(bluetooth/controller): adopting new HCI layer code and support UHCI function on ESP32-C6 and ESP32-H2 --- components/bt/controller/esp32c6/Kconfig.in | 62 +++++- components/bt/controller/esp32c6/bt.c | 178 ++---------------- components/bt/controller/esp32c6/esp_bt_cfg.h | 21 ++- components/bt/controller/esp32h2/Kconfig.in | 62 +++++- components/bt/controller/esp32h2/bt.c | 178 ++---------------- components/bt/controller/esp32h2/esp_bt_cfg.h | 22 ++- .../bt/controller/lib_esp32c6/esp32c6-bt-lib | 2 +- .../bt/controller/lib_esp32h2/esp32h2-bt-lib | 2 +- .../bt/include/esp32c6/include/esp_bt.h | 18 +- .../bt/include/esp32h2/include/esp_bt.h | 18 +- components/hal/esp32c6/include/hal/uhci_ll.h | 133 +++++++++++++ components/hal/esp32h2/include/hal/uhci_ll.h | 133 +++++++++++++ 12 files changed, 450 insertions(+), 379 deletions(-) create mode 100644 components/hal/esp32c6/include/hal/uhci_ll.h create mode 100644 components/hal/esp32h2/include/hal/uhci_ll.h diff --git a/components/bt/controller/esp32c6/Kconfig.in b/components/bt/controller/esp32c6/Kconfig.in index 0dcc8996bf6..665e34366a1 100644 --- a/components/bt/controller/esp32c6/Kconfig.in +++ b/components/bt/controller/esp32c6/Kconfig.in @@ -2,19 +2,37 @@ menu "HCI Config" choice BT_LE_HCI_INTERFACE - prompt "Select HCI interface" + prompt "HCI mode" default BT_LE_HCI_INTERFACE_USE_RAM config BT_LE_HCI_INTERFACE_USE_RAM - bool "ram" + bool "VHCI" help Use RAM as HCI interface config BT_LE_HCI_INTERFACE_USE_UART - bool "uart" + bool "UART(H4)" help Use UART as HCI interface endchoice + choice BT_LE_UART_HCI_MODE_CHOICE + prompt "UART HCI mode" + depends on BT_LE_HCI_INTERFACE_USE_UART + default BT_LE_UART_HCI_NO_DMA_MODE + help + Specify UART HCI mode: DMA or No DMA + + config BT_LE_UART_HCI_DMA_MODE + bool "UHCI(UART with DMA)(EXPERIMENTAL)" + help + UART HCI Mode with DMA functionality. + + config BT_LE_UART_HCI_NO_DMA_MODE + bool "UART(NO DMA)" + help + UART HCI Mode without DMA functionality. + endchoice + config BT_LE_HCI_UART_PORT int "HCI UART port" depends on BT_LE_HCI_INTERFACE_USE_UART @@ -73,12 +91,40 @@ menu "HCI Config" UART_PARITY_ODD endchoice - config BT_LE_HCI_UART_TASK_STACK_SIZE - int "HCI uart task stack size" - depends on BT_LE_HCI_INTERFACE_USE_UART - default 1000 + config BT_LE_HCI_UART_RX_BUFFER_SIZE + int "The size of rx ring buffer memory" + depends on BT_LE_UART_HCI_NO_DMA_MODE + default 512 + help + The size of rx ring buffer memory + + config BT_LE_HCI_UART_TX_BUFFER_SIZE + int "The size of tx ring buffer memory" + depends on BT_LE_UART_HCI_NO_DMA_MODE + default 256 + help + The size of tx ring buffer memory + + config BT_LE_HCI_TRANS_TASK_STACK_SIZE + int "HCI transport task stack size" + depends on !BT_LE_HCI_INTERFACE_USE_RAM + default 1024 + help + This configures stack size of hci transport task + + config BT_LE_HCI_TRANS_RX_MEM_NUM + int "The amount of rx memory received at the same time" + depends on BT_LE_UART_HCI_DMA_MODE + default 3 + help + The amount of rx memory received at the same time + + config BT_LE_HCI_LLDESCS_POOL_NUM + int "The amount of lldecs memory for driver dma mode" + depends on BT_LE_UART_HCI_DMA_MODE + default 20 help - Set the size of uart task stack + The amount of lldecs memory for driver dma mode endmenu config BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT diff --git a/components/bt/controller/esp32c6/bt.c b/components/bt/controller/esp32c6/bt.c index 489327f0281..10d15761568 100644 --- a/components/bt/controller/esp32c6/bt.c +++ b/components/bt/controller/esp32c6/bt.c @@ -30,7 +30,7 @@ #endif // CONFIG_ESP_COEX_ENABLED #include "nimble/nimble_npl_os.h" -#include "ble_hci_trans.h" +#include "esp_hci_transport.h" #include "os/endian.h" #include "esp_bt.h" @@ -41,7 +41,6 @@ #include "esp_phy_init.h" #endif #include "esp_private/periph_ctrl.h" -#include "hci_uart.h" #include "bt_osi_mem.h" #if SOC_PM_RETENTION_HAS_CLOCK_BUG @@ -52,10 +51,6 @@ #include "esp_private/sleep_modem.h" #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE -#ifdef CONFIG_BT_BLUEDROID_ENABLED -#include "hci/hci_hal.h" -#endif // CONFIG_BT_BLUEDROID_ENABLED - #include "freertos/FreeRTOS.h" #include "freertos/task.h" @@ -71,16 +66,11 @@ #define OSI_COEX_VERSION 0x00010006 #define OSI_COEX_MAGIC_VALUE 0xFADEBEAD -#define EXT_FUNC_VERSION 0x20221122 +#define EXT_FUNC_VERSION 0x20240422 #define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5 #define BT_ASSERT_PRINT ets_printf -#ifdef CONFIG_BT_BLUEDROID_ENABLED -/* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */ -#define ACL_DATA_MBUF_LEADINGSPCAE 4 -#endif // CONFIG_BT_BLUEDROID_ENABLED - /* Types definition ************************************************************************ */ @@ -99,12 +89,6 @@ struct ext_funcs_t { int (*_esp_intr_free)(void **ret_handle); void *(* _malloc)(size_t size); void (*_free)(void *p); - void (*_hal_uart_start_tx)(int); - int (*_hal_uart_init_cbs)(int, hci_uart_tx_char, hci_uart_tx_done, hci_uart_rx_char, void *); - int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, uart_parity_t, uart_hw_flowcontrol_t); - int (*_hal_uart_close)(int); - void (*_hal_uart_blocking_tx)(int, uint8_t); - int (*_hal_uart_init)(int, void *); int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id); void (* _task_delete)(void *task_handle); @@ -181,16 +165,6 @@ static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status); static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id); static void task_delete_wrapper(void *task_handle); -#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART -static void hci_uart_start_tx_wrapper(int uart_no); -static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func, - hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg); -static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits, - uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl); -static int hci_uart_close_wrapper(int uart_no); -static void hci_uart_blocking_tx_wrapper(int port, uint8_t data); -static int hci_uart_init_wrapper(int uart_no, void *cfg); -#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in); static int esp_intr_free_wrapper(void **ret_handle); @@ -208,7 +182,6 @@ static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, b */ /* Static variable declare */ static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE; - #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED const static uint32_t log_bufs_size[] = {CONFIG_BT_LE_LOG_CTRL_BUF1_SIZE, CONFIG_BT_LE_LOG_HCI_BUF_SIZE, CONFIG_BT_LE_LOG_CTRL_BUF2_SIZE}; #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED @@ -238,14 +211,6 @@ struct ext_funcs_t ext_funcs_ro = { ._esp_intr_free = esp_intr_free_wrapper, ._malloc = bt_osi_mem_malloc_internal, ._free = bt_osi_mem_free, -#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART - ._hal_uart_start_tx = hci_uart_start_tx_wrapper, - ._hal_uart_init_cbs = hci_uart_init_cbs_wrapper, - ._hal_uart_config = hci_uart_config_wrapper, - ._hal_uart_close = hci_uart_close_wrapper, - ._hal_uart_blocking_tx = hci_uart_blocking_tx_wrapper, - ._hal_uart_init = hci_uart_init_wrapper, -#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART ._task_create = task_create_wrapper, ._task_delete = task_delete_wrapper, ._osi_assert = osi_assert_wrapper, @@ -290,75 +255,6 @@ static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status) #endif // CONFIG_SW_COEXIST_ENABLE } -#ifdef CONFIG_BT_BLUEDROID_ENABLED -bool esp_vhci_host_check_send_available(void) -{ - if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { - return false; - } - return true; -} - -static struct os_mbuf *ble_hs_mbuf_gen_pkt(uint16_t leading_space) -{ - struct os_mbuf *om; - int rc; - - om = os_msys_get_pkthdr(0, 0); - if (om == NULL) { - return NULL; - } - - if (om->om_omp->omp_databuf_len < leading_space) { - rc = os_mbuf_free_chain(om); - assert(rc == 0); - return NULL; - } - - om->om_data += leading_space; - - return om; -} - -struct os_mbuf *ble_hs_mbuf_acl_pkt(void) -{ - return ble_hs_mbuf_gen_pkt(4 + 1); -} - -void esp_vhci_host_send_packet(uint8_t *data, uint16_t len) -{ - if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { - return; - } - - if (*(data) == DATA_TYPE_COMMAND) { - struct ble_hci_cmd *cmd = NULL; - cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD); - assert(cmd); - memcpy((uint8_t *)cmd, data + 1, len - 1); - ble_hci_trans_hs_cmd_tx((uint8_t *)cmd); - } - - if (*(data) == DATA_TYPE_ACL) { - struct os_mbuf *om = os_msys_get_pkthdr(len, ACL_DATA_MBUF_LEADINGSPCAE); - assert(om); - assert(os_mbuf_append(om, &data[1], len - 1) == 0); - ble_hci_trans_hs_acl_tx(om); - } -} - -esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback) -{ - if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { - return ESP_FAIL; - } - - ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL); - - return ESP_OK; -} -#endif // CONFIG_BT_BLUEDROID_ENABLED - static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id) { @@ -390,56 +286,6 @@ static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer return rc; } -#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART -static void hci_uart_start_tx_wrapper(int uart_no) -{ - hci_uart_start_tx(uart_no); -} - -static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func, - hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg) -{ - int rc = -1; - rc = hci_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg); - return rc; -} - - -static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits, - uint8_t stop_bits, uart_parity_t parity, - uart_hw_flowcontrol_t flow_ctl) -{ - int rc = -1; - rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl); - return rc; -} - -static int hci_uart_close_wrapper(int uart_no) -{ - int rc = -1; - rc = hci_uart_close(uart_no); - return rc; -} - -static void hci_uart_blocking_tx_wrapper(int port, uint8_t data) -{ - //This function is nowhere to use. -} - -static int hci_uart_init_wrapper(int uart_no, void *cfg) -{ - //This function is nowhere to use. - return 0; -} - -#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART - -static int ble_hci_unregistered_hook(void*, void*) -{ - ESP_LOGD(NIMBLE_PORT_LOG_TAG,"%s ble hci rx_evt is not registered.",__func__); - return 0; -} - static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in) { @@ -718,6 +564,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) esp_err_t ret = ESP_OK; ble_npl_count_info_t npl_info; uint32_t slow_clk_freq = 0; + uint8_t hci_transport_mode; memset(&npl_info, 0, sizeof(ble_npl_count_info_t)); @@ -862,11 +709,23 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED; - ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL, - (ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL); - return ESP_OK; +#if CONFIG_BT_LE_HCI_INTERFACE_USE_RAM + hci_transport_mode = HCI_TRANSPORT_VHCI; +#elif CONFIG_BT_LE_HCI_INTERFACE_USE_UART + hci_transport_mode = HCI_TRANSPORT_UART_NO_DMA; +#if CONFIG_BT_LE_UART_HCI_DMA_MODE + hci_transport_mode = HCI_TRANSPORT_UART_UHCI; +#endif // CONFIG_BT_LE_UART_HCI_DMA_MODE +#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_RAM + ret = hci_transport_init(hci_transport_mode); + if (ret) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "hci transport init failed %d", ret); + goto free_controller; + } + return ESP_OK; free_controller: + hci_transport_deinit(); controller_sleep_deinit(); os_msys_deinit(); r_ble_controller_deinit(); @@ -897,6 +756,7 @@ esp_err_t esp_bt_controller_deinit(void) return ESP_FAIL; } + hci_transport_deinit(); controller_sleep_deinit(); os_msys_deinit(); diff --git a/components/bt/controller/esp32c6/esp_bt_cfg.h b/components/bt/controller/esp32c6/esp_bt_cfg.h index 9e341e32290..b8bbfd3d4b7 100644 --- a/components/bt/controller/esp32c6/esp_bt_cfg.h +++ b/components/bt/controller/esp32c6/esp_bt_cfg.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -129,6 +129,21 @@ extern "C" { #else #define DEFAULT_BT_LE_50_FEATURE_SUPPORT (0) #endif + + #if defined (CONFIG_BT_LE_HCI_UART_FLOWCTRL) + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (CONFIG_BT_LE_HCI_UART_FLOWCTRL) + #if DEFAULT_BT_LE_HCI_UART_FLOW_CTRL + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (CONFIG_BT_LE_HCI_UART_CTS_PIN) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (CONFIG_BT_LE_HCI_UART_RTS_PIN) + #else + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1) + #endif + #else + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1) + #endif #endif #define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF @@ -169,8 +184,6 @@ extern "C" { #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (UART_DATA_8_BITS) #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (UART_STOP_BITS_1) #define DEFAULT_BT_LE_HCI_UART_PARITY (0) - #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (CONFIG_BT_LE_HCI_UART_TASK_STACK_SIZE) - #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) #else #define DEFAULT_BT_LE_HCI_UART_TX_PIN (0) #define DEFAULT_BT_LE_HCI_UART_RX_PIN (0) @@ -179,8 +192,6 @@ extern "C" { #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (0) #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (0) #define DEFAULT_BT_LE_HCI_UART_PARITY (0) - #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (0) - #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) #endif /* Unchanged configuration */ diff --git a/components/bt/controller/esp32h2/Kconfig.in b/components/bt/controller/esp32h2/Kconfig.in index e0c4936156e..e45aa2030ae 100644 --- a/components/bt/controller/esp32h2/Kconfig.in +++ b/components/bt/controller/esp32h2/Kconfig.in @@ -2,19 +2,37 @@ menu "HCI Config" choice BT_LE_HCI_INTERFACE - prompt "Select HCI interface" + prompt "HCI mode" default BT_LE_HCI_INTERFACE_USE_RAM config BT_LE_HCI_INTERFACE_USE_RAM - bool "ram" + bool "VHCI" help Use RAM as HCI interface config BT_LE_HCI_INTERFACE_USE_UART - bool "uart" + bool "UART(H4)" help Use UART as HCI interface endchoice + choice BT_LE_UART_HCI_MODE_CHOICE + prompt "UART HCI mode" + depends on BT_LE_HCI_INTERFACE_USE_UART + default BT_LE_UART_HCI_NO_DMA_MODE + help + Specify UART HCI mode: DMA or No DMA + + config BT_LE_UART_HCI_DMA_MODE + bool "UHCI(UART with DMA)(EXPERIMENTAL)" + help + UART HCI Mode with DMA functionality. + + config BT_LE_UART_HCI_NO_DMA_MODE + bool "UART(NO DMA)" + help + UART HCI Mode without DMA functionality. + endchoice + config BT_LE_HCI_UART_PORT int "HCI UART port" depends on BT_LE_HCI_INTERFACE_USE_UART @@ -73,12 +91,40 @@ menu "HCI Config" UART_PARITY_ODD endchoice - config BT_LE_HCI_UART_TASK_STACK_SIZE - int "HCI uart task stack size" - depends on BT_LE_HCI_INTERFACE_USE_UART - default 1000 + config BT_LE_HCI_UART_RX_BUFFER_SIZE + int "The size of rx ring buffer memory" + depends on BT_LE_UART_HCI_NO_DMA_MODE + default 512 + help + The size of rx ring buffer memory + + config BT_LE_HCI_UART_TX_BUFFER_SIZE + int "The size of tx ring buffer memory" + depends on BT_LE_UART_HCI_NO_DMA_MODE + default 256 + help + The size of tx ring buffer memory + + config BT_LE_HCI_TRANS_TASK_STACK_SIZE + int "HCI transport task stack size" + depends on !BT_LE_HCI_INTERFACE_USE_RAM + default 1024 + help + This configures stack size of hci transport task + + config BT_LE_HCI_TRANS_RX_MEM_NUM + int "The amount of rx memory received at the same time" + depends on BT_LE_UART_HCI_DMA_MODE + default 3 + help + The amount of rx memory received at the same time + + config BT_LE_HCI_LLDESCS_POOL_NUM + int "The amount of lldecs memory for driver dma mode" + depends on BT_LE_UART_HCI_DMA_MODE + default 20 help - Set the size of uart task stack + The amount of lldecs memory for driver dma mode endmenu config BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT diff --git a/components/bt/controller/esp32h2/bt.c b/components/bt/controller/esp32h2/bt.c index adb10d4981f..5e2b1fb66b7 100644 --- a/components/bt/controller/esp32h2/bt.c +++ b/components/bt/controller/esp32h2/bt.c @@ -30,7 +30,7 @@ #endif // CONFIG_ESP_COEX_ENABLED #include "nimble/nimble_npl_os.h" -#include "ble_hci_trans.h" +#include "esp_hci_transport.h" #include "os/endian.h" #include "esp_bt.h" @@ -39,7 +39,6 @@ #include "esp_pm.h" #include "esp_phy_init.h" #include "esp_private/periph_ctrl.h" -#include "hci_uart.h" #include "bt_osi_mem.h" #if CONFIG_FREERTOS_USE_TICKLESS_IDLE @@ -47,10 +46,6 @@ #include "esp_private/sleep_retention.h" #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE -#ifdef CONFIG_BT_BLUEDROID_ENABLED -#include "hci/hci_hal.h" -#endif // CONFIG_BT_BLUEDROID_ENABLED - #include "freertos/FreeRTOS.h" #include "freertos/task.h" @@ -64,16 +59,11 @@ #define OSI_COEX_VERSION 0x00010006 #define OSI_COEX_MAGIC_VALUE 0xFADEBEAD -#define EXT_FUNC_VERSION 0x20221122 +#define EXT_FUNC_VERSION 0x20240422 #define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5 #define BT_ASSERT_PRINT ets_printf -#ifdef CONFIG_BT_BLUEDROID_ENABLED -/* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */ -#define ACL_DATA_MBUF_LEADINGSPCAE 4 -#endif // CONFIG_BT_BLUEDROID_ENABLED - /* Types definition ************************************************************************ */ @@ -92,12 +82,6 @@ struct ext_funcs_t { int (*_esp_intr_free)(void **ret_handle); void *(* _malloc)(size_t size); void (*_free)(void *p); - void (*_hal_uart_start_tx)(int); - int (*_hal_uart_init_cbs)(int, hci_uart_tx_char, hci_uart_tx_done, hci_uart_rx_char, void *); - int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, uart_parity_t, uart_hw_flowcontrol_t); - int (*_hal_uart_close)(int); - void (*_hal_uart_blocking_tx)(int, uint8_t); - int (*_hal_uart_init)(int, void *); int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id); void (* _task_delete)(void *task_handle); @@ -173,16 +157,6 @@ static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status); static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id); static void task_delete_wrapper(void *task_handle); -#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART -static void hci_uart_start_tx_wrapper(int uart_no); -static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func, - hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg); -static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits, - uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl); -static int hci_uart_close_wrapper(int uart_no); -static void hci_uart_blocking_tx_wrapper(int port, uint8_t data); -static int hci_uart_init_wrapper(int uart_no, void *cfg); -#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in); static int esp_intr_free_wrapper(void **ret_handle); @@ -200,7 +174,6 @@ static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, b */ /* Static variable declare */ static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE; - #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED const static uint32_t log_bufs_size[] = {CONFIG_BT_LE_LOG_CTRL_BUF1_SIZE, CONFIG_BT_LE_LOG_HCI_BUF_SIZE, CONFIG_BT_LE_LOG_CTRL_BUF2_SIZE}; #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED @@ -230,14 +203,6 @@ struct ext_funcs_t ext_funcs_ro = { ._esp_intr_free = esp_intr_free_wrapper, ._malloc = bt_osi_mem_malloc_internal, ._free = bt_osi_mem_free, -#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART - ._hal_uart_start_tx = hci_uart_start_tx_wrapper, - ._hal_uart_init_cbs = hci_uart_init_cbs_wrapper, - ._hal_uart_config = hci_uart_config_wrapper, - ._hal_uart_close = hci_uart_close_wrapper, - ._hal_uart_blocking_tx = hci_uart_blocking_tx_wrapper, - ._hal_uart_init = hci_uart_init_wrapper, -#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART ._task_create = task_create_wrapper, ._task_delete = task_delete_wrapper, ._osi_assert = osi_assert_wrapper, @@ -282,75 +247,6 @@ static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status) #endif // CONFIG_SW_COEXIST_ENABLE } -#ifdef CONFIG_BT_BLUEDROID_ENABLED -bool esp_vhci_host_check_send_available(void) -{ - if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { - return false; - } - return true; -} - -static struct os_mbuf *ble_hs_mbuf_gen_pkt(uint16_t leading_space) -{ - struct os_mbuf *om; - int rc; - - om = os_msys_get_pkthdr(0, 0); - if (om == NULL) { - return NULL; - } - - if (om->om_omp->omp_databuf_len < leading_space) { - rc = os_mbuf_free_chain(om); - assert(rc == 0); - return NULL; - } - - om->om_data += leading_space; - - return om; -} - -struct os_mbuf *ble_hs_mbuf_acl_pkt(void) -{ - return ble_hs_mbuf_gen_pkt(4 + 1); -} - -void esp_vhci_host_send_packet(uint8_t *data, uint16_t len) -{ - if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { - return; - } - - if (*(data) == DATA_TYPE_COMMAND) { - struct ble_hci_cmd *cmd = NULL; - cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD); - assert(cmd); - memcpy((uint8_t *)cmd, data + 1, len - 1); - ble_hci_trans_hs_cmd_tx((uint8_t *)cmd); - } - - if (*(data) == DATA_TYPE_ACL) { - struct os_mbuf *om = os_msys_get_pkthdr(len, ACL_DATA_MBUF_LEADINGSPCAE); - assert(om); - assert(os_mbuf_append(om, &data[1], len - 1) == 0); - ble_hci_trans_hs_acl_tx(om); - } -} - -esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback) -{ - if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { - return ESP_FAIL; - } - - ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL); - - return ESP_OK; -} -#endif // CONFIG_BT_BLUEDROID_ENABLED - static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id) { @@ -382,56 +278,6 @@ static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer return rc; } -#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART -static void hci_uart_start_tx_wrapper(int uart_no) -{ - hci_uart_start_tx(uart_no); -} - -static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func, - hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg) -{ - int rc = -1; - rc = hci_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg); - return rc; -} - - -static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits, - uint8_t stop_bits, uart_parity_t parity, - uart_hw_flowcontrol_t flow_ctl) -{ - int rc = -1; - rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl); - return rc; -} - -static int hci_uart_close_wrapper(int uart_no) -{ - int rc = -1; - rc = hci_uart_close(uart_no); - return rc; -} - -static void hci_uart_blocking_tx_wrapper(int port, uint8_t data) -{ - //This function is nowhere to use. -} - -static int hci_uart_init_wrapper(int uart_no, void *cfg) -{ - //This function is nowhere to use. - return 0; -} - -#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART - -static int ble_hci_unregistered_hook(void*, void*) -{ - ESP_LOGD(NIMBLE_PORT_LOG_TAG,"%s ble hci rx_evt is not registered.",__func__); - return 0; -} - static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in) { @@ -689,6 +535,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) esp_err_t ret = ESP_OK; ble_npl_count_info_t npl_info; uint32_t slow_clk_freq = 0; + uint8_t hci_transport_mode; memset(&npl_info, 0, sizeof(ble_npl_count_info_t)); if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) { @@ -831,11 +678,23 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED; - ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL, - (ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL); - return ESP_OK; +#if CONFIG_BT_LE_HCI_INTERFACE_USE_RAM + hci_transport_mode = HCI_TRANSPORT_VHCI; +#elif CONFIG_BT_LE_HCI_INTERFACE_USE_UART + hci_transport_mode = HCI_TRANSPORT_UART_NO_DMA; +#if CONFIG_BT_LE_UART_HCI_DMA_MODE + hci_transport_mode = HCI_TRANSPORT_UART_UHCI; +#endif // CONFIG_BT_LE_UART_HCI_DMA_MODE +#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_RAM + ret = hci_transport_init(hci_transport_mode); + if (ret) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "hci transport init failed %d", ret); + goto free_controller; + } + return ESP_OK; free_controller: + hci_transport_deinit(); controller_sleep_deinit(); os_msys_deinit(); r_ble_controller_deinit(); @@ -865,6 +724,7 @@ esp_err_t esp_bt_controller_deinit(void) return ESP_FAIL; } + hci_transport_deinit(); controller_sleep_deinit(); os_msys_deinit(); diff --git a/components/bt/controller/esp32h2/esp_bt_cfg.h b/components/bt/controller/esp32h2/esp_bt_cfg.h index c0c5801af14..b8bbfd3d4b7 100644 --- a/components/bt/controller/esp32h2/esp_bt_cfg.h +++ b/components/bt/controller/esp32h2/esp_bt_cfg.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -124,12 +124,26 @@ extern "C" { #else #define DEFAULT_BT_LE_POWER_CONTROL_ENABLED (0) #endif - #if defined(CONFIG_BT_LE_50_FEATURE_SUPPORT) #define DEFAULT_BT_LE_50_FEATURE_SUPPORT (1) #else #define DEFAULT_BT_LE_50_FEATURE_SUPPORT (0) #endif + + #if defined (CONFIG_BT_LE_HCI_UART_FLOWCTRL) + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (CONFIG_BT_LE_HCI_UART_FLOWCTRL) + #if DEFAULT_BT_LE_HCI_UART_FLOW_CTRL + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (CONFIG_BT_LE_HCI_UART_CTS_PIN) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (CONFIG_BT_LE_HCI_UART_RTS_PIN) + #else + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1) + #endif + #else + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1) + #endif #endif #define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF @@ -170,8 +184,6 @@ extern "C" { #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (UART_DATA_8_BITS) #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (UART_STOP_BITS_1) #define DEFAULT_BT_LE_HCI_UART_PARITY (0) - #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (CONFIG_BT_LE_HCI_UART_TASK_STACK_SIZE) - #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) #else #define DEFAULT_BT_LE_HCI_UART_TX_PIN (0) #define DEFAULT_BT_LE_HCI_UART_RX_PIN (0) @@ -180,8 +192,6 @@ extern "C" { #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (0) #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (0) #define DEFAULT_BT_LE_HCI_UART_PARITY (0) - #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (0) - #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) #endif /* Unchanged configuration */ diff --git a/components/bt/controller/lib_esp32c6/esp32c6-bt-lib b/components/bt/controller/lib_esp32c6/esp32c6-bt-lib index 4a63b2963a8..2085541b6e9 160000 --- a/components/bt/controller/lib_esp32c6/esp32c6-bt-lib +++ b/components/bt/controller/lib_esp32c6/esp32c6-bt-lib @@ -1 +1 @@ -Subproject commit 4a63b2963a8a75958db680df4ace64bbd3d6c618 +Subproject commit 2085541b6e9963640e4090401faaf2061758d847 diff --git a/components/bt/controller/lib_esp32h2/esp32h2-bt-lib b/components/bt/controller/lib_esp32h2/esp32h2-bt-lib index 96b48749e24..9e29a8b39fe 160000 --- a/components/bt/controller/lib_esp32h2/esp32h2-bt-lib +++ b/components/bt/controller/lib_esp32h2/esp32h2-bt-lib @@ -1 +1 @@ -Subproject commit 96b48749e249d0752f196007b008212cb8b28e07 +Subproject commit 9e29a8b39fe81ac82064dc4525e56e0faa9e1b8a diff --git a/components/bt/include/esp32c6/include/esp_bt.h b/components/bt/include/esp32c6/include/esp_bt.h index 210ead42da9..ea272287228 100644 --- a/components/bt/include/esp32c6/include/esp_bt.h +++ b/components/bt/include/esp32c6/include/esp_bt.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -155,7 +155,7 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type */ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle); -#define CONFIG_VERSION 0x20231124 +#define CONFIG_VERSION 0x20240422 #define CONFIG_MAGIC 0x5A5AA5A5 /** @@ -196,13 +196,6 @@ typedef struct { uint8_t controller_run_cpu; /*!< CPU core on which the controller runs */ uint8_t enable_qa_test; /*!< Enable quality assurance (QA) testing */ uint8_t enable_bqb_test; /*!< Enable Bluetooth Qualification Test (BQB) testing */ - uint8_t enable_uart_hci; /*!< Enable UART HCI (Host Controller Interface) */ - uint8_t ble_hci_uart_port; /*!< UART port number for Bluetooth HCI */ - uint32_t ble_hci_uart_baud; /*!< Baud rate for Bluetooth HCI UART */ - uint8_t ble_hci_uart_data_bits; /*!< Number of data bits for Bluetooth HCI UART */ - uint8_t ble_hci_uart_stop_bits; /*!< Number of stop bits for Bluetooth HCI UART */ - uint8_t ble_hci_uart_flow_ctrl; /*!< Flow control settings for Bluetooth HCI UART */ - uint8_t ble_hci_uart_uart_parity; /*!< Parity settings for Bluetooth HCI UART */ uint8_t enable_tx_cca; /*!< Enable Transmit Clear Channel Assessment (TX CCA) */ uint8_t cca_rssi_thresh; /*!< RSSI threshold for Transmit Clear Channel Assessment (CCA) */ uint8_t sleep_en; /*!< Enable sleep mode */ @@ -253,13 +246,6 @@ typedef struct { .controller_run_cpu = 0, \ .enable_qa_test = RUN_QA_TEST, \ .enable_bqb_test = RUN_BQB_TEST, \ - .enable_uart_hci = HCI_UART_EN, \ - .ble_hci_uart_port = DEFAULT_BT_LE_HCI_UART_PORT, \ - .ble_hci_uart_baud = DEFAULT_BT_LE_HCI_UART_BAUD, \ - .ble_hci_uart_data_bits = DEFAULT_BT_LE_HCI_UART_DATA_BITS, \ - .ble_hci_uart_stop_bits = DEFAULT_BT_LE_HCI_UART_STOP_BITS, \ - .ble_hci_uart_flow_ctrl = DEFAULT_BT_LE_HCI_UART_FLOW_CTRL, \ - .ble_hci_uart_uart_parity = DEFAULT_BT_LE_HCI_UART_PARITY, \ .enable_tx_cca = DEFAULT_BT_LE_TX_CCA_ENABLED, \ .cca_rssi_thresh = 256 - DEFAULT_BT_LE_CCA_RSSI_THRESH, \ .sleep_en = NIMBLE_SLEEP_ENABLE, \ diff --git a/components/bt/include/esp32h2/include/esp_bt.h b/components/bt/include/esp32h2/include/esp_bt.h index a1c7aed8ee2..bbecb64072f 100644 --- a/components/bt/include/esp32h2/include/esp_bt.h +++ b/components/bt/include/esp32h2/include/esp_bt.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -160,7 +160,7 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type */ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle); -#define CONFIG_VERSION 0x20231124 +#define CONFIG_VERSION 0x20240422 #define CONFIG_MAGIC 0x5A5AA5A5 /** @@ -201,13 +201,6 @@ typedef struct { uint8_t controller_run_cpu; /*!< CPU number on which the Bluetooth controller task runs */ uint8_t enable_qa_test; /*!< Enable for QA test */ uint8_t enable_bqb_test; /*!< Enable for BQB test */ - uint8_t enable_uart_hci; /*!< Enable UART for HCI (Host Controller Interface) */ - uint8_t ble_hci_uart_port; /*!< Port of UART for HCI */ - uint32_t ble_hci_uart_baud; /*!< Baudrate of UART for HCI */ - uint8_t ble_hci_uart_data_bits; /*!< Data bits of UART for HCI */ - uint8_t ble_hci_uart_stop_bits; /*!< Stop bits of UART for HCI */ - uint8_t ble_hci_uart_flow_ctrl; /*!< Flow control of UART for HCI */ - uint8_t ble_hci_uart_uart_parity; /*!< UART parity */ uint8_t enable_tx_cca; /*!< Enable Clear Channel Assessment (CCA) when transmitting */ uint8_t cca_rssi_thresh; /*!< RSSI threshold for CCA */ uint8_t sleep_en; /*!< Enable sleep functionality */ @@ -258,13 +251,6 @@ typedef struct { .controller_run_cpu = 0, \ .enable_qa_test = RUN_QA_TEST, \ .enable_bqb_test = RUN_BQB_TEST, \ - .enable_uart_hci = HCI_UART_EN, \ - .ble_hci_uart_port = DEFAULT_BT_LE_HCI_UART_PORT, \ - .ble_hci_uart_baud = DEFAULT_BT_LE_HCI_UART_BAUD, \ - .ble_hci_uart_data_bits = DEFAULT_BT_LE_HCI_UART_DATA_BITS, \ - .ble_hci_uart_stop_bits = DEFAULT_BT_LE_HCI_UART_STOP_BITS, \ - .ble_hci_uart_flow_ctrl = DEFAULT_BT_LE_HCI_UART_FLOW_CTRL, \ - .ble_hci_uart_uart_parity = DEFAULT_BT_LE_HCI_UART_PARITY, \ .enable_tx_cca = DEFAULT_BT_LE_TX_CCA_ENABLED, \ .cca_rssi_thresh = 256 - DEFAULT_BT_LE_CCA_RSSI_THRESH, \ .sleep_en = NIMBLE_SLEEP_ENABLE, \ diff --git a/components/hal/esp32c6/include/hal/uhci_ll.h b/components/hal/esp32c6/include/hal/uhci_ll.h new file mode 100644 index 00000000000..07d4a40a683 --- /dev/null +++ b/components/hal/esp32c6/include/hal/uhci_ll.h @@ -0,0 +1,133 @@ +/* + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once +#include +#include "hal/uhci_types.h" +#include "soc/uhci_struct.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define UHCI_LL_GET_HW(num) (((num) == 0) ? (&UHCI0) : (NULL)) + +typedef enum { + UHCI_RX_BREAK_CHR_EOF = 0x1, + UHCI_RX_IDLE_EOF = 0x2, + UHCI_RX_LEN_EOF = 0x4, + UHCI_RX_EOF_MAX = 0x7, +} uhci_rxeof_cfg_t; + +static inline void uhci_ll_init(uhci_dev_t *hw) +{ + typeof(hw->conf0) conf0_reg; + hw->conf0.clk_en = 1; + conf0_reg.val = 0; + conf0_reg.clk_en = 1; + hw->conf0.val = conf0_reg.val; + hw->conf1.val = 0; +} + +static inline void uhci_ll_attach_uart_port(uhci_dev_t *hw, int uart_num) +{ + hw->conf0.uart0_ce = (uart_num == 0)? 1: 0; + hw->conf0.uart1_ce = (uart_num == 1)? 1: 0; +} + +static inline void uhci_ll_set_seper_chr(uhci_dev_t *hw, uhci_seper_chr_t *seper_char) +{ + if (seper_char->sub_chr_en) { + typeof(hw->esc_conf0) esc_conf0_reg; + esc_conf0_reg.val = hw->esc_conf0.val; + + esc_conf0_reg.seper_char = seper_char->seper_chr; + esc_conf0_reg.seper_esc_char0 = seper_char->sub_chr1; + esc_conf0_reg.seper_esc_char1 = seper_char->sub_chr2; + hw->esc_conf0.val = esc_conf0_reg.val; + hw->escape_conf.tx_c0_esc_en = 1; + hw->escape_conf.rx_c0_esc_en = 1; + } else { + hw->escape_conf.tx_c0_esc_en = 0; + hw->escape_conf.rx_c0_esc_en = 0; + } +} + +static inline void uhci_ll_get_seper_chr(uhci_dev_t *hw, uhci_seper_chr_t *seper_chr) +{ + (void)hw; + (void)seper_chr; +} + +static inline void uhci_ll_set_swflow_ctrl_sub_chr(uhci_dev_t *hw, uhci_swflow_ctrl_sub_chr_t *sub_ctr) +{ + typeof(hw->escape_conf) escape_conf_reg; + escape_conf_reg.val = hw->escape_conf.val; + + if (sub_ctr->flow_en == 1) { + typeof(hw->esc_conf2) esc_conf2_reg; + esc_conf2_reg.val = hw->esc_conf2.val; + typeof(hw->esc_conf3) esc_conf3_reg; + esc_conf3_reg.val = hw->esc_conf3.val; + + esc_conf2_reg.esc_seq1 = sub_ctr->xon_chr; + esc_conf2_reg.esc_seq1_char0 = sub_ctr->xon_sub1; + esc_conf2_reg.esc_seq1_char1 = sub_ctr->xon_sub2; + esc_conf3_reg.esc_seq2 = sub_ctr->xoff_chr; + esc_conf3_reg.esc_seq2_char0 = sub_ctr->xoff_sub1; + esc_conf3_reg.esc_seq2_char1 = sub_ctr->xoff_sub2; + escape_conf_reg.tx_11_esc_en = 1; + escape_conf_reg.tx_13_esc_en = 1; + escape_conf_reg.rx_11_esc_en = 1; + escape_conf_reg.rx_13_esc_en = 1; + hw->esc_conf2.val = esc_conf2_reg.val; + hw->esc_conf3.val = esc_conf3_reg.val; + } else { + escape_conf_reg.tx_11_esc_en = 0; + escape_conf_reg.tx_13_esc_en = 0; + escape_conf_reg.rx_11_esc_en = 0; + escape_conf_reg.rx_13_esc_en = 0; + } + hw->escape_conf.val = escape_conf_reg.val; +} + +static inline void uhci_ll_enable_intr(uhci_dev_t *hw, uint32_t intr_mask) +{ + hw->int_ena.val |= intr_mask; +} + +static inline void uhci_ll_disable_intr(uhci_dev_t *hw, uint32_t intr_mask) +{ + hw->int_ena.val &= (~intr_mask); +} + +static inline void uhci_ll_clear_intr(uhci_dev_t *hw, uint32_t intr_mask) +{ + hw->int_clr.val = intr_mask; +} + +static inline uint32_t uhci_ll_get_intr(uhci_dev_t *hw) +{ + return hw->int_st.val; +} + + +static inline void uhci_ll_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode) +{ + if (eof_mode & UHCI_RX_BREAK_CHR_EOF) { + hw->conf0.uart_rx_brk_eof_en = 1; + } + if (eof_mode & UHCI_RX_IDLE_EOF) { + hw->conf0.uart_idle_eof_en = 1; + } + if (eof_mode & UHCI_RX_LEN_EOF) { + hw->conf0.len_eof_en = 1; + } +} + +#ifdef __cplusplus +} +#endif diff --git a/components/hal/esp32h2/include/hal/uhci_ll.h b/components/hal/esp32h2/include/hal/uhci_ll.h new file mode 100644 index 00000000000..07d4a40a683 --- /dev/null +++ b/components/hal/esp32h2/include/hal/uhci_ll.h @@ -0,0 +1,133 @@ +/* + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once +#include +#include "hal/uhci_types.h" +#include "soc/uhci_struct.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define UHCI_LL_GET_HW(num) (((num) == 0) ? (&UHCI0) : (NULL)) + +typedef enum { + UHCI_RX_BREAK_CHR_EOF = 0x1, + UHCI_RX_IDLE_EOF = 0x2, + UHCI_RX_LEN_EOF = 0x4, + UHCI_RX_EOF_MAX = 0x7, +} uhci_rxeof_cfg_t; + +static inline void uhci_ll_init(uhci_dev_t *hw) +{ + typeof(hw->conf0) conf0_reg; + hw->conf0.clk_en = 1; + conf0_reg.val = 0; + conf0_reg.clk_en = 1; + hw->conf0.val = conf0_reg.val; + hw->conf1.val = 0; +} + +static inline void uhci_ll_attach_uart_port(uhci_dev_t *hw, int uart_num) +{ + hw->conf0.uart0_ce = (uart_num == 0)? 1: 0; + hw->conf0.uart1_ce = (uart_num == 1)? 1: 0; +} + +static inline void uhci_ll_set_seper_chr(uhci_dev_t *hw, uhci_seper_chr_t *seper_char) +{ + if (seper_char->sub_chr_en) { + typeof(hw->esc_conf0) esc_conf0_reg; + esc_conf0_reg.val = hw->esc_conf0.val; + + esc_conf0_reg.seper_char = seper_char->seper_chr; + esc_conf0_reg.seper_esc_char0 = seper_char->sub_chr1; + esc_conf0_reg.seper_esc_char1 = seper_char->sub_chr2; + hw->esc_conf0.val = esc_conf0_reg.val; + hw->escape_conf.tx_c0_esc_en = 1; + hw->escape_conf.rx_c0_esc_en = 1; + } else { + hw->escape_conf.tx_c0_esc_en = 0; + hw->escape_conf.rx_c0_esc_en = 0; + } +} + +static inline void uhci_ll_get_seper_chr(uhci_dev_t *hw, uhci_seper_chr_t *seper_chr) +{ + (void)hw; + (void)seper_chr; +} + +static inline void uhci_ll_set_swflow_ctrl_sub_chr(uhci_dev_t *hw, uhci_swflow_ctrl_sub_chr_t *sub_ctr) +{ + typeof(hw->escape_conf) escape_conf_reg; + escape_conf_reg.val = hw->escape_conf.val; + + if (sub_ctr->flow_en == 1) { + typeof(hw->esc_conf2) esc_conf2_reg; + esc_conf2_reg.val = hw->esc_conf2.val; + typeof(hw->esc_conf3) esc_conf3_reg; + esc_conf3_reg.val = hw->esc_conf3.val; + + esc_conf2_reg.esc_seq1 = sub_ctr->xon_chr; + esc_conf2_reg.esc_seq1_char0 = sub_ctr->xon_sub1; + esc_conf2_reg.esc_seq1_char1 = sub_ctr->xon_sub2; + esc_conf3_reg.esc_seq2 = sub_ctr->xoff_chr; + esc_conf3_reg.esc_seq2_char0 = sub_ctr->xoff_sub1; + esc_conf3_reg.esc_seq2_char1 = sub_ctr->xoff_sub2; + escape_conf_reg.tx_11_esc_en = 1; + escape_conf_reg.tx_13_esc_en = 1; + escape_conf_reg.rx_11_esc_en = 1; + escape_conf_reg.rx_13_esc_en = 1; + hw->esc_conf2.val = esc_conf2_reg.val; + hw->esc_conf3.val = esc_conf3_reg.val; + } else { + escape_conf_reg.tx_11_esc_en = 0; + escape_conf_reg.tx_13_esc_en = 0; + escape_conf_reg.rx_11_esc_en = 0; + escape_conf_reg.rx_13_esc_en = 0; + } + hw->escape_conf.val = escape_conf_reg.val; +} + +static inline void uhci_ll_enable_intr(uhci_dev_t *hw, uint32_t intr_mask) +{ + hw->int_ena.val |= intr_mask; +} + +static inline void uhci_ll_disable_intr(uhci_dev_t *hw, uint32_t intr_mask) +{ + hw->int_ena.val &= (~intr_mask); +} + +static inline void uhci_ll_clear_intr(uhci_dev_t *hw, uint32_t intr_mask) +{ + hw->int_clr.val = intr_mask; +} + +static inline uint32_t uhci_ll_get_intr(uhci_dev_t *hw) +{ + return hw->int_st.val; +} + + +static inline void uhci_ll_set_eof_mode(uhci_dev_t *hw, uint32_t eof_mode) +{ + if (eof_mode & UHCI_RX_BREAK_CHR_EOF) { + hw->conf0.uart_rx_brk_eof_en = 1; + } + if (eof_mode & UHCI_RX_IDLE_EOF) { + hw->conf0.uart_idle_eof_en = 1; + } + if (eof_mode & UHCI_RX_LEN_EOF) { + hw->conf0.len_eof_en = 1; + } +} + +#ifdef __cplusplus +} +#endif From 113c8923da6bde580c31780ab9dfd46b22ca5d8e Mon Sep 17 00:00:00 2001 From: zwl Date: Thu, 4 Jul 2024 21:15:18 +0800 Subject: [PATCH 007/113] feat(bluetooth/controller): adopting new HCI layer code on ESP32-C5 --- components/bt/controller/esp32c5/Kconfig.in | 30 ++- components/bt/controller/esp32c5/bt.c | 175 ++---------------- components/bt/controller/esp32c5/esp_bt_cfg.h | 19 +- .../bt/controller/lib_esp32c5/esp32c5-bt-lib | 2 +- .../bt/include/esp32c5/include/esp_bt.h | 16 +- 5 files changed, 55 insertions(+), 187 deletions(-) diff --git a/components/bt/controller/esp32c5/Kconfig.in b/components/bt/controller/esp32c5/Kconfig.in index 02ac4995d27..6ad2a9ce8c0 100644 --- a/components/bt/controller/esp32c5/Kconfig.in +++ b/components/bt/controller/esp32c5/Kconfig.in @@ -2,15 +2,15 @@ menu "HCI Config" choice BT_LE_HCI_INTERFACE - prompt "Select HCI interface" + prompt "HCI mode" default BT_LE_HCI_INTERFACE_USE_RAM config BT_LE_HCI_INTERFACE_USE_RAM - bool "ram" + bool "VHCI" help Use RAM as HCI interface config BT_LE_HCI_INTERFACE_USE_UART - bool "uart" + bool "UART(H4)" help Use UART as HCI interface endchoice @@ -73,12 +73,26 @@ menu "HCI Config" UART_PARITY_ODD endchoice - config BT_LE_HCI_UART_TASK_STACK_SIZE - int "HCI uart task stack size" - depends on BT_LE_HCI_INTERFACE_USE_UART - default 1000 + config BT_LE_HCI_UART_RX_BUFFER_SIZE + int "The size of rx ring buffer memory" + depends on !BT_LE_HCI_INTERFACE_USE_RAM + default 512 + help + The size of rx ring buffer memory + + config BT_LE_HCI_UART_TX_BUFFER_SIZE + int "The size of tx ring buffer memory" + depends on !BT_LE_HCI_INTERFACE_USE_RAM + default 256 + help + The size of tx ring buffer memory + + config BT_LE_HCI_TRANS_TASK_STACK_SIZE + int "HCI transport task stack size" + depends on !BT_LE_HCI_INTERFACE_USE_RAM + default 1024 help - Set the size of uart task stack + This configures stack size of hci transport task endmenu config BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT diff --git a/components/bt/controller/esp32c5/bt.c b/components/bt/controller/esp32c5/bt.c index 17794564355..3d558b357d1 100644 --- a/components/bt/controller/esp32c5/bt.c +++ b/components/bt/controller/esp32c5/bt.c @@ -30,7 +30,7 @@ #endif // CONFIG_SW_COEXIST_ENABLE #include "nimble/nimble_npl_os.h" -#include "ble_hci_trans.h" +#include "esp_hci_transport.h" #include "os/endian.h" #include "esp_bt.h" @@ -39,7 +39,6 @@ #include "esp_pm.h" #include "esp_phy_init.h" #include "esp_private/periph_ctrl.h" -#include "hci_uart.h" #include "bt_osi_mem.h" #if SOC_PM_RETENTION_HAS_CLOCK_BUG @@ -50,10 +49,6 @@ #include "esp_private/sleep_modem.h" #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE -#ifdef CONFIG_BT_BLUEDROID_ENABLED -#include "hci/hci_hal.h" -#endif // CONFIG_BT_BLUEDROID_ENABLED - #include "freertos/FreeRTOS.h" #include "freertos/task.h" @@ -69,16 +64,11 @@ #define OSI_COEX_VERSION 0x00010006 #define OSI_COEX_MAGIC_VALUE 0xFADEBEAD -#define EXT_FUNC_VERSION 0x20221122 +#define EXT_FUNC_VERSION 0x20240422 #define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5 #define BT_ASSERT_PRINT ets_printf -#ifdef CONFIG_BT_BLUEDROID_ENABLED -/* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */ -#define ACL_DATA_MBUF_LEADINGSPCAE 4 -#endif // CONFIG_BT_BLUEDROID_ENABLED - /* Types definition ************************************************************************ */ @@ -97,12 +87,6 @@ struct ext_funcs_t { int (*_esp_intr_free)(void **ret_handle); void *(* _malloc)(size_t size); void (*_free)(void *p); - void (*_hal_uart_start_tx)(int); - int (*_hal_uart_init_cbs)(int, hci_uart_tx_char, hci_uart_tx_done, hci_uart_rx_char, void *); - int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, uart_parity_t, uart_hw_flowcontrol_t); - int (*_hal_uart_close)(int); - void (*_hal_uart_blocking_tx)(int, uint8_t); - int (*_hal_uart_init)(int, void *); int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id); void (* _task_delete)(void *task_handle); @@ -179,16 +163,6 @@ static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status); static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id); static void task_delete_wrapper(void *task_handle); -#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART -static void hci_uart_start_tx_wrapper(int uart_no); -static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func, - hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg); -static int hci_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits, - uart_parity_t parity, uart_hw_flowcontrol_t flow_ctl); -static int hci_uart_close_wrapper(int uart_no); -static void hci_uart_blocking_tx_wrapper(int port, uint8_t data); -static int hci_uart_init_wrapper(int uart_no, void *cfg); -#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_UART static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in); static int esp_intr_free_wrapper(void **ret_handle); @@ -206,7 +180,6 @@ static void esp_bt_controller_log_interface(uint32_t len, const uint8_t *addr, b */ /* Static variable declare */ static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE; - #if CONFIG_BT_LE_CONTROLLER_LOG_ENABLED const static uint32_t log_bufs_size[] = {CONFIG_BT_LE_LOG_CTRL_BUF1_SIZE, CONFIG_BT_LE_LOG_HCI_BUF_SIZE, CONFIG_BT_LE_LOG_CTRL_BUF2_SIZE}; #endif // CONFIG_BT_LE_CONTROLLER_LOG_ENABLED @@ -236,14 +209,6 @@ struct ext_funcs_t ext_funcs_ro = { ._esp_intr_free = esp_intr_free_wrapper, ._malloc = bt_osi_mem_malloc_internal, ._free = bt_osi_mem_free, -#if CONFIG_BT_LE_HCI_INTERFACE_USE_UART - ._hal_uart_start_tx = hci_uart_start_tx_wrapper, - ._hal_uart_init_cbs = hci_uart_init_cbs_wrapper, - ._hal_uart_config = hci_uart_config_wrapper, - ._hal_uart_close = hci_uart_close_wrapper, - ._hal_uart_blocking_tx = hci_uart_blocking_tx_wrapper, - ._hal_uart_init = hci_uart_init_wrapper, -#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART ._task_create = task_create_wrapper, ._task_delete = task_delete_wrapper, ._osi_assert = osi_assert_wrapper, @@ -288,75 +253,6 @@ static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status) #endif // CONFIG_SW_COEXIST_ENABLE } -#ifdef CONFIG_BT_BLUEDROID_ENABLED -bool esp_vhci_host_check_send_available(void) -{ - if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { - return false; - } - return true; -} - -static struct os_mbuf *ble_hs_mbuf_gen_pkt(uint16_t leading_space) -{ - struct os_mbuf *om; - int rc; - - om = os_msys_get_pkthdr(0, 0); - if (om == NULL) { - return NULL; - } - - if (om->om_omp->omp_databuf_len < leading_space) { - rc = os_mbuf_free_chain(om); - assert(rc == 0); - return NULL; - } - - om->om_data += leading_space; - - return om; -} - -struct os_mbuf *ble_hs_mbuf_acl_pkt(void) -{ - return ble_hs_mbuf_gen_pkt(4 + 1); -} - -void esp_vhci_host_send_packet(uint8_t *data, uint16_t len) -{ - if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { - return; - } - - if (*(data) == DATA_TYPE_COMMAND) { - struct ble_hci_cmd *cmd = NULL; - cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD); - assert(cmd); - memcpy((uint8_t *)cmd, data + 1, len - 1); - ble_hci_trans_hs_cmd_tx((uint8_t *)cmd); - } - - if (*(data) == DATA_TYPE_ACL) { - struct os_mbuf *om = os_msys_get_pkthdr(len, ACL_DATA_MBUF_LEADINGSPCAE); - assert(om); - assert(os_mbuf_append(om, &data[1], len - 1) == 0); - ble_hci_trans_hs_acl_tx(om); - } -} - -esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback) -{ - if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) { - return ESP_FAIL; - } - - ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt, NULL, ble_hs_rx_data, NULL); - - return ESP_OK; -} -#endif // CONFIG_BT_BLUEDROID_ENABLED - static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id) { @@ -388,56 +284,6 @@ static int esp_ecc_gen_dh_key(const uint8_t *peer_pub_key_x, const uint8_t *peer return rc; } -#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART -static void hci_uart_start_tx_wrapper(int uart_no) -{ - hci_uart_start_tx(uart_no); -} - -static int hci_uart_init_cbs_wrapper(int uart_no, hci_uart_tx_char tx_func, - hci_uart_tx_done tx_done, hci_uart_rx_char rx_func, void *arg) -{ - int rc = -1; - rc = hci_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg); - return rc; -} - - -static int hci_uart_config_wrapper(int port_num, int32_t baud_rate, uint8_t data_bits, - uint8_t stop_bits, uart_parity_t parity, - uart_hw_flowcontrol_t flow_ctl) -{ - int rc = -1; - rc = hci_uart_config(port_num, baud_rate, data_bits, stop_bits, parity, flow_ctl); - return rc; -} - -static int hci_uart_close_wrapper(int uart_no) -{ - int rc = -1; - rc = hci_uart_close(uart_no); - return rc; -} - -static void hci_uart_blocking_tx_wrapper(int port, uint8_t data) -{ - //This function is nowhere to use. -} - -static int hci_uart_init_wrapper(int uart_no, void *cfg) -{ - //This function is nowhere to use. - return 0; -} - -#endif //CONFIG_BT_LE_HCI_INTERFACE_USE_UART - -static int ble_hci_unregistered_hook(void*, void*) -{ - ESP_LOGD(NIMBLE_PORT_LOG_TAG,"%s ble hci rx_evt is not registered.",__func__); - return 0; -} - static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in) { @@ -694,6 +540,7 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) esp_err_t ret = ESP_OK; ble_npl_count_info_t npl_info; uint32_t slow_clk_freq = 0; + uint8_t hci_transport_mode; memset(&npl_info, 0, sizeof(ble_npl_count_info_t)); @@ -838,11 +685,20 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED; - ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL, - (ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL); - return ESP_OK; +#if CONFIG_BT_LE_HCI_INTERFACE_USE_RAM + hci_transport_mode = HCI_TRANSPORT_VHCI; +#elif CONFIG_BT_LE_HCI_INTERFACE_USE_UART + hci_transport_mode = HCI_TRANSPORT_UART_NO_DMA; +#endif // CONFIG_BT_LE_HCI_INTERFACE_USE_RAM + ret = hci_transport_init(hci_transport_mode); + if (ret) { + ESP_LOGW(NIMBLE_PORT_LOG_TAG, "hci transport init failed %d", ret); + goto free_controller; + } + return ESP_OK; free_controller: + hci_transport_deinit(); controller_sleep_deinit(); os_msys_deinit(); r_ble_controller_deinit(); @@ -873,6 +729,7 @@ esp_err_t esp_bt_controller_deinit(void) return ESP_FAIL; } + hci_transport_deinit(); controller_sleep_deinit(); os_msys_deinit(); diff --git a/components/bt/controller/esp32c5/esp_bt_cfg.h b/components/bt/controller/esp32c5/esp_bt_cfg.h index b9597034fc6..b8bbfd3d4b7 100644 --- a/components/bt/controller/esp32c5/esp_bt_cfg.h +++ b/components/bt/controller/esp32c5/esp_bt_cfg.h @@ -129,6 +129,21 @@ extern "C" { #else #define DEFAULT_BT_LE_50_FEATURE_SUPPORT (0) #endif + + #if defined (CONFIG_BT_LE_HCI_UART_FLOWCTRL) + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (CONFIG_BT_LE_HCI_UART_FLOWCTRL) + #if DEFAULT_BT_LE_HCI_UART_FLOW_CTRL + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (CONFIG_BT_LE_HCI_UART_CTS_PIN) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (CONFIG_BT_LE_HCI_UART_RTS_PIN) + #else + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1) + #endif + #else + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1) + #endif #endif #define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF @@ -169,8 +184,6 @@ extern "C" { #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (UART_DATA_8_BITS) #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (UART_STOP_BITS_1) #define DEFAULT_BT_LE_HCI_UART_PARITY (0) - #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (CONFIG_BT_LE_HCI_UART_TASK_STACK_SIZE) - #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) #else #define DEFAULT_BT_LE_HCI_UART_TX_PIN (0) #define DEFAULT_BT_LE_HCI_UART_RX_PIN (0) @@ -179,8 +192,6 @@ extern "C" { #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (0) #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (0) #define DEFAULT_BT_LE_HCI_UART_PARITY (0) - #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (0) - #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) #endif /* Unchanged configuration */ diff --git a/components/bt/controller/lib_esp32c5/esp32c5-bt-lib b/components/bt/controller/lib_esp32c5/esp32c5-bt-lib index 2e05c001042..77c67a4d06c 160000 --- a/components/bt/controller/lib_esp32c5/esp32c5-bt-lib +++ b/components/bt/controller/lib_esp32c5/esp32c5-bt-lib @@ -1 +1 @@ -Subproject commit 2e05c001042650bca426b672febd23c9ff45754e +Subproject commit 77c67a4d06c95113a2d1766892cde59f5af744af diff --git a/components/bt/include/esp32c5/include/esp_bt.h b/components/bt/include/esp32c5/include/esp_bt.h index 1a7cd646851..37a70c2a40f 100644 --- a/components/bt/include/esp32c5/include/esp_bt.h +++ b/components/bt/include/esp32c5/include/esp_bt.h @@ -155,7 +155,7 @@ esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type */ esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle); -#define CONFIG_VERSION 0x20231124 +#define CONFIG_VERSION 0x20240422 #define CONFIG_MAGIC 0x5A5AA5A5 /** @@ -196,13 +196,6 @@ typedef struct { uint8_t controller_run_cpu; /*!< CPU core on which the controller runs */ uint8_t enable_qa_test; /*!< Enable quality assurance (QA) testing */ uint8_t enable_bqb_test; /*!< Enable Bluetooth Qualification Test (BQB) testing */ - uint8_t enable_uart_hci; /*!< Enable UART HCI (Host Controller Interface) */ - uint8_t ble_hci_uart_port; /*!< UART port number for Bluetooth HCI */ - uint32_t ble_hci_uart_baud; /*!< Baud rate for Bluetooth HCI UART */ - uint8_t ble_hci_uart_data_bits; /*!< Number of data bits for Bluetooth HCI UART */ - uint8_t ble_hci_uart_stop_bits; /*!< Number of stop bits for Bluetooth HCI UART */ - uint8_t ble_hci_uart_flow_ctrl; /*!< Flow control settings for Bluetooth HCI UART */ - uint8_t ble_hci_uart_uart_parity; /*!< Parity settings for Bluetooth HCI UART */ uint8_t enable_tx_cca; /*!< Enable Transmit Clear Channel Assessment (TX CCA) */ uint8_t cca_rssi_thresh; /*!< RSSI threshold for Transmit Clear Channel Assessment (CCA) */ uint8_t sleep_en; /*!< Enable sleep mode */ @@ -252,13 +245,6 @@ typedef struct { .controller_run_cpu = 0, \ .enable_qa_test = RUN_QA_TEST, \ .enable_bqb_test = RUN_BQB_TEST, \ - .enable_uart_hci = HCI_UART_EN, \ - .ble_hci_uart_port = DEFAULT_BT_LE_HCI_UART_PORT, \ - .ble_hci_uart_baud = DEFAULT_BT_LE_HCI_UART_BAUD, \ - .ble_hci_uart_data_bits = DEFAULT_BT_LE_HCI_UART_DATA_BITS, \ - .ble_hci_uart_stop_bits = DEFAULT_BT_LE_HCI_UART_STOP_BITS, \ - .ble_hci_uart_flow_ctrl = DEFAULT_BT_LE_HCI_UART_FLOW_CTRL, \ - .ble_hci_uart_uart_parity = DEFAULT_BT_LE_HCI_UART_PARITY, \ .enable_tx_cca = DEFAULT_BT_LE_TX_CCA_ENABLED, \ .cca_rssi_thresh = 256 - DEFAULT_BT_LE_CCA_RSSI_THRESH, \ .sleep_en = NIMBLE_SLEEP_ENABLE, \ From e94e7b7ab269a0affa91f487f8523441edeee89b Mon Sep 17 00:00:00 2001 From: zwl Date: Thu, 4 Jul 2024 21:18:15 +0800 Subject: [PATCH 008/113] feat(bluetooth/controller): add default cts and rts macro definition --- .../bt/include/esp32h4/include/esp_bt_cfg.h | 20 ++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/components/bt/include/esp32h4/include/esp_bt_cfg.h b/components/bt/include/esp32h4/include/esp_bt_cfg.h index 768a0c6ccec..1f8caaeca8b 100644 --- a/components/bt/include/esp32h4/include/esp_bt_cfg.h +++ b/components/bt/include/esp32h4/include/esp_bt_cfg.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -116,6 +116,20 @@ extern "C" { #define DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT (8) #endif + #if defined (CONFIG_BT_LE_HCI_UART_FLOWCTRL) + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (CONFIG_BT_LE_HCI_UART_FLOWCTRL) + #if DEFAULT_BT_LE_HCI_UART_FLOW_CTRL + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (CONFIG_BT_LE_HCI_UART_CTS_PIN) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (CONFIG_BT_LE_HCI_UART_RTS_PIN) + #else + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1) + #endif + #else + #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) + #define DEFAULT_BT_LE_HCI_UART_CTS_PIN (-1) + #define DEFAULT_BT_LE_HCI_UART_RTS_PIN (-1) + #endif #endif #define DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF @@ -156,8 +170,6 @@ extern "C" { #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (UART_DATA_8_BITS) #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (UART_STOP_BITS_1) #define DEFAULT_BT_LE_HCI_UART_PARITY (0) - #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (CONFIG_BT_LE_HCI_UART_TASK_STACK_SIZE) - #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) #else #define DEFAULT_BT_LE_HCI_UART_TX_PIN (0) #define DEFAULT_BT_LE_HCI_UART_RX_PIN (0) @@ -166,8 +178,6 @@ extern "C" { #define DEFAULT_BT_LE_HCI_UART_DATA_BITS (0) #define DEFAULT_BT_LE_HCI_UART_STOP_BITS (0) #define DEFAULT_BT_LE_HCI_UART_PARITY (0) - #define DEFAULT_BT_LE_HCI_UART_TASK_STACK_SIZE (0) - #define DEFAULT_BT_LE_HCI_UART_FLOW_CTRL (0) #endif /* Unchanged configuration */ From 9610e3999eb13bb6092b8237b659ecde34c498cb Mon Sep 17 00:00:00 2001 From: zwl Date: Thu, 4 Jul 2024 21:16:59 +0800 Subject: [PATCH 009/113] feat(bluetooth/controller): update nimble host to adapt hci layer --- components/bt/host/nimble/nimble | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/bt/host/nimble/nimble b/components/bt/host/nimble/nimble index 9e10a234abe..ec9f21253ae 160000 --- a/components/bt/host/nimble/nimble +++ b/components/bt/host/nimble/nimble @@ -1 +1 @@ -Subproject commit 9e10a234abeb468d524e427c8c408b86a042bffc +Subproject commit ec9f21253ae539b44855fed223bee52979a9d251 From 37485738172e35196c32ab18b01ddde2d9d46032 Mon Sep 17 00:00:00 2001 From: zwl Date: Tue, 9 Jul 2024 20:42:11 +0800 Subject: [PATCH 010/113] fix(ble): fixed nimble host only build error --- .../bluetooth/nimble/bleprph_host_only/main/uart_driver.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/examples/bluetooth/nimble/bleprph_host_only/main/uart_driver.c b/examples/bluetooth/nimble/bleprph_host_only/main/uart_driver.c index 07e82387f51..cd3916724a6 100644 --- a/examples/bluetooth/nimble/bleprph_host_only/main/uart_driver.c +++ b/examples/bluetooth/nimble/bleprph_host_only/main/uart_driver.c @@ -170,6 +170,13 @@ void hci_uart_send(uint8_t *buf, uint16_t len) } } + +void +ble_transport_ll_init(void) +{ + +} + int ble_transport_to_ll_acl_impl(struct os_mbuf *om) { From 075bb4831dc7dfd42c81d04da740764602dc9338 Mon Sep 17 00:00:00 2001 From: Yuhan Wei Date: Wed, 10 Jul 2024 09:31:44 +0800 Subject: [PATCH 011/113] docs(ble): Added more explanations for memory release related API --- components/bt/include/esp32/include/esp_bt.h | 46 ++++++++++---------- 1 file changed, 24 insertions(+), 22 deletions(-) diff --git a/components/bt/include/esp32/include/esp_bt.h b/components/bt/include/esp32/include/esp_bt.h index 379cb00eac7..9793b683977 100644 --- a/components/bt/include/esp32/include/esp_bt.h +++ b/components/bt/include/esp32/include/esp_bt.h @@ -272,22 +272,22 @@ typedef enum { /** * @brief BLE TX power type * @note - * 1. The connection TX power can only be set after the connection is established. + * 1. Please use `ESP_BLE_PWR_TYPE_DEFAULT` to set connection TX power before establishing the connection. * After disconnecting, the corresponding TX power will not be affected. * 2. `ESP_BLE_PWR_TYPE_DEFAULT` can be used to set the TX power for power types that have not been set before. - * It will not affect the TX power values which have been set for the following CONN0-8/ADV/SCAN power types. - * 3. If none of power type is set, the system will use `ESP_PWR_LVL_P3` as default for ADV/SCAN/CONN0-8. + * It will not affect the TX power values which have been set for the ADV/SCAN power types. + * 3. If none of power type is set, the system will use `ESP_PWR_LVL_P3` as default for all power types. */ typedef enum { - ESP_BLE_PWR_TYPE_CONN_HDL0 = 0, /*!< TX power for connection handle 0 */ - ESP_BLE_PWR_TYPE_CONN_HDL1 = 1, /*!< TX power for connection handle 1 */ - ESP_BLE_PWR_TYPE_CONN_HDL2 = 2, /*!< TX power for connection handle 2 */ - ESP_BLE_PWR_TYPE_CONN_HDL3 = 3, /*!< TX power for connection handle 3 */ - ESP_BLE_PWR_TYPE_CONN_HDL4 = 4, /*!< TX power for connection handle 4 */ - ESP_BLE_PWR_TYPE_CONN_HDL5 = 5, /*!< TX power for connection handle 5 */ - ESP_BLE_PWR_TYPE_CONN_HDL6 = 6, /*!< TX power for connection handle 6 */ - ESP_BLE_PWR_TYPE_CONN_HDL7 = 7, /*!< TX power for connection handle 7 */ - ESP_BLE_PWR_TYPE_CONN_HDL8 = 8, /*!< TX power for connection handle 8 */ + ESP_BLE_PWR_TYPE_CONN_HDL0 = 0, /*!< TX power for connection handle 0. Currently not effective */ + ESP_BLE_PWR_TYPE_CONN_HDL1 = 1, /*!< TX power for connection handle 1. Currently not effective */ + ESP_BLE_PWR_TYPE_CONN_HDL2 = 2, /*!< TX power for connection handle 2. Currently not effective */ + ESP_BLE_PWR_TYPE_CONN_HDL3 = 3, /*!< TX power for connection handle 3. Currently not effective */ + ESP_BLE_PWR_TYPE_CONN_HDL4 = 4, /*!< TX power for connection handle 4. Currently not effective */ + ESP_BLE_PWR_TYPE_CONN_HDL5 = 5, /*!< TX power for connection handle 5. Currently not effective */ + ESP_BLE_PWR_TYPE_CONN_HDL6 = 6, /*!< TX power for connection handle 6. Currently not effective */ + ESP_BLE_PWR_TYPE_CONN_HDL7 = 7, /*!< TX power for connection handle 7. Currently not effective */ + ESP_BLE_PWR_TYPE_CONN_HDL8 = 8, /*!< TX power for connection handle 8. Currently not effective */ ESP_BLE_PWR_TYPE_ADV = 9, /*!< TX power for advertising */ ESP_BLE_PWR_TYPE_SCAN = 10, /*!< TX power for scan */ ESP_BLE_PWR_TYPE_DEFAULT = 11, /*!< Default TX power type, which can be used to set the TX power for power types that have not been set before.*/ @@ -514,6 +514,12 @@ esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callba * * This function releases the BSS, data and other sections of the Controller to heap. The total size is about 70 KB. * + * @note + * 1. This function is optional and should be called only if you want to free up memory for other components. + * 2. This function should be called only before `esp_bt_controller_init()` or after `esp_bt_controller_deinit()`. + * 3. Once Bluetooth Controller memory is released, the process cannot be reversed. This means you cannot use the Bluetooth Controller mode that you have released using this function. + * 4. If your firmware will upgrade the Bluetooth Controller mode later (such as switching from BLE to Classic Bluetooth or from disabled to enabled), then do not call this function. + * * If the app calls `esp_bt_controller_enable(ESP_BT_MODE_BLE)` to use BLE only, * then it is safe to call `esp_bt_controller_mem_release(ESP_BT_MODE_CLASSIC_BT)` at initialization time to free unused Classic Bluetooth memory. * @@ -521,11 +527,6 @@ esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callba * which internally calls `esp_bt_controller_mem_release(ESP_BT_MODE_BTDM)` and additionally releases the BSS and data * consumed by the Classic Bluetooth/BLE Host stack to heap. For more details about usage please refer to the documentation of `esp_bt_mem_release()` function. * - * @note - * 1. This function should be called only before `esp_bt_controller_init()` or after `esp_bt_controller_deinit()`. - * 2. Once Bluetooth Controller memory is released, the process cannot be reversed. This means you cannot use the Bluetooth Controller mode that you have released using this function. - * 3. If your firmware will upgrade the Bluetooth Controller mode later (such as switching from BLE to Classic Bluetooth or from disabled to enabled), then do not call this function. - * * @param[in] mode The Bluetooth Controller mode * * @return @@ -536,6 +537,12 @@ esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callba esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode); /** @brief Release the Controller memory, BSS and data section of the Classic Bluetooth/BLE Host stack as per the mode + * + * @note + * 1. This function is optional and should be called only if you want to free up memory for other components. + * 2. Once Bluetooth Controller memory is released, the process cannot be reversed. This means you cannot use the Bluetooth Controller mode that you have released using this function. + * 3. If your firmware will upgrade the Bluetooth Controller mode later (such as switching from BLE to Classic Bluetooth or from disabled to enabled), then do not call this function. + * 4. In case of NimBLE Host, to release BSS and data memory to heap, the mode needs to be set to `ESP_BT_MODE_BTDM` as the Controller is in Dual mode. * * This function first releases Controller memory by internally calling `esp_bt_controller_mem_release()`. * Additionally, if the mode is set to `ESP_BT_MODE_BTDM`, it also releases the BSS and data consumed by the Classic Bluetooth and BLE Host stack to heap. @@ -553,11 +560,6 @@ esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode); * esp_bt_controller_deinit(); * esp_bt_mem_release(ESP_BT_MODE_BTDM); * - * @note - * 1. Once Bluetooth Controller memory is released, the process cannot be reversed. This means you cannot use the Bluetooth Controller mode that you have released using this function. - * 2. If your firmware will upgrade the Bluetooth Controller mode later (such as switching from BLE to Classic Bluetooth or from disabled to enabled), then do not call this function. - * 3. In case of NimBLE Host, to release BSS and data memory to heap, the mode needs to be set to `ESP_BT_MODE_BTDM` as the Controller is in Dual mode. - * * @param[in] mode The Bluetooth Controller mode * * @return From 40c454bb40792d8b5e164bee1f7875986e379606 Mon Sep 17 00:00:00 2001 From: Yuhan Wei Date: Wed, 10 Jul 2024 09:55:55 +0800 Subject: [PATCH 012/113] docs(ble): Removed a period --- components/bt/include/esp32/include/esp_bt.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/components/bt/include/esp32/include/esp_bt.h b/components/bt/include/esp32/include/esp_bt.h index 9793b683977..62c18ca8968 100644 --- a/components/bt/include/esp32/include/esp_bt.h +++ b/components/bt/include/esp32/include/esp_bt.h @@ -53,7 +53,7 @@ extern "C" { /** * @brief Internal use only * -* @note Please do not modify this value. +* @note Please do not modify this value */ #define ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL 0x20240315 @@ -539,7 +539,7 @@ esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode); /** @brief Release the Controller memory, BSS and data section of the Classic Bluetooth/BLE Host stack as per the mode * * @note - * 1. This function is optional and should be called only if you want to free up memory for other components. + * 1. This function is optional and should be called only if you want to free up memory for other components. * 2. Once Bluetooth Controller memory is released, the process cannot be reversed. This means you cannot use the Bluetooth Controller mode that you have released using this function. * 3. If your firmware will upgrade the Bluetooth Controller mode later (such as switching from BLE to Classic Bluetooth or from disabled to enabled), then do not call this function. * 4. In case of NimBLE Host, to release BSS and data memory to heap, the mode needs to be set to `ESP_BT_MODE_BTDM` as the Controller is in Dual mode. From e9f0ca3631a7076241a50765eb11e75907eb685f Mon Sep 17 00:00:00 2001 From: Yuhan Wei Date: Wed, 10 Jul 2024 10:01:01 +0800 Subject: [PATCH 013/113] docs(ble): Reformat the code --- components/bt/include/esp32/include/esp_bt.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/components/bt/include/esp32/include/esp_bt.h b/components/bt/include/esp32/include/esp_bt.h index 62c18ca8968..92bbf42fd87 100644 --- a/components/bt/include/esp32/include/esp_bt.h +++ b/components/bt/include/esp32/include/esp_bt.h @@ -477,11 +477,11 @@ typedef struct esp_vhci_host_callback { /** * @brief Check whether the Controller is ready to receive the packet * - * If the return value is True, the Host can send the packet to the Controller. + * If the return value is True, the Host can send the packet to the Controller. * - * @note This function should be called before each `esp_vhci_host_send_packet()`. + * @note This function should be called before each `esp_vhci_host_send_packet()`. * - * @return + * @return * True if the Controller is ready to receive packets; false otherwise */ bool esp_vhci_host_check_send_available(void); From 28da1bc4bca9357cc2f1db9a049dcb096a68b3dc Mon Sep 17 00:00:00 2001 From: Yuhan Wei Date: Wed, 10 Jul 2024 16:29:00 +0800 Subject: [PATCH 014/113] docs(ble): Revised the explanations for memory release related APIs --- components/bt/include/esp32/include/esp_bt.h | 45 +++++++++++--------- 1 file changed, 26 insertions(+), 19 deletions(-) diff --git a/components/bt/include/esp32/include/esp_bt.h b/components/bt/include/esp32/include/esp_bt.h index 92bbf42fd87..101a46f64fa 100644 --- a/components/bt/include/esp32/include/esp_bt.h +++ b/components/bt/include/esp32/include/esp_bt.h @@ -272,8 +272,8 @@ typedef enum { /** * @brief BLE TX power type * @note - * 1. Please use `ESP_BLE_PWR_TYPE_DEFAULT` to set connection TX power before establishing the connection. - * After disconnecting, the corresponding TX power will not be affected. + * 1. `ESP_BLE_PWR_CONN_HDL0` - `ESP_BLE_PWR_CONN_HDL8` are not effective currently. Please use `ESP_BLE_PWR_TYPE_DEFAULT` + * to set / get BLE TX power for all connection handles. * 2. `ESP_BLE_PWR_TYPE_DEFAULT` can be used to set the TX power for power types that have not been set before. * It will not affect the TX power values which have been set for the ADV/SCAN power types. * 3. If none of power type is set, the system will use `ESP_PWR_LVL_P3` as default for all power types. @@ -327,7 +327,9 @@ typedef enum { /** * @brief Set BLE TX power * - * @note Connection TX power should only be set after the connection is established. + * @note + * 1. Please use `ESP_BLE_PWR_TYPE_DEFAULT` to set BLE TX power for all connection handles. + * 2. Connection TX power should only be set after the connection is established. * * @param[in] power_type The type of TX power. It could be Advertising, Connection, Default, etc. * @param[in] power_level Power level (index) corresponding to the absolute value (dBm) @@ -341,7 +343,9 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_ /** * @brief Get BLE TX power * - * @note Connection TX power should only be retrieved after the connection is established. + * @note + * 1. Please use `ESP_BLE_PWR_TYPE_DEFAULT` to get BLE TX power for all connection handles. + * 2. Connection TX power should only be retrieved after the connection is established. * * @param[in] power_type The type of TX power. It could be Advertising/Connection/Default and etc. * @@ -516,16 +520,17 @@ esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callba * * @note * 1. This function is optional and should be called only if you want to free up memory for other components. - * 2. This function should be called only before `esp_bt_controller_init()` or after `esp_bt_controller_deinit()`. - * 3. Once Bluetooth Controller memory is released, the process cannot be reversed. This means you cannot use the Bluetooth Controller mode that you have released using this function. - * 4. If your firmware will upgrade the Bluetooth Controller mode later (such as switching from BLE to Classic Bluetooth or from disabled to enabled), then do not call this function. + * 2. This function should only be called when the controller is in `ESP_BT_CONTROLLER_STATUS_IDLE` status. + * 3. This function should be called only before `esp_bt_controller_init()` or after `esp_bt_controller_deinit()`. + * 4. Once Bluetooth Controller memory is released, the process cannot be reversed. This means you cannot use the Bluetooth Controller mode that you have released using this function. + * 5. If your firmware will upgrade the Bluetooth Controller mode later (such as switching from BLE to Classic Bluetooth or from disabled to enabled), then do not call this function. + * + * If you never intend to use Bluetooth in a current boot-up cycle, calling `esp_bt_controller_mem_release(ESP_BT_MODE_BTDM)` could release the BSS and data consumed by both Classic Bluetooth and BLE Controller to heap. * - * If the app calls `esp_bt_controller_enable(ESP_BT_MODE_BLE)` to use BLE only, - * then it is safe to call `esp_bt_controller_mem_release(ESP_BT_MODE_CLASSIC_BT)` at initialization time to free unused Classic Bluetooth memory. + * If you intend to use BLE only, calling `esp_bt_controller_mem_release(ESP_BT_MODE_CLASSIC_BT)` could release the BSS and data consumed by Classic Bluetooth Controller. You can then continue using BLE. + * + * If you intend to use Classic Bluetooth only, calling `esp_bt_controller_mem_release(ESP_BT_MODE_BLE)` could release the BSS and data consumed by BLE Controller. You can then continue using Classic Bluetooth. * - * If the mode is `ESP_BT_MODE_BTDM`, then it may be useful to call API `esp_bt_mem_release(ESP_BT_MODE_BTDM)` instead, - * which internally calls `esp_bt_controller_mem_release(ESP_BT_MODE_BTDM)` and additionally releases the BSS and data - * consumed by the Classic Bluetooth/BLE Host stack to heap. For more details about usage please refer to the documentation of `esp_bt_mem_release()` function. * * @param[in] mode The Bluetooth Controller mode * @@ -540,15 +545,17 @@ esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode); * * @note * 1. This function is optional and should be called only if you want to free up memory for other components. - * 2. Once Bluetooth Controller memory is released, the process cannot be reversed. This means you cannot use the Bluetooth Controller mode that you have released using this function. - * 3. If your firmware will upgrade the Bluetooth Controller mode later (such as switching from BLE to Classic Bluetooth or from disabled to enabled), then do not call this function. - * 4. In case of NimBLE Host, to release BSS and data memory to heap, the mode needs to be set to `ESP_BT_MODE_BTDM` as the Controller is in Dual mode. + * 2. This function should only be called when the controller is in `ESP_BT_CONTROLLER_STATUS_IDLE` status. + * 3. Once Bluetooth Controller memory is released, the process cannot be reversed. This means you cannot use the Bluetooth Controller mode that you have released using this function. + * 4. If your firmware will upgrade the Bluetooth Controller mode later (such as switching from BLE to Classic Bluetooth or from disabled to enabled), then do not call this function. + * + * This function first releases Controller memory by internally calling `esp_bt_controller_mem_release()`, then release Host memory. + * + * If you never intend to use Bluetooth in a current boot-up cycle, calling `esp_bt_mem_release(ESP_BT_MODE_BTDM)` could release the BSS and data consumed by both Classic Bluetooth and BLE stack to heap. * - * This function first releases Controller memory by internally calling `esp_bt_controller_mem_release()`. - * Additionally, if the mode is set to `ESP_BT_MODE_BTDM`, it also releases the BSS and data consumed by the Classic Bluetooth and BLE Host stack to heap. + * If you intend to use BLE only, calling `esp_bt_mem_release(ESP_BT_MODE_CLASSIC_BT)` could release the BSS and data consumed by Classic Bluetooth. You can then continue using BLE. * - * If you never intend to use Bluetooth in a current boot-up cycle, you can call `esp_bt_mem_release(ESP_BT_MODE_BTDM)` - * before `esp_bt_controller_init()` or after `esp_bt_controller_deinit()`. + * If you intend to use Classic Bluetooth only, calling `esp_bt_mem_release(ESP_BT_MODE_BLE)` could release the BSS and data consumed by BLE. You can then continue using Classic Bluetooth. * * For example, if you only use Bluetooth for setting the Wi-Fi configuration, and do not use Bluetooth in the rest of the product operation, * after receiving the Wi-Fi configuration, you can disable/de-init Bluetooth and release its memory. From 4bfdf5ecb3a8b6eedc5dc4c5aa0fa7ff357eb033 Mon Sep 17 00:00:00 2001 From: Wei Yu Han Date: Wed, 10 Jul 2024 17:53:04 +0800 Subject: [PATCH 015/113] docs(ble): Remove one note in esp_bt_controller_mem_release --- components/bt/include/esp32/include/esp_bt.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/components/bt/include/esp32/include/esp_bt.h b/components/bt/include/esp32/include/esp_bt.h index 101a46f64fa..9355772140e 100644 --- a/components/bt/include/esp32/include/esp_bt.h +++ b/components/bt/include/esp32/include/esp_bt.h @@ -521,9 +521,8 @@ esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callba * @note * 1. This function is optional and should be called only if you want to free up memory for other components. * 2. This function should only be called when the controller is in `ESP_BT_CONTROLLER_STATUS_IDLE` status. - * 3. This function should be called only before `esp_bt_controller_init()` or after `esp_bt_controller_deinit()`. - * 4. Once Bluetooth Controller memory is released, the process cannot be reversed. This means you cannot use the Bluetooth Controller mode that you have released using this function. - * 5. If your firmware will upgrade the Bluetooth Controller mode later (such as switching from BLE to Classic Bluetooth or from disabled to enabled), then do not call this function. + * 3. Once Bluetooth Controller memory is released, the process cannot be reversed. This means you cannot use the Bluetooth Controller mode that you have released using this function. + * 4. If your firmware will upgrade the Bluetooth Controller mode later (such as switching from BLE to Classic Bluetooth or from disabled to enabled), then do not call this function. * * If you never intend to use Bluetooth in a current boot-up cycle, calling `esp_bt_controller_mem_release(ESP_BT_MODE_BTDM)` could release the BSS and data consumed by both Classic Bluetooth and BLE Controller to heap. * From 213c05db4b2f4d4ea8b1e413b7922b6b8fa58ea0 Mon Sep 17 00:00:00 2001 From: Wei Yu Han Date: Thu, 11 Jul 2024 10:10:37 +0800 Subject: [PATCH 016/113] docs(ble): Fixed a typo in esp_bt_mem_release comment --- components/bt/include/esp32/include/esp_bt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/bt/include/esp32/include/esp_bt.h b/components/bt/include/esp32/include/esp_bt.h index 9355772140e..ce731e2ca76 100644 --- a/components/bt/include/esp32/include/esp_bt.h +++ b/components/bt/include/esp32/include/esp_bt.h @@ -548,7 +548,7 @@ esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode); * 3. Once Bluetooth Controller memory is released, the process cannot be reversed. This means you cannot use the Bluetooth Controller mode that you have released using this function. * 4. If your firmware will upgrade the Bluetooth Controller mode later (such as switching from BLE to Classic Bluetooth or from disabled to enabled), then do not call this function. * - * This function first releases Controller memory by internally calling `esp_bt_controller_mem_release()`, then release Host memory. + * This function first releases Controller memory by internally calling `esp_bt_controller_mem_release()`, then releases Host memory. * * If you never intend to use Bluetooth in a current boot-up cycle, calling `esp_bt_mem_release(ESP_BT_MODE_BTDM)` could release the BSS and data consumed by both Classic Bluetooth and BLE stack to heap. * From c880f697da14ef0a6927fbf865432cbed823735e Mon Sep 17 00:00:00 2001 From: Armando Date: Thu, 11 Jul 2024 15:23:29 +0800 Subject: [PATCH 017/113] feat(panic): supported more cache error cactch --- components/esp_system/port/arch/riscv/panic_arch.c | 4 +--- components/riscv/include/esp_private/panic_reason.h | 4 +++- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/components/esp_system/port/arch/riscv/panic_arch.c b/components/esp_system/port/arch/riscv/panic_arch.c index 718a01116b8..b2278dacb7d 100644 --- a/components/esp_system/port/arch/riscv/panic_arch.c +++ b/components/esp_system/port/arch/riscv/panic_arch.c @@ -39,7 +39,6 @@ */ static inline void print_cache_err_details(const void *frame) { -#if !CONFIG_IDF_TARGET_ESP32P4 const char* cache_err_msg = esp_cache_err_panic_string(); if (cache_err_msg) { panic_print_str(cache_err_msg); @@ -47,7 +46,6 @@ static inline void print_cache_err_details(const void *frame) panic_print_str("Cache error active, but failed to find a corresponding error message"); } panic_print_str("\r\n"); -#endif } #if CONFIG_ESP_SYSTEM_HW_STACK_GUARD @@ -195,7 +193,7 @@ bool panic_soc_check_pseudo_cause(void *f, panic_info_t *info) /* Cache errors when reading instructions will result in an illegal instructions, before any cache error interrupts trigger. We override the exception cause if any cache errors are active to more accurately report the actual reason */ - if (esp_cache_err_has_active_err() && (frame->mcause == MCAUSE_ILLEGAL_INSTRUCTION)) { + if (esp_cache_err_has_active_err() && ((frame->mcause == MCAUSE_ILLEGAL_INSTRUCTION) || (frame->mcause == MCAUSE_ILLIGAL_INSTRUCTION_ACCESS) || (frame->mcause == MCAUSE_LOAD_ACCESS_FAULT))) { pseudo_cause = true; frame->mcause = ETS_CACHEERR_INUM; } diff --git a/components/riscv/include/esp_private/panic_reason.h b/components/riscv/include/esp_private/panic_reason.h index 252f6de9c0b..fdbee96fa30 100644 --- a/components/riscv/include/esp_private/panic_reason.h +++ b/components/riscv/include/esp_private/panic_reason.h @@ -19,4 +19,6 @@ #define PANIC_RSN_CACHEERR 3 -#define MCAUSE_ILLEGAL_INSTRUCTION 2 +#define MCAUSE_ILLIGAL_INSTRUCTION_ACCESS 1 +#define MCAUSE_ILLEGAL_INSTRUCTION 2 +#define MCAUSE_LOAD_ACCESS_FAULT 5 From 73b647f2928abc2270792078dce9f87fe7e9c1a9 Mon Sep 17 00:00:00 2001 From: Wei Yu Han Date: Thu, 11 Jul 2024 18:35:42 +0800 Subject: [PATCH 018/113] docs(ble): Removed the 'not effective' for CONN_HDL0 - CONN_HDL8 --- components/bt/include/esp32/include/esp_bt.h | 28 +++++++++----------- 1 file changed, 13 insertions(+), 15 deletions(-) diff --git a/components/bt/include/esp32/include/esp_bt.h b/components/bt/include/esp32/include/esp_bt.h index ce731e2ca76..61f65232d4e 100644 --- a/components/bt/include/esp32/include/esp_bt.h +++ b/components/bt/include/esp32/include/esp_bt.h @@ -272,22 +272,22 @@ typedef enum { /** * @brief BLE TX power type * @note - * 1. `ESP_BLE_PWR_CONN_HDL0` - `ESP_BLE_PWR_CONN_HDL8` are not effective currently. Please use `ESP_BLE_PWR_TYPE_DEFAULT` - * to set / get BLE TX power for all connection handles. + * 1. The connection TX power can only be set after the connection is established. + * After disconnecting, the corresponding TX power will not be affected. * 2. `ESP_BLE_PWR_TYPE_DEFAULT` can be used to set the TX power for power types that have not been set before. * It will not affect the TX power values which have been set for the ADV/SCAN power types. * 3. If none of power type is set, the system will use `ESP_PWR_LVL_P3` as default for all power types. */ typedef enum { - ESP_BLE_PWR_TYPE_CONN_HDL0 = 0, /*!< TX power for connection handle 0. Currently not effective */ - ESP_BLE_PWR_TYPE_CONN_HDL1 = 1, /*!< TX power for connection handle 1. Currently not effective */ - ESP_BLE_PWR_TYPE_CONN_HDL2 = 2, /*!< TX power for connection handle 2. Currently not effective */ - ESP_BLE_PWR_TYPE_CONN_HDL3 = 3, /*!< TX power for connection handle 3. Currently not effective */ - ESP_BLE_PWR_TYPE_CONN_HDL4 = 4, /*!< TX power for connection handle 4. Currently not effective */ - ESP_BLE_PWR_TYPE_CONN_HDL5 = 5, /*!< TX power for connection handle 5. Currently not effective */ - ESP_BLE_PWR_TYPE_CONN_HDL6 = 6, /*!< TX power for connection handle 6. Currently not effective */ - ESP_BLE_PWR_TYPE_CONN_HDL7 = 7, /*!< TX power for connection handle 7. Currently not effective */ - ESP_BLE_PWR_TYPE_CONN_HDL8 = 8, /*!< TX power for connection handle 8. Currently not effective */ + ESP_BLE_PWR_TYPE_CONN_HDL0 = 0, /*!< TX power for connection handle 0 */ + ESP_BLE_PWR_TYPE_CONN_HDL1 = 1, /*!< TX power for connection handle 1 */ + ESP_BLE_PWR_TYPE_CONN_HDL2 = 2, /*!< TX power for connection handle 2 */ + ESP_BLE_PWR_TYPE_CONN_HDL3 = 3, /*!< TX power for connection handle 3 */ + ESP_BLE_PWR_TYPE_CONN_HDL4 = 4, /*!< TX power for connection handle 4 */ + ESP_BLE_PWR_TYPE_CONN_HDL5 = 5, /*!< TX power for connection handle 5 */ + ESP_BLE_PWR_TYPE_CONN_HDL6 = 6, /*!< TX power for connection handle 6 */ + ESP_BLE_PWR_TYPE_CONN_HDL7 = 7, /*!< TX power for connection handle 7 */ + ESP_BLE_PWR_TYPE_CONN_HDL8 = 8, /*!< TX power for connection handle 8 */ ESP_BLE_PWR_TYPE_ADV = 9, /*!< TX power for advertising */ ESP_BLE_PWR_TYPE_SCAN = 10, /*!< TX power for scan */ ESP_BLE_PWR_TYPE_DEFAULT = 11, /*!< Default TX power type, which can be used to set the TX power for power types that have not been set before.*/ @@ -328,8 +328,7 @@ typedef enum { * @brief Set BLE TX power * * @note - * 1. Please use `ESP_BLE_PWR_TYPE_DEFAULT` to set BLE TX power for all connection handles. - * 2. Connection TX power should only be set after the connection is established. + * 1. Connection TX power should only be set after the connection is established. * * @param[in] power_type The type of TX power. It could be Advertising, Connection, Default, etc. * @param[in] power_level Power level (index) corresponding to the absolute value (dBm) @@ -344,8 +343,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_ * @brief Get BLE TX power * * @note - * 1. Please use `ESP_BLE_PWR_TYPE_DEFAULT` to get BLE TX power for all connection handles. - * 2. Connection TX power should only be retrieved after the connection is established. + * 1. Connection TX power should only be retrieved after the connection is established. * * @param[in] power_type The type of TX power. It could be Advertising/Connection/Default and etc. * From 945a593de28275f8ab92a6ace690a379c744f8c8 Mon Sep 17 00:00:00 2001 From: Sudeep Mohanty Date: Thu, 11 Jul 2024 11:18:28 +0200 Subject: [PATCH 019/113] fix(lp-i2c): Fixed the generation of spurious I2C start with lp-i2c This commit fixes an issue with LP I2C and RTC I2C where in the peripherals generated a spurious I2C start condition when initialized. This caused some sensors to not respond properly to the following read or write request. Closes https://github.com/espressif/esp-idf/issues/14043 Closes https://github.com/espressif/esp-idf/issues/11608 --- components/ulp/lp_core/lp_core_i2c.c | 16 +++++++++++---- components/ulp/ulp_riscv/ulp_riscv_i2c.c | 25 ++++++++++++++++-------- 2 files changed, 29 insertions(+), 12 deletions(-) diff --git a/components/ulp/lp_core/lp_core_i2c.c b/components/ulp/lp_core/lp_core_i2c.c index 0d41f7fba1d..0b5db5add8b 100644 --- a/components/ulp/lp_core/lp_core_i2c.c +++ b/components/ulp/lp_core/lp_core_i2c.c @@ -53,9 +53,10 @@ static esp_err_t lp_i2c_gpio_is_cfg_valid(gpio_num_t sda_io_num, gpio_num_t scl_ static esp_err_t lp_i2c_configure_io(gpio_num_t io_num, bool pullup_en) { + /* Set the IO pin to high to avoid them from toggling from Low to High state during initialization. This can register a spurious I2C start condition. */ + ESP_RETURN_ON_ERROR(rtc_gpio_set_level(io_num, 1), LPI2C_TAG, "LP GPIO failed to set level to high for %d", io_num); /* Initialize IO Pin */ ESP_RETURN_ON_ERROR(rtc_gpio_init(io_num), LPI2C_TAG, "LP GPIO Init failed for GPIO %d", io_num); - /* Set direction to input+output open-drain mode */ ESP_RETURN_ON_ERROR(rtc_gpio_set_direction(io_num, RTC_GPIO_MODE_INPUT_OUTPUT_OD), LPI2C_TAG, "LP GPIO Set direction failed for %d", io_num); /* Disable pulldown on the io pin */ @@ -82,12 +83,16 @@ static esp_err_t lp_i2c_set_pin(const lp_core_i2c_cfg_t *cfg) /* Verify that the LP I2C GPIOs are valid */ ESP_RETURN_ON_ERROR(lp_i2c_gpio_is_cfg_valid(sda_io_num, scl_io_num), LPI2C_TAG, "LP I2C GPIO config invalid"); - /* Initialize SDA Pin */ - ESP_RETURN_ON_ERROR(lp_i2c_configure_io(sda_io_num, sda_pullup_en), LPI2C_TAG, "LP I2C SDA pin config failed"); + // NOTE: We always initialize the SCL pin first, then the SDA pin. + // This order of initialization is important to avoid any spurious + // I2C start conditions on the bus. /* Initialize SCL Pin */ ESP_RETURN_ON_ERROR(lp_i2c_configure_io(scl_io_num, scl_pullup_en), LPI2C_TAG, "LP I2C SCL pin config failed"); + /* Initialize SDA Pin */ + ESP_RETURN_ON_ERROR(lp_i2c_configure_io(sda_io_num, sda_pullup_en), LPI2C_TAG, "LP I2C SDA pin config failed"); + #if !SOC_LP_GPIO_MATRIX_SUPPORTED /* Select LP I2C function for the SDA Pin */ lp_io_dev->gpio[sda_io_num].mcu_sel = 1; @@ -123,7 +128,7 @@ static esp_err_t lp_i2c_config_clk(const lp_core_i2c_cfg_t *cfg) } } - /* Fetch the clock source fequency */ + /* Fetch the clock source frequency */ ESP_RETURN_ON_ERROR(esp_clk_tree_src_get_freq_hz(source_clk, ESP_CLK_TREE_SRC_FREQ_PRECISION_APPROX, &source_freq), LPI2C_TAG, "Invalid LP I2C source clock selected"); /* Verify that the I2C_SCLK operates at a frequency 20 times larger than the requested SCL bus frequency */ @@ -162,6 +167,9 @@ esp_err_t lp_core_i2c_master_init(i2c_port_t lp_i2c_num, const lp_core_i2c_cfg_t i2c_hal_init(&i2c_hal, lp_i2c_num); } + /* Clear any pending interrupts */ + i2c_ll_clear_intr_mask(i2c_hal.dev, UINT32_MAX); + /* Initialize LP I2C Master mode */ i2c_hal_master_init(&i2c_hal); diff --git a/components/ulp/ulp_riscv/ulp_riscv_i2c.c b/components/ulp/ulp_riscv/ulp_riscv_i2c.c index 3d73b22e376..138d479642a 100644 --- a/components/ulp/ulp_riscv/ulp_riscv_i2c.c +++ b/components/ulp/ulp_riscv/ulp_riscv_i2c.c @@ -72,6 +72,8 @@ static esp_err_t i2c_gpio_is_cfg_valid(gpio_num_t sda_io_num, gpio_num_t scl_io_ static esp_err_t i2c_configure_io(gpio_num_t io_num, bool pullup_en) { + /* Set the IO pin to high to avoid them from toggling from Low to High state during initialization. This can register a spurious I2C start condition. */ + ESP_RETURN_ON_ERROR(rtc_gpio_set_level(io_num, 1), RTCI2C_TAG, "RTC GPIO failed to set level to high for %d", io_num); /* Initialize IO Pin */ ESP_RETURN_ON_ERROR(rtc_gpio_init(io_num), RTCI2C_TAG, "RTC GPIO Init failed for GPIO %d", io_num); /* Set direction to input+output */ @@ -98,12 +100,16 @@ static esp_err_t i2c_set_pin(const ulp_riscv_i2c_cfg_t *cfg) /* Verify that the I2C GPIOs are valid */ ESP_RETURN_ON_ERROR(i2c_gpio_is_cfg_valid(sda_io_num, scl_io_num), RTCI2C_TAG, "RTC I2C GPIO config invalid"); - /* Initialize SDA Pin */ - ESP_RETURN_ON_ERROR(i2c_configure_io(sda_io_num, sda_pullup_en), RTCI2C_TAG, "RTC I2C SDA pin config failed"); + // NOTE: We always initialize the SCL pin first, then the SDA pin. + // This order of initialization is important to avoid any spurious + // I2C start conditions on the bus. /* Initialize SCL Pin */ ESP_RETURN_ON_ERROR(i2c_configure_io(scl_io_num, scl_pullup_en), RTCI2C_TAG, "RTC I2C SCL pin config failed"); + /* Initialize SDA Pin */ + ESP_RETURN_ON_ERROR(i2c_configure_io(sda_io_num, sda_pullup_en), RTCI2C_TAG, "RTC I2C SDA pin config failed"); + /* Route SDA IO signal to the RTC subsystem */ rtc_io_dev->touch_pad[sda_io_num].mux_sel = 1; @@ -471,6 +477,12 @@ esp_err_t ulp_riscv_i2c_master_init(const ulp_riscv_i2c_cfg_t *cfg) WRITE_PERI_REG(RTC_I2C_CTRL_REG, 0); WRITE_PERI_REG(SENS_SAR_I2C_CTRL_REG, 0); + /* Verify that the input cfg param is valid */ + ESP_RETURN_ON_FALSE(cfg, ESP_ERR_INVALID_ARG, RTCI2C_TAG, "RTC I2C configuration is NULL"); + + /* Configure RTC I2C GPIOs */ + ESP_RETURN_ON_ERROR(i2c_set_pin(cfg), RTCI2C_TAG, "Failed to configure RTC I2C GPIOs"); + /* Reset RTC I2C */ #if CONFIG_IDF_TARGET_ESP32S2 i2c_dev->ctrl.i2c_reset = 1; @@ -484,12 +496,6 @@ esp_err_t ulp_riscv_i2c_master_init(const ulp_riscv_i2c_cfg_t *cfg) CLEAR_PERI_REG_MASK(SENS_SAR_PERI_RESET_CONF_REG, SENS_RTC_I2C_RESET); #endif // CONFIG_IDF_TARGET_ESP32S2 - /* Verify that the input cfg param is valid */ - ESP_RETURN_ON_FALSE(cfg, ESP_ERR_INVALID_ARG, RTCI2C_TAG, "RTC I2C configuration is NULL"); - - /* Configure RTC I2C GPIOs */ - ESP_RETURN_ON_ERROR(i2c_set_pin(cfg), RTCI2C_TAG, "Failed to configure RTC I2C GPIOs"); - /* Enable internal open-drain mode for SDA and SCL lines */ #if CONFIG_IDF_TARGET_ESP32S2 i2c_dev->ctrl.sda_force_out = 0; @@ -519,6 +525,9 @@ esp_err_t ulp_riscv_i2c_master_init(const ulp_riscv_i2c_cfg_t *cfg) /* Configure RTC I2C timing parameters */ ESP_RETURN_ON_ERROR(i2c_set_timing(cfg), RTCI2C_TAG, "Failed to configure RTC I2C timing"); + /* Clear any pending interrupts */ + WRITE_PERI_REG(RTC_I2C_INT_CLR_REG, UINT32_MAX); + /* Enable RTC I2C interrupts */ SET_PERI_REG_MASK(RTC_I2C_INT_ENA_REG, RTC_I2C_RX_DATA_INT_ENA | RTC_I2C_TX_DATA_INT_ENA | From e8e66a84ededc60178260e799ec656ef99103441 Mon Sep 17 00:00:00 2001 From: Wei Yu Han Date: Thu, 11 Jul 2024 18:38:15 +0800 Subject: [PATCH 020/113] docs(ble): added CONN0-8 back to the second note of esp_power_level_t --- components/bt/include/esp32/include/esp_bt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/bt/include/esp32/include/esp_bt.h b/components/bt/include/esp32/include/esp_bt.h index 61f65232d4e..b0779ce8838 100644 --- a/components/bt/include/esp32/include/esp_bt.h +++ b/components/bt/include/esp32/include/esp_bt.h @@ -275,7 +275,7 @@ typedef enum { * 1. The connection TX power can only be set after the connection is established. * After disconnecting, the corresponding TX power will not be affected. * 2. `ESP_BLE_PWR_TYPE_DEFAULT` can be used to set the TX power for power types that have not been set before. - * It will not affect the TX power values which have been set for the ADV/SCAN power types. + * It will not affect the TX power values which have been set for the ADV/SCAN/CONN0-8 power types. * 3. If none of power type is set, the system will use `ESP_PWR_LVL_P3` as default for all power types. */ typedef enum { From bddc1e95ef42fa735e3584d3820f8013601e7d6a Mon Sep 17 00:00:00 2001 From: Jakob Hasse Date: Thu, 1 Feb 2024 09:19:46 +0800 Subject: [PATCH 021/113] feat(rt/posix): Added FreeRTOS-Plus-POSIX message queues implementation Note: The current mq_open() implementation is changed to match the POSIX standard. --- .gitlab/CODEOWNERS | 1 + components/rt/CMakeLists.txt | 13 + components/rt/FreeRTOS_POSIX_mqueue.c | 924 ++++++++++++++++++ components/rt/FreeRTOS_POSIX_utils.c | 249 +++++ components/rt/idf_changes.md | 46 + components/rt/include/mqueue.h | 155 +++ .../rt/private_include/FreeRTOS_POSIX.h | 56 ++ .../rt/private_include/FreeRTOS_POSIX/utils.h | 149 +++ .../private_include/FreeRTOS_POSIX_internal.h | 101 ++ .../private_include/FreeRTOS_POSIX_portable.h | 59 ++ .../private_include/aws_doubly_linked_list.h | 249 +++++ .../FreeRTOS_POSIX_portable_default.h | 144 +++ components/rt/sbom.yml | 5 + .../posix_rt_test/.build-test-rules.yml | 9 + .../rt/test_apps/posix_rt_test/CMakeLists.txt | 7 + .../rt/test_apps/posix_rt_test/README.md | 2 + .../posix_rt_test/main/CMakeLists.txt | 4 + .../rt/test_apps/posix_rt_test/main/main.c | 36 + .../posix_rt_test/main/mqueue_test.cpp | 288 ++++++ .../posix_rt_test/pytest_rt_mqueue_tests.py | 13 + .../posix_rt_test/sdkconfig.defaults | 2 + docs/en/api-reference/system/pthread.rst | 65 +- examples/system/.build-test-rules.yml | 7 + examples/system/rt_mqueue/CMakeLists.txt | 8 + examples/system/rt_mqueue/README.md | 37 + examples/system/rt_mqueue/main/CMakeLists.txt | 3 + .../main/posix_mqueue_example_main.c | 101 ++ examples/system/rt_mqueue/pytest_rt_mqueue.py | 13 + tools/ci/astyle-rules.yml | 2 + tools/ci/check_copyright_config.yaml | 16 + 30 files changed, 2760 insertions(+), 4 deletions(-) create mode 100644 components/rt/CMakeLists.txt create mode 100644 components/rt/FreeRTOS_POSIX_mqueue.c create mode 100644 components/rt/FreeRTOS_POSIX_utils.c create mode 100644 components/rt/idf_changes.md create mode 100644 components/rt/include/mqueue.h create mode 100644 components/rt/private_include/FreeRTOS_POSIX.h create mode 100644 components/rt/private_include/FreeRTOS_POSIX/utils.h create mode 100644 components/rt/private_include/FreeRTOS_POSIX_internal.h create mode 100644 components/rt/private_include/FreeRTOS_POSIX_portable.h create mode 100644 components/rt/private_include/aws_doubly_linked_list.h create mode 100644 components/rt/private_include/portable/FreeRTOS_POSIX_portable_default.h create mode 100644 components/rt/sbom.yml create mode 100644 components/rt/test_apps/posix_rt_test/.build-test-rules.yml create mode 100644 components/rt/test_apps/posix_rt_test/CMakeLists.txt create mode 100644 components/rt/test_apps/posix_rt_test/README.md create mode 100644 components/rt/test_apps/posix_rt_test/main/CMakeLists.txt create mode 100644 components/rt/test_apps/posix_rt_test/main/main.c create mode 100644 components/rt/test_apps/posix_rt_test/main/mqueue_test.cpp create mode 100644 components/rt/test_apps/posix_rt_test/pytest_rt_mqueue_tests.py create mode 100644 components/rt/test_apps/posix_rt_test/sdkconfig.defaults create mode 100644 examples/system/rt_mqueue/CMakeLists.txt create mode 100644 examples/system/rt_mqueue/README.md create mode 100644 examples/system/rt_mqueue/main/CMakeLists.txt create mode 100644 examples/system/rt_mqueue/main/posix_mqueue_example_main.c create mode 100644 examples/system/rt_mqueue/pytest_rt_mqueue.py diff --git a/.gitlab/CODEOWNERS b/.gitlab/CODEOWNERS index 0d61759339c..fb20a1a36b9 100644 --- a/.gitlab/CODEOWNERS +++ b/.gitlab/CODEOWNERS @@ -140,6 +140,7 @@ /components/protocomm/ @esp-idf-codeowners/app-utilities/provisioning /components/pthread/ @esp-idf-codeowners/system /components/riscv/ @esp-idf-codeowners/system +/components/rt/ @esp-idf-codeowners/system /components/sdmmc/ @esp-idf-codeowners/storage /components/soc/ @esp-idf-codeowners/peripherals @esp-idf-codeowners/system /components/spi_flash/ @esp-idf-codeowners/peripherals diff --git a/components/rt/CMakeLists.txt b/components/rt/CMakeLists.txt new file mode 100644 index 00000000000..87fc2e90ed7 --- /dev/null +++ b/components/rt/CMakeLists.txt @@ -0,0 +1,13 @@ +idf_build_get_property(target IDF_TARGET) +if(${target} STREQUAL "linux") + idf_component_register() + if(NOT CMAKE_HOST_SYSTEM_NAME STREQUAL "Darwin") + find_library(LIBRT rt) + target_link_libraries(${COMPONENT_LIB} INTERFACE ${LIBRT}) + endif() + return() +endif() + +idf_component_register(SRCS "FreeRTOS_POSIX_mqueue.c" "FreeRTOS_POSIX_utils.c" + PRIV_INCLUDE_DIRS "private_include" + INCLUDE_DIRS "include") diff --git a/components/rt/FreeRTOS_POSIX_mqueue.c b/components/rt/FreeRTOS_POSIX_mqueue.c new file mode 100644 index 00000000000..22ebf4e0add --- /dev/null +++ b/components/rt/FreeRTOS_POSIX_mqueue.c @@ -0,0 +1,924 @@ +/* + * Amazon FreeRTOS+POSIX V1.0.0 + * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-FileCopyrightText: 2018 Amazon.com, Inc. or its affiliates + * + * SPDX-License-Identifier: MIT + * + * SPDX-FileContributor: 2024 Espressif Systems (Shanghai) CO LTD + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://aws.amazon.com/freertos + * http://www.FreeRTOS.org + */ + +/** + * @file FreeRTOS_POSIX_mqueue.c + * @brief Implementation of message queue functions in mqueue.h + */ + +/* C standard library includes. */ +#include + +#include +#include +#include +#include + +/* FreeRTOS+POSIX includes. */ +#include "FreeRTOS_POSIX.h" +#include "FreeRTOS_POSIX/utils.h" + +#include "aws_doubly_linked_list.h" +#include "esp_private/critical_section.h" + +/** + * @brief Element of the FreeRTOS queues that store mq data. + */ +typedef struct QueueElement +{ + char * pcData; /**< Data in queue. Type char* to match msg_ptr. */ + size_t xDataSize; /**< Size of data pointed by pcData. */ +} QueueElement_t; + +/** + * @brief Data structure of an mq. + * + * FreeRTOS isn't guaranteed to have a file-like abstraction, so message + * queues in this implementation are stored as a linked list (in RAM). + */ +typedef struct QueueListElement +{ + Link_t xLink; /**< Pointer to the next element in the list. */ + QueueHandle_t xQueue; /**< FreeRTOS queue handle. */ + size_t xOpenDescriptors; /**< Number of threads that have opened this queue. */ + char * pcName; /**< Null-terminated queue name. */ + struct mq_attr xAttr; /**< Queue attributes. */ + BaseType_t xPendingUnlink; /**< If pdTRUE, this queue will be unlinked once all descriptors close. */ +} QueueListElement_t; + +/*-----------------------------------------------------------*/ + +/** + * @brief Convert an absolute timespec into a tick timeout, taking into account + * queue flags. + * + * @param[in] lMessageQueueFlags Message queue flags to consider. + * @param[in] pxAbsoluteTimeout The absolute timespec to convert. + * @param[out] pxTimeoutTicks Output parameter of the timeout in ticks. + * + * @return 0 if successful; EINVAL if pxAbsoluteTimeout is invalid, or ETIMEDOUT + * if pxAbsoluteTimeout is in the past. + */ +static int prvCalculateTickTimeout( long lMessageQueueFlags, + const struct timespec * const pxAbsoluteTimeout, + TickType_t * pxTimeoutTicks ); + +/** + * @brief Add a new queue to the queue list. + * + * @param[out] ppxMessageQueue Pointer to new queue. + * @param[in] pxAttr mq_attr of the new queue. + * @param[in] pcName Name of new queue. + * @param[in] xNameLength Length of pcName. + * + * @return pdTRUE if the queue is found; pdFALSE otherwise. + */ +static BaseType_t prvCreateNewMessageQueue( QueueListElement_t ** ppxMessageQueue, + const struct mq_attr * const pxAttr, + const char * const pcName, + size_t xNameLength ); + +/** + * @brief Free all the resources used by a message queue. + * + * @param[out] pxMessageQueue Pointer to queue to free. + * + * @return nothing + */ +static void prvDeleteMessageQueue( const QueueListElement_t * const pxMessageQueue ); + +/** + * @brief Attempt to find the queue identified by pcName or xMqId in the queue list. + * + * Matches queues by pcName first; if pcName is NULL, matches by xMqId. + * @param[out] ppxQueueListElement Output parameter set when queue is found. + * @param[in] pcName A queue name to match. + * @param[in] xMessageQueueDescriptor A queue descriptor to match. + * + * @return pdTRUE if the queue is found; pdFALSE otherwise. + */ +static BaseType_t prvFindQueueInList( QueueListElement_t ** const ppxQueueListElement, + const char * const pcName, + mqd_t xMessageQueueDescriptor ); + +/** + * @brief Initialize the queue list. + * + * Performs initialization of the queue list mutex and queue list head. + * + * @return nothing + */ +static void prvInitializeQueueList( void ); + +/** + * @brief Checks that pcName is a valid name for a message queue. + * + * Also outputs the length of pcName. + * @param[in] pcName The name to check. + * @param[out] pxNameLength Output parameter for name length. + * + * @return pdTRUE if the name is valid; pdFALSE otherwise. + */ +static BaseType_t prvValidateQueueName( const char * const pcName, + size_t * pxNameLength ); + +/** + * @brief Guards access to the list of message queues. + */ +static StaticSemaphore_t xQueueListMutex = { { 0 }, .u = { 0 } }; + +/** + * @brief Head of the linked list of queues. + */ +static Link_t xQueueListHead = { 0 }; + +DEFINE_CRIT_SECTION_LOCK_STATIC( critical_section_lock ); + +/*-----------------------------------------------------------*/ + +static int prvCalculateTickTimeout( long lMessageQueueFlags, + const struct timespec * const pxAbsoluteTimeout, + TickType_t * pxTimeoutTicks ) +{ + int iStatus = 0; + + /* Check for nonblocking queue. */ + if( lMessageQueueFlags & O_NONBLOCK ) + { + /* No additional checks are done for nonblocking queues. Timeout is 0. */ + *pxTimeoutTicks = 0; + } + else + { + /* No absolute timeout given. Block forever. */ + if( pxAbsoluteTimeout == NULL ) + { + *pxTimeoutTicks = portMAX_DELAY; + } + else + { + /* Check that the given timespec is valid. */ + if( UTILS_ValidateTimespec( pxAbsoluteTimeout ) == false ) + { + iStatus = EINVAL; + } + + /* Convert absolute timespec to ticks. */ + if( ( iStatus == 0 ) && + ( UTILS_AbsoluteTimespecToTicks( pxAbsoluteTimeout, pxTimeoutTicks ) != 0 ) ) + { + iStatus = ETIMEDOUT; + } + } + } + + return iStatus; +} + +/*-----------------------------------------------------------*/ + +static BaseType_t prvCreateNewMessageQueue( QueueListElement_t ** ppxMessageQueue, + const struct mq_attr * const pxAttr, + const char * const pcName, + size_t xNameLength ) +{ + BaseType_t xStatus = pdTRUE; + + /* Allocate space for a new queue element. */ + *ppxMessageQueue = pvPortMalloc( sizeof( QueueListElement_t ) ); + + /* Check that memory allocation succeeded. */ + if( *ppxMessageQueue == NULL ) + { + xStatus = pdFALSE; + } + + /* Create the FreeRTOS queue. */ + if( xStatus == pdTRUE ) + { + ( *ppxMessageQueue )->xQueue = + xQueueCreate( pxAttr->mq_maxmsg, sizeof( QueueElement_t ) ); + + /* Check that queue creation succeeded. */ + if( ( *ppxMessageQueue )->xQueue == NULL ) + { + vPortFree( *ppxMessageQueue ); + xStatus = pdFALSE; + } + } + + if( xStatus == pdTRUE ) + { + /* Allocate space for the queue name plus null-terminator. */ + ( *ppxMessageQueue )->pcName = pvPortMalloc( xNameLength + 1 ); + + /* Check that memory was successfully allocated for queue name. */ + if( ( *ppxMessageQueue )->pcName == NULL ) + { + vQueueDelete( ( *ppxMessageQueue )->xQueue ); + vPortFree( *ppxMessageQueue ); + xStatus = pdFALSE; + } + else + { + /* Copy queue name. Copying xNameLength+1 will cause strncpy to add + * the null-terminator. */ + ( void ) strncpy( ( *ppxMessageQueue )->pcName, pcName, xNameLength + 1 ); + } + } + + if( xStatus == pdTRUE ) + { + /* Copy attributes. */ + ( *ppxMessageQueue )->xAttr = *pxAttr; + + /* A newly-created queue will have 1 open descriptor for it. */ + ( *ppxMessageQueue )->xOpenDescriptors = 1; + + /* A newly-created queue will not be pending unlink. */ + ( *ppxMessageQueue )->xPendingUnlink = pdFALSE; + + /* Add the new queue to the list. */ + listADD( &xQueueListHead, &( *ppxMessageQueue )->xLink ); + } + + return xStatus; +} + +/*-----------------------------------------------------------*/ + +static void prvDeleteMessageQueue( const QueueListElement_t * const pxMessageQueue ) +{ + QueueElement_t xQueueElement = { 0 }; + + /* Free all data in the queue. It's assumed that no more data will be added + * to the queue, so xQueueReceive does not block. */ + while( xQueueReceive( pxMessageQueue->xQueue, + ( void * ) &xQueueElement, + 0 ) == pdTRUE ) + { + vPortFree( xQueueElement.pcData ); + } + + /* Free memory used by this message queue. */ + vQueueDelete( pxMessageQueue->xQueue ); + vPortFree( ( void * ) pxMessageQueue->pcName ); + vPortFree( ( void * ) pxMessageQueue ); +} + +/*-----------------------------------------------------------*/ + +static BaseType_t prvFindQueueInList( QueueListElement_t ** const ppxQueueListElement, + const char * const pcName, + mqd_t xMessageQueueDescriptor ) +{ + Link_t * pxQueueListLink = NULL; + QueueListElement_t * pxMessageQueue = NULL; + BaseType_t xQueueFound = pdFALSE; + + /* Iterate through the list of queues. */ + listFOR_EACH( pxQueueListLink, &xQueueListHead ) + { + pxMessageQueue = listCONTAINER( pxQueueListLink, QueueListElement_t, xLink ); + + /* Match by name first if provided. */ + if( ( pcName != NULL ) && ( strcmp( pxMessageQueue->pcName, pcName ) == 0 ) ) + { + xQueueFound = pdTRUE; + break; + } + /* If name doesn't match, match by descriptor. */ + else + { + if( ( mqd_t ) pxMessageQueue == xMessageQueueDescriptor ) + { + xQueueFound = pdTRUE; + break; + } + } + } + + /* If the queue was found, set the output parameter. */ + if( ( xQueueFound == pdTRUE ) && ( ppxQueueListElement != NULL ) ) + { + *ppxQueueListElement = pxMessageQueue; + } + + return xQueueFound; +} + +/*-----------------------------------------------------------*/ + +static void prvInitializeQueueList( void ) +{ + /* Keep track of whether the queue list has been initialized. */ + static BaseType_t xQueueListInitialized = pdFALSE; + + /* Check if queue list needs to be initialized. */ + if( xQueueListInitialized == pdFALSE ) + { + /* Initialization must be in a critical section to prevent two threads + * from initializing at the same time. */ + esp_os_enter_critical( &critical_section_lock ); + + /* Check again that queue list is still uninitialized, i.e. it wasn't + * initialized while this function was waiting to enter the critical + * section. */ + if( xQueueListInitialized == pdFALSE ) + { + /* Initialize the queue list mutex and list head. */ + ( void ) xSemaphoreCreateMutexStatic( &xQueueListMutex ); + listINIT_HEAD( &xQueueListHead ); + xQueueListInitialized = pdTRUE; + } + + /* Exit the critical section. */ + esp_os_exit_critical( &critical_section_lock ); + } +} + +/*-----------------------------------------------------------*/ + +static BaseType_t prvValidateQueueName( const char * const pcName, + size_t * pxNameLength ) +{ + BaseType_t xStatus = pdTRUE; + size_t xNameLength = 0; + + /* All message queue names must start with '/'. */ + if( pcName[ 0 ] != '/' ) + { + xStatus = pdFALSE; + } + else + { + /* Get the length of pcName, excluding the first '/' and null-terminator. */ + xNameLength = UTILS_strnlen( pcName, NAME_MAX + 2 ); + + if( xNameLength == NAME_MAX + 2 ) + { + /* Name too long. */ + xStatus = pdFALSE; + } + else + { + /* Name length passes, set output parameter. */ + *pxNameLength = xNameLength; + } + } + + return xStatus; +} + +/*-----------------------------------------------------------*/ + +int mq_close( mqd_t mqdes ) +{ + int iStatus = 0; + QueueListElement_t * pxMessageQueue = ( QueueListElement_t * ) mqdes; + BaseType_t xQueueRemoved = pdFALSE; + + /* Initialize the queue list, if needed. */ + prvInitializeQueueList(); + + /* Lock the mutex that guards access to the queue list. This call will + * never fail because it blocks forever. */ + ( void ) xSemaphoreTake( ( SemaphoreHandle_t ) &xQueueListMutex, portMAX_DELAY ); + + /* Attempt to find the message queue based on the given descriptor. */ + if( prvFindQueueInList( NULL, NULL, mqdes ) == pdTRUE ) + { + /* Decrement the number of open descriptors. */ + if( pxMessageQueue->xOpenDescriptors > 0 ) + { + pxMessageQueue->xOpenDescriptors--; + } + + /* Check if the queue has any more open descriptors. */ + if( pxMessageQueue->xOpenDescriptors == 0 ) + { + /* If no open descriptors remain and mq_unlink has already been called, + * remove the queue. */ + if( pxMessageQueue->xPendingUnlink == pdTRUE ) + { + listREMOVE( &pxMessageQueue->xLink ); + + /* Set the flag to delete the queue. Deleting the queue is deferred + * until xQueueListMutex is released. */ + xQueueRemoved = pdTRUE; + } + /* Otherwise, wait for the call to mq_unlink. */ + else + { + pxMessageQueue->xPendingUnlink = pdTRUE; + } + } + } + else + { + /* Queue not found; bad descriptor. */ + errno = EBADF; + iStatus = -1; + } + + /* Release the mutex protecting the queue list. */ + ( void ) xSemaphoreGive( ( SemaphoreHandle_t ) &xQueueListMutex ); + + /* Delete all resources used by the queue if needed. */ + if( xQueueRemoved == pdTRUE ) + { + prvDeleteMessageQueue( pxMessageQueue ); + } + + return iStatus; +} + +/*-----------------------------------------------------------*/ + +int mq_getattr( mqd_t mqdes, + struct mq_attr * mqstat ) +{ + int iStatus = 0; + QueueListElement_t * pxMessageQueue = ( QueueListElement_t * ) mqdes; + + /* Lock the mutex that guards access to the queue list. This call will + * never fail because it blocks forever. */ + ( void ) xSemaphoreTake( ( SemaphoreHandle_t ) &xQueueListMutex, portMAX_DELAY ); + + /* Find the mq referenced by mqdes. */ + if( prvFindQueueInList( NULL, NULL, mqdes ) == pdTRUE ) + { + /* Update the number of messages in the queue and copy the attributes + * into mqstat. */ + pxMessageQueue->xAttr.mq_curmsgs = ( long ) uxQueueMessagesWaiting( pxMessageQueue->xQueue ); + *mqstat = pxMessageQueue->xAttr; + } + else + { + /* Queue not found; bad descriptor. */ + errno = EBADF; + iStatus = -1; + } + + /* Release the mutex protecting the queue list. */ + ( void ) xSemaphoreGive( ( SemaphoreHandle_t ) &xQueueListMutex ); + + return iStatus; +} + +/*-----------------------------------------------------------*/ + +/* Changed function signature and argument processing to match the POSIX standard */ +mqd_t mq_open( const char * name, + int oflag, + ... ) +{ + mode_t mode = 0; + struct mq_attr * attr = NULL; + + if( oflag & O_CREAT ) + { + va_list args; + va_start( args, oflag ); + mode = va_arg( args, mode_t ); + attr = va_arg( args, struct mq_attr * ); + va_end( args ); + } + + mqd_t xMessageQueue = NULL; + size_t xNameLength = 0; + + /* Default mq_attr. */ + struct mq_attr xQueueCreationAttr = + { + .mq_flags = 0, + .mq_maxmsg = posixconfigMQ_MAX_MESSAGES, + .mq_msgsize = posixconfigMQ_MAX_SIZE, + .mq_curmsgs = 0 + }; + + /* Silence warnings about unused parameters. */ + ( void ) mode; + + /* Initialize the queue list, if needed. */ + prvInitializeQueueList(); + + /* Check queue name. */ + if( prvValidateQueueName( name, &xNameLength ) == pdFALSE ) + { + /* Invalid name. */ + errno = EINVAL; + xMessageQueue = ( mqd_t ) -1; + } + + /* Check attributes, if O_CREATE is specified and attr is given. */ + if( xMessageQueue == NULL ) + { + if( ( oflag & O_CREAT ) && ( attr != NULL ) && ( ( attr->mq_maxmsg <= 0 ) || ( attr->mq_msgsize <= 0 ) ) ) + { + /* Invalid mq_attr.mq_maxmsg or mq_attr.mq_msgsize. */ + errno = EINVAL; + xMessageQueue = ( mqd_t ) -1; + } + } + + if( xMessageQueue == NULL ) + { + /* Lock the mutex that guards access to the queue list. This call will + * never fail because it blocks forever. */ + ( void ) xSemaphoreTake( ( SemaphoreHandle_t ) &xQueueListMutex, portMAX_DELAY ); + + /* Search the queue list to check if the queue exists. */ + if( prvFindQueueInList( ( QueueListElement_t ** ) &xMessageQueue, + name, + ( mqd_t ) NULL ) == pdTRUE ) + { + /* If the mq exists, check that this function wasn't called with + * O_CREAT and O_EXCL. */ + if( ( oflag & O_EXCL ) && ( oflag & O_CREAT ) ) + { + errno = EEXIST; + xMessageQueue = ( mqd_t ) -1; + } + else + { + /* Check if the mq has been unlinked and is pending removal. */ + if( ( ( QueueListElement_t * ) xMessageQueue )->xPendingUnlink == pdTRUE ) + { + /* Queue pending deletion. Don't allow it to be re-opened. */ + errno = EINVAL; + xMessageQueue = ( mqd_t ) -1; + } + else + { + /* Increase count of open file descriptors for queue. */ + ( ( QueueListElement_t * ) xMessageQueue )->xOpenDescriptors++; + } + } + } + /* Queue does not exist. */ + else + { + /* Only create the new queue if O_CREAT was specified. */ + if( oflag & O_CREAT ) + { + /* Copy attributes if provided. */ + if( attr != NULL ) + { + xQueueCreationAttr = *attr; + } + + /* Copy oflags. */ + xQueueCreationAttr.mq_flags = ( long ) oflag; + + /* Create the new message queue. */ + if( prvCreateNewMessageQueue( ( QueueListElement_t ** ) &xMessageQueue, + &xQueueCreationAttr, + name, + xNameLength ) == pdFALSE ) + { + errno = ENOSPC; + xMessageQueue = ( mqd_t ) -1; + } + } + else + { + errno = ENOENT; + xMessageQueue = ( mqd_t ) -1; + } + } + + /* Release the mutex protecting the queue list. */ + ( void ) xSemaphoreGive( ( SemaphoreHandle_t ) &xQueueListMutex ); + } + + return xMessageQueue; +} + +/*-----------------------------------------------------------*/ + +ssize_t mq_receive( mqd_t mqdes, + char * msg_ptr, + size_t msg_len, + unsigned int * msg_prio ) +{ + return mq_timedreceive( mqdes, msg_ptr, msg_len, msg_prio, NULL ); +} + +/*-----------------------------------------------------------*/ + +int mq_send( mqd_t mqdes, + const char * msg_ptr, + size_t msg_len, + unsigned msg_prio ) +{ + return mq_timedsend( mqdes, msg_ptr, msg_len, msg_prio, NULL ); +} + +/*-----------------------------------------------------------*/ + +ssize_t mq_timedreceive( mqd_t mqdes, + char * msg_ptr, + size_t msg_len, + unsigned * msg_prio, + const struct timespec * abstime ) +{ + ssize_t xStatus = 0; + int iCalculateTimeoutReturn = 0; + TickType_t xTimeoutTicks = 0; + QueueListElement_t * pxMessageQueue = ( QueueListElement_t * ) mqdes; + QueueElement_t xReceiveData = { 0 }; + + /* Silence warnings about unused parameters. */ + ( void ) msg_prio; + + /* Lock the mutex that guards access to the queue list. This call will + * never fail because it blocks forever. */ + ( void ) xSemaphoreTake( ( SemaphoreHandle_t ) &xQueueListMutex, portMAX_DELAY ); + + /* Find the mq referenced by mqdes. */ + if( prvFindQueueInList( NULL, NULL, mqdes ) == pdFALSE ) + { + /* Queue not found; bad descriptor. */ + errno = EBADF; + xStatus = -1; + } + + /* Verify that msg_len is large enough. */ + if( xStatus == 0 ) + { + if( msg_len < ( size_t ) pxMessageQueue->xAttr.mq_msgsize ) + { + /* msg_len too small. */ + errno = EMSGSIZE; + xStatus = -1; + } + } + + if( xStatus == 0 ) + { + /* Convert abstime to a tick timeout. */ + iCalculateTimeoutReturn = prvCalculateTickTimeout( pxMessageQueue->xAttr.mq_flags, + abstime, + &xTimeoutTicks ); + + if( iCalculateTimeoutReturn != 0 ) + { + errno = iCalculateTimeoutReturn; + xStatus = -1; + } + } + + /* Release the mutex protecting the queue list. */ + ( void ) xSemaphoreGive( ( SemaphoreHandle_t ) &xQueueListMutex ); + + if( xStatus == 0 ) + { + /* Receive data from the FreeRTOS queue. */ + if( xQueueReceive( pxMessageQueue->xQueue, + &xReceiveData, + xTimeoutTicks ) == pdFALSE ) + { + /* If queue receive fails, set the appropriate errno. */ + if( pxMessageQueue->xAttr.mq_flags & O_NONBLOCK ) + { + /* Set errno to EAGAIN for nonblocking mq. */ + errno = EAGAIN; + } + else + { + /* Otherwise, set errno to ETIMEDOUT. */ + errno = ETIMEDOUT; + } + + xStatus = -1; + } + } + + if( xStatus == 0 ) + { + /* Get the length of data for return value. */ + xStatus = ( ssize_t ) xReceiveData.xDataSize; + + /* Copy received data into given buffer, then free it. */ + ( void ) memcpy( msg_ptr, xReceiveData.pcData, xReceiveData.xDataSize ); + vPortFree( xReceiveData.pcData ); + } + + return xStatus; +} + +/*-----------------------------------------------------------*/ + +int mq_timedsend( mqd_t mqdes, + const char * msg_ptr, + size_t msg_len, + unsigned int msg_prio, + const struct timespec * abstime ) +{ + int iStatus = 0, iCalculateTimeoutReturn = 0; + TickType_t xTimeoutTicks = 0; + QueueListElement_t * pxMessageQueue = ( QueueListElement_t * ) mqdes; + QueueElement_t xSendData = { 0 }; + + /* Silence warnings about unused parameters. */ + ( void ) msg_prio; + + /* Lock the mutex that guards access to the queue list. This call will + * never fail because it blocks forever. */ + ( void ) xSemaphoreTake( ( SemaphoreHandle_t ) &xQueueListMutex, portMAX_DELAY ); + + /* Find the mq referenced by mqdes. */ + if( prvFindQueueInList( NULL, NULL, mqdes ) == pdFALSE ) + { + /* Queue not found; bad descriptor. */ + errno = EBADF; + iStatus = -1; + } + + /* Verify that mq_msgsize is large enough. */ + if( iStatus == 0 ) + { + if( msg_len > ( size_t ) pxMessageQueue->xAttr.mq_msgsize ) + { + /* msg_len too large. */ + errno = EMSGSIZE; + iStatus = -1; + } + } + + if( iStatus == 0 ) + { + /* Convert abstime to a tick timeout. */ + iCalculateTimeoutReturn = prvCalculateTickTimeout( pxMessageQueue->xAttr.mq_flags, + abstime, + &xTimeoutTicks ); + + if( iCalculateTimeoutReturn != 0 ) + { + errno = iCalculateTimeoutReturn; + iStatus = -1; + } + } + + /* Release the mutex protecting the queue list. */ + ( void ) xSemaphoreGive( ( SemaphoreHandle_t ) &xQueueListMutex ); + + /* Allocate memory for the message. */ + if( iStatus == 0 ) + { + xSendData.xDataSize = msg_len; + xSendData.pcData = pvPortMalloc( msg_len ); + + /* Check that memory allocation succeeded. */ + if( xSendData.pcData == NULL ) + { + /* msg_len too large. */ + errno = EMSGSIZE; + iStatus = -1; + } + else + { + /* Copy the data to send. */ + ( void ) memcpy( xSendData.pcData, msg_ptr, msg_len ); + } + } + + if( iStatus == 0 ) + { + /* Send data to the FreeRTOS queue. */ + if( xQueueSend( pxMessageQueue->xQueue, + &xSendData, + xTimeoutTicks ) == pdFALSE ) + { + /* If queue send fails, set the appropriate errno. */ + if( pxMessageQueue->xAttr.mq_flags & O_NONBLOCK ) + { + /* Set errno to EAGAIN for nonblocking mq. */ + errno = EAGAIN; + } + else + { + /* Otherwise, set errno to ETIMEDOUT. */ + errno = ETIMEDOUT; + } + + /* Free the allocated queue data. */ + vPortFree( xSendData.pcData ); + + iStatus = -1; + } + } + + return iStatus; +} + +/*-----------------------------------------------------------*/ + +int mq_unlink( const char * name ) +{ + int iStatus = 0; + size_t xNameSize = 0; + BaseType_t xQueueRemoved = pdFALSE; + QueueListElement_t * pxMessageQueue = NULL; + + /* Initialize the queue list, if needed. */ + prvInitializeQueueList(); + + /* Check queue name. */ + if( prvValidateQueueName( name, &xNameSize ) == pdFALSE ) + { + /* Error with mq name. */ + errno = EINVAL; + iStatus = -1; + } + + if( iStatus == 0 ) + { + /* Lock the mutex that guards access to the queue list. This call will + * never fail because it blocks forever. */ + ( void ) xSemaphoreTake( ( SemaphoreHandle_t ) &xQueueListMutex, portMAX_DELAY ); + + /* Check if the named queue exists. */ + if( prvFindQueueInList( &pxMessageQueue, name, ( mqd_t ) NULL ) == pdTRUE ) + { + /* If the queue exists and there are no open descriptors to it, + * remove it from the list. */ + if( pxMessageQueue->xOpenDescriptors == 0 ) + { + listREMOVE( &pxMessageQueue->xLink ); + + /* Set the flag to delete the queue. Deleting the queue is deferred + * until xQueueListMutex is released. */ + xQueueRemoved = pdTRUE; + } + else + { + /* If the queue has open descriptors, set the pending unlink flag + * so that mq_close will free its resources. */ + pxMessageQueue->xPendingUnlink = pdTRUE; + } + } + else + { + /* The named message queue doesn't exist. */ + errno = ENOENT; + iStatus = -1; + } + + /* Release the mutex protecting the queue list. */ + ( void ) xSemaphoreGive( ( SemaphoreHandle_t ) &xQueueListMutex ); + } + + /* Delete all resources used by the queue if needed. */ + if( xQueueRemoved == pdTRUE ) + { + prvDeleteMessageQueue( pxMessageQueue ); + } + + return iStatus; +} + +/* specified but not implemented functions, return ENOSYS */ +int mq_notify( mqd_t, + const struct sigevent * ) +{ + return ENOSYS; +} + +int mq_setattr( mqd_t, + const struct mq_attr * restrict, + struct mq_attr * restrict ) +{ + return ENOSYS; +} + +/*-----------------------------------------------------------*/ diff --git a/components/rt/FreeRTOS_POSIX_utils.c b/components/rt/FreeRTOS_POSIX_utils.c new file mode 100644 index 00000000000..d9d30fa409f --- /dev/null +++ b/components/rt/FreeRTOS_POSIX_utils.c @@ -0,0 +1,249 @@ +/* + * Amazon FreeRTOS+POSIX V1.0.0 + * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-FileCopyrightText: 2018 Amazon.com, Inc. or its affiliates + * + * SPDX-License-Identifier: MIT + * + * SPDX-FileContributor: 2024 Espressif Systems (Shanghai) CO LTD + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://aws.amazon.com/freertos + * http://www.FreeRTOS.org + */ + +/** + * @file FreeRTOS_POSIX_utils.c + * @brief Implementation of utility functions in utils.h + */ + +/* C standard library includes. */ +#include + +#include /* Added by Espressif */ +#include +#include + +/* FreeRTOS+POSIX includes. */ +#include "FreeRTOS_POSIX.h" +#include "FreeRTOS_POSIX/utils.h" + +/*-----------------------------------------------------------*/ + +/* This function has been modified from the original by Espressif */ +size_t UTILS_strnlen( const char * const pcString, + size_t xMaxLength ) +{ + return strnlen( pcString, xMaxLength ); +} + +/*-----------------------------------------------------------*/ + +int UTILS_AbsoluteTimespecToTicks( const struct timespec * const pxAbsoluteTime, + TickType_t * const pxResult ) +{ + int iStatus = 0; + struct timespec xCurrentTime = { 0 }, xDifference = { 0 }; + + /* Check parameters. */ + if( ( pxAbsoluteTime == NULL ) || ( pxResult == NULL ) ) + { + iStatus = EINVAL; + } + + /* Get the current time. */ + if( iStatus == 0 ) + { + if( clock_gettime( CLOCK_REALTIME, &xCurrentTime ) != 0 ) + { + iStatus = errno; + } + } + + /* Calculate the difference between the current time and pxAbsoluteTime. */ + if( iStatus == 0 ) + { + if( UTILS_TimespecSubtract( &xDifference, pxAbsoluteTime, &xCurrentTime ) != 0 ) + { + /* pxAbsoluteTime was in the past. */ + iStatus = ETIMEDOUT; + } + } + + /* Convert the time difference to ticks. */ + if( iStatus == 0 ) + { + iStatus = UTILS_TimespecToTicks( &xDifference, pxResult ); + } + + return iStatus; +} + +/*-----------------------------------------------------------*/ + +int UTILS_TimespecToTicks( const struct timespec * const pxTimespec, + TickType_t * const pxResult ) +{ + int iStatus = 0; + uint64_t ullTotalTicks = 0; + long lNanoseconds = 0; + + /* Check parameters. */ + if( ( pxTimespec == NULL ) || ( pxResult == NULL ) ) + { + iStatus = EINVAL; + } + else if( ( pxTimespec != NULL ) && ( UTILS_ValidateTimespec( pxTimespec ) == false ) ) + { + iStatus = EINVAL; + } + + if( iStatus == 0 ) + { + /* Convert timespec.tv_sec to ticks. */ + ullTotalTicks = ( uint64_t ) configTICK_RATE_HZ * ( uint64_t ) ( pxTimespec->tv_sec ); + + /* Convert timespec.tv_nsec to ticks. This value does not have to be checked + * for overflow because a valid timespec has 0 <= tv_nsec < 1000000000 and + * NANOSECONDS_PER_TICK > 1. */ + lNanoseconds = pxTimespec->tv_nsec / ( long ) NANOSECONDS_PER_TICK + /* Whole nanoseconds. */ + ( long ) ( pxTimespec->tv_nsec % ( long ) NANOSECONDS_PER_TICK != 0 ); /* Add 1 to round up if needed. */ + + /* Add the nanoseconds to the total ticks. */ + ullTotalTicks += ( uint64_t ) lNanoseconds; + + /* Write result. */ + *pxResult = ( TickType_t ) ullTotalTicks; + } + + return iStatus; +} + +/*-----------------------------------------------------------*/ + +void UTILS_NanosecondsToTimespec( int64_t llSource, + struct timespec * const pxDestination ) +{ + long lCarrySec = 0; + + /* Convert to timespec. */ + pxDestination->tv_sec = ( time_t ) ( llSource / NANOSECONDS_PER_SECOND ); + pxDestination->tv_nsec = ( long ) ( llSource % NANOSECONDS_PER_SECOND ); + + /* Subtract from tv_sec if tv_nsec < 0. */ + if( pxDestination->tv_nsec < 0L ) + { + /* Compute the number of seconds to carry. */ + lCarrySec = ( pxDestination->tv_nsec / ( long ) NANOSECONDS_PER_SECOND ) + 1L; + + pxDestination->tv_sec -= ( time_t ) ( lCarrySec ); + pxDestination->tv_nsec += lCarrySec * ( long ) NANOSECONDS_PER_SECOND; + } +} + +/*-----------------------------------------------------------*/ + +int UTILS_TimespecAdd( struct timespec * const pxResult, + const struct timespec * const x, + const struct timespec * const y ) +{ + int64_t llResult64 = 0; + + /* Check parameters. */ + if( ( pxResult == NULL ) || ( x == NULL ) || ( y == NULL ) ) + { + return -1; + } + + /* Perform addition. */ + llResult64 = ( ( ( int64_t ) ( x->tv_sec ) * NANOSECONDS_PER_SECOND ) + ( int64_t ) ( x->tv_nsec ) ) + + ( ( ( int64_t ) ( y->tv_sec ) * NANOSECONDS_PER_SECOND ) + ( int64_t ) ( y->tv_nsec ) ); + + /* Convert result to timespec. */ + UTILS_NanosecondsToTimespec( llResult64, pxResult ); + + return ( int ) ( llResult64 < 0LL ); +} + +/*-----------------------------------------------------------*/ + +int UTILS_TimespecAddNanoseconds( struct timespec * const pxResult, + const struct timespec * const x, + int64_t llNanoseconds ) +{ + struct timespec y = { .tv_sec = ( time_t ) 0, .tv_nsec = 0L }; + + /* Check parameters. */ + if( ( pxResult == NULL ) || ( x == NULL ) ) + { + return -1; + } + + /* Convert llNanoseconds to a timespec. */ + UTILS_NanosecondsToTimespec( llNanoseconds, &y ); + + /* Perform addition. */ + return UTILS_TimespecAdd( pxResult, x, &y ); +} + +/*-----------------------------------------------------------*/ + +int UTILS_TimespecSubtract( struct timespec * const pxResult, + const struct timespec * const x, + const struct timespec * const y ) +{ + int64_t llResult64 = 0; + + /* Check parameters. */ + if( ( pxResult == NULL ) || ( x == NULL ) || ( y == NULL ) ) + { + return -1; + } + + /* Perform addition. */ + llResult64 = ( ( ( int64_t ) ( x->tv_sec ) * NANOSECONDS_PER_SECOND ) + ( int64_t ) ( x->tv_nsec ) ) + - ( ( ( int64_t ) ( y->tv_sec ) * NANOSECONDS_PER_SECOND ) + ( int64_t ) ( y->tv_nsec ) ); + + /* Convert result to timespec. */ + UTILS_NanosecondsToTimespec( llResult64, pxResult ); + + return ( int ) ( llResult64 < 0LL ); +} + +/*-----------------------------------------------------------*/ + +bool UTILS_ValidateTimespec( const struct timespec * const pxTimespec ) +{ + bool xReturn = false; + + if( pxTimespec != NULL ) + { + /* Verify 0 <= tv_nsec < 1000000000. */ + if( ( pxTimespec->tv_nsec >= 0 ) && + ( pxTimespec->tv_nsec < NANOSECONDS_PER_SECOND ) ) + { + xReturn = true; + } + } + + return xReturn; +} + +/*-----------------------------------------------------------*/ diff --git a/components/rt/idf_changes.md b/components/rt/idf_changes.md new file mode 100644 index 00000000000..06bdf14f5d6 --- /dev/null +++ b/components/rt/idf_changes.md @@ -0,0 +1,46 @@ +# ESP-IDF Changes + +This document is used to track all changes made to the FreeRTOS-Plus-POSIX V1.0.0 source code used in ESP-IDF. + +## License Headers + +- Added `SPDX-FileCopyrightText` and `SPDX-FileContributor` tags to all files to pass ESP-IDF pre-commit checks. + +## POSIX errno + +Instead of relying on the FreeRTOS `errno` scheme by enabling `configUSE_POSIX_ERRNO`, the `errno` provided by newlib is used. `configUSE_POSIX_ERRNO` should stay disabled. + +## API Changes + +`mq_open()` has been changed to make the arguments `mode` and `attr` optional, as specified by [POSIX](https://pubs.opengroup.org/onlinepubs/9699919799/functions/mq_open.html). + +The following functions are stubs and always return `ENOSYS`: +* `mq_notify()` +* `mq_setattr()` + +## Header File Organization + +In the original FreeRTOS-Plus-POSIX project, the POSIX header files are provided in the sub directory `FreeRTOS-Plus-POSIX`. In ESP-IDF, however, the POSIX header files do not need any prefix. This increases compatibility with applications originally written for other platforms. All files originating from the FreeRTOS-Plus-POSIX project have been modified to reflect the different include path. + +Wherever possible, ESP-IDF is using header files from newlib instead of the header files from FreeRTOS-Plus-POSIX. + +In some cases, additional includes have been added to files from FreeRTOS-Plus-POSIX to simplify building. + +## Critical Sections + +The critical sections have been changed according to the ESP-IDF critical section API. + +## Definitions + +The following definitions have been added to the private include `utils.h`: +``` +MICROSECONDS_PER_SECOND +NANOSECONDS_PER_SECOND +NANOSECONDS_PER_TICK +``` + +In FreeRTOS-Plus-POSIX, they are located in the custom `time.h`, but ESP-IDF uses newlib's `time.h`, where these definitions are not present. + +## Code Format + +- Files have been formatted by [`uncrustify`](https://github.com/uncrustify/uncrustify), using [FreeRTOS' `uncrustify.cfc`](../freertos/FreeRTOS-Kernel/uncrustify.cfg). diff --git a/components/rt/include/mqueue.h b/components/rt/include/mqueue.h new file mode 100644 index 00000000000..c0927cc6a9b --- /dev/null +++ b/components/rt/include/mqueue.h @@ -0,0 +1,155 @@ +/* + * Amazon FreeRTOS+POSIX V1.0.0 + * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-FileCopyrightText: 2018 Amazon.com, Inc. or its affiliates + * + * SPDX-License-Identifier: MIT + * + * SPDX-FileContributor: 2024 Espressif Systems (Shanghai) CO LTD + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://aws.amazon.com/freertos + * http://www.FreeRTOS.org + */ + +/** + * @file mqueue.h + * @brief Message queues. + * + * http://pubs.opengroup.org/onlinepubs/9699919799/basedefs/mqueue.h.html + */ + +#pragma once + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Message queue descriptor. + */ +typedef void * mqd_t; + +/** + * @brief Message queue attributes. + */ +struct mq_attr +{ + long mq_flags; /**< Message queue flags. */ + long mq_maxmsg; /**< Maximum number of messages. */ + long mq_msgsize; /**< Maximum message size. */ + long mq_curmsgs; /**< Number of messages currently queued. */ +}; + +/** + * @brief Close a message queue. + * + * Please refer to http://pubs.opengroup.org/onlinepubs/9699919799/functions/mq_close.html for more details. + */ +int mq_close( mqd_t mqdes ); + +/** + * @brief Get message queue attributes. + * + * Please refer to http://pubs.opengroup.org/onlinepubs/9699919799/functions/mq_getattr.html for more details. + */ +int mq_getattr( mqd_t mqdes, + struct mq_attr * mqstat ); + +/** + * @brief Open a message queue. + * + * Please refer to http://pubs.opengroup.org/onlinepubs/9699919799/functions/mq_open.html for more details. + * + * @note Supported name pattern: leading <slash> character in name is always required; + * the maximum length (excluding null-terminator) of the name argument can be NAME_MAX + 2. + * @note mode argument is not supported. + * @note Supported oflags: O_RDWR, O_CREAT, O_EXCL, and O_NONBLOCK. + */ +mqd_t mq_open( const char * name, + int oflag, + ... ); + +/** + * @brief Receive a message from a message queue. + * + * Please refer to http://pubs.opengroup.org/onlinepubs/9699919799/functions/mq_receive.html for more details. + * + * @note msg_prio argument is not supported. Messages are not checked for corruption. + */ +ssize_t mq_receive( mqd_t mqdes, + char * msg_ptr, + size_t msg_len, + unsigned int * msg_prio ); + +/** + * @brief Send a message to a message queue. + * + * Please refer to http://pubs.opengroup.org/onlinepubs/9699919799/functions/mq_send.html for more details. + * + * @note msg_prio argument is not supported. + */ +int mq_send( mqd_t mqdes, + const char * msg_ptr, + size_t msg_len, + unsigned msg_prio ); + +/** + * @brief Receive a message from a message queue with timeout. + * + * Please refer to http://pubs.opengroup.org/onlinepubs/9699919799/functions/mq_timedreceive.html for more details. + * + * @note msg_prio argument is not supported. Messages are not checked for corruption. + */ +ssize_t mq_timedreceive( mqd_t mqdes, + char * msg_ptr, + size_t msg_len, + unsigned * msg_prio, + const struct timespec * abstime ); + +/** + * @brief Send a message to a message queue with timeout. + * + * Please refer to http://pubs.opengroup.org/onlinepubs/9699919799/functions/mq_timedsend.html for more details. + * + * @note msg_prio argument is not supported. + */ +int mq_timedsend( mqd_t mqdes, + const char * msg_ptr, + size_t msg_len, + unsigned msg_prio, + const struct timespec * abstime ); + +/** + * @brief Remove a message queue. + * + * Please refer to http://pubs.opengroup.org/onlinepubs/9699919799/functions/mq_unlink.html for more details. + */ +int mq_unlink( const char * name ); + +/* Added by Espressif - specified but not implemented functions, return ENOSYS */ +int mq_notify( mqd_t, const struct sigevent * ); +int mq_setattr( mqd_t, const struct mq_attr *, struct mq_attr * ); + +#ifdef __cplusplus +} +#endif diff --git a/components/rt/private_include/FreeRTOS_POSIX.h b/components/rt/private_include/FreeRTOS_POSIX.h new file mode 100644 index 00000000000..87d2e9b1e5b --- /dev/null +++ b/components/rt/private_include/FreeRTOS_POSIX.h @@ -0,0 +1,56 @@ +/* + * Amazon FreeRTOS+POSIX V1.0.0 + * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-FileCopyrightText: 2018 Amazon.com, Inc. or its affiliates + * + * SPDX-License-Identifier: MIT + * + * SPDX-FileContributor: 2024 Espressif Systems (Shanghai) CO LTD + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://aws.amazon.com/freertos + * http://www.FreeRTOS.org + */ + +/** + * @file FreeRTOS_POSIX.h + * @brief FreeRTOS+POSIX header. + * + * This file must be included before all other FreeRTOS+POSIX includes. + */ + +#ifndef _FREERTOS_POSIX_H_ +#define _FREERTOS_POSIX_H_ + +/* FreeRTOS+POSIX platform-specific configuration headers. */ +#include "FreeRTOS_POSIX_portable.h" +#include "portable/FreeRTOS_POSIX_portable_default.h" + +/* FreeRTOS includes. */ +#include "freertos/FreeRTOS.h" +#include "freertos/event_groups.h" +#include "freertos/semphr.h" +#include "freertos/task.h" + +/* FreeRTOS+POSIX data types and internal structs. */ +#include +#include "FreeRTOS_POSIX_internal.h" + +#endif /* _FREERTOS_POSIX_H_ */ diff --git a/components/rt/private_include/FreeRTOS_POSIX/utils.h b/components/rt/private_include/FreeRTOS_POSIX/utils.h new file mode 100644 index 00000000000..8f748eaee41 --- /dev/null +++ b/components/rt/private_include/FreeRTOS_POSIX/utils.h @@ -0,0 +1,149 @@ +/* + * Amazon FreeRTOS+POSIX V1.0.0 + * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-FileCopyrightText: 2018 Amazon.com, Inc. or its affiliates + * + * SPDX-License-Identifier: MIT + * + * SPDX-FileContributor: 2024 Espressif Systems (Shanghai) CO LTD + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://aws.amazon.com/freertos + * http://www.FreeRTOS.org + */ + +/** + * @file utils.h + * @brief Utility functions used by FreeRTOS+POSIX. + */ + +#ifndef _FREERTOS_POSIX_UTILS_ +#define _FREERTOS_POSIX_UTILS_ + +/* C standard library includes. */ +#include +#include + +#include + +#define MICROSECONDS_PER_SECOND ( 1000000LL ) /**< Microseconds per second. */ +#define NANOSECONDS_PER_SECOND ( 1000000000LL ) /**< Nanoseconds per second. */ +#define NANOSECONDS_PER_TICK ( NANOSECONDS_PER_SECOND / configTICK_RATE_HZ ) + +/** + * @brief Calculates the length of pcString, up to xMaxLength. + * + * @param[in] pcString The string to find the length of. + * @param[in] xMaxLength The limit when searching for the end of pcString. + * + * @return 0 if pcString is NULL; otherwise, the length of pcString or xMaxLength, + * whichever is smaller. + */ +size_t UTILS_strnlen( const char * const pcString, + size_t xMaxLength ); + +/** + * @brief Calculates the number of ticks between now and a given timespec. + * + * @param[in] pxAbsoluteTime A time in the future, specified as seconds and + * nanoseconds since CLOCK_REALTIME's 0. + * @param[out] pxResult Where the result of the conversion is stored. The result + * is rounded up for fractional ticks. + * + * @return 0 on success. Otherwise, ETIMEDOUT if pxAbsoluteTime is in the past, + * or EINVAL for invalid parameters. + */ +int UTILS_AbsoluteTimespecToTicks( const struct timespec * const pxAbsoluteTime, + TickType_t * const pxResult ); + +/** + * @brief Converts a struct timespec to FreeRTOS ticks. + * + * @param[in] pxTimespec The timespec to convert. + * @param[out] pxResult Where the result of the conversion is stored. The result is rounded + * up for fractional ticks. + * + * @return 0 on success. Otherwise, EINVAL for invalid parameters. + */ +int UTILS_TimespecToTicks( const struct timespec * const pxTimespec, + TickType_t * const pxResult ); + +/** + * @brief Converts an integer value to a timespec. + * + * @param[in] llSource The value to convert. + * @param[out] pxDestination Where to store the converted value. + * + * @return No return value. + */ +void UTILS_NanosecondsToTimespec( int64_t llSource, + struct timespec * const pxDestination ); + +/** + * @brief Calculates pxResult = x + y. + * + * @param[out] pxResult Where the result of the calculation is stored. + * @param[in] x The first argument for addition. + * @param[in] y The second argument for addition. + * + * @return -1 if any argument was NULL; 1 if result is negative; otherwise, 0. + */ +int UTILS_TimespecAdd( struct timespec * const pxResult, + const struct timespec * const x, + const struct timespec * const y ); + +/** + * @brief Calculates pxResult = x + ( struct timespec ) nanosec. + * + * @param[out] pxResult Where the result of the calculation is stored. + * @param[in] x The first argument for addition. + * @param[in] llNanoseconds The second argument for addition. + * + * @return -1 if pxResult or x was NULL; 1 if result is negative; otherwise, 0. + */ +int UTILS_TimespecAddNanoseconds( struct timespec * const pxResult, + const struct timespec * const x, + int64_t llNanoseconds ); + +/** + * @brief Calculates pxResult = x - y. + * + * @param[out] pxResult Where the result of the calculation is stored. + * @param[in] x The first argument for subtraction. + * @param[in] y The second argument for subtraction. + * + * @return -1 if any argument was NULL; 1 if result is negative; otherwise, 0. + */ +int UTILS_TimespecSubtract( struct timespec * const pxResult, + const struct timespec * const x, + const struct timespec * const y ); + +/** + * @brief Checks that a timespec conforms to POSIX. + * + * A valid timespec must have 0 <= tv_nsec < 1000000000. + * + * @param[in] pxTimespec The timespec to validate. + * + * @return true if the pxTimespec is valid, false otherwise. + */ +bool UTILS_ValidateTimespec( const struct timespec * const pxTimespec ); + +#endif /* ifndef _FREERTOS_POSIX_UTILS_ */ diff --git a/components/rt/private_include/FreeRTOS_POSIX_internal.h b/components/rt/private_include/FreeRTOS_POSIX_internal.h new file mode 100644 index 00000000000..ecabbfc9944 --- /dev/null +++ b/components/rt/private_include/FreeRTOS_POSIX_internal.h @@ -0,0 +1,101 @@ +/* + * Amazon FreeRTOS+POSIX V1.0.0 + * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-FileCopyrightText: 2018 Amazon.com, Inc. or its affiliates + * + * SPDX-License-Identifier: MIT + * + * SPDX-FileContributor: 2024 Espressif Systems (Shanghai) CO LTD + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://aws.amazon.com/freertos + * http://www.FreeRTOS.org + */ + +#ifndef _FREERTOS_POSIX_INTERNAL_H_ +#define _FREERTOS_POSIX_INTERNAL_H_ + +/** + * @file FreeRTOS_POSIX_internal.h + * @brief Internal structs and initializers for FreeRTOS+POSIX. + */ + +/* Amazon FreeRTOS includes. */ +#include "aws_doubly_linked_list.h" + +/** + * @brief Mutex attribute object. + */ +typedef struct pthread_mutexattr_internal +{ + int iType; /**< Mutex type. */ +} pthread_mutexattr_internal_t; + +/** + * @brief Mutex. + */ +typedef struct pthread_mutex_internal +{ + BaseType_t xIsInitialized; /**< Set to pdTRUE if this mutex is initialized, pdFALSE otherwise. */ + StaticSemaphore_t xMutex; /**< FreeRTOS mutex. */ + TaskHandle_t xTaskOwner; /**< Owner; used for deadlock detection and permission checks. */ + pthread_mutexattr_internal_t xAttr; /**< Mutex attributes. */ +} pthread_mutex_internal_t; + +/** + * @brief Compile-time initializer of pthread_mutex_internal_t. + */ +#define FREERTOS_POSIX_MUTEX_INITIALIZER \ + ( &( ( pthread_mutex_internal_t ) \ + { \ + .xIsInitialized = pdFALSE, \ + .xMutex = { { 0 } }, \ + .xTaskOwner = NULL, \ + .xAttr = { .iType = 0 } \ + } \ + ) \ + ) + +/** + * @brief Condition variable. + */ +typedef struct pthread_cond_internal +{ + BaseType_t xIsInitialized; /**< Set to pdTRUE if this condition variable is initialized, pdFALSE otherwise. */ + StaticSemaphore_t xCondMutex; /**< Prevents concurrent accesses to iWaitingThreads. */ + StaticSemaphore_t xCondWaitSemaphore; /**< Threads block on this semaphore in pthread_cond_wait. */ + int iWaitingThreads; /**< The number of threads currently waiting on this condition variable. */ +} pthread_cond_internal_t; + +/** + * @brief Compile-time initializer of pthread_cond_internal_t. + */ +#define FREERTOS_POSIX_COND_INITIALIZER \ + ( &( ( pthread_cond_internal_t ) \ + { \ + .xIsInitialized = pdFALSE, \ + .xCondMutex = { { 0 } }, \ + .xCondWaitSemaphore = { { 0 } }, \ + .iWaitingThreads = 0 \ + } \ + ) \ + ) + +#endif /* _FREERTOS_POSIX_INTERNAL_H_ */ diff --git a/components/rt/private_include/FreeRTOS_POSIX_portable.h b/components/rt/private_include/FreeRTOS_POSIX_portable.h new file mode 100644 index 00000000000..291f72f5716 --- /dev/null +++ b/components/rt/private_include/FreeRTOS_POSIX_portable.h @@ -0,0 +1,59 @@ +/* + * Amazon FreeRTOS+POSIX V1.0.0 + * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-FileCopyrightText: 2018 Amazon.com, Inc. or its affiliates + * + * SPDX-License-Identifier: MIT + * + * SPDX-FileContributor: 2024 Espressif Systems (Shanghai) CO LTD + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://aws.amazon.com/freertos + * http://www.FreeRTOS.org + */ + +/** + * @file FreeRTOS_POSIX_portable.h + * @brief Port-specific configuration of FreeRTOS+POSIX. + */ + +#ifndef _FREERTOS_POSIX_PORTABLE_H_ +#define _FREERTOS_POSIX_PORTABLE_H_ + +/* ESP-IDF already defines the following types. */ +#define posixconfigENABLE_CLOCK_T 0 +#define posixconfigENABLE_CLOCKID_T 0 +#define posixconfigENABLE_MODE_T 0 +#define posixconfigENABLE_PTHREAD_ATTR_T 0 +#define posixconfigENABLE_PTHREAD_COND_T 0 +#define posixconfigENABLE_PTHREAD_CONDATTR_T 0 +#define posixconfigENABLE_PTHREAD_MUTEX_T 0 +#define posixconfigENABLE_PTHREAD_MUTEXATTR_T 0 +#define posixconfigENABLE_PTHREAD_T 0 +#define posixconfigENABLE_TIME_T 0 +#define posixconfigENABLE_TIMER_T 0 +#define posixconfigENABLE_TIMESPEC 0 +#define posixconfigENABLE_ITIMERSPEC 0 + +/* ESP-IDF already provides the header sched.h. Exclude them by + * activating the double inclusion guards. */ +#define _FREERTOS_POSIX_SCHED_H_ + +#endif /* _FREERTOS_POSIX_PORTABLE_H_ */ diff --git a/components/rt/private_include/aws_doubly_linked_list.h b/components/rt/private_include/aws_doubly_linked_list.h new file mode 100644 index 00000000000..9e5a0b347be --- /dev/null +++ b/components/rt/private_include/aws_doubly_linked_list.h @@ -0,0 +1,249 @@ +/* + * Amazon FreeRTOS + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-FileCopyrightText: 2018 Amazon.com, Inc. or its affiliates + * + * SPDX-License-Identifier: MIT + * + * SPDX-FileContributor: 2024 Espressif Systems (Shanghai) CO LTD + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://aws.amazon.com/freertos + * http://www.FreeRTOS.org + */ + + +/** + * @file aws_doubly_linked_list.h + * @brief Doubly Linked List implementation. + * + * A generic implementation of circular Doubly Linked List which consists of a + * list head and some list entries (zero in case of an empty list). + * + * To start with, a structure of type Link_t should be embedded in the structure + * which is to be organized as doubly linked list. + * @code + * typedef struct UserStruct + * { + * uint32_t ulField1; + * uint32_t ulField2; + * Link_t xLink; + * } UserStruct_t; + * @endcode + * + * A List head should then be defined and initialized. + * @code + * Link_t xListHead; + * listINIT_HEAD( &xListHead ); + * @endcode + * + * listADD can then be used to add nodes to the list. + * @code + * listADD( &( xListHead ), &( pxUserStruct->xLink ) ); + * @endcode + * + * listFOR_EACH can be used for traversing the list. + * @code + * Link_t *pxLink; + * UserStruct_t *pxUserStruct; + * listFOR_EACH( pxLink, &( xListHead ) ) + * { + * pxUserStruct = listCONTAINER( pxLink, UserStruct_t, xLink ); + * } + * @endcode + * + * listFOR_EACH_SAFE should be used if you want to perform destructive operations + * (like free) on nodes while traversing the list. + * @code + * Link_t *pxLink, *pxTempLink; + * UserStruct_t *pxUserStruct; + * listFOR_EACH( pxLink, pxTempLink, &( xListHead ) ) + * { + * pxUserStruct = listCONTAINER( pxLink, UserStruct_t, xLink ); + * free( pxUserStruct ); + * } + * @endcode + */ + +#ifndef _AWS_DOUBLY_LINKED_LIST_H_ +#define _AWS_DOUBLY_LINKED_LIST_H_ + +#include +#include + +/** + * @brief Struct embedded in any struct to make it a doubly linked + * list. + * + * pxNext in the head points to the first node in the list and pxPrev + * in the head points to the last node in the list. In case of empty + * list, both pxPrev and pxNext in the head point to the head node itself. + */ +typedef struct Link +{ + struct Link * pxPrev; /**< Pointer to the previous node. */ + struct Link * pxNext; /**< Pointer to the next node. */ +} Link_t; + +/** + * @brief Initializes the given list head to an empty list. + * + * @param[in] pxHead The given list head to initialize. + */ +#define listINIT_HEAD( pxHead ) \ + { \ + ( pxHead )->pxPrev = ( pxHead ); \ + ( pxHead )->pxNext = ( pxHead ); \ + } + +/** + * @brief Adds the given new node to the given list. + * + * @param[in] pxHead The head of the given list. + * @param[in] pxLink The given new node to be added to the given + * list. + */ +#define listADD( pxHead, pxLink ) \ + { \ + Link_t * pxPrevLink = ( pxHead ); \ + Link_t * pxNextLink = ( ( pxHead )->pxNext ); \ + \ + ( pxLink )->pxNext = pxNextLink; \ + pxNextLink->pxPrev = ( pxLink ); \ + pxPrevLink->pxNext = ( pxLink ); \ + ( pxLink )->pxPrev = ( pxPrevLink ); \ + } + +/** + * @brief Removes the given node from the list it is part of. + * + * If the given node is not a part of any list (i.e. next and previous + * nodes are NULL), nothing happens. + * + * @param[in] pxLink The given node to remove from the list. + */ +#define listREMOVE( pxLink ) \ + { \ + /* If the link is part of a list, remove it from the list. */ \ + if( ( pxLink )->pxNext != NULL && ( pxLink )->pxPrev != NULL ) \ + { \ + ( pxLink )->pxPrev->pxNext = ( pxLink )->pxNext; \ + ( pxLink )->pxNext->pxPrev = ( pxLink )->pxPrev; \ + } \ + \ + /* Make sure that this link is not part of any list anymore. */ \ + ( pxLink )->pxPrev = NULL; \ + ( pxLink )->pxNext = NULL; \ + } + +/** + * @brief Given the head of a list, checks if the list is empty. + * + * @param[in] pxHead The head of the given list. + */ +#define listIS_EMPTY( pxHead ) ( ( ( pxHead ) == NULL ) || ( ( pxHead )->pxNext == ( pxHead ) ) ) + +/** + * @brief Removes the first node from the given list and returns it. + * + * Removes the first node from the given list and assigns it to the + * pxLink parameter. If the list is empty, it assigns NULL to the + * pxLink. + * + * @param[in] pxHead The head of the list from which to remove the + * first node. + * @param[out] pxLink The output parameter to receive the removed + * node. + */ +#define listPOP( pxHead, pxLink ) \ + { \ + if( listIS_EMPTY( ( pxHead ) ) ) \ + { \ + ( pxLink ) = NULL; \ + } \ + else \ + { \ + ( pxLink ) = ( pxHead )->pxNext; \ + /* If the link is part of a list, remove it from the list. */ \ + if( ( pxLink )->pxNext != NULL && ( pxLink )->pxPrev != NULL ) \ + { \ + ( pxLink )->pxPrev->pxNext = ( pxLink )->pxNext; \ + ( pxLink )->pxNext->pxPrev = ( pxLink )->pxPrev; \ + } \ + \ + /* Make sure that this link is not part of any list anymore. */ \ + ( pxLink )->pxPrev = NULL; \ + ( pxLink )->pxNext = NULL; \ + } \ + } + +/** + * @brief Merges a list into a given list. + * + * @param[in] pxHeadResultList The head of the given list into which the + * other list should be merged. + * @param[in] pxHeadListToMerge The head of the list to be merged into the + * given list. + */ +#define listMERGE( pxHeadResultList, pxHeadListToMerge ) \ + { \ + if( !listIS_EMPTY( ( pxHeadListToMerge ) ) ) \ + { \ + /* Setup links between last node of listToMerge and first node of resultList. */ \ + ( pxHeadListToMerge )->pxPrev->pxNext = ( pxHeadResultList )->pxNext; \ + ( pxHeadResultList )->pxNext->pxPrev = ( pxHeadListToMerge )->pxPrev; \ + \ + /* Setup links between first node of listToMerge and the head of resultList. */ \ + ( pxHeadListToMerge )->pxNext->pxPrev = ( pxHeadResultList ); \ + ( pxHeadResultList )->pxNext = ( pxHeadListToMerge )->pxNext; \ + /* Empty the merged list. */ \ + listINIT_HEAD( ( pxHeadListToMerge ) ); \ + } \ + } + +/** + * @brief Helper macro to iterate over a list. pxLink contains the link node + * in each iteration. + */ +#define listFOR_EACH( pxLink, pxHead ) \ + for( ( pxLink ) = ( pxHead )->pxNext; \ + ( pxLink ) != ( pxHead ); \ + ( pxLink ) = ( pxLink )->pxNext ) + +/** + * @brief Helper macro to iterate over a list. It is safe to destroy/free the + * nodes while iterating. pxLink contains the link node in each iteration. + */ +#define listFOR_EACH_SAFE( pxLink, pxTempLink, pxHead ) \ + for( ( pxLink ) = ( pxHead )->pxNext, ( pxTempLink ) = ( pxLink )->pxNext; \ + ( pxLink ) != ( pxHead ); \ + ( pxLink ) = ( pxTempLink ), ( pxTempLink ) = ( pxLink )->pxNext ) + +/** + * @brief Given the pointer to the link member (of type Link_t) in a struct, + * extracts the pointer to the containing struct. + * + * @param[in] pxLink The pointer to the link member. + * @param[in] type The type of the containing struct. + * @param[in] member Name of the link member in the containing struct. + */ +#define listCONTAINER( pxLink, type, member ) ( ( type * ) ( ( uint8_t * ) ( pxLink ) - ( uint8_t * ) ( &( ( type * ) 0 )->member ) ) ) + +#endif /* _AWS_DOUBLY_LINKED_LIST_H_ */ diff --git a/components/rt/private_include/portable/FreeRTOS_POSIX_portable_default.h b/components/rt/private_include/portable/FreeRTOS_POSIX_portable_default.h new file mode 100644 index 00000000000..9cc2ba0fdff --- /dev/null +++ b/components/rt/private_include/portable/FreeRTOS_POSIX_portable_default.h @@ -0,0 +1,144 @@ +/* + * Amazon FreeRTOS+POSIX V1.0.0 + * Copyright (C) 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * SPDX-FileCopyrightText: 2018 Amazon.com, Inc. or its affiliates + * + * SPDX-License-Identifier: MIT + * + * SPDX-FileContributor: 2024 Espressif Systems (Shanghai) CO LTD + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://aws.amazon.com/freertos + * http://www.FreeRTOS.org + */ + +/** + * @file FreeRTOS_POSIX_portable_default.h + * @brief Defaults for port-specific configuration of FreeRTOS+POSIX. + */ + +#ifndef _FREERTOS_POSIX_PORTABLE_DEFAULT_H_ +#define _FREERTOS_POSIX_PORTABLE_DEFAULT_H_ + +/** + * @brief The FreeRTOS task name given to pthreads. + */ +#ifndef posixconfigPTHREAD_TASK_NAME + #define posixconfigPTHREAD_TASK_NAME "pthread" +#endif + +/** + * @brief the FreeRTOS timer name given to POSIX timers. + */ +#ifndef posixconfigTIMER_NAME + #define posixconfigTIMER_NAME "timer" +#endif + +/** + * @defgroup Defaults for POSIX message queue implementation. + */ +/**@{ */ +#ifndef posixconfigMQ_MAX_MESSAGES + #define posixconfigMQ_MAX_MESSAGES 10 /**< Maximum number of messages in an mq at one time. */ +#endif + +#ifndef posixconfigMQ_MAX_SIZE + #define posixconfigMQ_MAX_SIZE 128 /**< Maximum size (in bytes) of each message. */ +#endif +/**@} */ + +/** + * @defgroup POSIX implementation-dependent constants usually defined in limits.h. + * + * They are defined here to provide portability between platforms. + */ +/**@{ */ +#ifndef PTHREAD_STACK_MIN + #define PTHREAD_STACK_MIN configMINIMAL_STACK_SIZE * sizeof( StackType_t ) /**< Minimum size in bytes of thread stack storage. */ +#endif +#ifndef NAME_MAX + #define NAME_MAX 64 /**< Maximum number of bytes in a filename (not including terminating null). */ +#endif +#ifndef SEM_VALUE_MAX + #define SEM_VALUE_MAX 0xFFFFU /**< Maximum value of a sem_t. */ +#endif +/**@} */ + +/** + * @defgroup Enable typedefs of POSIX types. + * + * Set these values to 1 or 0 to enable or disable the typedefs, respectively. + * These typedefs should only be disabled if they conflict with system typedefs. + */ +/**@{ */ +#ifndef posixconfigENABLE_CLOCK_T + #define posixconfigENABLE_CLOCK_T 1 /**< clock_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_CLOCKID_T + #define posixconfigENABLE_CLOCKID_T 1 /**< clockid_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_MODE_T + #define posixconfigENABLE_MODE_T 1 /**< mode_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_PID_T + #define posixconfigENABLE_PID_T 1 /**< pid_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_PTHREAD_ATTR_T + #define posixconfigENABLE_PTHREAD_ATTR_T 1 /**< pthread_attr_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_PTHREAD_COND_T + #define posixconfigENABLE_PTHREAD_COND_T 1 /**< pthread_cond_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_PTHREAD_CONDATTR_T + #define posixconfigENABLE_PTHREAD_CONDATTR_T 1 /**< pthread_condattr_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_PTHREAD_MUTEX_T + #define posixconfigENABLE_PTHREAD_MUTEX_T 1 /**< pthread_mutex_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_PTHREAD_MUTEXATTR_T + #define posixconfigENABLE_PTHREAD_MUTEXATTR_T 1 /**< pthread_mutexattr_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_PTHREAD_T + #define posixconfigENABLE_PTHREAD_T 1 /**< pthread_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_SSIZE_T + #define posixconfigENABLE_SSIZE_T 1 /**< ssize_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_TIME_T + #define posixconfigENABLE_TIME_T 1 /**< time_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_TIMER_T + #define posixconfigENABLE_TIMER_T 1 /**< timer_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_USECONDS_T + #define posixconfigENABLE_USECONDS_T 1 /**< useconds_t in sys/types.h */ +#endif +#ifndef posixconfigENABLE_TIMESPEC + #define posixconfigENABLE_TIMESPEC 1 /**< struct timespec in time.h */ +#endif +#ifndef posixconfigENABLE_ITIMERSPEC + #define posixconfigENABLE_ITIMERSPEC 1 /**< struct itimerspec in time.h */ +#endif +#ifndef posixconfigENABLE_TM + #define posixconfigENABLE_TM 1 /**< struct tm in time.h */ +#endif +/**@} */ + +#endif /* ifndef _FREERTOS_POSIX_PORTABLE_DEFAULT_H_ */ diff --git a/components/rt/sbom.yml b/components/rt/sbom.yml new file mode 100644 index 00000000000..4fc6e88bb85 --- /dev/null +++ b/components/rt/sbom.yml @@ -0,0 +1,5 @@ +name: 'FreeRTOS-Plus-POSIX' +version: '1.0.0' +supplier: 'Organization: Espressif Systems (Shanghai) CO LTD' +originator: 'Organization: Amazon Web Services' +description: Portable Operating System Interface for FreeRTOS diff --git a/components/rt/test_apps/posix_rt_test/.build-test-rules.yml b/components/rt/test_apps/posix_rt_test/.build-test-rules.yml new file mode 100644 index 00000000000..102749b1988 --- /dev/null +++ b/components/rt/test_apps/posix_rt_test/.build-test-rules.yml @@ -0,0 +1,9 @@ +# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps + +components/rt/test_apps/posix_rt_test: + enable: + - if: IDF_TARGET in ["esp32", "esp32s2", "esp32c3", "esp32p4"] + reason: covers all major arch types, xtensa vs riscv, single vs dual-core + depends_components: + - rt + - freertos diff --git a/components/rt/test_apps/posix_rt_test/CMakeLists.txt b/components/rt/test_apps/posix_rt_test/CMakeLists.txt new file mode 100644 index 00000000000..99869dce0ae --- /dev/null +++ b/components/rt/test_apps/posix_rt_test/CMakeLists.txt @@ -0,0 +1,7 @@ +# The following five lines of boilerplate have to be in your project's +# CMakeLists in this exact order for cmake to work correctly +cmake_minimum_required(VERSION 3.16) + +include($ENV{IDF_PATH}/tools/cmake/project.cmake) +set(COMPONENTS main) +project(posix_test) diff --git a/components/rt/test_apps/posix_rt_test/README.md b/components/rt/test_apps/posix_rt_test/README.md new file mode 100644 index 00000000000..487019d7244 --- /dev/null +++ b/components/rt/test_apps/posix_rt_test/README.md @@ -0,0 +1,2 @@ +| Supported Targets | ESP32 | ESP32-C3 | ESP32-P4 | ESP32-S2 | +| ----------------- | ----- | -------- | -------- | -------- | diff --git a/components/rt/test_apps/posix_rt_test/main/CMakeLists.txt b/components/rt/test_apps/posix_rt_test/main/CMakeLists.txt new file mode 100644 index 00000000000..acc04d35e58 --- /dev/null +++ b/components/rt/test_apps/posix_rt_test/main/CMakeLists.txt @@ -0,0 +1,4 @@ +idf_component_register(SRCS "main.c" "mqueue_test.cpp" + INCLUDE_DIRS "." + PRIV_REQUIRES rt unity + WHOLE_ARCHIVE) diff --git a/components/rt/test_apps/posix_rt_test/main/main.c b/components/rt/test_apps/posix_rt_test/main/main.c new file mode 100644 index 00000000000..88bb7130651 --- /dev/null +++ b/components/rt/test_apps/posix_rt_test/main/main.c @@ -0,0 +1,36 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Unlicense OR CC0-1.0 + */ + +#include +#include +#include "unity.h" +#include "unity_test_runner.h" +#include "unity_test_utils_memory.h" +#include "esp_log.h" + +static const char *TAG = "Linux_sim"; + +void setUp(void) +{ + unity_utils_set_leak_level(0); + unity_utils_record_free_mem(); +} + +void tearDown(void) +{ + unity_utils_evaluate_leaks(); +} + +void app_main(void) +{ + // The following code avoids memory leaks from initializing libc structures in clock_gettime() calls. + struct timespec tp; + clock_gettime(CLOCK_REALTIME, &tp); + (void) tp; + + ESP_LOGI(TAG, "Running FreeRTOS Linux test app"); + unity_run_menu(); +} diff --git a/components/rt/test_apps/posix_rt_test/main/mqueue_test.cpp b/components/rt/test_apps/posix_rt_test/main/mqueue_test.cpp new file mode 100644 index 00000000000..a9876d78f77 --- /dev/null +++ b/components/rt/test_apps/posix_rt_test/main/mqueue_test.cpp @@ -0,0 +1,288 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Unlicense OR CC0-1.0 + */ + +#include +#include +#include +#include +#include "unity.h" +#include "mqueue.h" + +// Note: implementation does not support mode argument +// Note: implementation does not support message priorities (msg_prio arguments) + +struct MessageQueueFixture { + MessageQueueFixture(const char *name = "/test_queue", + long int maxmsg = 10, + long int msgsize = sizeof(int), + int oflag = O_CREAT | O_WRONLY) + : name(name) { + struct mq_attr conf = { + .mq_flags = 0, // ignored by mq_open + .mq_maxmsg = maxmsg, + .mq_msgsize = msgsize, + .mq_curmsgs = 0 // ignored by mq_open + }; + mq = mq_open(name, oflag, S_IRUSR, &conf); + TEST_ASSERT_NOT_EQUAL((mqd_t) -1, mq); + } + ~MessageQueueFixture() { + TEST_ASSERT_EQUAL(0, mq_close(mq)); + TEST_ASSERT_EQUAL(0, mq_unlink(name)); + } + const char *name; + mqd_t mq; +}; + +TEST_CASE("open with invalid message queue name fails", "[mqueue]") +{ + struct mq_attr conf = { + .mq_flags = 0, // ignored by mq_open + .mq_maxmsg = 10, + .mq_msgsize = sizeof(int), + .mq_curmsgs = 0 // ignored by mq_open + }; + +// 255 + 2 characters, excl. '\0' +#define TOO_LONG_NAME "/aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" \ + "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" \ + "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" \ + "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa" \ + + TEST_ASSERT_EQUAL((mqd_t) -1, mq_open("", O_CREAT | O_WRONLY, S_IRUSR | S_IWUSR , &conf)); + TEST_ASSERT_EQUAL(EINVAL, errno); + TEST_ASSERT_EQUAL((mqd_t) -1, mq_open("my_queue", O_CREAT | O_WRONLY, S_IRUSR | S_IWUSR , &conf)); + TEST_ASSERT_EQUAL(EINVAL, errno); + TEST_ASSERT_EQUAL((mqd_t) -1, mq_open(TOO_LONG_NAME, O_CREAT | O_WRONLY, S_IRUSR | S_IWUSR , &conf)); + TEST_ASSERT_EQUAL(EINVAL, errno); +} + +TEST_CASE("name / is valid", "[mqueue]") +{ + mqd_t mq = mq_open("/", O_CREAT | O_WRONLY, S_IRUSR, NULL); + + TEST_ASSERT_NOT_EQUAL((mqd_t) -1, mq); + + TEST_ASSERT_EQUAL(0, mq_close(mq)); + TEST_ASSERT_EQUAL(0, mq_unlink("/")); +} + +TEST_CASE("open without create flag fails", "[mqueue]") +{ + TEST_ASSERT_EQUAL((mqd_t) -1, mq_open("/my_queue", O_WRONLY)); + TEST_ASSERT_EQUAL(ENOENT, errno); +} + +TEST_CASE("open mq_maxmsg <= 0", "[mqueue]") +{ + struct mq_attr conf = { + .mq_flags = 0, // ignored by mq_open + .mq_maxmsg = 0, + .mq_msgsize = sizeof(int), + .mq_curmsgs = 0 // ignored by mq_open + }; + + TEST_ASSERT_EQUAL((mqd_t) -1, mq_open("/my_queue", O_CREAT | O_WRONLY, S_IRUSR | S_IWUSR , &conf)); + TEST_ASSERT_EQUAL(EINVAL, errno); + + conf.mq_maxmsg = -1; + + TEST_ASSERT_EQUAL((mqd_t) -1, mq_open("/my_queue", O_CREAT | O_WRONLY, S_IRUSR | S_IWUSR , &conf)); + TEST_ASSERT_EQUAL(EINVAL, errno); +} + +TEST_CASE("open mq_msgsize <= 0", "[mqueue]") +{ + struct mq_attr conf = { + .mq_flags = 0, // ignored by mq_open + .mq_maxmsg = 10, + .mq_msgsize = 0, + .mq_curmsgs = 0 // ignored by mq_open + }; + + TEST_ASSERT_EQUAL((mqd_t) -1, mq_open("/my_queue", O_CREAT | O_WRONLY, S_IRUSR | S_IWUSR , &conf)); + TEST_ASSERT_EQUAL(EINVAL, errno); + + conf.mq_msgsize = -1; + + TEST_ASSERT_EQUAL((mqd_t) -1, mq_open("/my_queue", O_CREAT | O_WRONLY, S_IRUSR | S_IWUSR , &conf)); + TEST_ASSERT_EQUAL(EINVAL, errno); +} + +TEST_CASE("creating already existing message queue fails", "[mqueue]") +{ + MessageQueueFixture mq_fix; + + TEST_ASSERT_EQUAL((mqd_t) -1, mq_open(mq_fix.name, O_CREAT | O_WRONLY | O_EXCL, S_IRUSR | S_IWUSR , NULL)); + TEST_ASSERT_EQUAL(EEXIST, errno); +} + +TEST_CASE("open with default flags", "[mqueue]") +{ + mqd_t mq = mq_open("/my_queue", O_CREAT | O_WRONLY, S_IRUSR, NULL); + TEST_ASSERT_NOT_EQUAL((mqd_t) -1, mq); + + struct mq_attr default_conf; + TEST_ASSERT_EQUAL(0, mq_getattr(mq, &default_conf)); + TEST_ASSERT_EQUAL(10, default_conf.mq_maxmsg); + TEST_ASSERT_EQUAL(128, default_conf.mq_msgsize); + + TEST_ASSERT_EQUAL(0, mq_close(mq)); + TEST_ASSERT_EQUAL(0, mq_unlink("/my_queue")); +} + +TEST_CASE("open propagates attributes correctly", "[mqueue]") +{ + MessageQueueFixture mq_fix("/test", 4, 8); + + struct mq_attr conf; + TEST_ASSERT_EQUAL(0, mq_getattr(mq_fix.mq, &conf)); + TEST_ASSERT_EQUAL(4, conf.mq_maxmsg); + TEST_ASSERT_EQUAL(8, conf.mq_msgsize); +} + +TEST_CASE("message queue does not exceed queue size", "[mqueue]") +{ + MessageQueueFixture mq_fix("/test", 1, sizeof(int)); + int to_send = 47; + TEST_ASSERT_EQUAL(0, mq_send(mq_fix.mq, (const char*) &to_send, sizeof(to_send), 0)); + int to_send_2 = 48; + int received = 0; + + const struct timespec zero_time = {0, 0}; + TEST_ASSERT_EQUAL(-1, mq_timedsend(mq_fix.mq, (const char*) &to_send_2, sizeof(to_send_2), 0, &zero_time)); + TEST_ASSERT_EQUAL(ETIMEDOUT, errno); + + TEST_ASSERT_EQUAL(4, mq_receive(mq_fix.mq, (char*) &received, sizeof(received), nullptr)); + TEST_ASSERT_EQUAL(47, received); +} + +TEST_CASE("sending on invalid mq descriptor fails", "[mqueue]") +{ + int to_send = 47; + TEST_ASSERT_EQUAL(-1, mq_send(nullptr, (char*) &to_send, sizeof(to_send), 0)); + TEST_ASSERT_EQUAL(EBADF, errno); +} + +TEST_CASE("sending with invalid timeout fails", "[mqueue]") +{ + MessageQueueFixture mq_fix("/test", 1, sizeof(int)); + int to_send = 47; + struct timespec invalid_time = {0, 1'000'000'000}; + TEST_ASSERT_EQUAL(-1, mq_timedsend(mq_fix.mq, (char*) &to_send, sizeof(to_send), 0, &invalid_time)); + TEST_ASSERT_EQUAL(EINVAL, errno); + invalid_time.tv_nsec = -1; + TEST_ASSERT_EQUAL(-1, mq_timedsend(mq_fix.mq, (char*) &to_send, sizeof(to_send), 0, &invalid_time)); + TEST_ASSERT_EQUAL(EINVAL, errno); +} + +TEST_CASE("sending with invalid message size fails", "[mqueue]") +{ + MessageQueueFixture mq_fix("/test", 1, sizeof(int)); + int to_send = 47; + TEST_ASSERT_EQUAL(-1, mq_send(mq_fix.mq, (char*) &to_send, sizeof(to_send) + 1, 0)); + TEST_ASSERT_EQUAL(EMSGSIZE, errno); +} + +TEST_CASE("sending does not exceed queue size", "[mqueue]") +{ + MessageQueueFixture mq_fix("/test", 1, sizeof(int)); + int to_send = 47; + TEST_ASSERT_EQUAL(0, mq_send(mq_fix.mq, (const char*) &to_send, sizeof(to_send), 0)); + int to_send_2 = 48; + int received = 0; + + const struct timespec zero_time = {0, 0}; + TEST_ASSERT_EQUAL(-1, mq_timedsend(mq_fix.mq, (const char*) &to_send_2, sizeof(to_send_2), 0, &zero_time)); + TEST_ASSERT_EQUAL(ETIMEDOUT, errno); + + TEST_ASSERT_EQUAL(4, mq_receive(mq_fix.mq, (char*) &received, sizeof(received), nullptr)); + TEST_ASSERT_EQUAL(47, received); +} + +TEST_CASE("nonblocking send works", "[mqueue]") +{ + MessageQueueFixture mq_fix("/test", 1, sizeof(int), O_CREAT | O_WRONLY | O_NONBLOCK); + int to_send = 47; + int received = 0; + TEST_ASSERT_EQUAL(0, mq_send(mq_fix.mq, (char*) &to_send, sizeof(to_send), 0)); + int to_send_2 = 48; + const struct timespec zero_time = {0, 0}; + + TEST_ASSERT_EQUAL(-1, mq_timedsend(mq_fix.mq, (char*) &to_send_2, sizeof(to_send_2), 0, &zero_time)); + TEST_ASSERT_EQUAL(EAGAIN, errno); + TEST_ASSERT_EQUAL(-1, mq_send(mq_fix.mq, (char*) &to_send_2, sizeof(to_send_2), 0)); + TEST_ASSERT_EQUAL(EAGAIN, errno); + + TEST_ASSERT_EQUAL(4, mq_receive(mq_fix.mq, (char*) &received, sizeof(received), nullptr)); + TEST_ASSERT_EQUAL(47, received); +} + +TEST_CASE("receiving on invalid mq descriptor fails", "[mqueue]") +{ + int received; + TEST_ASSERT_EQUAL(-1, mq_receive(nullptr, (char*) &received, sizeof(received), nullptr)); + TEST_ASSERT_EQUAL(EBADF, errno); +} + +TEST_CASE("receiving with invalid timeout fails", "[mqueue]") +{ + MessageQueueFixture mq_fix("/test", 1, sizeof(int)); + int received; + struct timespec invalid_time = {0, 1'000'000'000}; + TEST_ASSERT_EQUAL(-1, mq_timedreceive(mq_fix.mq, (char*) &received, sizeof(received), 0, &invalid_time)); + TEST_ASSERT_EQUAL(EINVAL, errno); + invalid_time.tv_nsec = -1; + TEST_ASSERT_EQUAL(-1, mq_timedreceive(mq_fix.mq, (char*) &received, sizeof(received), 0, &invalid_time)); + TEST_ASSERT_EQUAL(EINVAL, errno); +} + +TEST_CASE("receiving with invalid message size fails", "[mqueue]") +{ + MessageQueueFixture mq_fix("/test", 1, sizeof(int)); + int received; + TEST_ASSERT_EQUAL(-1, mq_send(mq_fix.mq, (char*) &received, sizeof(received) + 1, 0)); + TEST_ASSERT_EQUAL(EMSGSIZE, errno); +} + +TEST_CASE("receive on empty message queue times out", "[mqueue]") +{ + MessageQueueFixture mq_fix("/test", 1, sizeof(int)); + int received; + const struct timespec zero_time = {0, 0}; + + TEST_ASSERT_EQUAL(-1, mq_timedreceive(mq_fix.mq, (char*) &received, sizeof(received), 0, &zero_time)); + TEST_ASSERT_EQUAL(ETIMEDOUT, errno); +} + +TEST_CASE("nonblocking receive works", "[mqueue]") +{ + MessageQueueFixture mq_fix("/test", 1, sizeof(int), O_CREAT | O_WRONLY | O_NONBLOCK); + int received; + const struct timespec zero_time = {0, 0}; + + TEST_ASSERT_EQUAL(-1, mq_timedreceive(mq_fix.mq, (char*) &received, sizeof(received), 0, &zero_time)); + TEST_ASSERT_EQUAL(EAGAIN, errno); + TEST_ASSERT_EQUAL(-1, mq_receive(mq_fix.mq, (char*) &received, sizeof(received), nullptr)); + TEST_ASSERT_EQUAL(EAGAIN, errno); +} + +TEST_CASE("queue sends and receives multiple messages", "[mqueue]") +{ + MessageQueueFixture mq_fix("/test", 2, sizeof(int), O_CREAT | O_WRONLY | O_NONBLOCK); + int received; + int to_send = 47; + + TEST_ASSERT_EQUAL(0, mq_send(mq_fix.mq, (char*) &to_send, sizeof(to_send), 0)); + to_send = 48; + TEST_ASSERT_EQUAL(0, mq_send(mq_fix.mq, (char*) &to_send, sizeof(to_send), 0)); + + TEST_ASSERT_EQUAL(4, mq_receive(mq_fix.mq, (char*) &received, sizeof(received), nullptr)); + TEST_ASSERT_EQUAL(47, received); + TEST_ASSERT_EQUAL(4, mq_receive(mq_fix.mq, (char*) &received, sizeof(received), nullptr)); + TEST_ASSERT_EQUAL(48, received); + +} diff --git a/components/rt/test_apps/posix_rt_test/pytest_rt_mqueue_tests.py b/components/rt/test_apps/posix_rt_test/pytest_rt_mqueue_tests.py new file mode 100644 index 00000000000..f43f8abc22a --- /dev/null +++ b/components/rt/test_apps/posix_rt_test/pytest_rt_mqueue_tests.py @@ -0,0 +1,13 @@ +# SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: CC0-1.0 +import pytest +from pytest_embedded import Dut + + +@pytest.mark.generic +@pytest.mark.esp32 +@pytest.mark.esp32c3 +@pytest.mark.esp32p4 +@pytest.mark.esp32s2 +def test_rt_mqueue(dut: Dut) -> None: + dut.run_all_single_board_cases() diff --git a/components/rt/test_apps/posix_rt_test/sdkconfig.defaults b/components/rt/test_apps/posix_rt_test/sdkconfig.defaults new file mode 100644 index 00000000000..e510020a061 --- /dev/null +++ b/components/rt/test_apps/posix_rt_test/sdkconfig.defaults @@ -0,0 +1,2 @@ +# This "default" configuration is appended to all other configurations +CONFIG_ESP_TASK_WDT_INIT=n diff --git a/docs/en/api-reference/system/pthread.rst b/docs/en/api-reference/system/pthread.rst index 544fb1ff940..f6314ebbd86 100644 --- a/docs/en/api-reference/system/pthread.rst +++ b/docs/en/api-reference/system/pthread.rst @@ -1,5 +1,5 @@ -POSIX Threads Support -===================== +POSIX Support (Including POSIX Threads Support) +=============================================== :link_to_translation:`zh_CN:[中文]` @@ -12,7 +12,11 @@ POSIX Threads are implemented in ESP-IDF as wrappers around equivalent FreeRTOS Pthreads can be used in ESP-IDF by including standard ``pthread.h`` header, which is included in the toolchain libc. An additional ESP-IDF specific header, ``esp_pthread.h``, provides additional non-POSIX APIs for using some ESP-IDF features with pthreads. -C++ Standard Library implementations for ``std::thread``, ``std::mutex``, ``std::condition_variable``, etc., are realized using pthreads (via GCC libstdc++). Therefore, restrictions mentioned here also apply to the equivalent C++ standard library functionality. +Besides POSIX Threads, ESP-IDF also supports :ref:`POSIX message queues `. + +C++ Standard Library implementations for ``std::thread``, ``std::mutex``, ``std::condition_variable``, etc., are realized using pthreads and other POSIX APIs (via GCC libstdc++). Therefore, restrictions mentioned here also apply to the equivalent C++ standard library functionality. + +If you identify a useful API that you would like to see implemented in ESP-IDF, please open a `feature request on GitHub `_ with the details. RTOS Integration ---------------- @@ -23,6 +27,10 @@ Unlike many operating systems using POSIX Threads, ESP-IDF is a real-time operat When calling a standard libc or C++ sleep function, such as ``usleep`` defined in ``unistd.h``, the task will only block and yield the core if the sleep time is longer than :ref:`one FreeRTOS tick period `. If the time is shorter, the thread will busy-wait instead of yielding to another RTOS task. +.. note:: + + The POSIX ``errno`` is provided by newlib in ESP-IDF. Thus the configuration ``configUSE_POSIX_ERRNO`` is not used and should stay disabled. + By default, all POSIX Threads have the same RTOS priority, but it is possible to change this by calling a :ref:`custom API `. Standard Features @@ -169,6 +177,53 @@ Thread-Specific Data There are other options for thread local storage in ESP-IDF, including options with higher performance. See :doc:`/api-guides/thread-local-storage`. +.. _posix_message_queues: + +Message Queues +^^^^^^^^^^^^^^ + +The message queue implementation is based on the `FreeRTOS-Plus-POSIX `_ project. Message queues are not made available in any filesystem on ESP-IDF. Message priorities are not supported. +The following API functions of the POSIX message queue specification are implemented: + +* `mq_open() `_ + + - The ``name`` argument has, besides the POSIX specification, the following additional restrictions: + - It has to begin with a leading slash. + - It has to be no more than 255 + 2 characters long (including the leading slash, excluding the terminating null byte). However, memory for ``name`` is dynamically allocated internally, so the shorter it is, the fewer memory it will consume. + - The ``mode`` argument is not implemented and is ignored. + - Supported ``oflags``: ``O_RDWR``, ``O_CREAT``, ``O_EXCL``, and ``O_NONBLOCK`` + +* `mq_close() `_ +* `mq_unlink() `_ +* `mq_receive() `_ + + - Since message priorities are not supported, ``msg_prio`` is unused. + +* `mq_timedreceive() `_ + + - Since message priorities are not supported, ``msg_prio`` is unused. + +* `mq_send() `_ + + - Since message priorities are not supported, ``msg_prio`` has no effect. + +* `mq_timedsend() `_ + + - Since message priorities are not supported, ``msg_prio`` has no effect. + +* `mq_getattr() `_ + +`mq_notify() `_ and `mq_setattr() `_ are not implemented. + +Building +........ + +To use the POSIX message queue API, please add ``rt`` as a requirement in your component's ``CMakeLists.txt`` + +.. note:: + + If you have used `FreeRTOS-Plus-POSIX `_ in another FreeRTOS project before, please note that the include paths in IDF are POSIX-like. Hence, applications include ``mqueue.h`` directly instead of using the subdirectory include ``FreeRTOS_POSIX/mqueue.h``. + Not Implemented --------------- @@ -176,8 +231,10 @@ The ``pthread.h`` header is a standard header and includes additional APIs and f * ``pthread_cancel()`` returns ``ENOSYS`` if called. * ``pthread_condattr_init()`` returns ``ENOSYS`` if called. +* `mq_notify() `_ returns ``ENOSYS`` if called. +* `mq_setattr() `_ returns ``ENOSYS`` if called. -Other POSIX Threads functions (not listed here) are not implemented and will produce either a compiler or a linker error if referenced from an ESP-IDF application. If you identify a useful API that you would like to see implemented in ESP-IDF, please open a `feature request on GitHub `_ with the details. +Other POSIX Threads functions (not listed here) are not implemented and will produce either a compiler or a linker error if referenced from an ESP-IDF application. .. _esp-pthread: diff --git a/examples/system/.build-test-rules.yml b/examples/system/.build-test-rules.yml index 25030dccbfa..4c7dfc8f392 100644 --- a/examples/system/.build-test-rules.yml +++ b/examples/system/.build-test-rules.yml @@ -236,6 +236,13 @@ examples/system/pthread: depends_components: - pthread +examples/system/rt_mqueue: + disable_test: + - if: IDF_TARGET != "esp32" and (NIGHTLY_RUN != "1" or IDF_TARGET == "linux") + reason: no target specific functionality, testing on a single target is sufficient + depends_components: + - rt + examples/system/select: disable: - if: IDF_TARGET != "esp32c3" and (NIGHTLY_RUN != "1" or IDF_TARGET == "linux") diff --git a/examples/system/rt_mqueue/CMakeLists.txt b/examples/system/rt_mqueue/CMakeLists.txt new file mode 100644 index 00000000000..f02d51120a2 --- /dev/null +++ b/examples/system/rt_mqueue/CMakeLists.txt @@ -0,0 +1,8 @@ +# For more information about build system see +# https://docs.espressif.com/projects/esp-idf/en/latest/api-guides/build-system.html +# The following five lines of boilerplate have to be in your project's +# CMakeLists in this exact order for cmake to work correctly +cmake_minimum_required(VERSION 3.16) + +include($ENV{IDF_PATH}/tools/cmake/project.cmake) +project(posix_mqueue) diff --git a/examples/system/rt_mqueue/README.md b/examples/system/rt_mqueue/README.md new file mode 100644 index 00000000000..f5400e96742 --- /dev/null +++ b/examples/system/rt_mqueue/README.md @@ -0,0 +1,37 @@ +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | + +# POSIX Message Queue Example + +A simple example using a POSIX message queue. Two tasks are reading from and writing to a POSIX message queue. + +## How to use example + +### Hardware Required + +This example should be able to run on any supported Espressif SoC development board. + +### Build and Flash + +Enter `idf.py -p PORT flash monitor` to build, flash and monitor the project. + +(To exit the serial monitor, type ``Ctrl-]``.) + +See the [Getting Started Guide](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/index.html) for full steps to configure and use ESP-IDF to build projects. + + +## Example Output + +If you see the following infinite console output, your example should be running correctly: + +``` +sending: 0 +received: 0 +sending: 1 +received: 1 +sending: 2 +received: 2 +sending: 3 +received: 3 +... +``` diff --git a/examples/system/rt_mqueue/main/CMakeLists.txt b/examples/system/rt_mqueue/main/CMakeLists.txt new file mode 100644 index 00000000000..fb0d84fa9c8 --- /dev/null +++ b/examples/system/rt_mqueue/main/CMakeLists.txt @@ -0,0 +1,3 @@ +idf_component_register(SRCS "posix_mqueue_example_main.c" + INCLUDE_DIRS "." + PRIV_REQUIRES rt) diff --git a/examples/system/rt_mqueue/main/posix_mqueue_example_main.c b/examples/system/rt_mqueue/main/posix_mqueue_example_main.c new file mode 100644 index 00000000000..235fbc48e48 --- /dev/null +++ b/examples/system/rt_mqueue/main/posix_mqueue_example_main.c @@ -0,0 +1,101 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Unlicense OR CC0-1.0 + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static int s_counter = 0; + +const unsigned int MSG_PRIO = 0; + +static void *sender_function(void * arg) +{ + mqd_t *write_descr = (mqd_t*) arg; + + while (true) { + printf("sending: %d\n", s_counter); + int result = mq_send(*write_descr, (const char*) &s_counter, sizeof(s_counter), MSG_PRIO); + if (result != 0) { + perror("Sending failed"); + abort(); + } + + s_counter++; + sleep(1); + } + + return NULL; +} + +static void *receiver_function(void * arg) +{ + mqd_t *read_descr = (mqd_t*) arg; + + while (true) { + int msg; + int result = mq_receive(*read_descr, (char*) &msg, sizeof(msg), NULL); + if (result == -1) { + perror("Sending failed"); + abort(); + } + + printf("received: %d\n", msg); + } + + return NULL; +} + +void app_main(void) +{ + mqd_t write_descr; + mqd_t read_descr; + pthread_t sender; + pthread_t receiver; + + struct mq_attr configuration = { + .mq_flags = 0, // ignored by mq_open + .mq_maxmsg = 10, + .mq_msgsize = sizeof(int), + .mq_curmsgs = 0 // ignored by mq_open + }; + + write_descr = mq_open("/my_queue", O_CREAT | O_WRONLY, S_IRUSR | S_IWUSR , &configuration); + if (write_descr == (mqd_t) -1) { + perror("Creating message queue failed"); + abort(); + } + + read_descr = mq_open("/my_queue", O_RDONLY); + if (read_descr == (mqd_t) -1) { + perror("Opening message queue for reading failed"); + abort(); + } + + int result; + result = pthread_create(&sender, NULL, sender_function, &write_descr); + if (result != 0) { + printf("Creating sender thread failed: %s", strerror(errno)); + abort(); + } + + result = pthread_create(&receiver, NULL, receiver_function, &read_descr); + if (result != 0) { + printf("Creating receiver thread failed: %s", strerror(errno)); + abort(); + } + + while (true) { + sleep(1000); + } +} diff --git a/examples/system/rt_mqueue/pytest_rt_mqueue.py b/examples/system/rt_mqueue/pytest_rt_mqueue.py new file mode 100644 index 00000000000..893553de854 --- /dev/null +++ b/examples/system/rt_mqueue/pytest_rt_mqueue.py @@ -0,0 +1,13 @@ +# SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: CC0-1.0 +import pytest +from pytest_embedded import Dut + + +@pytest.mark.supported_targets +@pytest.mark.generic +def test_rt_mqueue_example(dut: Dut) -> None: + dut.expect_exact('sending: 0') + dut.expect_exact('received: 0') + dut.expect_exact('sending: 1') + dut.expect_exact('received: 1') diff --git a/tools/ci/astyle-rules.yml b/tools/ci/astyle-rules.yml index e7b761b8b9c..e74f913eb54 100644 --- a/tools/ci/astyle-rules.yml +++ b/tools/ci/astyle-rules.yml @@ -152,6 +152,8 @@ components_not_formatted_permanent: - "/components/app_trace/sys_view/Config/" - "/components/app_trace/sys_view/Sample/" - "/components/app_trace/sys_view/SEGGER/" + # FreeRTOS-Plux-POSIX files (upstream source code) + - "/components/rt/" # SoC header files (generated) - "/components/soc/*/include/soc/" # Example resource files (generated) diff --git a/tools/ci/check_copyright_config.yaml b/tools/ci/check_copyright_config.yaml index 9850f85dd9c..aadfcc5d55e 100644 --- a/tools/ci/check_copyright_config.yaml +++ b/tools/ci/check_copyright_config.yaml @@ -111,6 +111,22 @@ linux_component: - Apache-2.0 - BSD-4-Clause-UC +rt_component: + include: + - 'components/rt/**' + allowed_licenses: + - Apache-2.0 + - MIT #FreeRTOS-Plux-POSIX sources and port files + +rt_component_tests: + include: + - 'components/rt/test_apps/**' + allowed_licenses: + - Apache-2.0 + - Unlicense + - CC0-1.0 + license_for_new_files: Unlicense OR CC0-1.0 + systemview: include: - 'components/app_trace/sys_view' From 3df1e43d09119770108edc83994fc92a0b7fe246 Mon Sep 17 00:00:00 2001 From: Wei Yu Han Date: Fri, 12 Jul 2024 08:01:40 +0800 Subject: [PATCH 022/113] docs(ble): Removed a trailing whitespace --- components/bt/include/esp32/include/esp_bt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/bt/include/esp32/include/esp_bt.h b/components/bt/include/esp32/include/esp_bt.h index b0779ce8838..5d32f2adc38 100644 --- a/components/bt/include/esp32/include/esp_bt.h +++ b/components/bt/include/esp32/include/esp_bt.h @@ -272,7 +272,7 @@ typedef enum { /** * @brief BLE TX power type * @note - * 1. The connection TX power can only be set after the connection is established. + * 1. The connection TX power can only be set after the connection is established. * After disconnecting, the corresponding TX power will not be affected. * 2. `ESP_BLE_PWR_TYPE_DEFAULT` can be used to set the TX power for power types that have not been set before. * It will not affect the TX power values which have been set for the ADV/SCAN/CONN0-8 power types. From ae3f27bafdce5711967d1ace759d6bc22d52d469 Mon Sep 17 00:00:00 2001 From: Wei Yu Han Date: Fri, 12 Jul 2024 08:22:16 +0800 Subject: [PATCH 023/113] docs(ble): Removed the index of the note for esp_ble_power_type_set/get --- components/bt/include/esp32/include/esp_bt.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/components/bt/include/esp32/include/esp_bt.h b/components/bt/include/esp32/include/esp_bt.h index 5d32f2adc38..eb7b16cb259 100644 --- a/components/bt/include/esp32/include/esp_bt.h +++ b/components/bt/include/esp32/include/esp_bt.h @@ -327,8 +327,7 @@ typedef enum { /** * @brief Set BLE TX power * - * @note - * 1. Connection TX power should only be set after the connection is established. + * @note Connection TX power should only be set after the connection is established. * * @param[in] power_type The type of TX power. It could be Advertising, Connection, Default, etc. * @param[in] power_level Power level (index) corresponding to the absolute value (dBm) @@ -342,8 +341,7 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_ /** * @brief Get BLE TX power * - * @note - * 1. Connection TX power should only be retrieved after the connection is established. + * @note Connection TX power should only be retrieved after the connection is established. * * @param[in] power_type The type of TX power. It could be Advertising/Connection/Default and etc. * From 863344f7695402b2c3e45df56fd98a932b8e81d8 Mon Sep 17 00:00:00 2001 From: morris Date: Mon, 8 Jul 2024 18:55:00 +0800 Subject: [PATCH 024/113] feat(etm): support etm driver on esp32c5 --- .../analog_comparator/main/CMakeLists.txt | 7 +- .../main/test_ana_cmpr_etm.c | 0 .../gpio_extensions/main/CMakeLists.txt | 4 + .../gpio_extensions}/main/test_gpio_etm.c | 4 +- .../test_apps/gptimer/main/CMakeLists.txt | 6 +- .../gptimer}/main/test_gptimer_etm.c | 23 +- .../test_apps/.build-test-rules.yml | 14 - .../esp_hw_support_unity_tests/CMakeLists.txt | 5 + .../main/CMakeLists.txt | 4 + .../main/test_etm_core.c | 0 .../test_apps/etm/CMakeLists.txt | 15 - .../esp_hw_support/test_apps/etm/README.md | 2 - .../test_apps/etm/main/CMakeLists.txt | 26 - .../test_apps/etm/main/test_app_main.c | 60 -- .../test_apps/etm/pytest_etm.py | 19 - .../test_apps/etm/sdkconfig.ci.release | 5 - .../test_apps/etm/sdkconfig.defaults | 2 - .../esp32c5/ld/esp32c5.rom.systimer.ld | 5 +- .../main/CMakeLists.txt | 4 + .../main/test_systick_etm.c | 63 ++ .../esp_timer/test_apps/main/CMakeLists.txt | 14 +- .../test_apps/main/test_esp_timer_etm.c} | 50 +- .../main/test_esp_timer_light_sleep.c | 4 - components/hal/esp32c5/include/hal/etm_ll.h | 117 ++++ .../hal/esp32c5/include/hal/gpio_etm_ll.h | 136 ++++ components/hal/esp32c5/include/hal/timer_ll.h | 44 +- .../esp32c5/include/soc/Kconfig.soc_caps.in | 36 + .../soc/esp32c5/include/soc/gpio_ext_struct.h | 649 +----------------- components/soc/esp32c5/include/soc/soc_caps.h | 18 +- .../soc/esp32c5/include/soc/soc_etm_struct.h | 106 +-- .../soc/esp32c5/ld/esp32c5.peripherals.ld | 1 + docs/docs_not_updated/esp32c5.txt | 1 - .../gptimer_capture_hc_sr04/README.md | 4 +- .../pytest_gptimer_capture_example.py | 2 +- 34 files changed, 465 insertions(+), 985 deletions(-) rename components/{esp_hw_support/test_apps/etm => esp_driver_ana_cmpr/test_apps/analog_comparator}/main/test_ana_cmpr_etm.c (100%) rename components/{esp_hw_support/test_apps/etm => esp_driver_gpio/test_apps/gpio_extensions}/main/test_gpio_etm.c (98%) rename components/{esp_hw_support/test_apps/etm => esp_driver_gptimer/test_apps/gptimer}/main/test_gptimer_etm.c (96%) rename components/esp_hw_support/test_apps/{etm => esp_hw_support_unity_tests}/main/test_etm_core.c (100%) delete mode 100644 components/esp_hw_support/test_apps/etm/CMakeLists.txt delete mode 100644 components/esp_hw_support/test_apps/etm/README.md delete mode 100644 components/esp_hw_support/test_apps/etm/main/CMakeLists.txt delete mode 100644 components/esp_hw_support/test_apps/etm/main/test_app_main.c delete mode 100644 components/esp_hw_support/test_apps/etm/pytest_etm.py delete mode 100644 components/esp_hw_support/test_apps/etm/sdkconfig.ci.release delete mode 100644 components/esp_hw_support/test_apps/etm/sdkconfig.defaults create mode 100644 components/esp_system/test_apps/esp_system_unity_tests/main/test_systick_etm.c rename components/{esp_hw_support/test_apps/etm/main/test_systimer_etm.c => esp_timer/test_apps/main/test_esp_timer_etm.c} (60%) create mode 100644 components/hal/esp32c5/include/hal/etm_ll.h create mode 100644 components/hal/esp32c5/include/hal/gpio_etm_ll.h diff --git a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/CMakeLists.txt b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/CMakeLists.txt index b4687d1c66e..e0307f04831 100644 --- a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/CMakeLists.txt +++ b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/CMakeLists.txt @@ -6,7 +6,12 @@ if(CONFIG_ANA_CMPR_ISR_IRAM_SAFE) list(APPEND srcs "test_ana_cmpr_iram.c") endif() +if(CONFIG_SOC_ANA_CMPR_SUPPORT_ETM AND CONFIG_SOC_TIMER_SUPPORT_ETM) + # Analog Comparator event test relies on GPTIMER task + list(APPEND srcs "test_ana_cmpr_etm.c") +endif() + idf_component_register(SRCS ${srcs} INCLUDE_DIRS "." - PRIV_REQUIRES unity esp_driver_gpio esp_driver_ana_cmpr + PRIV_REQUIRES unity esp_driver_gpio esp_driver_ana_cmpr esp_driver_gptimer WHOLE_ARCHIVE) diff --git a/components/esp_hw_support/test_apps/etm/main/test_ana_cmpr_etm.c b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr_etm.c similarity index 100% rename from components/esp_hw_support/test_apps/etm/main/test_ana_cmpr_etm.c rename to components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr_etm.c diff --git a/components/esp_driver_gpio/test_apps/gpio_extensions/main/CMakeLists.txt b/components/esp_driver_gpio/test_apps/gpio_extensions/main/CMakeLists.txt index 3b4bd6d6204..c61fee0bb56 100644 --- a/components/esp_driver_gpio/test_apps/gpio_extensions/main/CMakeLists.txt +++ b/components/esp_driver_gpio/test_apps/gpio_extensions/main/CMakeLists.txt @@ -12,6 +12,10 @@ if(CONFIG_SOC_GPIO_SUPPORT_PIN_HYS_FILTER) list(APPEND srcs "test_hysteresis.c") endif() +if(CONFIG_SOC_GPIO_SUPPORT_ETM) + list(APPEND srcs "test_gpio_etm.c") +endif() + # In order for the cases defined by `TEST_CASE` to be linked into the final elf, # the component can be registered as WHOLE_ARCHIVE idf_component_register(SRCS ${srcs} diff --git a/components/esp_hw_support/test_apps/etm/main/test_gpio_etm.c b/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_gpio_etm.c similarity index 98% rename from components/esp_hw_support/test_apps/etm/main/test_gpio_etm.c rename to components/esp_driver_gpio/test_apps/gpio_extensions/main/test_gpio_etm.c index cd2c0d1bcb6..9d13f09b367 100644 --- a/components/esp_hw_support/test_apps/etm/main/test_gpio_etm.c +++ b/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_gpio_etm.c @@ -94,10 +94,10 @@ TEST_CASE("gpio_etm_self_trigger", "[etm]") TEST_CASE("gpio_etm_self_trigger_multi_action", "[etm]") { // GPIO 0 pos edge event ---> GPIO 1 set level task - // GPIO 22 pos edge event ---> GPIO 1 clear level task + // GPIO 2 pos edge event ---> GPIO 1 clear level task const uint32_t input_gpio1 = 0; - const uint32_t input_gpio2 = 22; + const uint32_t input_gpio2 = 2; const uint32_t output_gpio = 1; printf("allocate etm channels\r\n"); esp_etm_channel_config_t etm_config = {}; diff --git a/components/esp_driver_gptimer/test_apps/gptimer/main/CMakeLists.txt b/components/esp_driver_gptimer/test_apps/gptimer/main/CMakeLists.txt index 39337b4ce69..3fb34ea479a 100644 --- a/components/esp_driver_gptimer/test_apps/gptimer/main/CMakeLists.txt +++ b/components/esp_driver_gptimer/test_apps/gptimer/main/CMakeLists.txt @@ -5,6 +5,10 @@ if(CONFIG_GPTIMER_ISR_IRAM_SAFE) list(APPEND srcs "test_gptimer_iram.c") endif() +if(CONFIG_SOC_TIMER_SUPPORT_ETM) + list(APPEND srcs "test_gptimer_etm.c") +endif() + if(CONFIG_SOC_LIGHT_SLEEP_SUPPORTED AND CONFIG_PM_ENABLE) list(APPEND srcs "test_gptimer_sleep.c") endif() @@ -12,5 +16,5 @@ endif() # In order for the cases defined by `TEST_CASE` to be linked into the final elf, # the component can be registered as WHOLE_ARCHIVE idf_component_register(SRCS ${srcs} - PRIV_REQUIRES unity esp_driver_gptimer + PRIV_REQUIRES unity esp_driver_gptimer esp_driver_gpio WHOLE_ARCHIVE) diff --git a/components/esp_hw_support/test_apps/etm/main/test_gptimer_etm.c b/components/esp_driver_gptimer/test_apps/gptimer/main/test_gptimer_etm.c similarity index 96% rename from components/esp_hw_support/test_apps/etm/main/test_gptimer_etm.c rename to components/esp_driver_gptimer/test_apps/gptimer/main/test_gptimer_etm.c index 536a6e18ad2..f9057f8d7ef 100644 --- a/components/esp_hw_support/test_apps/etm/main/test_gptimer_etm.c +++ b/components/esp_driver_gptimer/test_apps/gptimer/main/test_gptimer_etm.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -13,12 +13,19 @@ #include "driver/gpio_etm.h" #include "driver/gpio.h" +#if CONFIG_GPTIMER_ISR_IRAM_SAFE +#define TEST_ALARM_CALLBACK_ATTR IRAM_ATTR +#else +#define TEST_ALARM_CALLBACK_ATTR +#endif // CONFIG_GPTIMER_ISR_IRAM_SAFE + +TEST_ALARM_CALLBACK_ATTR static bool on_gptimer_alarm_cb(gptimer_handle_t timer, const gptimer_alarm_event_data_t *edata, void *user_ctx) { return false; } -TEST_CASE("gptimer_etm_alarm_event_with_interrupt_enabled", "[etm]") +TEST_CASE("gptimer_etm_alarm_event_with_interrupt_enabled", "[gptimer][etm]") { const uint32_t output_gpio = 1; // GPTimer alarm ---> ETM channel A ---> GPIO toggle @@ -100,11 +107,11 @@ TEST_CASE("gptimer_etm_alarm_event_with_interrupt_enabled", "[etm]") TEST_ESP_OK(esp_etm_del_channel(etm_channel_a)); } -TEST_CASE("gptimer_etm_alarm_event_without_interrupt", "[etm]") +TEST_CASE("gptimer_etm_alarm_event_without_interrupt", "[gptimer][etm]") { const uint32_t output_gpio = 1; // GPTimer alarm ---> ETM channel A ---> GPIO toggle - // GPTimer alarm ---> ETM channel B ---> GPTimer alarm reenable + // GPTimer alarm ---> ETM channel B ---> GPTimer alarm re-enable printf("allocate etm channel\r\n"); esp_etm_channel_config_t etm_config = {}; esp_etm_channel_handle_t etm_channel_a, etm_channel_b; @@ -188,11 +195,11 @@ TEST_CASE("gptimer_etm_alarm_event_without_interrupt", "[etm]") TEST_ESP_OK(esp_etm_del_channel(etm_channel_b)); } -TEST_CASE("gptimer_auto_reload_by_etm", "[etm]") +TEST_CASE("gptimer_auto_reload_by_etm", "[gptimer][etm]") { const uint32_t output_gpio = 1; // GPTimer alarm ---> ETM channel A ---> GPIO toggle - // GPTimer alarm ---> ETM channel B ---> GPTimer alarm reenable + // GPTimer alarm ---> ETM channel B ---> GPTimer alarm re-enable // GPTimer alarm ---> ETM channel C ---> GPTimer reload printf("allocate etm channel\r\n"); esp_etm_channel_config_t etm_config = {}; @@ -289,7 +296,7 @@ TEST_CASE("gptimer_auto_reload_by_etm", "[etm]") TEST_ESP_OK(esp_etm_del_channel(etm_channel_c)); } -TEST_CASE("gptimer_etm_task_capture", "[etm]") +TEST_CASE("gptimer_etm_task_capture", "[gptimer][etm]") { const uint32_t input_gpio = 0; // GPIO Posedge ---> ETM channel A ---> GPTimer capture @@ -366,7 +373,7 @@ TEST_CASE("gptimer_etm_task_capture", "[etm]") TEST_ESP_OK(esp_etm_del_channel(etm_channel_a)); } -TEST_CASE("gptimer_start_stop_by_etm_task", "[etm]") +TEST_CASE("gptimer_start_stop_by_etm_task", "[gptimer][etm]") { const uint32_t input_gpio = 0; // GPIO pos edge ---> ETM channel A ---> GPTimer start diff --git a/components/esp_hw_support/test_apps/.build-test-rules.yml b/components/esp_hw_support/test_apps/.build-test-rules.yml index b7e85dae37c..09fb7029314 100644 --- a/components/esp_hw_support/test_apps/.build-test-rules.yml +++ b/components/esp_hw_support/test_apps/.build-test-rules.yml @@ -14,20 +14,6 @@ components/esp_hw_support/test_apps/dma2d: depends_filepatterns: - components/esp_hw_support/dma/**/* -components/esp_hw_support/test_apps/esp_hw_support_unity_tests: - disable: - - if: SOC_GPSPI_SUPPORTED != 1 - -components/esp_hw_support/test_apps/etm: - disable: - - if: SOC_ETM_SUPPORTED != 1 - depends_components: - - esp_driver_gptimer - - esp_driver_gpio - - esp_driver_mcpwm - - esp_timer - - esp_driver_ana_cmpr - components/esp_hw_support/test_apps/host_test_linux: enable: - if: IDF_TARGET == "linux" diff --git a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/CMakeLists.txt b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/CMakeLists.txt index fb724b12bba..c6bda239bd0 100644 --- a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/CMakeLists.txt +++ b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/CMakeLists.txt @@ -8,3 +8,8 @@ list(PREPEND SDKCONFIG_DEFAULTS "$ENV{IDF_PATH}/tools/test_apps/configs/sdkconfi include($ENV{IDF_PATH}/tools/cmake/project.cmake) project(esp_hw_support_unity) + +message(STATUS "Checking etm registers are not read-write by half-word") +include($ENV{IDF_PATH}/tools/ci/check_register_rw_half_word.cmake) +check_register_rw_half_word(SOC_MODULES "*etm" "pcr" "hp_sys_clkrst" + HAL_MODULES "etm") diff --git a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/CMakeLists.txt b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/CMakeLists.txt index daa7c071a1c..26c3f712a80 100644 --- a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/CMakeLists.txt +++ b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/CMakeLists.txt @@ -17,6 +17,10 @@ if(CONFIG_SOC_GPIO_CLOCKOUT_BY_GPIO_MATRIX OR CONFIG_SOC_GPIO_CLOCKOUT_BY_IO_MUX list(APPEND srcs "test_esp_clock_output.c") endif() +if(CONFIG_SOC_ETM_SUPPORTED) + list(APPEND srcs "test_etm_core.c") +endif() + # In order for the cases defined by `TEST_CASE` to be linked into the final elf, # the component can be registered as WHOLE_ARCHIVE idf_component_register(SRCS ${srcs} diff --git a/components/esp_hw_support/test_apps/etm/main/test_etm_core.c b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_etm_core.c similarity index 100% rename from components/esp_hw_support/test_apps/etm/main/test_etm_core.c rename to components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/test_etm_core.c diff --git a/components/esp_hw_support/test_apps/etm/CMakeLists.txt b/components/esp_hw_support/test_apps/etm/CMakeLists.txt deleted file mode 100644 index 4505a9f1a0c..00000000000 --- a/components/esp_hw_support/test_apps/etm/CMakeLists.txt +++ /dev/null @@ -1,15 +0,0 @@ -# This is the project CMakeLists.txt file for the test subproject -cmake_minimum_required(VERSION 3.16) - -include($ENV{IDF_PATH}/tools/cmake/project.cmake) - -# "Trim" the build. Include the minimal set of components, main, and anything it depends on. We also depend on esp_pm -# as we set CONFIG_PM_... options. -set(COMPONENTS main esp_pm) - -project(etm_test) - -message(STATUS "Checking etm registers are not read-write by half-word") -include($ENV{IDF_PATH}/tools/ci/check_register_rw_half_word.cmake) -check_register_rw_half_word(SOC_MODULES "*etm" "pcr" "hp_sys_clkrst" - HAL_MODULES "etm") diff --git a/components/esp_hw_support/test_apps/etm/README.md b/components/esp_hw_support/test_apps/etm/README.md deleted file mode 100644 index 7b822bdb0ef..00000000000 --- a/components/esp_hw_support/test_apps/etm/README.md +++ /dev/null @@ -1,2 +0,0 @@ -| Supported Targets | ESP32-C6 | ESP32-H2 | ESP32-P4 | -| ----------------- | -------- | -------- | -------- | diff --git a/components/esp_hw_support/test_apps/etm/main/CMakeLists.txt b/components/esp_hw_support/test_apps/etm/main/CMakeLists.txt deleted file mode 100644 index 3e09a613525..00000000000 --- a/components/esp_hw_support/test_apps/etm/main/CMakeLists.txt +++ /dev/null @@ -1,26 +0,0 @@ -set(srcs "test_app_main.c" - "test_etm_core.c") - -if(CONFIG_SOC_GPIO_SUPPORT_ETM) - list(APPEND srcs "test_gpio_etm.c") -endif() - -if(CONFIG_SOC_TIMER_SUPPORT_ETM) - list(APPEND srcs "test_gptimer_etm.c") -endif() - -if(CONFIG_SOC_SYSTIMER_SUPPORT_ETM) - list(APPEND srcs "test_systimer_etm.c") -endif() - -if(CONFIG_SOC_ANA_CMPR_SUPPORT_ETM AND CONFIG_SOC_TIMER_SUPPORT_ETM) - # Analog Comparator event test relies on GPTIMER task - list(APPEND srcs "test_ana_cmpr_etm.c") -endif() - -# In order for the cases defined by `TEST_CASE` to be linked into the final elf, -# the component can be registered as WHOLE_ARCHIVE -idf_component_register(SRCS ${srcs} - PRIV_REQUIRES unity esp_timer esp_driver_gptimer esp_driver_gpio - esp_driver_mcpwm esp_driver_ana_cmpr - WHOLE_ARCHIVE) diff --git a/components/esp_hw_support/test_apps/etm/main/test_app_main.c b/components/esp_hw_support/test_apps/etm/main/test_app_main.c deleted file mode 100644 index be7beff893c..00000000000 --- a/components/esp_hw_support/test_apps/etm/main/test_app_main.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include "unity.h" -#include "unity_test_runner.h" -#include "esp_heap_caps.h" -#include "esp_newlib.h" -#include "freertos/FreeRTOS.h" -#include "freertos/task.h" - -// Some resources are lazy allocated in pulse_cnt driver, the threshold is left for that case -#define TEST_MEMORY_LEAK_THRESHOLD (-300) - -static size_t before_free_8bit; -static size_t before_free_32bit; - -static void check_leak(size_t before_free, size_t after_free, const char *type) -{ - ssize_t delta = after_free - before_free; - printf("MALLOC_CAP_%s: Before %u bytes free, After %u bytes free (delta %d)\n", type, before_free, after_free, delta); - TEST_ASSERT_MESSAGE(delta >= TEST_MEMORY_LEAK_THRESHOLD, "memory leak"); -} - -void setUp(void) -{ - before_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT); - before_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT); -} - -void tearDown(void) -{ - /* some FreeRTOS stuff is cleaned up by idle task */ - vTaskDelay(5); - - /* clean up some of the newlib's lazy allocations */ - esp_reent_cleanup(); - - size_t after_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT); - size_t after_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT); - check_leak(before_free_8bit, after_free_8bit, "8BIT"); - check_leak(before_free_32bit, after_free_32bit, "32BIT"); -} - -void app_main(void) -{ - // _____ _____ __ __ _____ _ - // | ____|_ _| \/ | |_ _|__ ___| |_ - // | _| | | | |\/| | | |/ _ \/ __| __| - // | |___ | | | | | | | | __/\__ \ |_ - // |_____| |_| |_| |_| |_|\___||___/\__| - printf(" _____ _____ __ __ _____ _\r\n"); - printf("| ____|_ _| \\/ | |_ _|__ ___| |_\r\n"); - printf("| _| | | | |\\/| | | |/ _ \\/ __| __|\r\n"); - printf("| |___ | | | | | | | | __/\\__ \\ |_\r\n"); - printf("|_____| |_| |_| |_| |_|\\___||___/\\__|\r\n"); - unity_run_menu(); -} diff --git a/components/esp_hw_support/test_apps/etm/pytest_etm.py b/components/esp_hw_support/test_apps/etm/pytest_etm.py deleted file mode 100644 index c209342a4c5..00000000000 --- a/components/esp_hw_support/test_apps/etm/pytest_etm.py +++ /dev/null @@ -1,19 +0,0 @@ -# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD -# SPDX-License-Identifier: CC0-1.0 -import pytest -from pytest_embedded import Dut - - -@pytest.mark.esp32c6 -@pytest.mark.esp32h2 -@pytest.mark.esp32p4 -@pytest.mark.generic -@pytest.mark.parametrize( - 'config', - [ - 'release', - ], - indirect=True, -) -def test_etm(dut: Dut) -> None: - dut.run_all_single_board_cases() diff --git a/components/esp_hw_support/test_apps/etm/sdkconfig.ci.release b/components/esp_hw_support/test_apps/etm/sdkconfig.ci.release deleted file mode 100644 index 91d93f163e6..00000000000 --- a/components/esp_hw_support/test_apps/etm/sdkconfig.ci.release +++ /dev/null @@ -1,5 +0,0 @@ -CONFIG_PM_ENABLE=y -CONFIG_FREERTOS_USE_TICKLESS_IDLE=y -CONFIG_COMPILER_OPTIMIZATION_SIZE=y -CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y -CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y diff --git a/components/esp_hw_support/test_apps/etm/sdkconfig.defaults b/components/esp_hw_support/test_apps/etm/sdkconfig.defaults deleted file mode 100644 index b308cb2ddda..00000000000 --- a/components/esp_hw_support/test_apps/etm/sdkconfig.defaults +++ /dev/null @@ -1,2 +0,0 @@ -CONFIG_FREERTOS_HZ=1000 -CONFIG_ESP_TASK_WDT=n diff --git a/components/esp_rom/esp32c5/ld/esp32c5.rom.systimer.ld b/components/esp_rom/esp32c5/ld/esp32c5.rom.systimer.ld index 7be47b11105..9f260f5ecd4 100644 --- a/components/esp_rom/esp32c5/ld/esp32c5.rom.systimer.ld +++ b/components/esp_rom/esp32c5/ld/esp32c5.rom.systimer.ld @@ -9,8 +9,9 @@ ***************************************/ /* Functions */ -systimer_hal_init = 0x400003d0; -systimer_hal_deinit = 0x400003d4; +/* The following ROM functions are commented out because they're patched in the esp_rom_systimer.c */ +/* systimer_hal_init = 0x400003d0; */ +/* systimer_hal_deinit = 0x400003d4; */ systimer_hal_set_tick_rate_ops = 0x400003d8; systimer_hal_get_counter_value = 0x400003dc; systimer_hal_get_time = 0x400003e0; diff --git a/components/esp_system/test_apps/esp_system_unity_tests/main/CMakeLists.txt b/components/esp_system/test_apps/esp_system_unity_tests/main/CMakeLists.txt index 7bccda3753b..0e7335e2f42 100644 --- a/components/esp_system/test_apps/esp_system_unity_tests/main/CMakeLists.txt +++ b/components/esp_system/test_apps/esp_system_unity_tests/main/CMakeLists.txt @@ -17,6 +17,10 @@ set(SRC "test_app_main.c" "test_system_time.c" "test_task_wdt.c") +if(CONFIG_SOC_SYSTIMER_SUPPORT_ETM) + list(APPEND SRC "test_systick_etm.c") +endif() + if(CONFIG_ESP_IPC_ISR_ENABLE) list(APPEND SRC "test_ipc_isr.c") if(CONFIG_IDF_TARGET_ARCH_XTENSA) diff --git a/components/esp_system/test_apps/esp_system_unity_tests/main/test_systick_etm.c b/components/esp_system/test_apps/esp_system_unity_tests/main/test_systick_etm.c new file mode 100644 index 00000000000..d82cf13d625 --- /dev/null +++ b/components/esp_system/test_apps/esp_system_unity_tests/main/test_systick_etm.c @@ -0,0 +1,63 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include "unity.h" +#include "unity_test_utils.h" +#include "freertos/FreeRTOS.h" +#include "esp_attr.h" +#include "esp_etm.h" +#include "esp_systick_etm.h" +#include "driver/gpio_etm.h" +#include "driver/gpio.h" + +TEST_CASE("rtos_systick_etm_event", "[etm]") +{ + // systimer alarm ---> EMT channel ---> GPIO toggle + const uint32_t output_gpio = 1; + printf("allocate etm channels\r\n"); + esp_etm_channel_config_t etm_config = {}; + esp_etm_channel_handle_t etm_channel_a = NULL; + TEST_ESP_OK(esp_etm_new_channel(&etm_config, &etm_channel_a)); + + printf("allocate GPIO etm task\r\n"); + esp_etm_task_handle_t gpio_task = NULL; + gpio_etm_task_config_t gpio_task_config = { + .action = GPIO_ETM_TASK_ACTION_TOG, + }; + TEST_ESP_OK(gpio_new_etm_task(&gpio_task_config, &gpio_task)); + + // bind GPIO to the task + TEST_ESP_OK(gpio_etm_task_add_gpio(gpio_task, output_gpio)); + + printf("initialize gpio\r\n"); + gpio_config_t task_gpio_config = { + .intr_type = GPIO_INTR_DISABLE, + .mode = GPIO_MODE_OUTPUT, + .pin_bit_mask = 1ULL << output_gpio, + }; + TEST_ESP_OK(gpio_config(&task_gpio_config)); + + printf("acquire systick etm event\r\n"); + esp_etm_event_handle_t systick_event = NULL; + TEST_ESP_OK(esp_systick_new_etm_alarm_event(0, &systick_event)); + + printf("connect event and task to the channel\r\n"); + TEST_ESP_OK(esp_etm_channel_connect(etm_channel_a, systick_event, gpio_task)); + + TEST_ESP_OK(esp_etm_channel_enable(etm_channel_a)); + + // should see a 500Hz square wave on the GPIO (if RTOS systick is set to 1000Hz) + vTaskDelay(pdMS_TO_TICKS(1000)); + + // delete etm primitives + TEST_ESP_OK(gpio_etm_task_rm_gpio(gpio_task, output_gpio)); + TEST_ESP_OK(esp_etm_del_task(gpio_task)); + TEST_ESP_OK(esp_etm_del_event(systick_event)); + TEST_ESP_OK(esp_etm_channel_disable(etm_channel_a)); + TEST_ESP_OK(esp_etm_del_channel(etm_channel_a)); +} diff --git a/components/esp_timer/test_apps/main/CMakeLists.txt b/components/esp_timer/test_apps/main/CMakeLists.txt index 041c23bb57c..15fc56ac952 100644 --- a/components/esp_timer/test_apps/main/CMakeLists.txt +++ b/components/esp_timer/test_apps/main/CMakeLists.txt @@ -1,4 +1,14 @@ -idf_component_register(SRC_DIRS "." +set(srcs "test_app_main.c" "test_esp_timer.c" "test_ets_timer.c") + +if(CONFIG_SOC_LIGHT_SLEEP_SUPPORTED) + list(APPEND srcs "test_esp_timer_light_sleep.c") +endif() + +if(CONFIG_SOC_SYSTIMER_SUPPORT_ETM) + list(APPEND srcs "test_esp_timer_etm.c") +endif() + +idf_component_register(SRCS ${srcs} PRIV_INCLUDE_DIRS "../../private_include" - PRIV_REQUIRES cmock test_utils esp_timer spi_flash esp_psram + PRIV_REQUIRES cmock test_utils esp_timer spi_flash esp_psram esp_driver_gpio WHOLE_ARCHIVE) diff --git a/components/esp_hw_support/test_apps/etm/main/test_systimer_etm.c b/components/esp_timer/test_apps/main/test_esp_timer_etm.c similarity index 60% rename from components/esp_hw_support/test_apps/etm/main/test_systimer_etm.c rename to components/esp_timer/test_apps/main/test_esp_timer_etm.c index 23b0cba9606..10f8f68bcff 100644 --- a/components/esp_hw_support/test_apps/etm/main/test_systimer_etm.c +++ b/components/esp_timer/test_apps/main/test_esp_timer_etm.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -14,54 +14,6 @@ #include "driver/gpio_etm.h" #include "driver/gpio.h" #include "esp_timer.h" -#include "esp_systick_etm.h" - -TEST_CASE("rtos_systick_etm_event", "[etm]") -{ - // systimer alarm ---> EMT channel ---> GPIO toggle - const uint32_t output_gpio = 1; - printf("allocate etm channels\r\n"); - esp_etm_channel_config_t etm_config = {}; - esp_etm_channel_handle_t etm_channel_a = NULL; - TEST_ESP_OK(esp_etm_new_channel(&etm_config, &etm_channel_a)); - - printf("allocate GPIO etm task\r\n"); - esp_etm_task_handle_t gpio_task = NULL; - gpio_etm_task_config_t gpio_task_config = { - .action = GPIO_ETM_TASK_ACTION_TOG, - }; - TEST_ESP_OK(gpio_new_etm_task(&gpio_task_config, &gpio_task)); - - // bind GPIO to the task - TEST_ESP_OK(gpio_etm_task_add_gpio(gpio_task, output_gpio)); - - printf("initialize gpio\r\n"); - gpio_config_t task_gpio_config = { - .intr_type = GPIO_INTR_DISABLE, - .mode = GPIO_MODE_OUTPUT, - .pin_bit_mask = 1ULL << output_gpio, - }; - TEST_ESP_OK(gpio_config(&task_gpio_config)); - - printf("acquire systick etm event\r\n"); - esp_etm_event_handle_t systick_event = NULL; - TEST_ESP_OK(esp_systick_new_etm_alarm_event(0, &systick_event)); - - printf("connect event and task to the channel\r\n"); - TEST_ESP_OK(esp_etm_channel_connect(etm_channel_a, systick_event, gpio_task)); - - TEST_ESP_OK(esp_etm_channel_enable(etm_channel_a)); - - // should see a 500Hz square wave on the GPIO (if RTOS systick is set to 1000Hz) - vTaskDelay(pdMS_TO_TICKS(1000)); - - // delete etm primitives - TEST_ESP_OK(gpio_etm_task_rm_gpio(gpio_task, output_gpio)); - TEST_ESP_OK(esp_etm_del_task(gpio_task)); - TEST_ESP_OK(esp_etm_del_event(systick_event)); - TEST_ESP_OK(esp_etm_channel_disable(etm_channel_a)); - TEST_ESP_OK(esp_etm_del_channel(etm_channel_a)); -} static void periodic_timer_callback(void *arg) { diff --git a/components/esp_timer/test_apps/main/test_esp_timer_light_sleep.c b/components/esp_timer/test_apps/main/test_esp_timer_light_sleep.c index b7dd0bc2e8e..6aa8ca9a788 100644 --- a/components/esp_timer/test_apps/main/test_esp_timer_light_sleep.c +++ b/components/esp_timer/test_apps/main/test_esp_timer_light_sleep.c @@ -16,8 +16,6 @@ #include "esp_sleep.h" #include "soc/soc_caps.h" -#if SOC_LIGHT_SLEEP_SUPPORTED - static void timer_cb1(void *arg) { ++*((int*) arg); @@ -58,5 +56,3 @@ TEST_CASE("Test the periodic timer does not handle lost events during light slee TEST_ESP_OK(esp_timer_delete(periodic_timer)); vTaskDelay(3); // wait for the esp_timer task to delete all timers } - -#endif // SOC_LIGHT_SLEEP_SUPPORTED diff --git a/components/hal/esp32c5/include/hal/etm_ll.h b/components/hal/esp32c5/include/hal/etm_ll.h new file mode 100644 index 00000000000..6708cd7f17e --- /dev/null +++ b/components/hal/esp32c5/include/hal/etm_ll.h @@ -0,0 +1,117 @@ +/* + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +// Note that most of the register operations in this layer are non-atomic operations. + +#pragma once + +#include +#include "hal/assert.h" +#include "hal/misc.h" +#include "soc/soc_etm_struct.h" +#include "soc/pcr_struct.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Enable the clock for ETM register + * + * @param group_id Group ID + * @param enable true to enable, false to disable + */ +static inline void etm_ll_enable_bus_clock(int group_id, bool enable) +{ + (void)group_id; + PCR.etm_conf.etm_clk_en = enable; +} + +/** + * @brief Reset the ETM register + * + * @param group_id Group ID + */ +static inline void etm_ll_reset_register(int group_id) +{ + (void)group_id; + PCR.etm_conf.etm_rst_en = 1; + PCR.etm_conf.etm_rst_en = 0; +} + +/** + * @brief Enable ETM channel + * + * @param hw ETM register base address + * @param chan Channel ID + */ +static inline void etm_ll_enable_channel(soc_etm_dev_t *hw, uint32_t chan) +{ + if (chan < 32) { + hw->ch_ena_ad0_set.val = 1 << chan; + } else { + hw->ch_ena_ad1_set.val = 1 << (chan - 32); + } +} + +/** + * @brief Disable ETM channel + * + * @param hw ETM register base address + * @param chan Channel ID + */ +static inline void etm_ll_disable_channel(soc_etm_dev_t *hw, uint32_t chan) +{ + if (chan < 32) { + hw->ch_ena_ad0_clr.val = 1 << chan; + } else { + hw->ch_ena_ad1_clr.val = 1 << (chan - 32); + } +} + +/** + * @brief Check whether the ETM channel is enabled or not + * + * @param hw ETM register base address + * @param chan Channel ID + * @return true if the channel is enabled, false otherwise + */ +static inline bool etm_ll_is_channel_enabled(soc_etm_dev_t *hw, uint32_t chan) +{ + if (chan < 32) { + return hw->ch_ena_ad0.val & (1 << chan); + } else { + return hw->ch_ena_ad1.val & (1 << (chan - 32)); + } +} + +/** + * @brief Set the input event for the ETM channel + * + * @param hw ETM register base address + * @param chan Channel ID + * @param event Event ID + */ +static inline void etm_ll_channel_set_event(soc_etm_dev_t *hw, uint32_t chan, uint32_t event) +{ + HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[chan].eid, chn_evt_id, event); +} + +/** + * @brief Set the output task for the ETM channel + * + * @param hw ETM register base address + * @param chan Channel ID + * @param task Task ID + */ +static inline void etm_ll_channel_set_task(soc_etm_dev_t *hw, uint32_t chan, uint32_t task) +{ + HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[chan].tid, chn_task_id, task); +} + +#ifdef __cplusplus +} +#endif diff --git a/components/hal/esp32c5/include/hal/gpio_etm_ll.h b/components/hal/esp32c5/include/hal/gpio_etm_ll.h new file mode 100644 index 00000000000..52a06e7fc3e --- /dev/null +++ b/components/hal/esp32c5/include/hal/gpio_etm_ll.h @@ -0,0 +1,136 @@ +/* + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +// Note that most of the register operations in this layer are non-atomic operations. + +#pragma once + +#include +#include "hal/assert.h" +#include "hal/misc.h" +#include "soc/gpio_ext_struct.h" +#include "soc/soc_etm_source.h" + +#define GPIO_LL_ETM_EVENT_ID_POS_EDGE(ch) (GPIO_EVT_CH0_RISE_EDGE + (ch)) +#define GPIO_LL_ETM_EVENT_ID_NEG_EDGE(ch) (GPIO_EVT_CH0_FALL_EDGE + (ch)) +#define GPIO_LL_ETM_EVENT_ID_ANY_EDGE(ch) (GPIO_EVT_CH0_ANY_EDGE + (ch)) + +#define GPIO_LL_ETM_TASK_ID_SET(ch) (GPIO_TASK_CH0_SET + (ch)) +#define GPIO_LL_ETM_TASK_ID_CLR(ch) (GPIO_TASK_CH0_CLEAR + (ch)) +#define GPIO_LL_ETM_TASK_ID_TOG(ch) (GPIO_TASK_CH0_TOGGLE + (ch)) + +#define GPIO_LL_ETM_EVENT_CHANNELS_PER_GROUP 8 +#define GPIO_LL_ETM_TASK_CHANNELS_PER_GROUP 8 + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Set which GPIO to be bound to the event channel + * + * @note Different channels can be bound to one GPIO + * + * @param dev Register base address + * @param chan GPIO ETM Event channel number + * @param gpio_num GPIO number + */ +static inline void gpio_ll_etm_event_channel_set_gpio(gpio_etm_dev_t *dev, uint32_t chan, uint32_t gpio_num) +{ + dev->etm_event_chn_cfg[chan].etm_chn_event_sel = gpio_num; +} + +/** + * @brief Whether to enable the event channel + * + * @param dev Register base address + * @param chan GPIO ETM Event channel number + * @param enable True to enable, false to disable + */ +static inline void gpio_ll_etm_enable_event_channel(gpio_etm_dev_t *dev, uint32_t chan, bool enable) +{ + dev->etm_event_chn_cfg[chan].etm_chn_event_en = enable; +} + +/** + * @brief Get which GPIO is bound to the event channel + * + * @param dev Register base address + * @param chan GPIO ETM Event channel number + * @return GPIO number + */ +static inline uint32_t gpio_ll_etm_event_channel_get_gpio(gpio_etm_dev_t *dev, uint32_t chan) +{ + return dev->etm_event_chn_cfg[chan].etm_chn_event_sel; +} + +/** + * @brief Set which GPIO to be bound to the task channel + * + * @note One channel can be bound to multiple different GPIOs + * + * @param dev Register base address + * @param chan GPIO ETM Task channel number + * @param gpio_num GPIO number + */ +static inline void gpio_ll_etm_gpio_set_task_channel(gpio_etm_dev_t *dev, uint32_t gpio_num, uint32_t chan) +{ + int g_p = gpio_num / 5; + int g_idx = gpio_num % 5; + uint32_t reg_val = dev->etm_task_pn_cfg[g_p].val; + reg_val &= ~(0x07 << (g_idx * 6)); + reg_val |= ((chan & 0x07) << (g_idx * 6)); + dev->etm_task_pn_cfg[g_p].val = reg_val; +} + +/** + * @brief Whether to enable the GPIO to be managed by the task channel + * + * @param dev Register base address + * @param gpio_num GPIO number + * @param enable True to enable, false to disable + */ +static inline void gpio_ll_etm_enable_task_gpio(gpio_etm_dev_t *dev, uint32_t gpio_num, bool enable) +{ + int g_p = gpio_num / 5; + int g_idx = gpio_num % 5; + uint32_t reg_val = dev->etm_task_pn_cfg[g_p].val; + reg_val &= ~(0x01 << (g_idx * 6 + 5)); + reg_val |= ((enable & 0x01) << (g_idx * 6 + 5)); + dev->etm_task_pn_cfg[g_p].val = reg_val; +} + +/** + * @brief Check whether a GPIO has been enabled and managed by a task channel + * + * @param dev Register base address + * @param gpio_num GPIO number + * @return True if enabled, false otherwise + */ +static inline bool gpio_ll_etm_is_task_gpio_enabled(gpio_etm_dev_t *dev, uint32_t gpio_num) +{ + int g_p = gpio_num / 5; + int g_idx = gpio_num % 5; + return dev->etm_task_pn_cfg[g_p].val & (0x01 << (g_idx * 6 + 5)); +} + +/** + * @brief Get the channel number that the GPIO is bound to + * + * @param dev Register base address + * @param gpio_num GPIO number + * @return GPIO ETM Task channel number + */ +static inline uint32_t gpio_ll_etm_gpio_get_task_channel(gpio_etm_dev_t *dev, uint32_t gpio_num) +{ + int g_p = gpio_num / 5; + int g_idx = gpio_num % 5; + return (dev->etm_task_pn_cfg[g_p].val >> (g_idx * 6)) & 0x07; +} + +#ifdef __cplusplus +} +#endif diff --git a/components/hal/esp32c5/include/hal/timer_ll.h b/components/hal/esp32c5/include/hal/timer_ll.h index 9915ddbce27..7798f6c7ba3 100644 --- a/components/hal/esp32c5/include/hal/timer_ll.h +++ b/components/hal/esp32c5/include/hal/timer_ll.h @@ -25,30 +25,30 @@ extern "C" { #define TIMER_LL_GET_HW(group_id) ((group_id == 0) ? (&TIMERG0) : (&TIMERG1)) #define TIMER_LL_EVENT_ALARM(timer_id) (1 << (timer_id)) -#define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \ - (uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{ \ - [GPTIMER_ETM_TASK_START_COUNT] = TIMER0_TASK_CNT_START_TIMER0, \ - [GPTIMER_ETM_TASK_STOP_COUNT] = TIMER0_TASK_CNT_STOP_TIMER0, \ - [GPTIMER_ETM_TASK_EN_ALARM] = TIMER0_TASK_ALARM_START_TIMER0, \ - [GPTIMER_ETM_TASK_RELOAD] = TIMER0_TASK_CNT_RELOAD_TIMER0, \ - [GPTIMER_ETM_TASK_CAPTURE] = TIMER0_TASK_CNT_CAP_TIMER0, \ - }}, \ - {{ \ - [GPTIMER_ETM_TASK_START_COUNT] = TIMER1_TASK_CNT_START_TIMER0, \ - [GPTIMER_ETM_TASK_STOP_COUNT] = TIMER1_TASK_CNT_STOP_TIMER0, \ - [GPTIMER_ETM_TASK_EN_ALARM] = TIMER1_TASK_ALARM_START_TIMER0, \ - [GPTIMER_ETM_TASK_RELOAD] = TIMER1_TASK_CNT_RELOAD_TIMER0, \ - [GPTIMER_ETM_TASK_CAPTURE] = TIMER1_TASK_CNT_CAP_TIMER0, \ - }}, \ +#define TIMER_LL_ETM_TASK_TABLE(group, timer, task) \ + (uint32_t [2][1][GPTIMER_ETM_TASK_MAX]){{{ \ + [GPTIMER_ETM_TASK_START_COUNT] = TG0_TASK_CNT_START_TIMER0, \ + [GPTIMER_ETM_TASK_STOP_COUNT] = TG0_TASK_CNT_STOP_TIMER0, \ + [GPTIMER_ETM_TASK_EN_ALARM] = TG0_TASK_ALARM_START_TIMER0, \ + [GPTIMER_ETM_TASK_RELOAD] = TG0_TASK_CNT_RELOAD_TIMER0, \ + [GPTIMER_ETM_TASK_CAPTURE] = TG0_TASK_CNT_CAP_TIMER0, \ + }}, \ + {{ \ + [GPTIMER_ETM_TASK_START_COUNT] = TG1_TASK_CNT_START_TIMER0, \ + [GPTIMER_ETM_TASK_STOP_COUNT] = TG1_TASK_CNT_STOP_TIMER0, \ + [GPTIMER_ETM_TASK_EN_ALARM] = TG1_TASK_ALARM_START_TIMER0, \ + [GPTIMER_ETM_TASK_RELOAD] = TG1_TASK_CNT_RELOAD_TIMER0, \ + [GPTIMER_ETM_TASK_CAPTURE] = TG1_TASK_CNT_CAP_TIMER0, \ + }}, \ }[group][timer][task] -#define TIMER_LL_ETM_EVENT_TABLE(group, timer, event) \ - (uint32_t [2][1][GPTIMER_ETM_EVENT_MAX]){{{ \ - [GPTIMER_ETM_EVENT_ALARM_MATCH] = TIMER0_EVT_CNT_CMP_TIMER0, \ - }}, \ - {{ \ - [GPTIMER_ETM_EVENT_ALARM_MATCH] = TIMER1_EVT_CNT_CMP_TIMER0, \ - }}, \ +#define TIMER_LL_ETM_EVENT_TABLE(group, timer, event) \ + (uint32_t [2][1][GPTIMER_ETM_EVENT_MAX]){{{ \ + [GPTIMER_ETM_EVENT_ALARM_MATCH] = TG0_EVT_CNT_CMP_TIMER0, \ + }}, \ + {{ \ + [GPTIMER_ETM_EVENT_ALARM_MATCH] = TG1_EVT_CNT_CMP_TIMER0, \ + }}, \ }[group][timer][event] /** diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index d9435e8d6fa..469f92cb8bf 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -27,6 +27,10 @@ config SOC_MCPWM_SUPPORTED bool default y +config SOC_ETM_SUPPORTED + bool + default y + config SOC_PARLIO_SUPPORTED bool default y @@ -295,6 +299,18 @@ config SOC_GDMA_PAIRS_PER_GROUP_MAX int default 3 +config SOC_GDMA_SUPPORT_ETM + bool + default y + +config SOC_ETM_GROUPS + int + default 1 + +config SOC_ETM_CHANNELS_PER_GROUP + int + default 50 + config SOC_GPIO_PORT int default 1 @@ -307,6 +323,10 @@ config SOC_GPIO_SUPPORT_PIN_HYS_FILTER bool default y +config SOC_GPIO_SUPPORT_ETM + bool + default y + config SOC_GPIO_SUPPORT_RTC_INDEPENDENT bool default y @@ -635,6 +655,10 @@ config SOC_MCPWM_SWSYNC_CAN_PROPAGATE bool default y +config SOC_MCPWM_SUPPORT_ETM + bool + default y + config SOC_MCPWM_SUPPORT_EVENT_COMPARATOR bool default y @@ -831,6 +855,10 @@ config SOC_SYSTIMER_ALARM_MISS_COMPENSATE bool default y +config SOC_SYSTIMER_SUPPORT_ETM + bool + default y + config SOC_LP_TIMER_BIT_WIDTH_LO int default 32 @@ -855,10 +883,18 @@ config SOC_TIMER_GROUP_SUPPORT_XTAL bool default y +config SOC_TIMER_GROUP_SUPPORT_RC_FAST + bool + default y + config SOC_TIMER_GROUP_TOTAL_TIMERS int default 2 +config SOC_TIMER_SUPPORT_ETM + bool + default y + config SOC_EFUSE_ECDSA_KEY bool default y diff --git a/components/soc/esp32c5/include/soc/gpio_ext_struct.h b/components/soc/esp32c5/include/soc/gpio_ext_struct.h index d8004b7325e..56aa2ecdd9d 100644 --- a/components/soc/esp32c5/include/soc/gpio_ext_struct.h +++ b/components/soc/esp32c5/include/soc/gpio_ext_struct.h @@ -192,20 +192,20 @@ typedef union { * 28: Select GPIO28\\ * 29 ~ 63: Reserved\\ */ - uint32_t etm_ch0_event_sel:6; + uint32_t etm_chn_event_sel:6; uint32_t reserved_6:1; /** etm_ch0_event_en : R/W; bitpos: [7]; default: 0; * Configures whether or not to enable ETM event send.\\ * 0: Not enable\\ * 1: Enable\\ */ - uint32_t etm_ch0_event_en:1; + uint32_t etm_chn_event_en:1; uint32_t reserved_8:24; }; uint32_t val; } gpio_ext_etm_event_chn_cfg_reg_t; -/** Type of etm_task_p0_cfg register +/** Type of etm_task_pn_cfg register * GPIO selection register 0 for ETM */ typedef union { @@ -333,633 +333,8 @@ typedef union { uint32_t reserved_30:2; }; uint32_t val; -} gpio_ext_etm_task_p0_cfg_reg_t; +} gpio_ext_etm_task_pn_cfg_reg_t; -/** Type of etm_task_p1_cfg register - * GPIO selection register 1 for ETM - */ -typedef union { - struct { - /** etm_task_gpio5_sel : R/W; bitpos: [2:0]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio5_sel:3; - uint32_t reserved_3:2; - /** etm_task_gpio5_en : R/W; bitpos: [5]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio5_en:1; - /** etm_task_gpio6_sel : R/W; bitpos: [8:6]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio6_sel:3; - uint32_t reserved_9:2; - /** etm_task_gpio6_en : R/W; bitpos: [11]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio6_en:1; - /** etm_task_gpio7_sel : R/W; bitpos: [14:12]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio7_sel:3; - uint32_t reserved_15:2; - /** etm_task_gpio7_en : R/W; bitpos: [17]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio7_en:1; - /** etm_task_gpio8_sel : R/W; bitpos: [20:18]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio8_sel:3; - uint32_t reserved_21:2; - /** etm_task_gpio8_en : R/W; bitpos: [23]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio8_en:1; - /** etm_task_gpio9_sel : R/W; bitpos: [26:24]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio9_sel:3; - uint32_t reserved_27:2; - /** etm_task_gpio9_en : R/W; bitpos: [29]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio9_en:1; - uint32_t reserved_30:2; - }; - uint32_t val; -} gpio_ext_etm_task_p1_cfg_reg_t; - -/** Type of etm_task_p2_cfg register - * GPIO selection register 2 for ETM - */ -typedef union { - struct { - /** etm_task_gpio10_sel : R/W; bitpos: [2:0]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio10_sel:3; - uint32_t reserved_3:2; - /** etm_task_gpio10_en : R/W; bitpos: [5]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio10_en:1; - /** etm_task_gpio11_sel : R/W; bitpos: [8:6]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio11_sel:3; - uint32_t reserved_9:2; - /** etm_task_gpio11_en : R/W; bitpos: [11]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio11_en:1; - /** etm_task_gpio12_sel : R/W; bitpos: [14:12]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio12_sel:3; - uint32_t reserved_15:2; - /** etm_task_gpio12_en : R/W; bitpos: [17]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio12_en:1; - /** etm_task_gpio13_sel : R/W; bitpos: [20:18]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio13_sel:3; - uint32_t reserved_21:2; - /** etm_task_gpio13_en : R/W; bitpos: [23]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio13_en:1; - /** etm_task_gpio14_sel : R/W; bitpos: [26:24]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio14_sel:3; - uint32_t reserved_27:2; - /** etm_task_gpio14_en : R/W; bitpos: [29]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio14_en:1; - uint32_t reserved_30:2; - }; - uint32_t val; -} gpio_ext_etm_task_p2_cfg_reg_t; - -/** Type of etm_task_p3_cfg register - * GPIO selection register 3 for ETM - */ -typedef union { - struct { - /** etm_task_gpio15_sel : R/W; bitpos: [2:0]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio15_sel:3; - uint32_t reserved_3:2; - /** etm_task_gpio15_en : R/W; bitpos: [5]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio15_en:1; - /** etm_task_gpio16_sel : R/W; bitpos: [8:6]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio16_sel:3; - uint32_t reserved_9:2; - /** etm_task_gpio16_en : R/W; bitpos: [11]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio16_en:1; - /** etm_task_gpio17_sel : R/W; bitpos: [14:12]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio17_sel:3; - uint32_t reserved_15:2; - /** etm_task_gpio17_en : R/W; bitpos: [17]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio17_en:1; - /** etm_task_gpio18_sel : R/W; bitpos: [20:18]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio18_sel:3; - uint32_t reserved_21:2; - /** etm_task_gpio18_en : R/W; bitpos: [23]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio18_en:1; - /** etm_task_gpio19_sel : R/W; bitpos: [26:24]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio19_sel:3; - uint32_t reserved_27:2; - /** etm_task_gpio19_en : R/W; bitpos: [29]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio19_en:1; - uint32_t reserved_30:2; - }; - uint32_t val; -} gpio_ext_etm_task_p3_cfg_reg_t; - -/** Type of etm_task_p4_cfg register - * GPIO selection register 4 for ETM - */ -typedef union { - struct { - /** etm_task_gpio20_sel : R/W; bitpos: [2:0]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio20_sel:3; - uint32_t reserved_3:2; - /** etm_task_gpio20_en : R/W; bitpos: [5]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio20_en:1; - /** etm_task_gpio21_sel : R/W; bitpos: [8:6]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio21_sel:3; - uint32_t reserved_9:2; - /** etm_task_gpio21_en : R/W; bitpos: [11]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio21_en:1; - /** etm_task_gpio22_sel : R/W; bitpos: [14:12]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio22_sel:3; - uint32_t reserved_15:2; - /** etm_task_gpio22_en : R/W; bitpos: [17]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio22_en:1; - /** etm_task_gpio23_sel : R/W; bitpos: [20:18]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio23_sel:3; - uint32_t reserved_21:2; - /** etm_task_gpio23_en : R/W; bitpos: [23]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio23_en:1; - /** etm_task_gpio24_sel : R/W; bitpos: [26:24]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio24_sel:3; - uint32_t reserved_27:2; - /** etm_task_gpio24_en : R/W; bitpos: [29]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio24_en:1; - uint32_t reserved_30:2; - }; - uint32_t val; -} gpio_ext_etm_task_p4_cfg_reg_t; - -/** Type of etm_task_p5_cfg register - * GPIO selection register 5 for ETM - */ -typedef union { - struct { - /** etm_task_gpio25_sel : R/W; bitpos: [2:0]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio25_sel:3; - uint32_t reserved_3:2; - /** etm_task_gpio25_en : R/W; bitpos: [5]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio25_en:1; - /** etm_task_gpio26_sel : R/W; bitpos: [8:6]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio26_sel:3; - uint32_t reserved_9:2; - /** etm_task_gpio26_en : R/W; bitpos: [11]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio26_en:1; - /** etm_task_gpio27_sel : R/W; bitpos: [14:12]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio27_sel:3; - uint32_t reserved_15:2; - /** etm_task_gpio27_en : R/W; bitpos: [17]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio27_en:1; - /** etm_task_gpio28_sel : R/W; bitpos: [20:18]; default: 0; - * Configures to select an ETM task channel for GPIO$n.\\ - * 0: Select channel 0\\ - * 1: Select channel 1\\ - * ......\\ - * 7: Select channel 7\\%\label{fielddesc:GPIOSDETMTASKGPIO1EN}- - * [GPIOSD_ETM_TASK_GPIO1_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO1SEL}- [GPIOSD_ETM_TASK_GPIO1_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO2EN}- - * [GPIOSD_ETM_TASK_GPIO2_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO2SEL}- [GPIOSD_ETM_TASK_GPIO2_SEL] GPIO choose a - * etm task channel. %\label{fielddesc:GPIOSDETMTASKGPIO3EN}\item - * [GPIOSD_ETM_TASK_GPIO3_EN] Enable bit of GPIO response etm task. - * %\label{fielddesc:GPIOSDETMTASKGPIO3SEL}\item [GPIOSD_ETM_TASK_GPIO3_SEL] GPIO - * choose a etm task channel. - */ - uint32_t etm_task_gpio28_sel:3; - uint32_t reserved_21:2; - /** etm_task_gpio28_en : R/W; bitpos: [23]; default: 0; - * Configures whether or not to enable GPIO$n to response ETM task.\\ - * 0: Not enable\\ - * 1: Enable\\ - */ - uint32_t etm_task_gpio28_en:1; - uint32_t reserved_24:8; - }; - uint32_t val; -} gpio_ext_etm_task_p5_cfg_reg_t; /** Group: Interrupt Registers */ @@ -1073,6 +448,12 @@ typedef struct gpio_sd_dev_t { volatile gpio_ext_sigmadeltan_reg_t channel[4]; } gpio_sd_dev_t; +typedef struct gpio_etm_dev_t { + volatile gpio_ext_etm_event_chn_cfg_reg_t etm_event_chn_cfg[8]; + uint32_t reserved_080[8]; + volatile gpio_ext_etm_task_pn_cfg_reg_t etm_task_pn_cfg[6]; +} gpio_etm_dev_t; + typedef struct { volatile gpio_sd_dev_t sigma_delta; uint32_t reserved_018[16]; @@ -1081,14 +462,7 @@ typedef struct { uint32_t reserved_060[30]; volatile gpio_ext_glitch_filter_chn_reg_t glitch_filter_chn[8]; uint32_t reserved_0f8[8]; - volatile gpio_ext_etm_event_chn_cfg_reg_t etm_event_chn_cfg[8]; - uint32_t reserved_138[8]; - volatile gpio_ext_etm_task_p0_cfg_reg_t etm_task_p0_cfg; - volatile gpio_ext_etm_task_p1_cfg_reg_t etm_task_p1_cfg; - volatile gpio_ext_etm_task_p2_cfg_reg_t etm_task_p2_cfg; - volatile gpio_ext_etm_task_p3_cfg_reg_t etm_task_p3_cfg; - volatile gpio_ext_etm_task_p4_cfg_reg_t etm_task_p4_cfg; - volatile gpio_ext_etm_task_p5_cfg_reg_t etm_task_p5_cfg; + volatile gpio_etm_dev_t etm; uint32_t reserved_170[24]; volatile gpio_ext_int_raw_reg_t int_raw; volatile gpio_ext_int_st_reg_t int_st; @@ -1100,6 +474,7 @@ typedef struct { } gpio_ext_dev_t; extern gpio_sd_dev_t SDM; +extern gpio_etm_dev_t GPIO_ETM; extern gpio_ext_dev_t GPIO_EXT; #ifndef __cplusplus diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index b63ac4b9035..35aa0bd9a44 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -26,7 +26,7 @@ #define SOC_PCNT_SUPPORTED 1 #define SOC_MCPWM_SUPPORTED 1 // #define SOC_TWAI_SUPPORTED 1 // TODO: [ESP32C5] IDF-8691 -// #define SOC_ETM_SUPPORTED 1 // TODO: [ESP32C5] IDF-8693 +#define SOC_ETM_SUPPORTED 1 #define SOC_PARLIO_SUPPORTED 1 #define SOC_ASYNC_MEMCPY_SUPPORTED 1 #define SOC_USB_SERIAL_JTAG_SUPPORTED 1 @@ -177,12 +177,12 @@ #define SOC_AHB_GDMA_VERSION 2 #define SOC_GDMA_NUM_GROUPS_MAX 1U #define SOC_GDMA_PAIRS_PER_GROUP_MAX 3 -// #define SOC_GDMA_SUPPORT_ETM 1 // Support ETM submodule TODO: IDF-9224 +#define SOC_GDMA_SUPPORT_ETM 1 // #define SOC_GDMA_SUPPORT_SLEEP_RETENTION 1 // TODO: IDF-9225 /*-------------------------- ETM CAPS --------------------------------------*/ -// #define SOC_ETM_GROUPS 1U // Number of ETM groups -// #define SOC_ETM_CHANNELS_PER_GROUP 50 // Number of ETM channels in the group +#define SOC_ETM_GROUPS 1U // Number of ETM groups +#define SOC_ETM_CHANNELS_PER_GROUP 50 // Number of ETM channels in the group /*-------------------------- GPIO CAPS ---------------------------------------*/ // ESP32-C5 has 1 GPIO peripheral @@ -193,7 +193,7 @@ #define SOC_GPIO_SUPPORT_PIN_HYS_FILTER 1 // GPIO peripheral has the ETM extension -// #define SOC_GPIO_SUPPORT_ETM 1 +#define SOC_GPIO_SUPPORT_ETM 1 // Target has the full LP IO subsystem // On ESP32-C5, Digital IOs have their own registers to control pullup/down capability, independent of LP registers. @@ -338,7 +338,7 @@ #define SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER 3 ///< The number of capture channels that each capture timer has #define SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP 3 ///< The number of GPIO synchros that each group has #define SOC_MCPWM_SWSYNC_CAN_PROPAGATE 1 ///< Software sync event can be routed to its output -// #define SOC_MCPWM_SUPPORT_ETM 1 ///< Support ETM (Event Task Matrix) +#define SOC_MCPWM_SUPPORT_ETM 1 ///< Support ETM (Event Task Matrix) #define SOC_MCPWM_SUPPORT_EVENT_COMPARATOR 1 ///< Support event comparator (based on ETM) #define SOC_MCPWM_CAPTURE_CLK_FROM_GROUP 1 ///< Capture timer shares clock with other PWM timers @@ -438,7 +438,7 @@ #define SOC_SYSTIMER_SUPPORT_RC_FAST 1 // Systimer can use RC_FAST clock source #define SOC_SYSTIMER_INT_LEVEL 1 // Systimer peripheral uses level interrupt #define SOC_SYSTIMER_ALARM_MISS_COMPENSATE 1 // Systimer peripheral can generate interrupt immediately if t(target) > t(current) -// #define SOC_SYSTIMER_SUPPORT_ETM 1 // Systimer comparator can generate ETM event +#define SOC_SYSTIMER_SUPPORT_ETM 1 // Systimer comparator can generate ETM event /*-------------------------- LP_TIMER CAPS ----------------------------------*/ #define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part @@ -449,9 +449,9 @@ #define SOC_TIMER_GROUP_TIMERS_PER_GROUP (1U) #define SOC_TIMER_GROUP_COUNTER_BIT_WIDTH (54) #define SOC_TIMER_GROUP_SUPPORT_XTAL (1) -// #define SOC_TIMER_GROUP_SUPPORT_RC_FAST (1) +#define SOC_TIMER_GROUP_SUPPORT_RC_FAST (1) #define SOC_TIMER_GROUP_TOTAL_TIMERS (2) -// #define SOC_TIMER_SUPPORT_ETM (1) +#define SOC_TIMER_SUPPORT_ETM (1) // #define SOC_TIMER_SUPPORT_SLEEP_RETENTION (1) /*--------------------------- WATCHDOG CAPS ---------------------------------------*/ diff --git a/components/soc/esp32c5/include/soc/soc_etm_struct.h b/components/soc/esp32c5/include/soc/soc_etm_struct.h index e3d65f06c1d..01ece71a0ad 100644 --- a/components/soc/esp32c5/include/soc/soc_etm_struct.h +++ b/components/soc/esp32c5/include/soc/soc_etm_struct.h @@ -3602,113 +3602,17 @@ typedef union { } soc_etm_date_reg_t; -typedef struct { +typedef struct soc_etm_dev_t { volatile soc_etm_ch_ena_ad0_reg_t ch_ena_ad0; volatile soc_etm_ch_ena_ad0_set_reg_t ch_ena_ad0_set; volatile soc_etm_ch_ena_ad0_clr_reg_t ch_ena_ad0_clr; volatile soc_etm_ch_ena_ad1_reg_t ch_ena_ad1; volatile soc_etm_ch_ena_ad1_set_reg_t ch_ena_ad1_set; volatile soc_etm_ch_ena_ad1_clr_reg_t ch_ena_ad1_clr; - volatile soc_etm_chn_evt_id_reg_t ch0_evt_id; - volatile soc_etm_chn_task_id_reg_t ch0_task_id; - volatile soc_etm_chn_evt_id_reg_t ch1_evt_id; - volatile soc_etm_chn_task_id_reg_t ch1_task_id; - volatile soc_etm_chn_evt_id_reg_t ch2_evt_id; - volatile soc_etm_chn_task_id_reg_t ch2_task_id; - volatile soc_etm_chn_evt_id_reg_t ch3_evt_id; - volatile soc_etm_chn_task_id_reg_t ch3_task_id; - volatile soc_etm_chn_evt_id_reg_t ch4_evt_id; - volatile soc_etm_chn_task_id_reg_t ch4_task_id; - volatile soc_etm_chn_evt_id_reg_t ch5_evt_id; - volatile soc_etm_chn_task_id_reg_t ch5_task_id; - volatile soc_etm_chn_evt_id_reg_t ch6_evt_id; - volatile soc_etm_chn_task_id_reg_t ch6_task_id; - volatile soc_etm_chn_evt_id_reg_t ch7_evt_id; - volatile soc_etm_chn_task_id_reg_t ch7_task_id; - volatile soc_etm_chn_evt_id_reg_t ch8_evt_id; - volatile soc_etm_chn_task_id_reg_t ch8_task_id; - volatile soc_etm_chn_evt_id_reg_t ch9_evt_id; - volatile soc_etm_chn_task_id_reg_t ch9_task_id; - volatile soc_etm_chn_evt_id_reg_t ch10_evt_id; - volatile soc_etm_chn_task_id_reg_t ch10_task_id; - volatile soc_etm_chn_evt_id_reg_t ch11_evt_id; - volatile soc_etm_chn_task_id_reg_t ch11_task_id; - volatile soc_etm_chn_evt_id_reg_t ch12_evt_id; - volatile soc_etm_chn_task_id_reg_t ch12_task_id; - volatile soc_etm_chn_evt_id_reg_t ch13_evt_id; - volatile soc_etm_chn_task_id_reg_t ch13_task_id; - volatile soc_etm_chn_evt_id_reg_t ch14_evt_id; - volatile soc_etm_chn_task_id_reg_t ch14_task_id; - volatile soc_etm_chn_evt_id_reg_t ch15_evt_id; - volatile soc_etm_chn_task_id_reg_t ch15_task_id; - volatile soc_etm_chn_evt_id_reg_t ch16_evt_id; - volatile soc_etm_chn_task_id_reg_t ch16_task_id; - volatile soc_etm_chn_evt_id_reg_t ch17_evt_id; - volatile soc_etm_chn_task_id_reg_t ch17_task_id; - volatile soc_etm_chn_evt_id_reg_t ch18_evt_id; - volatile soc_etm_chn_task_id_reg_t ch18_task_id; - volatile soc_etm_chn_evt_id_reg_t ch19_evt_id; - volatile soc_etm_chn_task_id_reg_t ch19_task_id; - volatile soc_etm_chn_evt_id_reg_t ch20_evt_id; - volatile soc_etm_chn_task_id_reg_t ch20_task_id; - volatile soc_etm_chn_evt_id_reg_t ch21_evt_id; - volatile soc_etm_chn_task_id_reg_t ch21_task_id; - volatile soc_etm_chn_evt_id_reg_t ch22_evt_id; - volatile soc_etm_chn_task_id_reg_t ch22_task_id; - volatile soc_etm_chn_evt_id_reg_t ch23_evt_id; - volatile soc_etm_chn_task_id_reg_t ch23_task_id; - volatile soc_etm_chn_evt_id_reg_t ch24_evt_id; - volatile soc_etm_chn_task_id_reg_t ch24_task_id; - volatile soc_etm_chn_evt_id_reg_t ch25_evt_id; - volatile soc_etm_chn_task_id_reg_t ch25_task_id; - volatile soc_etm_chn_evt_id_reg_t ch26_evt_id; - volatile soc_etm_chn_task_id_reg_t ch26_task_id; - volatile soc_etm_chn_evt_id_reg_t ch27_evt_id; - volatile soc_etm_chn_task_id_reg_t ch27_task_id; - volatile soc_etm_chn_evt_id_reg_t ch28_evt_id; - volatile soc_etm_chn_task_id_reg_t ch28_task_id; - volatile soc_etm_chn_evt_id_reg_t ch29_evt_id; - volatile soc_etm_chn_task_id_reg_t ch29_task_id; - volatile soc_etm_chn_evt_id_reg_t ch30_evt_id; - volatile soc_etm_chn_task_id_reg_t ch30_task_id; - volatile soc_etm_chn_evt_id_reg_t ch31_evt_id; - volatile soc_etm_chn_task_id_reg_t ch31_task_id; - volatile soc_etm_chn_evt_id_reg_t ch32_evt_id; - volatile soc_etm_chn_task_id_reg_t ch32_task_id; - volatile soc_etm_chn_evt_id_reg_t ch33_evt_id; - volatile soc_etm_chn_task_id_reg_t ch33_task_id; - volatile soc_etm_chn_evt_id_reg_t ch34_evt_id; - volatile soc_etm_chn_task_id_reg_t ch34_task_id; - volatile soc_etm_chn_evt_id_reg_t ch35_evt_id; - volatile soc_etm_chn_task_id_reg_t ch35_task_id; - volatile soc_etm_chn_evt_id_reg_t ch36_evt_id; - volatile soc_etm_chn_task_id_reg_t ch36_task_id; - volatile soc_etm_chn_evt_id_reg_t ch37_evt_id; - volatile soc_etm_chn_task_id_reg_t ch37_task_id; - volatile soc_etm_chn_evt_id_reg_t ch38_evt_id; - volatile soc_etm_chn_task_id_reg_t ch38_task_id; - volatile soc_etm_chn_evt_id_reg_t ch39_evt_id; - volatile soc_etm_chn_task_id_reg_t ch39_task_id; - volatile soc_etm_chn_evt_id_reg_t ch40_evt_id; - volatile soc_etm_chn_task_id_reg_t ch40_task_id; - volatile soc_etm_chn_evt_id_reg_t ch41_evt_id; - volatile soc_etm_chn_task_id_reg_t ch41_task_id; - volatile soc_etm_chn_evt_id_reg_t ch42_evt_id; - volatile soc_etm_chn_task_id_reg_t ch42_task_id; - volatile soc_etm_chn_evt_id_reg_t ch43_evt_id; - volatile soc_etm_chn_task_id_reg_t ch43_task_id; - volatile soc_etm_chn_evt_id_reg_t ch44_evt_id; - volatile soc_etm_chn_task_id_reg_t ch44_task_id; - volatile soc_etm_chn_evt_id_reg_t ch45_evt_id; - volatile soc_etm_chn_task_id_reg_t ch45_task_id; - volatile soc_etm_chn_evt_id_reg_t ch46_evt_id; - volatile soc_etm_chn_task_id_reg_t ch46_task_id; - volatile soc_etm_chn_evt_id_reg_t ch47_evt_id; - volatile soc_etm_chn_task_id_reg_t ch47_task_id; - volatile soc_etm_chn_evt_id_reg_t ch48_evt_id; - volatile soc_etm_chn_task_id_reg_t ch48_task_id; - volatile soc_etm_chn_evt_id_reg_t ch49_evt_id; - volatile soc_etm_chn_task_id_reg_t ch49_task_id; + volatile struct { + soc_etm_chn_evt_id_reg_t eid; + soc_etm_chn_task_id_reg_t tid; + } channel[50]; volatile soc_etm_evt_st0_reg_t evt_st0; volatile soc_etm_evt_st0_clr_reg_t evt_st0_clr; volatile soc_etm_evt_st1_reg_t evt_st1; diff --git a/components/soc/esp32c5/ld/esp32c5.peripherals.ld b/components/soc/esp32c5/ld/esp32c5.peripherals.ld index 7d78fd392a0..31097118a3f 100644 --- a/components/soc/esp32c5/ld/esp32c5.peripherals.ld +++ b/components/soc/esp32c5/ld/esp32c5.peripherals.ld @@ -44,6 +44,7 @@ PROVIDE ( IO_MUX = 0x60090000 ); PROVIDE ( GPIO = 0x60091000 ); PROVIDE ( GPIO_EXT = 0x60091e00 ); PROVIDE ( SDM = 0x60091e00 ); +PROVIDE ( GPIO_ETM = 0x60091f18 ); PROVIDE ( MEM_MONITOR = 0x60092000 ); PROVIDE ( PAU = 0x60093000 ); PROVIDE ( HP_SYSTEM = 0x60095000 ); diff --git a/docs/docs_not_updated/esp32c5.txt b/docs/docs_not_updated/esp32c5.txt index 10d49479d1f..132596763ef 100644 --- a/docs/docs_not_updated/esp32c5.txt +++ b/docs/docs_not_updated/esp32c5.txt @@ -90,7 +90,6 @@ api-reference/peripherals/usb_host/usb_host_notes_ext_hub.rst api-reference/peripherals/usb_device.rst api-reference/peripherals/sdspi_host.rst api-reference/peripherals/spi_slave.rst -api-reference/peripherals/etm.rst api-reference/peripherals/gptimer.rst api-reference/peripherals/touch_element.rst api-reference/peripherals/lcd.rst diff --git a/examples/peripherals/timer_group/gptimer_capture_hc_sr04/README.md b/examples/peripherals/timer_group/gptimer_capture_hc_sr04/README.md index 474d93d775f..26ed2f38b78 100644 --- a/examples/peripherals/timer_group/gptimer_capture_hc_sr04/README.md +++ b/examples/peripherals/timer_group/gptimer_capture_hc_sr04/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32-C6 | ESP32-H2 | ESP32-P4 | -| ----------------- | -------- | -------- | -------- | +| Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | +| ----------------- | -------- | -------- | -------- | -------- | # HC-SR04 Example based on GPTimer Capture and ETM diff --git a/examples/peripherals/timer_group/gptimer_capture_hc_sr04/pytest_gptimer_capture_example.py b/examples/peripherals/timer_group/gptimer_capture_hc_sr04/pytest_gptimer_capture_example.py index 809c04f3361..0c668e45bb1 100644 --- a/examples/peripherals/timer_group/gptimer_capture_hc_sr04/pytest_gptimer_capture_example.py +++ b/examples/peripherals/timer_group/gptimer_capture_hc_sr04/pytest_gptimer_capture_example.py @@ -1,10 +1,10 @@ # SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD # SPDX-License-Identifier: CC0-1.0 - import pytest from pytest_embedded import Dut +@pytest.mark.esp32c5 @pytest.mark.esp32c6 @pytest.mark.esp32h2 @pytest.mark.esp32p4 From 564b74a9c045a2a2b6c0f85ca54ec4a1eec577fa Mon Sep 17 00:00:00 2001 From: Armando Date: Thu, 11 Jul 2024 15:25:18 +0800 Subject: [PATCH 025/113] feat(cache): supported cache panic on p4 --- .../port/soc/esp32p4/cache_err_int.c | 32 +++++++---- components/hal/esp32p4/include/hal/cache_ll.h | 54 ++++++++++++++++--- .../soc/esp32p4/include/soc/cache_struct.h | 13 ++--- .../soc/esp32p4/ld/esp32p4.peripherals.ld | 2 + tools/test_apps/system/panic/pytest_panic.py | 4 +- 5 files changed, 79 insertions(+), 26 deletions(-) diff --git a/components/esp_system/port/soc/esp32p4/cache_err_int.c b/components/esp_system/port/soc/esp32p4/cache_err_int.c index c1a20bbee16..24904c2d5a8 100644 --- a/components/esp_system/port/soc/esp32p4/cache_err_int.c +++ b/components/esp_system/port/soc/esp32p4/cache_err_int.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -20,19 +20,24 @@ static const char *TAG = "CACHE_ERR"; -//TODO: IDF-7515 +const char cache_error_msg[] = "Cache access error"; + const char *esp_cache_err_panic_string(void) { - return NULL; + uint32_t access_err_status = cache_ll_l1_get_access_error_intr_status(0, CACHE_LL_L1_ACCESS_EVENT_MASK) | cache_ll_l2_get_access_error_intr_status(0, CACHE_LL_L2_ACCESS_EVENT_MASK); + + /* Return the error string if a cache error is active */ + const char* err_str = access_err_status ? cache_error_msg : NULL; + + return err_str; } -//TODO: IDF-7515 bool esp_cache_err_has_active_err(void) { - return false; + bool has_active_err = cache_ll_l1_get_access_error_intr_status(0, CACHE_LL_L1_ACCESS_EVENT_MASK) | cache_ll_l2_get_access_error_intr_status(0, CACHE_LL_L2_ACCESS_EVENT_MASK); + return has_active_err; } -//TODO: IDF-7515 void esp_cache_err_int_init(void) { const uint32_t core_id = 0; @@ -56,10 +61,13 @@ void esp_cache_err_int_init(void) esprv_int_set_priority(ETS_CACHEERR_INUM, SOC_INTERRUPT_LEVEL_MEDIUM); ESP_DRAM_LOGV(TAG, "access error intr clr & ena mask is: 0x%x", CACHE_LL_L1_ACCESS_EVENT_MASK); - /* On the hardware side, start by clearing all the bits reponsible for cache access error */ + /* On the hardware side, start by clearing all the bits responsible for cache access error */ cache_ll_l1_clear_access_error_intr(0, CACHE_LL_L1_ACCESS_EVENT_MASK); + cache_ll_l2_clear_access_error_intr(0, CACHE_LL_L2_ACCESS_EVENT_MASK); + /* Then enable cache access error interrupts. */ cache_ll_l1_enable_access_error_intr(0, CACHE_LL_L1_ACCESS_EVENT_MASK); + cache_ll_l2_enable_access_error_intr(0, CACHE_LL_L2_ACCESS_EVENT_MASK); /* Enable the interrupts for cache error. */ ESP_INTR_ENABLE(ETS_CACHEERR_INUM); @@ -67,7 +75,11 @@ void esp_cache_err_int_init(void) int esp_cache_err_get_cpuid(void) { - //TODO: IDF-7515 - //Should return hart ID according to the cache error - return 0; + if (cache_ll_l1_get_access_error_intr_status(0, CACHE_LL_L1_CORE0_EVENT_MASK)) { + return 0; + } else if (cache_ll_l1_get_access_error_intr_status(0, CACHE_LL_L1_CORE1_EVENT_MASK)) { + return 1; + } else { + return -1; + } } diff --git a/components/hal/esp32p4/include/hal/cache_ll.h b/components/hal/esp32p4/include/hal/cache_ll.h index c2f4bbd2f0a..5e1a07130ee 100644 --- a/components/hal/esp32p4/include/hal/cache_ll.h +++ b/components/hal/esp32p4/include/hal/cache_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -10,6 +10,7 @@ #include #include "soc/cache_reg.h" +#include "soc/cache_struct.h" #include "soc/ext_mem_defs.h" #include "hal/cache_types.h" #include "hal/assert.h" @@ -47,8 +48,10 @@ extern "C" { #define CACHE_LL_DEFAULT_IBUS_MASK (CACHE_BUS_IBUS0 | CACHE_BUS_IBUS1 | CACHE_BUS_IBUS2) #define CACHE_LL_DEFAULT_DBUS_MASK (CACHE_BUS_DBUS0 | CACHE_BUS_DBUS1 | CACHE_BUS_DBUS2) -//TODO: IDF-7515 -#define CACHE_LL_L1_ACCESS_EVENT_MASK (0x3f) +#define CACHE_LL_L1_ACCESS_EVENT_MASK (0x1f) +#define CACHE_LL_L2_ACCESS_EVENT_MASK (1<<6) +#define CACHE_LL_L1_CORE0_EVENT_MASK (1<<0) +#define CACHE_LL_L1_CORE1_EVENT_MASK (1<<1) /*------------------------------------------------------------------------------ * Autoload @@ -1019,27 +1022,29 @@ static inline bool cache_ll_vaddr_to_cache_level_id(uint32_t vaddr_start, uint32 * Interrupt *----------------------------------------------------------------------------*/ /** - * @brief Enable Cache access error interrupt + * @brief Enable L1 Cache access error interrupt * * @param cache_id Cache ID * @param mask Interrupt mask */ static inline void cache_ll_l1_enable_access_error_intr(uint32_t cache_id, uint32_t mask) { + CACHE.l1_cache_acs_fail_int_ena.val |= mask; } /** - * @brief Clear Cache access error interrupt status + * @brief Clear L1 Cache access error interrupt status * * @param cache_id Cache ID * @param mask Interrupt mask */ static inline void cache_ll_l1_clear_access_error_intr(uint32_t cache_id, uint32_t mask) { + CACHE.l1_cache_acs_fail_int_clr.val = mask; } /** - * @brief Get Cache access error interrupt status + * @brief Get L1 Cache access error interrupt status * * @param cache_id Cache ID * @param mask Interrupt mask @@ -1048,7 +1053,42 @@ static inline void cache_ll_l1_clear_access_error_intr(uint32_t cache_id, uint32 */ static inline uint32_t cache_ll_l1_get_access_error_intr_status(uint32_t cache_id, uint32_t mask) { - return 0; + return CACHE.l1_cache_acs_fail_int_st.val & mask; +} + +/** + * @brief Enable L2 Cache access error interrupt + * + * @param cache_id Cache ID + * @param mask Interrupt mask + */ +static inline void cache_ll_l2_enable_access_error_intr(uint32_t cache_id, uint32_t mask) +{ + CACHE.l2_cache_acs_fail_int_ena.val |= mask; +} + +/** + * @brief Clear L2 Cache access error interrupt status + * + * @param cache_id Cache ID + * @param mask Interrupt mask + */ +static inline void cache_ll_l2_clear_access_error_intr(uint32_t cache_id, uint32_t mask) +{ + CACHE.l2_cache_acs_fail_int_clr.val = mask; +} + +/** + * @brief Get L2 Cache access error interrupt status + * + * @param cache_id Cache ID + * @param mask Interrupt mask + * + * @return Status mask + */ +static inline uint32_t cache_ll_l2_get_access_error_intr_status(uint32_t cache_id, uint32_t mask) +{ + return CACHE.l2_cache_acs_fail_int_st.val & mask; } #ifdef __cplusplus diff --git a/components/soc/esp32p4/include/soc/cache_struct.h b/components/soc/esp32p4/include/soc/cache_struct.h index 0c6fb056d52..67e57371b29 100644 --- a/components/soc/esp32p4/include/soc/cache_struct.h +++ b/components/soc/esp32p4/include/soc/cache_struct.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -5269,12 +5269,12 @@ typedef union { struct { /** l1_icache0_unalloc_clr : R/W; bitpos: [0]; default: 0; * The bit is used to clear the unallocate request buffer of l1 icache0 where the - * unallocate request is responsed but not completed. + * unallocate request is responded but not completed. */ uint32_t l1_icache0_unalloc_clr:1; /** l1_icache1_unalloc_clr : R/W; bitpos: [1]; default: 0; * The bit is used to clear the unallocate request buffer of l1 icache1 where the - * unallocate request is responsed but not completed. + * unallocate request is responded but not completed. */ uint32_t l1_icache1_unalloc_clr:1; /** l1_icache2_unalloc_clr : HRO; bitpos: [2]; default: 0; @@ -5287,7 +5287,7 @@ typedef union { uint32_t l1_icache3_unalloc_clr:1; /** l1_dcache_unalloc_clr : R/W; bitpos: [4]; default: 0; * The bit is used to clear the unallocate request buffer of l1 dcache where the - * unallocate request is responsed but not completed. + * unallocate request is responded but not completed. */ uint32_t l1_dcache_unalloc_clr:1; uint32_t reserved_5:27; @@ -5303,7 +5303,7 @@ typedef union { uint32_t reserved_0:5; /** l2_cache_unalloc_clr : R/W; bitpos: [5]; default: 0; * The bit is used to clear the unallocate request buffer of l2 icache where the - * unallocate request is responsed but not completed. + * unallocate request is responded but not completed. */ uint32_t l2_cache_unalloc_clr:1; uint32_t reserved_6:26; @@ -5548,7 +5548,7 @@ typedef union { } cache_date_reg_t; -typedef struct { +typedef struct cache_dev_t { volatile cache_l1_icache_ctrl_reg_t l1_icache_ctrl; volatile cache_l1_dcache_ctrl_reg_t l1_dcache_ctrl; volatile cache_l1_bypass_cache_conf_reg_t l1_bypass_cache_conf; @@ -5799,6 +5799,7 @@ typedef struct { volatile cache_date_reg_t date; } cache_dev_t; +extern cache_dev_t CACHE; #ifndef __cplusplus _Static_assert(sizeof(cache_dev_t) == 0x400, "Invalid size of cache_dev_t structure"); diff --git a/components/soc/esp32p4/ld/esp32p4.peripherals.ld b/components/soc/esp32p4/ld/esp32p4.peripherals.ld index f8aaaf3fefd..82b7bd46b78 100644 --- a/components/soc/esp32p4/ld/esp32p4.peripherals.ld +++ b/components/soc/esp32p4/ld/esp32p4.peripherals.ld @@ -117,3 +117,5 @@ PROVIDE ( USB_UTMI = 0x5009C000 ); PROVIDE ( EMAC_MAC = 0x50098000 ); PROVIDE ( EMAC_DMA = 0x50099000 ); + +PROVIDE ( CACHE = 0x3FF10000); diff --git a/tools/test_apps/system/panic/pytest_panic.py b/tools/test_apps/system/panic/pytest_panic.py index 3339147b202..c6b26f3c982 100644 --- a/tools/test_apps/system/panic/pytest_panic.py +++ b/tools/test_apps/system/panic/pytest_panic.py @@ -299,14 +299,12 @@ def test_cache_error(dut: PanicTestDut, config: str, test_func_name: str) -> Non if dut.target in ['esp32c3', 'esp32c2']: dut.expect_gme('Cache error') dut.expect_exact('Cached memory region accessed while ibus or cache is disabled') - elif dut.target in ['esp32c6', 'esp32h2']: + elif dut.target in ['esp32c6', 'esp32h2', 'esp32p4']: dut.expect_gme('Cache error') dut.expect_exact('Cache access error') elif dut.target in ['esp32s2']: # Cache error interrupt is not enabled, IDF-1558 dut.expect_gme('IllegalInstruction') - elif dut.target in ['esp32p4']: # TODO IDF-7515 - dut.expect_gme('Instruction access fault') else: dut.expect_gme('Cache disabled but cached memory region accessed') dut.expect_reg_dump(0) From 3aa448ee0df81afc844894bfe1e3a59205a72a8a Mon Sep 17 00:00:00 2001 From: "nilesh.kale" Date: Wed, 10 Jul 2024 12:01:46 +0530 Subject: [PATCH 026/113] fix: disable config for RSA during secure boot support for RSA secure boot is disabled for ESP32-ECO0 due to hardware issue. It will be re-enabled in future version ECO1. For ESP32C5- ECO0 , ECDSA secure boot is the recommended option. --- components/soc/esp32c5/include/soc/Kconfig.soc_caps.in | 4 ---- components/soc/esp32c5/include/soc/soc_caps.h | 1 - docs/en/security/secure-boot-v2.rst | 6 +++--- 3 files changed, 3 insertions(+), 8 deletions(-) diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index d9435e8d6fa..b59bbf060fe 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -863,10 +863,6 @@ config SOC_EFUSE_ECDSA_KEY bool default y -config SOC_SECURE_BOOT_V2_RSA - bool - default y - config SOC_SECURE_BOOT_V2_ECC bool default y diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index b63ac4b9035..751341a7e8e 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -474,7 +474,6 @@ #define SOC_EFUSE_ECDSA_KEY 1 /*-------------------------- Secure Boot CAPS----------------------------*/ -#define SOC_SECURE_BOOT_V2_RSA 1 #define SOC_SECURE_BOOT_V2_ECC 1 #define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3 #define SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS 1 diff --git a/docs/en/security/secure-boot-v2.rst b/docs/en/security/secure-boot-v2.rst index 4b84a2780fa..f9cf3d374eb 100644 --- a/docs/en/security/secure-boot-v2.rst +++ b/docs/en/security/secure-boot-v2.rst @@ -7,9 +7,9 @@ Secure Boot v2 {IDF_TARGET_SBV2_SCHEME:default="RSA-PSS", esp32c2="ECDSA", esp32c6="RSA-PSS or ECDSA", esp32h2="RSA-PSS or ECDSA", esp32p4="RSA-PSS or ECDSA", esp32c5="RSA-PSS or ECDSA"} -{IDF_TARGET_SBV2_KEY:default="RSA-3072", esp32c2="ECDSA-256 or ECDSA-192", esp32c6="RSA-3072, ECDSA-256, or ECDSA-192", esp32h2="RSA-3072, ECDSA-256, or ECDSA-192", esp32p4="RSA-3072, ECDSA-256, or ECDSA-192", esp32c5="RSA-3072, ECDSA-256, or ECDSA-192"} +{IDF_TARGET_SBV2_KEY:default="RSA-3072", esp32c2="ECDSA-256 or ECDSA-192", esp32c6="RSA-3072, ECDSA-256, or ECDSA-192", esp32h2="RSA-3072, ECDSA-256, or ECDSA-192", esp32p4="RSA-3072, ECDSA-256, or ECDSA-192", esp32c5="ECDSA-256, or ECDSA-192"} -{IDF_TARGET_SECURE_BOOT_OPTION_TEXT:default="", esp32c6="RSA is recommended because of faster verification time. You can choose between RSA and ECDSA scheme from the menu.", esp32h2="RSA is recommended because of faster verification time. You can choose between RSA and ECDSA scheme from the menu.", esp32p4="RSA is recommended because of faster verification time. You can choose between RSA and ECDSA scheme from the menu.", esp32c5="RSA is recommended because of faster verification time. You can choose between RSA and ECDSA scheme from the menu."} +{IDF_TARGET_SECURE_BOOT_OPTION_TEXT:default="", esp32c6="RSA is recommended because of faster verification time. You can choose between RSA and ECDSA scheme from the menu.", esp32h2="RSA is recommended because of faster verification time. You can choose between RSA and ECDSA scheme from the menu.", esp32p4="RSA is recommended because of faster verification time. You can choose between RSA and ECDSA scheme from the menu."} {IDF_TARGET_ECO_VERSION:default="", esp32="(v3.0 onwards)", esp32c3="(v3.0 onwards)"} @@ -19,7 +19,7 @@ Secure Boot v2 {IDF_TARGET_CPU_FREQ:default="", esp32c6="160 MHz", esp32h2="96 MHz", esp32p4="360 MHz"} -{IDF_TARGET_SBV2_DEFAULT_SCHEME:default="RSA", esp32c2="ECDSA (v2)"} +{IDF_TARGET_SBV2_DEFAULT_SCHEME:default="RSA", esp32c2="ECDSA (v2), esp32c5="ECDSA (v2)"} .. important:: From f55ab6f17cdbb7cfe89be03f6432cfbef930eb4c Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Fri, 12 Jul 2024 15:40:36 +0800 Subject: [PATCH 027/113] fix(esp_hw_support): fix cpu_retention cache invalidate mask --- .../lowpower/cpu_retention/port/esp32p4/sleep_cpu_asm.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/components/esp_hw_support/lowpower/cpu_retention/port/esp32p4/sleep_cpu_asm.S b/components/esp_hw_support/lowpower/cpu_retention/port/esp32p4/sleep_cpu_asm.S index 046ef617776..f6d8a9d6dda 100644 --- a/components/esp_hw_support/lowpower/cpu_retention/port/esp32p4/sleep_cpu_asm.S +++ b/components/esp_hw_support/lowpower/cpu_retention/port/esp32p4/sleep_cpu_asm.S @@ -10,7 +10,8 @@ #include "sdkconfig.h" #include "soc/cache_reg.h" -#define MTVT (0x307) +#define CACHE_MAP_L1_CACHE_MASK (BIT(0) | BIT(1) | BIT(4)) +#define MTVT (0x307) .section .tcm.data,"aw" .global rv_core_critical_regs_frame @@ -154,7 +155,7 @@ rv_core_critical_regs_restore: /* Core 0 is wakeup core, Invalidate L1 Cache here */ /* Invalidate L1 cache is required here!!! */ la t0, CACHE_SYNC_MAP_REG - li t1, 0x7 /* map l1 i/dcache */ + li t1, CACHE_MAP_L1_CACHE_MASK /* map l1 i/dcache */ sw t1, 0x0(t0) /* set EXTMEM_CACHE_SYNC_MAP_REG bit 4 */ la t2, CACHE_SYNC_ADDR_REG sw zero, 0x0(t2) /* clear EXTMEM_CACHE_SYNC_ADDR_REG */ From 55fd3f10592bcb5e8e4dab2646b2f958b3e256cd Mon Sep 17 00:00:00 2001 From: linruihao Date: Fri, 12 Jul 2024 11:35:20 +0800 Subject: [PATCH 028/113] fix(coex): Update bt lib for ESP32-C3 and ESP32-S3(e4ba7f6) - Fixed coexist LoadProhibited issue --- components/bt/controller/lib_esp32c3_family | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/bt/controller/lib_esp32c3_family b/components/bt/controller/lib_esp32c3_family index d53a6a695af..55485554203 160000 --- a/components/bt/controller/lib_esp32c3_family +++ b/components/bt/controller/lib_esp32c3_family @@ -1 +1 @@ -Subproject commit d53a6a695af1e78a6f36691e2cf525f9787abfdb +Subproject commit 55485554203a225ff09a8dfcf5284c46b70aa0bd From 1f14018c30347725397e8800caaede4b079746ae Mon Sep 17 00:00:00 2001 From: David Cermak Date: Fri, 24 May 2024 11:53:25 +0200 Subject: [PATCH 029/113] feat(lwip): Add support for PPP Auth using mbedTLS Closes https://github.com/espressif/esp-idf/issues/13597 --- components/lwip/CMakeLists.txt | 20 ++++++++++++++------ components/lwip/Kconfig | 11 +++++++++++ components/lwip/lwip | 2 +- components/lwip/port/include/lwipopts.h | 9 +++++++++ 4 files changed, 35 insertions(+), 7 deletions(-) diff --git a/components/lwip/CMakeLists.txt b/components/lwip/CMakeLists.txt index f45eeab2ed1..8c55884277d 100644 --- a/components/lwip/CMakeLists.txt +++ b/components/lwip/CMakeLists.txt @@ -132,12 +132,7 @@ if(CONFIG_LWIP_ENABLE) "lwip/src/netif/ppp/pppos.c" "lwip/src/netif/ppp/upap.c" "lwip/src/netif/ppp/utils.c" - "lwip/src/netif/ppp/vj.c" - "lwip/src/netif/ppp/polarssl/arc4.c" - "lwip/src/netif/ppp/polarssl/des.c" - "lwip/src/netif/ppp/polarssl/md4.c" - "lwip/src/netif/ppp/polarssl/md5.c" - "lwip/src/netif/ppp/polarssl/sha1.c") + "lwip/src/netif/ppp/vj.c") endif() if(NOT ${target} STREQUAL "linux") @@ -160,6 +155,15 @@ if(CONFIG_LWIP_ENABLE) "apps/ping/ping_sock.c") endif() + if(NOT CONFIG_LWIP_USE_EXTERNAL_MBEDTLS) + list(APPEND srcs + "lwip/src/netif/ppp/polarssl/arc4.c" + "lwip/src/netif/ppp/polarssl/des.c" + "lwip/src/netif/ppp/polarssl/md4.c" + "lwip/src/netif/ppp/polarssl/md5.c" + "lwip/src/netif/ppp/polarssl/sha1.c") + endif() + if(CONFIG_LWIP_DHCPS) list(APPEND srcs "apps/dhcpserver/dhcpserver.c") endif() @@ -211,6 +215,10 @@ if(CONFIG_LWIP_ENABLE) idf_component_optional_requires(PRIVATE nvs_flash) endif() + if(CONFIG_LWIP_USE_EXTERNAL_MBEDTLS) + idf_component_optional_requires(PRIVATE mbedtls) + endif() + if(${target} STREQUAL "linux") set(THREADS_PREFER_PTHREAD_FLAG ON) find_package(Threads REQUIRED) diff --git a/components/lwip/Kconfig b/components/lwip/Kconfig index 2ab55e35c22..90ee1262013 100644 --- a/components/lwip/Kconfig +++ b/components/lwip/Kconfig @@ -998,6 +998,17 @@ menu "LWIP" help Enable PPP debug log output + config LWIP_USE_EXTERNAL_MBEDTLS + bool "Use mbedTLS instead of internal polarSSL" + depends on LWIP_PPP_SUPPORT + depends on !LWIP_PPP_MPPE_SUPPORT && !LWIP_PPP_MSCHAP_SUPPORT + default n + help + This option uses mbedTLS crypto functions (instead of internal PolarSSL + implementation) for PPP authentication modes (PAP, CHAP, etc.). + You can use this option to address symbol duplication issues, since + the internal functions are not namespaced (e.g. md5_init()). + menuconfig LWIP_SLIP_SUPPORT bool "Enable SLIP support (new/experimental)" default n diff --git a/components/lwip/lwip b/components/lwip/lwip index 3a3d1fb3e3b..e8d0513898c 160000 --- a/components/lwip/lwip +++ b/components/lwip/lwip @@ -1 +1 @@ -Subproject commit 3a3d1fb3e3bc23cf86cf653ce5928eda47e2c15d +Subproject commit e8d0513898ce96d7851b41bc6acb7af3259a447b diff --git a/components/lwip/port/include/lwipopts.h b/components/lwip/port/include/lwipopts.h index b20b07479bd..c9a6d570229 100644 --- a/components/lwip/port/include/lwipopts.h +++ b/components/lwip/port/include/lwipopts.h @@ -1151,6 +1151,15 @@ static inline uint32_t timeout_from_offered(uint32_t lease, uint32_t min) #define PPP_SUPPORT 0 #endif /* CONFIG_LWIP_PPP_SUPPORT */ +/** + * LWIP_USE_EXTERNAL_MBEDTLS: Use external mbed TLS library for crypto implementation used in PPP AUTH + */ +#ifdef CONFIG_LWIP_USE_EXTERNAL_MBEDTLS +#define LWIP_USE_EXTERNAL_MBEDTLS 1 +#else +#define LWIP_USE_EXTERNAL_MBEDTLS 0 +#endif + /* -------------------------------------- ---------- Checksum options ---------- From 562abca17daaf8218d91ae8dad27b8c0da655364 Mon Sep 17 00:00:00 2001 From: David Cermak Date: Fri, 24 May 2024 14:37:57 +0200 Subject: [PATCH 030/113] fix(esp_netif): Remove unused leftover pppapi_set_auth() call --- components/esp_netif/lwip/esp_netif_lwip.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/components/esp_netif/lwip/esp_netif_lwip.c b/components/esp_netif/lwip/esp_netif_lwip.c index 5915a3a3cac..20ce5f5d7f3 100644 --- a/components/esp_netif/lwip/esp_netif_lwip.c +++ b/components/esp_netif/lwip/esp_netif_lwip.c @@ -2632,15 +2632,6 @@ esp_err_t esp_netif_ppp_set_auth(esp_netif_t *esp_netif, esp_netif_auth_type_t a { set_auth_msg_t msg = { .authtype = authtype, .user = user, .passwd = passwd }; return esp_netif_lwip_ipc_call(esp_netif_ppp_set_auth_api, esp_netif, &msg); -#if PPP_AUTH_SUPPORT - lwip_peer2peer_ctx_t *ppp_ctx = (lwip_peer2peer_ctx_t *)netif->related_data; - assert(ppp_ctx->base.netif_type == PPP_LWIP_NETIF); - pppapi_set_auth(ppp_ctx->ppp, authtype, user, passwd); - return ESP_OK; -#else - ESP_LOGE(TAG, "%s failed: No authorisation enabled in menuconfig", __func__); - return ESP_ERR_ESP_NETIF_IF_NOT_READY; -#endif } esp_err_t esp_netif_napt_disable(esp_netif_t *esp_netif) From 97d30e7c48bfedec59a03ccebb7bc203ba86e126 Mon Sep 17 00:00:00 2001 From: Roman Leonov Date: Wed, 10 Jul 2024 12:05:28 +0200 Subject: [PATCH 031/113] fix(usb_dwc_hal): Enabled precise detection of VBUS --- .../hal/esp32p4/include/hal/usb_wrap_ll.h | 9 +++++++ .../usb/test_apps/hcd/main/test_hcd_port.c | 25 ++++++++++++++++++- components/usb/usb_phy_p4.c | 16 ++++++++++++ 3 files changed, 49 insertions(+), 1 deletion(-) diff --git a/components/hal/esp32p4/include/hal/usb_wrap_ll.h b/components/hal/esp32p4/include/hal/usb_wrap_ll.h index 5e6b9423668..113a56fe771 100644 --- a/components/hal/esp32p4/include/hal/usb_wrap_ll.h +++ b/components/hal/esp32p4/include/hal/usb_wrap_ll.h @@ -12,6 +12,7 @@ #include "soc/lp_system_struct.h" #include "soc/lp_clkrst_struct.h" #include "soc/hp_sys_clkrst_struct.h" +#include "soc/hp_system_struct.h" // For HP_SYSTEM domain #include "soc/usb_wrap_struct.h" #include "hal/usb_wrap_types.h" @@ -262,6 +263,14 @@ FORCE_INLINE_ATTR void usb_wrap_ll_reset_register(void) // P_AON_CLKRST.hp_usb_clkrst_ctrlx are shared registers, so this function must be used in an atomic way #define usb_wrap_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; usb_wrap_ll_reset_register(__VA_ARGS__) +/* ------------------------------- HP System ------------------------------- */ + +FORCE_INLINE_ATTR void usb_wrap_ll_enable_precise_detection(void) +{ + // Enable VBUS precise detection + HP_SYSTEM.sys_usbotg20_ctrl.sys_otg_suspendm = 1; +} + #ifdef __cplusplus } #endif diff --git a/components/usb/test_apps/hcd/main/test_hcd_port.c b/components/usb/test_apps/hcd/main/test_hcd_port.c index 67f502335b0..7ddb4a2cb2b 100644 --- a/components/usb/test_apps/hcd/main/test_hcd_port.c +++ b/components/usb/test_apps/hcd/main/test_hcd_port.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -18,6 +18,29 @@ #define URB_DATA_BUFF_SIZE (sizeof(usb_setup_packet_t) + TRANSFER_MAX_BYTES) // 256 is worst case size for configuration descriptors #define POST_ENQUEUE_DELAY_US 10 +/* +Test a port for a disconnect event, when port is in ENABLED state + +Purpose: This test is essential on HS HCD ports, when device is detaching during the action. + When the HS port is ENABLED, the port operates in HS mode and device disconnection is detected by HS logic. + When the HS port is DISABLED (without issuing a reset), the port operates in FS mode and device disconnection differs for HS mode disconnection logic. + +Procedure: + - Setup the HCD and a port + - Trigger the port connection event + - Trigger the port disconnection event + - Teardown port and HCD +*/ +TEST_CASE("Test HCD port disconnect event, port enabled", "[port][low_speed][full_speed]") +{ + usb_speed_t port_speed = test_hcd_wait_for_conn(port_hdl); // Trigger a connection + printf("Connected %s speed device \n", (char*[]) { + "Low", "Full", "High" + }[port_speed]); + vTaskDelay(pdMS_TO_TICKS(100)); // Short delay send of SOF (for FS) or EOPs (for LS) + test_hcd_wait_for_disconn(port_hdl, true); +} + /* Test a port sudden disconnect and port recovery diff --git a/components/usb/usb_phy_p4.c b/components/usb/usb_phy_p4.c index cff6420e082..a541fafe4c4 100644 --- a/components/usb/usb_phy_p4.c +++ b/components/usb/usb_phy_p4.c @@ -6,11 +6,27 @@ // This is only a dummy USB PHY file for successful linking of ESP32-P4 target // The internal HS PHY is enabled by default, therefore it needs no configuration + +// TODO: Refactor during the IDF-9198 +#include "sdkconfig.h" +#include "soc/usb_dwc_cfg.h" +#include "hal/usb_wrap_hal.h" // TODO: Remove this file when proper support of P4 PHYs is implemented IDF-7323 #include "esp_private/usb_phy.h" esp_err_t usb_new_phy(const usb_phy_config_t *config, usb_phy_handle_t *handle_ret) { +#if (OTG_HSPHY_INTERFACE != 0) +#if CONFIG_IDF_TARGET_ESP32P4 + /* + Additional setting to solve missing DCONN event on ESP32P4 (IDF-9953). + + Note: On ESP32P4, the HP_SYSTEM_OTG_SUSPENDM is not connected to 1 by hardware. + For correct detection of the device detaching, internal signal should be set to 1 by the software. + */ + usb_wrap_ll_enable_precise_detection(); +#endif // CONFIG_IDF_TARGET_ESP32P4 +#endif // (OTG_HSPHY_INTERFACE != 0) return ESP_OK; } From 55bbd9c95aae07059a6e668d2b55ca1152207622 Mon Sep 17 00:00:00 2001 From: "nilesh.kale" Date: Fri, 5 Jul 2024 15:10:41 +0530 Subject: [PATCH 032/113] feat: add config option under partition menu to support large size ota This commit adds one more config option under partition table menu to support large size image during ota This also updates the default config for simple ota example. --- components/partition_table/Kconfig.projbuild | 18 ++++++++++ .../partitions_two_ota_large.csv | 7 ++++ .../simple_ota_example/pytest_simple_ota.py | 34 +++++++++++-------- .../ota/simple_ota_example/sdkconfig.defaults | 3 ++ 4 files changed, 47 insertions(+), 15 deletions(-) create mode 100644 components/partition_table/partitions_two_ota_large.csv diff --git a/components/partition_table/Kconfig.projbuild b/components/partition_table/Kconfig.projbuild index d4d7bd9b369..e3740d9dade 100644 --- a/components/partition_table/Kconfig.projbuild +++ b/components/partition_table/Kconfig.projbuild @@ -25,6 +25,7 @@ menu "Partition Table" This partition table is not suitable for an app that needs OTA (over the air update) capability. + config PARTITION_TABLE_SINGLE_APP_LARGE bool "Single factory app (large), no OTA" help @@ -36,6 +37,7 @@ menu "Partition Table" This partition table is not suitable for an app that needs OTA (over the air update) capability. + config PARTITION_TABLE_TWO_OTA bool "Factory app, two OTA definitions" help @@ -45,6 +47,17 @@ menu "Partition Table" The corresponding CSV file in the IDF directory is components/partition_table/partitions_two_ota.csv + + config PARTITION_TABLE_TWO_OTA_LARGE + bool "Two large size OTA partitions" + help + This is a basic OTA-enabled partition table with + two OTA app partitions. Both app partition sizes are 1700K, + so this partition table requires 4MB or larger flash size. + + The corresponding CSV file in the IDF directory is + components/partition_table/partitions_two_ota_large.csv + config PARTITION_TABLE_CUSTOM bool "Custom partition table CSV" help @@ -52,6 +65,7 @@ menu "Partition Table" Consult the Partition Table section in the ESP-IDF Programmers Guide for more information. + config PARTITION_TABLE_SINGLE_APP_ENCRYPTED_NVS bool "Single factory app, no OTA, encrypted NVS" depends on !ESP32_COREDUMP_ENABLE_TO_FLASH && NVS_SEC_KEY_PROTECT_USING_FLASH_ENC @@ -63,6 +77,7 @@ menu "Partition Table" The corresponding CSV file in the IDF directory is components/partition_table/partitions_singleapp_encr_nvs.csv + config PARTITION_TABLE_SINGLE_APP_LARGE_ENC_NVS bool "Single factory app (large), no OTA, encrypted NVS" depends on !ESP32_COREDUMP_ENABLE_TO_FLASH && NVS_SEC_KEY_PROTECT_USING_FLASH_ENC @@ -73,6 +88,7 @@ menu "Partition Table" The corresponding CSV file in the IDF directory is components/partition_table/partitions_singleapp_large_encr_nvs.csv + config PARTITION_TABLE_TWO_OTA_ENCRYPTED_NVS bool "Factory app, two OTA definitions, encrypted NVS" depends on !ESP_COREDUMP_ENABLE_TO_FLASH && NVS_SEC_KEY_PROTECT_USING_FLASH_ENC @@ -83,6 +99,7 @@ menu "Partition Table" The corresponding CSV file in the IDF directory is components/partition_table/partitions_two_ota_encr_nvs.csv + endchoice config PARTITION_TABLE_CUSTOM_FILENAME @@ -104,6 +121,7 @@ menu "Partition Table" default "partitions_two_ota.csv" if PARTITION_TABLE_TWO_OTA && !ESP_COREDUMP_ENABLE_TO_FLASH default "partitions_two_ota_coredump.csv" if PARTITION_TABLE_TWO_OTA && ESP_COREDUMP_ENABLE_TO_FLASH default "partitions_two_ota_encr_nvs.csv" if PARTITION_TABLE_TWO_OTA_ENCRYPTED_NVS + default "partitions_two_ota_large.csv" if PARTITION_TABLE_TWO_OTA_LARGE && !ESP_COREDUMP_ENABLE_TO_FLASH default PARTITION_TABLE_CUSTOM_FILENAME if PARTITION_TABLE_CUSTOM config PARTITION_TABLE_OFFSET diff --git a/components/partition_table/partitions_two_ota_large.csv b/components/partition_table/partitions_two_ota_large.csv new file mode 100644 index 00000000000..0e6dacd1fe5 --- /dev/null +++ b/components/partition_table/partitions_two_ota_large.csv @@ -0,0 +1,7 @@ +# Name, Type, SubType, Offset, Size, Flags +# Note: if you have increased the bootloader size, make sure to update the offsets to avoid overlap +nvs, data, nvs, , 0x6000, +otadata, data, ota, , 0x2000, +phy_init, data, phy, , 0x1000, +ota_0, app, ota_0, , 1700K, +ota_1, app, ota_1, , 1700K, diff --git a/examples/system/ota/simple_ota_example/pytest_simple_ota.py b/examples/system/ota/simple_ota_example/pytest_simple_ota.py index 0595a9c2f76..8fffb24cc2a 100644 --- a/examples/system/ota/simple_ota_example/pytest_simple_ota.py +++ b/examples/system/ota/simple_ota_example/pytest_simple_ota.py @@ -6,6 +6,7 @@ import ssl import subprocess import sys +from typing import Optional from typing import Tuple import pexpect @@ -69,8 +70,11 @@ 'vSXnRLaxQhooWm+IuX9SuBQ=\n'\ '-----END PRIVATE KEY-----\n' +OTA1_ADDRESS = '0x20000' +OTA2_ADDRESS = '0x1d0000' -def start_https_server(ota_image_dir: str, server_ip: str, server_port: int, server_file: str = None, key_file: str = None) -> None: + +def start_https_server(ota_image_dir: str, server_ip: str, server_port: int, server_file: Optional[str] = None, key_file: Optional[str] = None) -> None: os.chdir(ota_image_dir) if server_file is None: @@ -147,7 +151,7 @@ def test_examples_protocol_simple_ota_example(dut: Dut) -> None: thread1.start() try: # start test - dut.expect('Loaded app from partition at offset 0x10000', timeout=30) + dut.expect(f'Loaded app from partition at offset {OTA1_ADDRESS}', timeout=30) check_sha256(sha256_bootloader, str(dut.expect(r'SHA-256 for bootloader:\s+([a-f0-9]){64}')[0])) check_sha256(sha256_app, str(dut.expect(r'SHA-256 for current firmware:\s+([a-f0-9]){64}')[0])) # Parse IP address of STA @@ -169,7 +173,7 @@ def test_examples_protocol_simple_ota_example(dut: Dut) -> None: dut.write('https://' + host_ip + ':8000/simple_ota.bin') dut.expect('OTA Succeed, Rebooting...', timeout=60) # after reboot - dut.expect('Loaded app from partition at offset 0x110000', timeout=30) + dut.expect(f'Loaded app from partition at offset {OTA2_ADDRESS}', timeout=30) dut.expect('OTA example app_main start', timeout=10) finally: thread1.terminate() @@ -191,7 +195,7 @@ def test_examples_protocol_simple_ota_example_ethernet_with_spiram_config(dut: D thread1.start() try: # start test - dut.expect('Loaded app from partition at offset 0x10000', timeout=30) + dut.expect(f'Loaded app from partition at offset {OTA1_ADDRESS}', timeout=30) try: ip_address = dut.expect(r'IPv4 address: (\d+\.\d+\.\d+\.\d+)[^\d]', timeout=30)[1].decode() print('Connected to AP/Ethernet with IP: {}'.format(ip_address)) @@ -204,7 +208,7 @@ def test_examples_protocol_simple_ota_example_ethernet_with_spiram_config(dut: D dut.write('https://' + host_ip + ':8000/simple_ota.bin') dut.expect('OTA Succeed, Rebooting...', timeout=60) # after reboot - dut.expect('Loaded app from partition at offset 0x110000', timeout=30) + dut.expect(f'Loaded app from partition at offset {OTA2_ADDRESS}', timeout=30) dut.expect('OTA example app_main start', timeout=10) finally: thread1.terminate() @@ -232,7 +236,7 @@ def test_examples_protocol_simple_ota_example_with_flash_encryption_wifi(dut: Du thread1.daemon = True thread1.start() try: - dut.expect('Loaded app from partition at offset 0x20000', timeout=30) + dut.expect(f'Loaded app from partition at offset {OTA1_ADDRESS}', timeout=30) dut.expect('Flash encryption mode is DEVELOPMENT', timeout=10) # Parse IP address of STA if dut.app.sdkconfig.get('EXAMPLE_WIFI_SSID_PWD_FROM_STDIN') is True: @@ -253,7 +257,7 @@ def test_examples_protocol_simple_ota_example_with_flash_encryption_wifi(dut: Du dut.write('https://' + host_ip + ':8000/simple_ota.bin') dut.expect('OTA Succeed, Rebooting...', timeout=60) # after reboot - dut.expect('Loaded app from partition at offset 0x120000', timeout=30) + dut.expect(f'Loaded app from partition at offset {OTA2_ADDRESS}', timeout=30) dut.expect('Flash encryption mode is DEVELOPMENT', timeout=10) dut.expect('OTA example app_main start', timeout=10) finally: @@ -277,7 +281,7 @@ def test_examples_protocol_simple_ota_example_with_verify_app_signature_on_updat thread1.start() try: # start test - dut.expect('Loaded app from partition at offset 0x20000', timeout=30) + dut.expect(f'Loaded app from partition at offset {OTA1_ADDRESS}', timeout=30) check_sha256(sha256_bootloader, str(dut.expect(r'SHA-256 for bootloader:\s+([a-f0-9]){64}')[0])) check_sha256(sha256_app, str(dut.expect(r'SHA-256 for current firmware:\s+([a-f0-9]){64}')[0])) try: @@ -290,11 +294,11 @@ def test_examples_protocol_simple_ota_example_with_verify_app_signature_on_updat dut.expect('Starting OTA example task', timeout=30) print('writing to device: {}'.format('https://' + host_ip + ':8000/simple_ota.bin')) dut.write('https://' + host_ip + ':8000/simple_ota.bin') - dut.expect('Writing to partition subtype 16 at offset 0x120000', timeout=20) + dut.expect(f'Writing to partition subtype 17 at offset {OTA2_ADDRESS}', timeout=20) dut.expect('Verifying image signature...', timeout=60) dut.expect('OTA Succeed, Rebooting...', timeout=60) # after reboot - dut.expect('Loaded app from partition at offset 0x120000', timeout=20) + dut.expect(f'Loaded app from partition at offset {OTA2_ADDRESS}', timeout=20) dut.expect('OTA example app_main start', timeout=10) finally: thread1.terminate() @@ -317,7 +321,7 @@ def test_examples_protocol_simple_ota_example_with_verify_app_signature_on_updat thread1.start() try: # start test - dut.expect('Loaded app from partition at offset 0x20000', timeout=30) + dut.expect(f'Loaded app from partition at offset {OTA1_ADDRESS}', timeout=30) check_sha256(sha256_bootloader, str(dut.expect(r'SHA-256 for bootloader:\s+([a-f0-9]){64}')[0])) check_sha256(sha256_app, str(dut.expect(r'SHA-256 for current firmware:\s+([a-f0-9]){64}')[0])) try: @@ -330,14 +334,14 @@ def test_examples_protocol_simple_ota_example_with_verify_app_signature_on_updat dut.expect('Starting OTA example task', timeout=30) print('writing to device: {}'.format('https://' + host_ip + ':8000/simple_ota.bin')) dut.write('https://' + host_ip + ':8000/simple_ota.bin') - dut.expect('Writing to partition subtype 16 at offset 0x120000', timeout=20) + dut.expect(f'Writing to partition subtype 17 at offset {OTA2_ADDRESS}', timeout=20) dut.expect('Verifying image signature...', timeout=60) dut.expect('#0 app key digest == #0 trusted key digest', timeout=10) dut.expect('Verifying with RSA-PSS...', timeout=10) dut.expect('Signature verified successfully!', timeout=10) dut.expect('OTA Succeed, Rebooting...', timeout=60) # after reboot - dut.expect('Loaded app from partition at offset 0x120000', timeout=20) + dut.expect(f'Loaded app from partition at offset {OTA2_ADDRESS}', timeout=20) dut.expect('OTA example app_main start', timeout=10) finally: thread1.terminate() @@ -358,7 +362,7 @@ def test_examples_protocol_simple_ota_example_tls1_3(dut: Dut) -> None: tls1_3_server = start_tls1_3_server(dut.app.binary_path, 8000) try: # start test - dut.expect('Loaded app from partition at offset 0x10000', timeout=30) + dut.expect(f'Loaded app from partition at offset {OTA1_ADDRESS}', timeout=30) check_sha256(sha256_bootloader, str(dut.expect(r'SHA-256 for bootloader:\s+([a-f0-9]){64}')[0])) check_sha256(sha256_app, str(dut.expect(r'SHA-256 for current firmware:\s+([a-f0-9]){64}')[0])) # Parse IP address of STA @@ -380,7 +384,7 @@ def test_examples_protocol_simple_ota_example_tls1_3(dut: Dut) -> None: dut.write('https://' + host_ip + ':8000/simple_ota.bin') dut.expect('OTA Succeed, Rebooting...', timeout=120) # after reboot - dut.expect('Loaded app from partition at offset 0x110000', timeout=30) + dut.expect(f'Loaded app from partition at offset {OTA2_ADDRESS}', timeout=30) dut.expect('OTA example app_main start', timeout=10) finally: tls1_3_server.kill() diff --git a/examples/system/ota/simple_ota_example/sdkconfig.defaults b/examples/system/ota/simple_ota_example/sdkconfig.defaults index 748f1e2f653..6ac294ee701 100644 --- a/examples/system/ota/simple_ota_example/sdkconfig.defaults +++ b/examples/system/ota/simple_ota_example/sdkconfig.defaults @@ -7,3 +7,6 @@ CONFIG_PARTITION_TABLE_TWO_OTA=y CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN=y CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE=y CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE_PATH="server_certs/ca_cert.pem" + +# Default partition table config +CONFIG_PARTITION_TABLE_TWO_OTA_LARGE=y From c00b55e9e67360be2683ceb2d45208f010b5ffc8 Mon Sep 17 00:00:00 2001 From: Lou Tianhao Date: Mon, 8 Jul 2024 16:58:18 +0800 Subject: [PATCH 033/113] fix(soc): c61 update pmu_struct to v1.1.14 --- .../soc/esp32c61/include/soc/pmu_struct.h | 22 ++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/components/soc/esp32c61/include/soc/pmu_struct.h b/components/soc/esp32c61/include/soc/pmu_struct.h index 2ca2ee6801a..3e2f9fb16f6 100644 --- a/components/soc/esp32c61/include/soc/pmu_struct.h +++ b/components/soc/esp32c61/include/soc/pmu_struct.h @@ -14,7 +14,6 @@ extern "C" { #include "soc.h" #include "soc/pmu_reg.h" -// TODO: [ESP32C61] This file comes from verification branch typedef union { struct { uint32_t reserved0 : 21; @@ -377,6 +376,16 @@ typedef union { uint32_t val; } pmu_power_wait_timer1_reg_t; +typedef union { + struct { + uint32_t lp_iso_wait_timer: 8; + uint32_t lp_rst_wait_timer: 8; + uint32_t hp_iso_wait_timer: 8; + uint32_t hp_rst_wait_timer: 8; + }; + uint32_t val; +} pmu_power_wait_timer2_reg_t; + typedef union { struct { uint32_t force_reset : 1; @@ -446,6 +455,7 @@ typedef union { typedef struct pmu_power_hw_regmap_t{ pmu_power_wait_timer0_reg_t wait_timer0; pmu_power_wait_timer1_reg_t wait_timer1; + pmu_power_wait_timer2_reg_t wait_timer2; pmu_power_domain_cntl_reg_t hp_pd[5]; pmu_power_domain_cntl_reg_t lp_peri; pmu_power_memory_cntl_reg_t mem_cntl; @@ -555,7 +565,9 @@ typedef union { typedef union { struct { - uint32_t reserved0 : 26; + uint32_t reserved0 : 24; + uint32_t xpd_tc5g_i2c : 1; + uint32_t xpd_rx5g_i2c : 1; uint32_t perif_i2c_rstb: 1; uint32_t xpd_perif_i2c : 1; uint32_t xpd_txrf_i2c : 1; @@ -732,7 +744,7 @@ typedef struct pmu_dev_t{ volatile uint32_t val; } vdd_spi_status; - uint32_t reserved[150]; + uint32_t reserved[0]; union { struct { @@ -746,9 +758,9 @@ typedef struct pmu_dev_t{ extern pmu_dev_t PMU; #ifndef __cplusplus -// _Static_assert(sizeof(pmu_dev_t) == 0x400, "Invalid size of pmu_dev_t structure"); +_Static_assert(sizeof(pmu_dev_t) == 0x1AC, "Invalid size of pmu_dev_t structure"); -// _Static_assert(offsetof(pmu_dev_t, reserved) == (PMU_VDD_SPI_STATUS_REG - DR_REG_PMU_BASE) + 4, "Invalid size of pmu_dev_t structure"); +_Static_assert(offsetof(pmu_dev_t, reserved) == (PMU_VDD_SPI_STATUS_REG - DR_REG_PMU_BASE) + 4, "Invalid size of pmu_dev_t structure"); #endif From 3da4ed5d3ecaff14d64583cffaab2ca69f93c27e Mon Sep 17 00:00:00 2001 From: muhaidong Date: Fri, 12 Jul 2024 17:51:35 +0800 Subject: [PATCH 034/113] fix(wifi): fix sta may join bad signal ap when set by signal Closes https://github.com/espressif/esp-idf/issues/13958 --- components/esp_wifi/lib | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_wifi/lib b/components/esp_wifi/lib index 74f99e08335..76bdd0b967a 160000 --- a/components/esp_wifi/lib +++ b/components/esp_wifi/lib @@ -1 +1 @@ -Subproject commit 74f99e08335671447b5eac243c8dd643c1405a63 +Subproject commit 76bdd0b967afa7d75c9466ab0ad05601418a074d From 728136a91d7c0536201bdc1f40dbfb0e4e0bf15e Mon Sep 17 00:00:00 2001 From: Ivan Grokhotkov Date: Fri, 12 Jul 2024 12:14:32 +0200 Subject: [PATCH 035/113] fix(esp_eth): fix variable declarations inside switch for clang --- components/esp_eth/src/mac/esp_eth_mac_esp.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/components/esp_eth/src/mac/esp_eth_mac_esp.c b/components/esp_eth/src/mac/esp_eth_mac_esp.c index dddf0d24b14..14bfec2f63f 100644 --- a/components/esp_eth/src/mac/esp_eth_mac_esp.c +++ b/components/esp_eth/src/mac/esp_eth_mac_esp.c @@ -260,8 +260,7 @@ esp_err_t emac_esp_custom_ioctl(esp_eth_mac_t *mac, int cmd, void *data) { emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent); - switch (cmd) - { + switch (cmd) { case ETH_MAC_ESP_CMD_PTP_ENABLE: return ESP_ERR_NOT_SUPPORTED; case ETH_MAC_ESP_CMD_SET_TDES0_CFG_BITS: @@ -282,7 +281,7 @@ static esp_err_t emac_esp32_transmit(esp_eth_mac_t *mac, uint8_t *buf, uint32_t { emac_esp32_t *emac = __containerof(mac, emac_esp32_t, parent); uint32_t sent_len = emac_esp_dma_transmit_frame(emac->emac_dma_hndl, buf, length); - if(sent_len != length) { + if (sent_len != length) { ESP_LOGD(TAG, "insufficient TX buffer size"); return ESP_ERR_NO_MEM; } @@ -583,7 +582,7 @@ static esp_err_t emac_esp_config_data_interface(const eth_esp32_emac_config_t *e { esp_err_t ret = ESP_OK; switch (esp32_emac_config->interface) { - case EMAC_DATA_INTERFACE_MII: + case EMAC_DATA_INTERFACE_MII: { /* MII interface GPIO initialization */ #if SOC_EMAC_MII_USE_GPIO_MATRIX ESP_GOTO_ON_ERROR(emac_esp_gpio_matrix_init_mii(&esp32_emac_config->emac_dataif_gpio.mii), err, TAG, "failed to initialize EMAC MII GPIO Matrix"); @@ -599,7 +598,8 @@ static esp_err_t emac_esp_config_data_interface(const eth_esp32_emac_config_t *e emac_hal_clock_enable_mii(&emac->hal); } break; - case EMAC_DATA_INTERFACE_RMII: + } + case EMAC_DATA_INTERFACE_RMII: { /* RMII interface GPIO initialization */ const eth_mac_rmii_gpio_config_t *rmii_data_gpio = NULL; #if SOC_EMAC_USE_MULTI_IO_MUX @@ -640,6 +640,7 @@ static esp_err_t emac_esp_config_data_interface(const eth_esp32_emac_config_t *e ESP_GOTO_ON_FALSE(false, ESP_ERR_INVALID_ARG, err, TAG, "invalid EMAC clock mode"); } break; + } default: ESP_GOTO_ON_FALSE(false, ESP_ERR_INVALID_ARG, err, TAG, "invalid EMAC Data Interface:%i", esp32_emac_config->interface); } From 3964fb1fa8c6f0e8345dc09552db7f7da3ea62b0 Mon Sep 17 00:00:00 2001 From: Jin Cheng Date: Fri, 12 Jul 2024 19:35:18 +0800 Subject: [PATCH 036/113] fix(bt/controller): Removed an improper assertion in ACL link driver - See more from jira BT-3591 --- components/bt/controller/lib_esp32 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/bt/controller/lib_esp32 b/components/bt/controller/lib_esp32 index 1d3d9bfd298..b814f26bbb3 160000 --- a/components/bt/controller/lib_esp32 +++ b/components/bt/controller/lib_esp32 @@ -1 +1 @@ -Subproject commit 1d3d9bfd298ed3b6916d561dc54317041841ec9e +Subproject commit b814f26bbb3d726418c0f80f9f91153dfd978f85 From c921824230f70baaf686c8dcbcd253f98c1d84f4 Mon Sep 17 00:00:00 2001 From: Ivan Grokhotkov Date: Fri, 12 Jul 2024 12:16:07 +0200 Subject: [PATCH 037/113] fix(wifi_provisioning): fix var declarations inside switch for clang --- components/wifi_provisioning/src/scheme_ble.c | 103 +++++++++--------- 1 file changed, 51 insertions(+), 52 deletions(-) diff --git a/components/wifi_provisioning/src/scheme_ble.c b/components/wifi_provisioning/src/scheme_ble.c index 6b594f22c46..16d64a12f2a 100644 --- a/components/wifi_provisioning/src/scheme_ble.c +++ b/components/wifi_provisioning/src/scheme_ble.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -41,7 +41,7 @@ static esp_err_t prov_start(protocomm_t *pc, void *config) protocomm_ble_config_t *ble_config = (protocomm_ble_config_t *) config; #if defined(CONFIG_WIFI_PROV_BLE_BONDING) - ble_config->ble_bonding = 1; + ble_config->ble_bonding = 1; #endif #if defined(CONFIG_WIFI_PROV_BLE_SEC_CONN) || defined(CONFIG_BT_BLUEDROID_ENABLED) @@ -183,7 +183,7 @@ static esp_err_t set_config_endpoint(void *config, const char *endpoint_name, ui } protocomm_ble_name_uuid_t *lookup_table = ( - realloc(ble_config->nu_lookup, (ble_config->nu_lookup_count + 1) * sizeof(protocomm_ble_name_uuid_t))); + realloc(ble_config->nu_lookup, (ble_config->nu_lookup_count + 1) * sizeof(protocomm_ble_name_uuid_t))); if (!lookup_table) { ESP_LOGE(TAG, "Error allocating memory for EP-UUID lookup table"); return ESP_ERR_NO_MEM; @@ -200,35 +200,34 @@ static esp_err_t set_config_endpoint(void *config, const char *endpoint_name, ui void wifi_prov_scheme_ble_event_cb_free_btdm(void *user_data, wifi_prov_cb_event_t event, void *event_data) { switch (event) { - case WIFI_PROV_INIT: + case WIFI_PROV_INIT: { #ifdef CONFIG_BT_CONTROLLER_ENABLED - esp_err_t err; - /* Release BT memory, as we need only BLE */ - err = esp_bt_mem_release(ESP_BT_MODE_CLASSIC_BT); - if (err != ESP_OK) { - ESP_LOGE(TAG, "bt_mem_release of classic BT failed %d", err); - } else { - ESP_LOGI(TAG, "BT memory released"); - } + /* Release BT memory, as we need only BLE */ + esp_err_t err = esp_bt_mem_release(ESP_BT_MODE_CLASSIC_BT); + if (err != ESP_OK) { + ESP_LOGE(TAG, "bt_mem_release of classic BT failed %d", err); + } else { + ESP_LOGI(TAG, "BT memory released"); + } #endif - break; - - case WIFI_PROV_DEINIT: + break; + } + case WIFI_PROV_DEINIT: { #ifndef CONFIG_WIFI_PROV_KEEP_BLE_ON_AFTER_PROV #ifdef CONFIG_BT_CONTROLLER_ENABLED - /* Release memory used by BLE and Bluedroid host stack */ - err = esp_bt_mem_release(ESP_BT_MODE_BTDM); - if (err != ESP_OK) { - ESP_LOGE(TAG, "bt_mem_release of BTDM failed %d", err); - } else { - ESP_LOGI(TAG, "BTDM memory released"); - } + /* Release memory used by BLE and Bluedroid host stack */ + esp_err_t err = esp_bt_mem_release(ESP_BT_MODE_BTDM); + if (err != ESP_OK) { + ESP_LOGE(TAG, "bt_mem_release of BTDM failed %d", err); + } else { + ESP_LOGI(TAG, "BTDM memory released"); + } #endif #endif - break; - - default: - break; + break; + } + default: + break; } } @@ -236,21 +235,21 @@ void wifi_prov_scheme_ble_event_cb_free_btdm(void *user_data, wifi_prov_cb_event void wifi_prov_scheme_ble_event_cb_free_bt(void *user_data, wifi_prov_cb_event_t event, void *event_data) { switch (event) { - case WIFI_PROV_INIT: + case WIFI_PROV_INIT: { #ifdef CONFIG_BT_CONTROLLER_ENABLED - esp_err_t err; - /* Release BT memory, as we need only BLE */ - err = esp_bt_mem_release(ESP_BT_MODE_CLASSIC_BT); - if (err != ESP_OK) { - ESP_LOGE(TAG, "bt_mem_release of classic BT failed %d", err); - } else { - ESP_LOGI(TAG, "BT memory released"); - } + esp_err_t err; + /* Release BT memory, as we need only BLE */ + err = esp_bt_mem_release(ESP_BT_MODE_CLASSIC_BT); + if (err != ESP_OK) { + ESP_LOGE(TAG, "bt_mem_release of classic BT failed %d", err); + } else { + ESP_LOGI(TAG, "BT memory released"); + } #endif - break; - - default: - break; + break; + } + default: + break; } } @@ -258,23 +257,23 @@ void wifi_prov_scheme_ble_event_cb_free_bt(void *user_data, wifi_prov_cb_event_t void wifi_prov_scheme_ble_event_cb_free_ble(void *user_data, wifi_prov_cb_event_t event, void *event_data) { switch (event) { - case WIFI_PROV_DEINIT: + case WIFI_PROV_DEINIT: { #ifndef CONFIG_WIFI_PROV_KEEP_BLE_ON_AFTER_PROV #ifdef CONFIG_BT_CONTROLLER_ENABLED - esp_err_t err; - /* Release memory used by BLE stack */ - err = esp_bt_mem_release(ESP_BT_MODE_BLE); - if (err != ESP_OK) { - ESP_LOGE(TAG, "bt_mem_release of BLE failed %d", err); - } else { - ESP_LOGI(TAG, "BLE memory released"); - } + esp_err_t err; + /* Release memory used by BLE stack */ + err = esp_bt_mem_release(ESP_BT_MODE_BLE); + if (err != ESP_OK) { + ESP_LOGE(TAG, "bt_mem_release of BLE failed %d", err); + } else { + ESP_LOGI(TAG, "BLE memory released"); + } #endif #endif - break; - - default: - break; + break; + } + default: + break; } } From df65b3829eb6d406df47a09372b93cb68af26dcc Mon Sep 17 00:00:00 2001 From: Ivan Grokhotkov Date: Fri, 12 Jul 2024 13:57:51 +0200 Subject: [PATCH 038/113] fix(usb): variable declaration after label for clang --- components/usb/hcd_dwc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/components/usb/hcd_dwc.c b/components/usb/hcd_dwc.c index 9911c624662..345cbe4707f 100644 --- a/components/usb/hcd_dwc.c +++ b/components/usb/hcd_dwc.c @@ -1263,6 +1263,7 @@ static esp_err_t _port_cmd_reset(port_t *port) ret = ESP_OK; bailout: // Reinitialize channel registers + (void) 0; // clang doesn't allow variable declarations after labels pipe_t *pipe; TAILQ_FOREACH(pipe, &port->pipes_idle_tailq, tailq_entry) { usb_dwc_hal_chan_set_ep_char(port->hal, pipe->chan_obj, &pipe->ep_char); From 6c2824bdaad77acc8923dfb723cb5f2d50df63e4 Mon Sep 17 00:00:00 2001 From: Ivan Grokhotkov Date: Fri, 12 Jul 2024 12:17:01 +0200 Subject: [PATCH 039/113] ci(clang): include all components in clang_build_test --- tools/test_apps/system/clang_build_test/CMakeLists.txt | 4 ++-- tools/test_apps/system/clang_build_test/main/CMakeLists.txt | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/tools/test_apps/system/clang_build_test/CMakeLists.txt b/tools/test_apps/system/clang_build_test/CMakeLists.txt index cd85707a092..3d9f4142807 100644 --- a/tools/test_apps/system/clang_build_test/CMakeLists.txt +++ b/tools/test_apps/system/clang_build_test/CMakeLists.txt @@ -3,5 +3,5 @@ cmake_minimum_required(VERSION 3.16) include($ENV{IDF_PATH}/tools/cmake/project.cmake) -set(COMPONENTS main) -project(cpp_pthread) +# Note: not setting set(COMPONENTS main) here, this app should build all the components +project(clang_build_test) diff --git a/tools/test_apps/system/clang_build_test/main/CMakeLists.txt b/tools/test_apps/system/clang_build_test/main/CMakeLists.txt index 7f0828d2a33..079bf9c6ab1 100644 --- a/tools/test_apps/system/clang_build_test/main/CMakeLists.txt +++ b/tools/test_apps/system/clang_build_test/main/CMakeLists.txt @@ -1,3 +1,3 @@ idf_component_register(SRCS "test_main.cpp" - INCLUDE_DIRS "." - PRIV_REQUIRES pthread bt) + INCLUDE_DIRS ".") +# Note: not setting PRIV_REQUIRES, this app should build all the components. From 3d0b50734652fad3ec6dce55070e05eddc2b5147 Mon Sep 17 00:00:00 2001 From: Ivan Grokhotkov Date: Fri, 12 Jul 2024 14:18:56 +0200 Subject: [PATCH 040/113] fix(ieee802154): fix linker error due to static function being inlined When the compiler decides to inline a static function, linker script generator will complain about the missing function. --- components/ieee802154/driver/esp_ieee802154_dev.c | 2 +- components/ieee802154/driver/esp_ieee802154_frame.c | 8 ++++---- components/ieee802154/linker.lf | 1 + .../ieee802154/private_include/esp_ieee802154_dev.h | 1 + 4 files changed, 7 insertions(+), 5 deletions(-) diff --git a/components/ieee802154/driver/esp_ieee802154_dev.c b/components/ieee802154/driver/esp_ieee802154_dev.c index c5371814796..d7f98198cc0 100644 --- a/components/ieee802154/driver/esp_ieee802154_dev.c +++ b/components/ieee802154/driver/esp_ieee802154_dev.c @@ -136,7 +136,7 @@ static IRAM_ATTR void receive_ack_timeout_timer_start(uint32_t duration) } #endif -static void ieee802154_rx_frame_info_update(void) +static IEEE802154_NOINLINE void ieee802154_rx_frame_info_update(void) { uint8_t len = s_rx_frame[s_rx_index][0]; int8_t rssi = s_rx_frame[s_rx_index][len - 1]; // crc is not written to rx buffer diff --git a/components/ieee802154/driver/esp_ieee802154_frame.c b/components/ieee802154/driver/esp_ieee802154_frame.c index e32e338ae0e..9bc23058066 100644 --- a/components/ieee802154/driver/esp_ieee802154_frame.c +++ b/components/ieee802154/driver/esp_ieee802154_frame.c @@ -49,7 +49,7 @@ IEEE802154_STATIC IEEE802154_INLINE bool is_suported_frame_type(uint8_t frame_ty frame_type == IEEE802154_FRAME_TYPE_ACK || frame_type == IEEE802154_FRAME_TYPE_COMMAND); } -IEEE802154_STATIC bool is_dst_panid_present(const uint8_t *frame) +IEEE802154_STATIC IEEE802154_NOINLINE bool is_dst_panid_present(const uint8_t *frame) { uint8_t dst_mode = dst_addr_mode(frame); bool dst_panid_present = false; @@ -79,7 +79,7 @@ IEEE802154_STATIC bool is_dst_panid_present(const uint8_t *frame) return dst_panid_present; } -IEEE802154_STATIC bool is_src_panid_present(const uint8_t *frame) +IEEE802154_STATIC IEEE802154_NOINLINE bool is_src_panid_present(const uint8_t *frame) { uint8_t src_mode = src_addr_mode(frame); bool panid_compression = is_panid_compression(frame); @@ -160,7 +160,7 @@ IEEE802154_STATIC IRAM_ATTR uint8_t ieee802154_frame_address_size(const uint8_t return address_size; } -IEEE802154_STATIC uint8_t ieee802154_frame_security_header_offset(const uint8_t *frame) +IEEE802154_STATIC IEEE802154_NOINLINE uint8_t ieee802154_frame_security_header_offset(const uint8_t *frame) { ESP_RETURN_ON_FALSE_ISR(is_suported_frame_type(ieee802154_frame_get_type(frame)), IEEE802154_FRAME_INVALID_ADDR_MODE, IEEE802154_TAG, "invalid frame type"); uint8_t offset = ieee802154_frame_address_offset(frame); @@ -174,7 +174,7 @@ IEEE802154_STATIC uint8_t ieee802154_frame_security_header_offset(const uint8_t return offset; } -IEEE802154_STATIC uint8_t ieee802154_frame_get_security_field_len(const uint8_t *frame) +IEEE802154_STATIC IEEE802154_NOINLINE uint8_t ieee802154_frame_get_security_field_len(const uint8_t *frame) { ESP_RETURN_ON_FALSE_ISR(is_suported_frame_type(ieee802154_frame_get_type(frame)), IEEE802154_FRAME_INVALID_OFFSET, IEEE802154_TAG, "invalid frame type"); diff --git a/components/ieee802154/linker.lf b/components/ieee802154/linker.lf index b0a01b70c08..e78d00a5dbc 100644 --- a/components/ieee802154/linker.lf +++ b/components/ieee802154/linker.lf @@ -2,6 +2,7 @@ archive: libieee802154.a entries: if IEEE802154_ENABLED = y: + # When adding static functions here, add IEEE802154_NOINLINE attribute to them esp_ieee802154_ack: ieee802154_ack_config_pending_bit (noflash) esp_ieee802154_dev: ieee802154_rx_frame_info_update (noflash) esp_ieee802154_dev: ieee802154_isr (noflash) diff --git a/components/ieee802154/private_include/esp_ieee802154_dev.h b/components/ieee802154/private_include/esp_ieee802154_dev.h index ace28cd5f78..76db12a2436 100644 --- a/components/ieee802154/private_include/esp_ieee802154_dev.h +++ b/components/ieee802154/private_include/esp_ieee802154_dev.h @@ -245,6 +245,7 @@ extern void esp_ieee802154_timer1_done(void); #define IEEE802154_STATIC static #define IEEE802154_INLINE inline #endif // CONFIG_IEEE802154_TEST +#define IEEE802154_NOINLINE __attribute__((noinline)) #ifdef __cplusplus } From 65820c07ac30245aa30b3f96cc667e575e54d55b Mon Sep 17 00:00:00 2001 From: gaoxu Date: Sat, 13 Jul 2024 14:03:23 +0800 Subject: [PATCH 041/113] feat(adc): support ADC oneshot and continuous mode on ESP32C5 and enable test --- .../test_apps/legacy_adc_driver/README.md | 4 +- .../legacy_adc_driver/main/test_legacy_adc.c | 7 + .../legacy_adc_driver/pytest_legacy_adc.py | 2 +- components/esp_adc/adc_oneshot.c | 4 +- components/esp_adc/test_apps/adc/README.md | 4 +- .../test_apps/adc/main/test_common_adc.h | 9 + .../esp_adc/test_apps/adc/pytest_adc.py | 2 + .../port/esp32c5/sar_periph_ctrl.c | 2 - components/hal/esp32c5/include/hal/adc_ll.h | 784 ++++++++++++++++++ components/hal/include/hal/adc_types.h | 2 +- .../include/esp32c5/idf_performance_target.h | 8 + components/soc/esp32c5/adc_periph.c | 20 + .../esp32c5/include/soc/Kconfig.soc_caps.in | 78 +- .../soc/esp32c5/include/soc/adc_channel.h | 28 +- .../soc/esp32c5/include/soc/clk_tree_defs.h | 2 +- .../soc/esp32c5/include/soc/regi2c_saradc.h | 55 ++ components/soc/esp32c5/include/soc/soc_caps.h | 46 +- docs/docs_not_updated/esp32c5.txt | 2 - .../peripherals/adc_continuous.rst | 2 +- .../api-reference/peripherals/adc_oneshot.rst | 2 +- .../peripherals/adc_continuous.rst | 2 +- .../api-reference/peripherals/adc_oneshot.rst | 2 +- .../peripherals/adc/continuous_read/README.md | 4 +- .../continuous_read/pytest_adc_continuous.py | 2 +- .../peripherals/adc/oneshot_read/README.md | 4 +- .../adc/oneshot_read/pytest_adc_oneshot.py | 1 + 26 files changed, 1016 insertions(+), 62 deletions(-) create mode 100644 components/hal/esp32c5/include/hal/adc_ll.h create mode 100644 components/soc/esp32c5/adc_periph.c create mode 100644 components/soc/esp32c5/include/soc/regi2c_saradc.h diff --git a/components/driver/test_apps/legacy_adc_driver/README.md b/components/driver/test_apps/legacy_adc_driver/README.md index bf47d80ec64..3a502b1f86f 100644 --- a/components/driver/test_apps/legacy_adc_driver/README.md +++ b/components/driver/test_apps/legacy_adc_driver/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | diff --git a/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c b/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c index e09a741b185..7a22fa26dce 100644 --- a/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c +++ b/components/driver/test_apps/legacy_adc_driver/main/test_legacy_adc.c @@ -74,6 +74,13 @@ #define ADC_TEST_HIGH_VAL 4095 #define ADC_TEST_HIGH_THRESH 200 +#elif CONFIG_IDF_TARGET_ESP32C5 +#define ADC_TEST_LOW_VAL 2195 +#define ADC_TEST_LOW_THRESH 200 + +#define ADC_TEST_HIGH_VAL 4095 +#define ADC_TEST_HIGH_THRESH 200 + #endif //ADC Channels diff --git a/components/driver/test_apps/legacy_adc_driver/pytest_legacy_adc.py b/components/driver/test_apps/legacy_adc_driver/pytest_legacy_adc.py index 6bc3b838d66..b311f7b3a80 100644 --- a/components/driver/test_apps/legacy_adc_driver/pytest_legacy_adc.py +++ b/components/driver/test_apps/legacy_adc_driver/pytest_legacy_adc.py @@ -1,6 +1,5 @@ # SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD # SPDX-License-Identifier: CC0-1.0 - import pytest from pytest_embedded import Dut @@ -11,6 +10,7 @@ @pytest.mark.esp32c3 @pytest.mark.esp32c6 @pytest.mark.esp32h2 +@pytest.mark.esp32c5 @pytest.mark.adc @pytest.mark.parametrize( 'config', diff --git a/components/esp_adc/adc_oneshot.c b/components/esp_adc/adc_oneshot.c index 0691e22f1ad..15166a4f993 100644 --- a/components/esp_adc/adc_oneshot.c +++ b/components/esp_adc/adc_oneshot.c @@ -126,7 +126,7 @@ esp_err_t adc_oneshot_new_unit(const adc_oneshot_unit_init_cfg_t *init_config, a if (init_config->ulp_mode == ADC_ULP_MODE_DISABLE) { sar_periph_ctrl_adc_oneshot_power_acquire(); } else { -#if !CONFIG_IDF_TARGET_ESP32P4 // # TODO: IDF-7528, IDF-7529 +#if !CONFIG_IDF_TARGET_ESP32C5// # TODO: IDF-8638, IDF-8640 esp_sleep_enable_adc_tsens_monitor(true); #endif } @@ -229,7 +229,7 @@ esp_err_t adc_oneshot_del_unit(adc_oneshot_unit_handle_t handle) if (ulp_mode == ADC_ULP_MODE_DISABLE) { sar_periph_ctrl_adc_oneshot_power_release(); } else { -#if !CONFIG_IDF_TARGET_ESP32P4 // # TODO: IDF-7528, IDF-7529 +#if !CONFIG_IDF_TARGET_ESP32C5// # TODO: IDF-8638, IDF-8640 esp_sleep_enable_adc_tsens_monitor(false); #endif } diff --git a/components/esp_adc/test_apps/adc/README.md b/components/esp_adc/test_apps/adc/README.md index bf47d80ec64..3a502b1f86f 100644 --- a/components/esp_adc/test_apps/adc/README.md +++ b/components/esp_adc/test_apps/adc/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_adc/test_apps/adc/main/test_common_adc.h b/components/esp_adc/test_apps/adc/main/test_common_adc.h index 1d28c66e4ee..c2bd4cd1989 100644 --- a/components/esp_adc/test_apps/adc/main/test_common_adc.h +++ b/components/esp_adc/test_apps/adc/main/test_common_adc.h @@ -94,6 +94,15 @@ extern "C" { #define ADC_TEST_HIGH_VAL 4095 #define ADC_TEST_HIGH_VAL_DMA 4095 #define ADC_TEST_HIGH_THRESH 200 + +#elif CONFIG_IDF_TARGET_ESP32C5 +#define ADC_TEST_LOW_VAL 2169 +#define ADC_TEST_LOW_THRESH 200 + +#define ADC_TEST_HIGH_VAL 4095 +#define ADC_TEST_HIGH_VAL_DMA 4095 +#define ADC_TEST_HIGH_THRESH 200 + #endif /*--------------------------------------------------------------- diff --git a/components/esp_adc/test_apps/adc/pytest_adc.py b/components/esp_adc/test_apps/adc/pytest_adc.py index 5f61b66e596..780e910d308 100644 --- a/components/esp_adc/test_apps/adc/pytest_adc.py +++ b/components/esp_adc/test_apps/adc/pytest_adc.py @@ -10,6 +10,7 @@ @pytest.mark.esp32c3 @pytest.mark.esp32c6 @pytest.mark.esp32h2 +@pytest.mark.esp32c5 @pytest.mark.adc @pytest.mark.parametrize('config', [ 'iram_safe', @@ -40,6 +41,7 @@ def test_adc_esp32c2_xtal_26mhz(dut: Dut) -> None: @pytest.mark.esp32c3 @pytest.mark.esp32c6 @pytest.mark.esp32h2 +@pytest.mark.esp32c5 @pytest.mark.adc @pytest.mark.parametrize('config', [ 'gdma_iram_safe', diff --git a/components/esp_hw_support/port/esp32c5/sar_periph_ctrl.c b/components/esp_hw_support/port/esp32c5/sar_periph_ctrl.c index 484b89be1b6..c9ccaa662a7 100644 --- a/components/esp_hw_support/port/esp32c5/sar_periph_ctrl.c +++ b/components/esp_hw_support/port/esp32c5/sar_periph_ctrl.c @@ -24,8 +24,6 @@ static const char *TAG = "sar_periph_ctrl"; extern portMUX_TYPE rtc_spinlock; -// TODO: [ESP32C5] IDF-8701, IDF-8703, IDF-8727 - void sar_periph_ctrl_init(void) { sar_ctrl_ll_force_power_ctrl_from_pwdet(true); diff --git a/components/hal/esp32c5/include/hal/adc_ll.h b/components/hal/esp32c5/include/hal/adc_ll.h new file mode 100644 index 00000000000..616ea25e610 --- /dev/null +++ b/components/hal/esp32c5/include/hal/adc_ll.h @@ -0,0 +1,784 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#include +#include +#include "esp_attr.h" + +#include "soc/adc_periph.h" +#include "soc/apb_saradc_struct.h" +#include "soc/apb_saradc_reg.h" +#include "soc/pmu_reg.h" +#include "soc/clk_tree_defs.h" +#include "soc/pcr_struct.h" +#include "hal/misc.h" +#include "hal/assert.h" +#include "hal/adc_types.h" +#include "hal/adc_types_private.h" +#include "hal/regi2c_ctrl.h" +#include "hal/sar_ctrl_ll.h" + +#include "soc/regi2c_saradc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define ADC_LL_EVENT_ADC1_ONESHOT_DONE BIT(31) +#define ADC_LL_EVENT_ADC2_ONESHOT_DONE BIT(30) + +#define ADC_LL_THRES_ALL_INTR_ST_M (APB_SARADC_APB_SARADC_THRES0_HIGH_INT_ST_M | \ + APB_SARADC_APB_SARADC_THRES1_HIGH_INT_ST_M | \ + APB_SARADC_APB_SARADC_THRES0_LOW_INT_ST_M | \ + APB_SARADC_APB_SARADC_THRES1_LOW_INT_ST_M) + +#define ADC_LL_GET_HIGH_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_APB_SARADC_THRES0_HIGH_INT_ST_M : APB_SARADC_APB_SARADC_THRES1_HIGH_INT_ST_M) +#define ADC_LL_GET_LOW_THRES_MASK(monitor_id) ((monitor_id == 0) ? APB_SARADC_APB_SARADC_THRES0_LOW_INT_ST_M : APB_SARADC_APB_SARADC_THRES1_LOW_INT_ST_M) + +/*--------------------------------------------------------------- + Oneshot +---------------------------------------------------------------*/ +#define ADC_LL_DATA_INVERT_DEFAULT(PERIPH_NUM) (0) +#define ADC_LL_DELAY_CYCLE_AFTER_DONE_SIGNAL (0) + +/*--------------------------------------------------------------- + DMA +---------------------------------------------------------------*/ +#define ADC_LL_DIGI_DATA_INVERT_DEFAULT(PERIPH_NUM) (0) +#define ADC_LL_FSM_RSTB_WAIT_DEFAULT (8) +#define ADC_LL_FSM_START_WAIT_DEFAULT (5) +#define ADC_LL_FSM_STANDBY_WAIT_DEFAULT (100) +#define ADC_LL_SAMPLE_CYCLE_DEFAULT (2) +#define ADC_LL_DIGI_SAR_CLK_DIV_DEFAULT (1) +#define ADC_LL_CLKM_DIV_NUM_DEFAULT 15 +#define ADC_LL_CLKM_DIV_B_DEFAULT 1 +#define ADC_LL_CLKM_DIV_A_DEFAULT 0 +#define ADC_LL_DEFAULT_CONV_LIMIT_EN 0 +#define ADC_LL_DEFAULT_CONV_LIMIT_NUM 10 + +#define ADC_LL_POWER_MANAGE_SUPPORTED 1 //ESP32C5 supported to manage power mode +/*--------------------------------------------------------------- + PWDET (Power Detect) +---------------------------------------------------------------*/ +#define ADC_LL_PWDET_CCT_DEFAULT (4) + +typedef enum { + ADC_LL_POWER_BY_FSM = SAR_CTRL_LL_POWER_FSM, /*!< ADC XPD controlled by FSM. Used for polling mode */ + ADC_LL_POWER_SW_ON = SAR_CTRL_LL_POWER_ON, /*!< ADC XPD controlled by SW. power on. Used for DMA mode */ + ADC_LL_POWER_SW_OFF = SAR_CTRL_LL_POWER_OFF, /*!< ADC XPD controlled by SW. power off. */ +} adc_ll_power_t; + +typedef enum { + ADC_LL_CTRL_DIG = 0, ///< ADC digital controller +} adc_ll_controller_t; + +/** + * @brief ADC digital controller (DMA mode) work mode. + * + * @note The conversion mode affects the sampling frequency: + * ESP32C5 only support ONLY_ADC1 mode + * SINGLE_UNIT_1: When the measurement is triggered, only ADC1 is sampled once. + */ +typedef enum { + ADC_LL_DIGI_CONV_ONLY_ADC1 = 0, // Only use ADC1 for conversion +} adc_ll_digi_convert_mode_t; + +typedef struct { + union { + struct { + uint8_t atten: 2; + uint8_t channel: 3; + uint8_t unit: 1; + uint8_t reserved: 2; + }; + uint8_t val; + }; +} __attribute__((packed)) adc_ll_digi_pattern_table_t; + +/*--------------------------------------------------------------- + Digital controller setting +---------------------------------------------------------------*/ + +/** + * Set adc fsm interval parameter for digital controller. These values are fixed for same platforms. + * + * @param rst_wait cycles between DIG ADC controller reset ADC sensor and start ADC sensor. + * @param start_wait Delay time after open xpd. + * @param standby_wait Delay time to close xpd. + */ +static inline void adc_ll_digi_set_fsm_time(uint32_t rst_wait, uint32_t start_wait, uint32_t standby_wait) +{ + // Internal FSM reset wait time + HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.saradc_fsm_wait, saradc_saradc_rstb_wait, rst_wait); + // Internal FSM start wait time + HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.saradc_fsm_wait, saradc_saradc_xpd_wait, start_wait); + // Internal FSM standby wait time + HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.saradc_fsm_wait, saradc_saradc_standby_wait, standby_wait); +} + +/** + * Set adc sample cycle for digital controller. + * + * @note Normally, please use default value. + * @param sample_cycle Cycles between DIG ADC controller start ADC sensor and beginning to receive data from sensor. + * Range: 2 ~ 0xFF. + */ +static inline void adc_ll_set_sample_cycle(uint32_t sample_cycle) +{ + /* Peripheral reg i2c has powered up in rtc_init, write directly */ + REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_SAMPLE_CYCLE_ADDR, sample_cycle); +} + +/** + * Set SAR ADC module clock division factor. + * SAR ADC clock divided from digital controller clock. + * + * @param div Division factor. + */ +static inline void adc_ll_digi_set_clk_div(uint32_t div) +{ + /* ADC clock divided from digital controller clock clk */ + HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.saradc_ctrl, saradc_saradc_sar_clk_div, div); +} + +/** + * Set adc max conversion number for digital controller. + * If the number of ADC conversion is equal to the maximum, the conversion is stopped. + * + * @param meas_num Max conversion number. Range: 0 ~ 255. + */ +static inline void adc_ll_digi_set_convert_limit_num(uint32_t meas_num) +{ + HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.saradc_ctrl2, saradc_saradc_max_meas_num, meas_num); +} + +/** + * Enable max conversion number detection for digital controller. + * If the number of ADC conversion is equal to the maximum, the conversion is stopped. + * + * @param enable true: enable; false: disable + */ +static inline void adc_ll_digi_convert_limit_enable(bool enable) +{ + APB_SARADC.saradc_ctrl2.saradc_saradc_meas_num_limit = enable; +} + +/** + * Set adc conversion mode for digital controller. + * + * @note ESP32C5 only support ADC1 single mode. + * + * @param mode Conversion mode select. + */ +static inline void adc_ll_digi_set_convert_mode(adc_ll_digi_convert_mode_t mode) +{ + //ESP32C5 only supports ADC_LL_DIGI_CONV_ONLY_ADC1 mode +} + +/** + * Set pattern table length for digital controller. + * The pattern table that defines the conversion rules for each SAR ADC. Each table has 4 items, in which channel selection, + * and attenuation are stored. When the conversion is started, the controller reads conversion rules from the + * pattern table one by one. For each controller the scan sequence has at most 8 different rules before repeating itself. + * + * @param adc_n ADC unit. + * @param patt_len Items range: 1 ~ 8. + */ +static inline void adc_ll_digi_set_pattern_table_len(adc_unit_t adc_n, uint32_t patt_len) +{ + APB_SARADC.saradc_ctrl.saradc_saradc_sar_patt_len = patt_len - 1; +} + +/** + * Set pattern table for digital controller. + * The pattern table that defines the conversion rules for each SAR ADC. Each table has 4 items, in which channel selection, + * resolution and attenuation are stored. When the conversion is started, the controller reads conversion rules from the + * pattern table one by one. For each controller the scan sequence has at most 8 different rules before repeating itself. + * + * @param adc_n ADC unit. + * @param pattern_index Items index. Range: 0 ~ 7. + * @param pattern Stored conversion rules. + */ +static inline void adc_ll_digi_set_pattern_table(adc_unit_t adc_n, uint32_t pattern_index, adc_digi_pattern_config_t table) +{ + uint32_t tab; + uint8_t index = pattern_index / 4; + uint8_t offset = (pattern_index % 4) * 6; + adc_ll_digi_pattern_table_t pattern = {0}; + + pattern.val = (table.atten & 0x3) | ((table.channel & 0x7) << 2) | ((table.unit & 0x1) << 5); + if (index == 0) { + tab = APB_SARADC.saradc_sar_patt_tab1.saradc_saradc_sar_patt_tab1; // Read old register value + tab &= (~(0xFC0000 >> offset)); // Clear old data + tab |= ((uint32_t)(pattern.val & 0x3F) << 18) >> offset; // Fill in the new data + APB_SARADC.saradc_sar_patt_tab1.saradc_saradc_sar_patt_tab1 = tab; // Write back + } else { + tab = APB_SARADC.saradc_sar_patt_tab2.saradc_saradc_sar_patt_tab2; // Read old register value + tab &= (~(0xFC0000 >> offset)); // Clear old data + tab |= ((uint32_t)(pattern.val & 0x3F) << 18) >> offset; // Fill in the new data + APB_SARADC.saradc_sar_patt_tab2.saradc_saradc_sar_patt_tab2 = tab; // Write back + } +} + +/** + * Reset the pattern table pointer, then take the measurement rule from table header in next measurement. + * + * @param adc_n ADC unit. + */ +static inline void adc_ll_digi_clear_pattern_table(adc_unit_t adc_n) +{ + APB_SARADC.saradc_ctrl.saradc_saradc_sar_patt_p_clear = 1; + APB_SARADC.saradc_ctrl.saradc_saradc_sar_patt_p_clear = 0; +} + +/** + * Sets the number of cycles required for the conversion to complete and wait for the arbiter to stabilize. + * + * @note Only ADC2 have arbiter function. + * @param cycle range: 0 ~ 4. + */ +static inline void adc_ll_digi_set_arbiter_stable_cycle(uint32_t cycle) +{ + APB_SARADC.saradc_ctrl.saradc_saradc_wait_arb_cycle = cycle; +} + +/** + * ADC Digital controller output data invert or not. + * + * @param adc_n ADC unit. + * @param inv_en data invert or not. + */ +static inline void adc_ll_digi_output_invert(adc_unit_t adc_n, bool inv_en) +{ + if (adc_n == ADC_UNIT_1) { + APB_SARADC.saradc_ctrl2.saradc_saradc_sar1_inv = inv_en; // Enable / Disable ADC data invert + } +} + +/** + * Set the interval clock cycle for the digital controller to trigger the measurement. + * Expression: `trigger_meas_freq` = `controller_clk` / 2 / interval. + * + * @note The trigger interval should not be smaller than the sampling time of the SAR ADC. + * @param cycle The clock cycle (trigger interval) of the measurement. Range: 30 ~ 4095. + */ +static inline void adc_ll_digi_set_trigger_interval(uint32_t cycle) +{ + APB_SARADC.saradc_ctrl2.saradc_saradc_timer_target = cycle; +} + +/** + * Enable digital controller timer to trigger the measurement. + */ +static inline void adc_ll_digi_trigger_enable(void) +{ + APB_SARADC.saradc_ctrl2.saradc_saradc_timer_en = 1; +} + +/** + * Disable digital controller timer to trigger the measurement. + */ +static inline void adc_ll_digi_trigger_disable(void) +{ + APB_SARADC.saradc_ctrl2.saradc_saradc_timer_en = 0; +} + +/** + * Set ADC digital controller clock division factor. The clock divided from `APLL` or `APB` clock. + * Expression: controller_clk = (APLL or APB) / (div_num + div_a / div_b + 1). + * + * @param div_num Division factor. Range: 0 ~ 255. + * @param div_b Division factor. Range: 1 ~ 63. + * @param div_a Division factor. Range: 0 ~ 63. + */ +static inline void adc_ll_digi_controller_clk_div(uint32_t div_num, uint32_t div_b, uint32_t div_a) +{ + HAL_FORCE_MODIFY_U32_REG_FIELD(PCR.saradc_clkm_conf, saradc_clkm_div_num, div_num); + PCR.saradc_clkm_conf.saradc_clkm_div_b = div_b; + PCR.saradc_clkm_conf.saradc_clkm_div_a = div_a; +} + +/** + * Enable clock and select clock source for ADC digital controller. + * + * @param clk_src clock source for ADC digital controller. + */ +static inline void adc_ll_digi_clk_sel(adc_continuous_clk_src_t clk_src) +{ + switch (clk_src) { + case ADC_DIGI_CLK_SRC_XTAL: + PCR.saradc_clkm_conf.saradc_clkm_sel = 0; + break; + case ADC_DIGI_CLK_SRC_RC_FAST: + PCR.saradc_clkm_conf.saradc_clkm_sel = 1; + break; + case ADC_DIGI_CLK_SRC_PLL_F80M: + PCR.saradc_clkm_conf.saradc_clkm_sel = 2; + break; + default: + HAL_ASSERT(false && "unsupported clock"); + } + // Enable ADC_CTRL_CLK (i.e. digital domain clock) + APB_SARADC.saradc_ctrl.saradc_saradc_sar_clk_gated = 1; +} + +/** + * Disable clock for ADC digital controller. + */ +static inline void adc_ll_digi_controller_clk_disable(void) +{ + APB_SARADC.saradc_ctrl.saradc_saradc_sar_clk_gated = 0; +} + +/** + * Reset adc digital controller filter. + * + * @param idx Filter index + * @param adc_n ADC unit. + */ +static inline void adc_ll_digi_filter_reset(adc_digi_iir_filter_t idx, adc_unit_t adc_n) +{ + (void)adc_n; + APB_SARADC.saradc_filter_ctrl0.saradc_apb_saradc_filter_reset = 1; + APB_SARADC.saradc_filter_ctrl0.saradc_apb_saradc_filter_reset = 0; +} + +/** + * Set adc digital controller filter coeff. + * + * @param idx filter index + * @param adc_n adc unit + * @param channel adc channel + * @param coeff filter coeff + */ +static inline void adc_ll_digi_filter_set_factor(adc_digi_iir_filter_t idx, adc_unit_t adc_n, adc_channel_t channel, adc_digi_iir_filter_coeff_t coeff) +{ + uint32_t factor_reg_val = 0; + switch (coeff) { + case ADC_DIGI_IIR_FILTER_COEFF_2: + factor_reg_val = 1; + break; + case ADC_DIGI_IIR_FILTER_COEFF_4: + factor_reg_val = 2; + break; + case ADC_DIGI_IIR_FILTER_COEFF_8: + factor_reg_val = 3; + break; + case ADC_DIGI_IIR_FILTER_COEFF_16: + factor_reg_val = 4; + break; + case ADC_DIGI_IIR_FILTER_COEFF_64: + factor_reg_val = 6; + break; + default: + HAL_ASSERT(false); + } + + if (idx == ADC_DIGI_IIR_FILTER_0) { + APB_SARADC.saradc_filter_ctrl0.saradc_apb_saradc_filter_channel0 = ((adc_n + 1) << 3) | (channel & 0x7); + APB_SARADC.saradc_filter_ctrl1.saradc_apb_saradc_filter_factor0 = factor_reg_val; + } else if (idx == ADC_DIGI_IIR_FILTER_1) { + APB_SARADC.saradc_filter_ctrl0.saradc_apb_saradc_filter_channel1 = ((adc_n + 1) << 3) | (channel & 0x7); + APB_SARADC.saradc_filter_ctrl1.saradc_apb_saradc_filter_factor1 = factor_reg_val; + } +} + +/** + * Enable adc digital controller filter. + * Filtering the ADC data to obtain smooth data at higher sampling rates. + * + * @param idx filter index + * @param adc_n ADC unit + * @param enable Enable / Disable + */ +static inline void adc_ll_digi_filter_enable(adc_digi_iir_filter_t idx, adc_unit_t adc_n, bool enable) +{ + (void)adc_n; + if (!enable) { + if (idx == ADC_DIGI_IIR_FILTER_0) { + APB_SARADC.saradc_filter_ctrl0.saradc_apb_saradc_filter_channel0 = 0xF; + APB_SARADC.saradc_filter_ctrl1.saradc_apb_saradc_filter_factor0 = 0; + } else if (idx == ADC_DIGI_IIR_FILTER_1) { + APB_SARADC.saradc_filter_ctrl0.saradc_apb_saradc_filter_channel1 = 0xF; + APB_SARADC.saradc_filter_ctrl1.saradc_apb_saradc_filter_factor1 = 0; + } + } + //nothing to do to enable, after adc_ll_digi_filter_set_factor, it's enabled. +} + +/** + * Set monitor threshold of adc digital controller on specific channel. + * + * @param monitor_id ADC digi monitor unit index. + * @param adc_n Which adc unit the channel belong to. + * @param channel Which channel of adc want to be monitored. + * @param h_thresh High threshold of this monitor. + * @param l_thresh Low threshold of this monitor. + */ +static inline void adc_ll_digi_monitor_set_thres(adc_monitor_id_t monitor_id, adc_unit_t adc_n, uint8_t channel, int32_t h_thresh, int32_t l_thresh) +{ + if (monitor_id == ADC_MONITOR_0) { + APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_channel = (adc_n << 3) | (channel & 0x7); + APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_high = h_thresh; + APB_SARADC.saradc_thres0_ctrl.saradc_apb_saradc_thres0_low = l_thresh; + } else { // ADC_MONITOR_1 + APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_channel = (adc_n << 3) | (channel & 0x7); + APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_high = h_thresh; + APB_SARADC.saradc_thres1_ctrl.saradc_apb_saradc_thres1_low = l_thresh; + } +} + +/** + * Start/Stop monitor of adc digital controller. + * + * @param monitor_id ADC digi monitor unit index. + * @param start 1 for start, 0 for stop + */ +static inline void adc_ll_digi_monitor_user_start(adc_monitor_id_t monitor_id, bool start) +{ + if (monitor_id == ADC_MONITOR_0) { + APB_SARADC.saradc_thres_ctrl.saradc_apb_saradc_thres0_en = start; + } else { + APB_SARADC.saradc_thres_ctrl.saradc_apb_saradc_thres1_en = start; + } +} + +/** + * Enable/disable a intr of adc digital monitor. + * + * @param monitor_id ADC digi monitor unit index. + * @param mode monit mode to enable/disable intr. + * @param enable enable or disable. + */ +static inline void adc_ll_digi_monitor_enable_intr(adc_monitor_id_t monitor_id, adc_monitor_mode_t mode, bool enable) +{ + if (monitor_id == ADC_MONITOR_0) { + if (mode == ADC_MONITOR_MODE_HIGH) { + APB_SARADC.saradc_int_ena.saradc_apb_saradc_thres0_high_int_ena = enable; + } else { + APB_SARADC.saradc_int_ena.saradc_apb_saradc_thres0_low_int_ena = enable; + } + } + if (monitor_id == ADC_MONITOR_1) { + if (mode == ADC_MONITOR_MODE_HIGH) { + APB_SARADC.saradc_int_ena.saradc_apb_saradc_thres1_high_int_ena = enable; + } else { + APB_SARADC.saradc_int_ena.saradc_apb_saradc_thres1_low_int_ena = enable; + } + } +} + +/** + * Clear intr raw for adc digi monitors. + */ +__attribute__((always_inline)) +static inline void adc_ll_digi_monitor_clear_intr(void) +{ + APB_SARADC.saradc_int_clr.val |= ADC_LL_THRES_ALL_INTR_ST_M; +} + +/** + * Get the address of digi monitor intr statue register. + * + * @return address of register. + */ +__attribute__((always_inline)) +static inline volatile const void *adc_ll_digi_monitor_get_intr_status_addr(void) +{ + return &APB_SARADC.saradc_int_st.val; +} + +/** + * Set DMA eof num of adc digital controller. + * If the number of measurements reaches `dma_eof_num`, then `dma_in_suc_eof` signal is generated. + * + * @param num eof num of DMA. + */ +static inline void adc_ll_digi_dma_set_eof_num(uint32_t num) +{ + HAL_FORCE_MODIFY_U32_REG_FIELD(APB_SARADC.saradc_dma_conf, saradc_apb_adc_eof_num, num); +} + +/** + * Enable output data to DMA from adc digital controller. + */ +static inline void adc_ll_digi_dma_enable(void) +{ + APB_SARADC.saradc_dma_conf.saradc_apb_adc_trans = 1; +} + +/** + * Disable output data to DMA from adc digital controller. + */ +static inline void adc_ll_digi_dma_disable(void) +{ + APB_SARADC.saradc_dma_conf.saradc_apb_adc_trans = 0; +} + +/** + * Reset adc digital controller. + */ +static inline void adc_ll_digi_reset(void) +{ + APB_SARADC.saradc_dma_conf.saradc_apb_adc_reset_fsm = 1; + APB_SARADC.saradc_dma_conf.saradc_apb_adc_reset_fsm = 0; +} + +/*--------------------------------------------------------------- + PWDET(Power detect) controller setting +---------------------------------------------------------------*/ +/** + * Set adc cct for PWDET controller. + * + * @note Capacitor tuning of the PA power monitor. cct set to the same value with PHY. + * @param cct Range: 0 ~ 7. + */ +static inline void adc_ll_pwdet_set_cct(uint32_t cct) +{ + (void)cct; +} + +/** + * Get adc cct for PWDET controller. + * + * @note Capacitor tuning of the PA power monitor. cct set to the same value with PHY. + * @return cct Range: 0 ~ 7. + */ +static inline uint32_t adc_ll_pwdet_get_cct(void) +{ + return 0; +} + +/*--------------------------------------------------------------- + Common setting +---------------------------------------------------------------*/ + +/** + * @brief Enable the ADC APB clock + * @param enable true to enable, false to disable + */ +static inline void adc_ll_enable_bus_clock(bool enable) +{ + PCR.saradc_conf.saradc_reg_clk_en = enable; +} + +/** + * @brief Reset ADC module + */ +static inline void adc_ll_reset_register(void) +{ + PCR.saradc_conf.saradc_reg_rst_en = 1; + PCR.saradc_conf.saradc_reg_rst_en = 0; +} + +/** + * Set ADC module power management. + * + * @param manage Set ADC power status. + */ +static inline void adc_ll_set_power_manage(adc_unit_t adc_n, adc_ll_power_t manage) +{ + (void) adc_n; + /* Bit1 0:Fsm 1: SW mode + Bit0 0:SW mode power down 1: SW mode power on */ + if (manage == ADC_LL_POWER_SW_ON) { + APB_SARADC.saradc_ctrl.saradc_saradc_sar_clk_gated = 1; + APB_SARADC.saradc_ctrl.saradc_saradc_xpd_sar_force = 3; + } else if (manage == ADC_LL_POWER_BY_FSM) { + APB_SARADC.saradc_ctrl.saradc_saradc_sar_clk_gated = 1; + APB_SARADC.saradc_ctrl.saradc_saradc_xpd_sar_force = 0; + } else if (manage == ADC_LL_POWER_SW_OFF) { + APB_SARADC.saradc_ctrl.saradc_saradc_sar_clk_gated = 0; + APB_SARADC.saradc_ctrl.saradc_saradc_xpd_sar_force = 2; + } +} + +__attribute__((always_inline)) +static inline void adc_ll_set_controller(adc_unit_t adc_n, adc_ll_controller_t ctrl) +{ + //Not used on ESP32C5 +} + +/*--------------------------------------------------------------- + Oneshot Read +---------------------------------------------------------------*/ +/** + * Set adc output data format for oneshot mode + * + * @note ESP32C5 Oneshot mode only supports 12bit. + * @param adc_n ADC unit. + * @param bits Output data bits width option. + */ +static inline void adc_oneshot_ll_set_output_bits(adc_unit_t adc_n, adc_bitwidth_t bits) +{ + //ESP32C5 only supports 12bit, leave here for compatibility + HAL_ASSERT(bits == ADC_BITWIDTH_12 || bits == ADC_BITWIDTH_DEFAULT); +} + +/** + * Enable adc channel to start convert. + * + * @note Only one channel can be selected for measurement. + * + * @param adc_n ADC unit. + * @param channel ADC channel number for each ADCn. + */ +static inline void adc_oneshot_ll_set_channel(adc_unit_t adc_n, adc_channel_t channel) +{ + HAL_ASSERT(adc_n == ADC_UNIT_1); + APB_SARADC.saradc_onetime_sample.saradc_saradc_onetime_channel = ((adc_n << 3) | channel); +} + +/** + * Disable adc channel to start convert. + * + * @note Only one channel can be selected in once measurement. + * + * @param adc_n ADC unit. + */ +static inline void adc_oneshot_ll_disable_channel(adc_unit_t adc_n) +{ + HAL_ASSERT(adc_n == ADC_UNIT_1); + APB_SARADC.saradc_onetime_sample.saradc_saradc_onetime_channel = ((adc_n << 3) | 0xF); +} + +/** + * Start oneshot conversion by software + * + * @param val Usage: set to 1 to start the ADC conversion. The step signal should at least keep 3 ADC digital controller clock cycle, + * otherwise the step signal may not be captured by the ADC digital controller when its frequency is slow. + * This hardware limitation will be removed in future versions. + */ +static inline void adc_oneshot_ll_start(bool val) +{ + APB_SARADC.saradc_onetime_sample.saradc_saradc_onetime_start = val; +} + +/** + * Clear the event for each ADCn for Oneshot mode + * + * @param event ADC event + */ +static inline void adc_oneshot_ll_clear_event(uint32_t event_mask) +{ + APB_SARADC.saradc_int_clr.val |= event_mask; +} + +/** + * Check the event for each ADCn for Oneshot mode + * + * @param event ADC event + * + * @return + * -true : The conversion process is finish. + * -false : The conversion process is not finish. + */ +static inline bool adc_oneshot_ll_get_event(uint32_t event_mask) +{ + return (APB_SARADC.saradc_int_raw.val & event_mask); +} + +/** + * Get the converted value for each ADCn for controller. + * + * @param adc_n ADC unit. + * @return + * - Converted value. + */ +static inline uint32_t adc_oneshot_ll_get_raw_result(adc_unit_t adc_n) +{ + HAL_ASSERT(adc_n == ADC_UNIT_1); + uint32_t ret_val = 0; + ret_val = APB_SARADC.saradc_sar1data_status.saradc_apb_saradc1_data & 0xfff; + return ret_val; +} + + +/** + * Analyze whether the obtained raw data is correct. + * ADC2 can use arbiter. The arbitration result is stored in the channel information of the returned data. + * + * @param adc_n ADC unit. + * @param raw_data ADC raw data input (convert value). + * @return + * - 1: The data is correct to use. + * - 0: The data is invalid. + */ +static inline bool adc_oneshot_ll_raw_check_valid(adc_unit_t adc_n, uint32_t raw_data) +{ + HAL_ASSERT(adc_n == ADC_UNIT_1); + return true; +} + +/** + * ADC module RTC output data invert or not. + * + * @param adc_n ADC unit. + * @param inv_en data invert or not. + */ +static inline void adc_oneshot_ll_output_invert(adc_unit_t adc_n, bool inv_en) +{ + HAL_ASSERT(adc_n == ADC_UNIT_1); + (void)inv_en; + //For compatibility +} + +/** + * Enable oneshot conversion trigger + * + * @param adc_n ADC unit + */ +static inline void adc_oneshot_ll_enable(adc_unit_t adc_n) +{ + HAL_ASSERT(adc_n == ADC_UNIT_1); + APB_SARADC.saradc_onetime_sample.saradc_saradc1_onetime_sample = 1; +} + +/** + * Disable oneshot conversion trigger for all the ADC units + */ +static inline void adc_oneshot_ll_disable_all_unit(void) +{ + APB_SARADC.saradc_onetime_sample.saradc_saradc1_onetime_sample = 0; + APB_SARADC.saradc_onetime_sample.saradc_saradc2_onetime_sample = 0; +} + +/** + * Set attenuation + * + * @note Attenuation is for all channels + * + * @param adc_n ADC unit + * @param channel ADC channel + * @param atten ADC attenuation + */ +static inline void adc_oneshot_ll_set_atten(adc_unit_t adc_n, adc_channel_t channel, adc_atten_t atten) +{ + HAL_ASSERT(adc_n == ADC_UNIT_1); + (void)channel; + // Attenuation is for all channels, unit and channel are for compatibility + APB_SARADC.saradc_onetime_sample.saradc_saradc_onetime_atten = atten; +} + +/** + * Get the attenuation of a particular channel on ADCn. + * + * @param adc_n ADC unit. + * @param channel ADCn channel number. + * @return atten The attenuation option. + */ +__attribute__((always_inline)) +static inline adc_atten_t adc_ll_get_atten(adc_unit_t adc_n, adc_channel_t channel) +{ + HAL_ASSERT(adc_n == ADC_UNIT_1); + (void)channel; + return (adc_atten_t)APB_SARADC.saradc_onetime_sample.saradc_saradc_onetime_atten; +} + +#ifdef __cplusplus +} +#endif diff --git a/components/hal/include/hal/adc_types.h b/components/hal/include/hal/adc_types.h index b37689afe88..34445ee3d58 100644 --- a/components/hal/include/hal/adc_types.h +++ b/components/hal/include/hal/adc_types.h @@ -211,7 +211,7 @@ typedef struct { }; } adc_digi_output_data_t; -#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C5 /** * @brief ADC digital controller (DMA mode) output data format. * Used to analyze the acquired ADC (DMA) data. diff --git a/components/idf_test/include/esp32c5/idf_performance_target.h b/components/idf_test/include/esp32c5/idf_performance_target.h index dd3f635e549..7f0986535d8 100644 --- a/components/idf_test/include/esp32c5/idf_performance_target.h +++ b/components/idf_test/include/esp32c5/idf_performance_target.h @@ -5,3 +5,11 @@ */ #pragma once + +#define IDF_PERFORMANCE_MAX_ADC_CONTINUOUS_STD_ATTEN3_NO_FILTER 5 +#define IDF_PERFORMANCE_MAX_ADC_CONTINUOUS_STD_ATTEN3_FILTER_2 5 +#define IDF_PERFORMANCE_MAX_ADC_CONTINUOUS_STD_ATTEN3_FILTER_4 5 +#define IDF_PERFORMANCE_MAX_ADC_CONTINUOUS_STD_ATTEN3_FILTER_8 5 +#define IDF_PERFORMANCE_MAX_ADC_CONTINUOUS_STD_ATTEN3_FILTER_16 5 +#define IDF_PERFORMANCE_MAX_ADC_CONTINUOUS_STD_ATTEN3_FILTER_64 5 +#define IDF_PERFORMANCE_MAX_ADC_ONESHOT_STD_ATTEN3 5 diff --git a/components/soc/esp32c5/adc_periph.c b/components/soc/esp32c5/adc_periph.c new file mode 100644 index 00000000000..9f9bd96cfb3 --- /dev/null +++ b/components/soc/esp32c5/adc_periph.c @@ -0,0 +1,20 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "soc/adc_periph.h" + +/* Store IO number corresponding to the ADC channel number. */ +const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM] = { + /* ADC1 */ + { + ADC1_CHANNEL_0_GPIO_NUM, + ADC1_CHANNEL_1_GPIO_NUM, + ADC1_CHANNEL_2_GPIO_NUM, + ADC1_CHANNEL_3_GPIO_NUM, + ADC1_CHANNEL_4_GPIO_NUM, + ADC1_CHANNEL_5_GPIO_NUM, + }, +}; diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index ad5ad1da435..14dd3a6e48f 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -3,6 +3,10 @@ # using gen_soc_caps_kconfig.py, do not edit manually ##################################################### +config SOC_ADC_SUPPORTED + bool + default y + config SOC_UART_SUPPORTED bool default y @@ -191,13 +195,85 @@ config SOC_AES_SUPPORT_AES_256 bool default y +config SOC_ADC_DIG_CTRL_SUPPORTED + bool + default y + +config SOC_ADC_DIG_IIR_FILTER_SUPPORTED + bool + default y + +config SOC_ADC_MONITOR_SUPPORTED + bool + default y + +config SOC_ADC_DMA_SUPPORTED + bool + default y + config SOC_ADC_PERIPH_NUM int default 1 config SOC_ADC_MAX_CHANNEL_NUM int - default 7 + default 6 + +config SOC_ADC_ATTEN_NUM + int + default 4 + +config SOC_ADC_DIGI_CONTROLLER_NUM + int + default 1 + +config SOC_ADC_PATT_LEN_MAX + int + default 8 + +config SOC_ADC_DIGI_MAX_BITWIDTH + int + default 12 + +config SOC_ADC_DIGI_MIN_BITWIDTH + int + default 12 + +config SOC_ADC_DIGI_IIR_FILTER_NUM + int + default 2 + +config SOC_ADC_DIGI_MONITOR_NUM + int + default 2 + +config SOC_ADC_DIGI_RESULT_BYTES + int + default 4 + +config SOC_ADC_DIGI_DATA_BYTES_PER_CONV + int + default 4 + +config SOC_ADC_SAMPLE_FREQ_THRES_HIGH + int + default 83333 + +config SOC_ADC_SAMPLE_FREQ_THRES_LOW + int + default 611 + +config SOC_ADC_RTC_MIN_BITWIDTH + int + default 12 + +config SOC_ADC_RTC_MAX_BITWIDTH + int + default 12 + +config SOC_ADC_SHARED_POWER + bool + default y config SOC_SHARED_IDCACHE_SUPPORTED bool diff --git a/components/soc/esp32c5/include/soc/adc_channel.h b/components/soc/esp32c5/include/soc/adc_channel.h index 0f7c05d9296..a540b82758f 100644 --- a/components/soc/esp32c5/include/soc/adc_channel.h +++ b/components/soc/esp32c5/include/soc/adc_channel.h @@ -6,24 +6,20 @@ #pragma once -// TODO: [ESP32-C5] IDF-8701 Check the channel -#define ADC1_GPIO0_CHANNEL 0 -#define ADC1_CHANNEL_0_GPIO_NUM 0 +#define ADC1_GPIO1_CHANNEL 0 +#define ADC1_CHANNEL_0_GPIO_NUM 1 -#define ADC1_GPIO1_CHANNEL 1 -#define ADC1_CHANNEL_1_GPIO_NUM 1 +#define ADC1_GPIO2_CHANNEL 1 +#define ADC1_CHANNEL_1_GPIO_NUM 2 -#define ADC1_GPIO2_CHANNEL 2 -#define ADC1_CHANNEL_2_GPIO_NUM 2 +#define ADC1_GPIO3_CHANNEL 2 +#define ADC1_CHANNEL_2_GPIO_NUM 3 -#define ADC1_GPIO3_CHANNEL 3 -#define ADC1_CHANNEL_3_GPIO_NUM 3 +#define ADC1_GPIO4_CHANNEL 3 +#define ADC1_CHANNEL_3_GPIO_NUM 4 -#define ADC1_GPIO4_CHANNEL 4 -#define ADC1_CHANNEL_4_GPIO_NUM 4 +#define ADC1_GPIO5_CHANNEL 4 +#define ADC1_CHANNEL_4_GPIO_NUM 5 -#define ADC1_GPIO5_CHANNEL 5 -#define ADC1_CHANNEL_5_GPIO_NUM 5 - -#define ADC1_GPIO6_CHANNEL 6 -#define ADC1_CHANNEL_6_GPIO_NUM 6 +#define ADC1_GPIO6_CHANNEL 5 +#define ADC1_CHANNEL_5_GPIO_NUM 6 diff --git a/components/soc/esp32c5/include/soc/clk_tree_defs.h b/components/soc/esp32c5/include/soc/clk_tree_defs.h index 1629252d8e0..18d8dc5bfac 100644 --- a/components/soc/esp32c5/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c5/include/soc/clk_tree_defs.h @@ -433,7 +433,7 @@ typedef enum { // TODO: [ESP32C5] IDF-8691, IDF-8692 (inherit from C6) /** * @brief ADC digital controller clock source */ -typedef enum { // TODO: [ESP32C5] IDF-8701, IDF-8702, IDF-8703 (inherit from C6) +typedef enum { ADC_DIGI_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */ ADC_DIGI_CLK_SRC_PLL_F80M = SOC_MOD_CLK_PLL_F80M, /*!< Select PLL_F80M as the source clock */ ADC_DIGI_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST, /*!< Select RC_FAST as the source clock */ diff --git a/components/soc/esp32c5/include/soc/regi2c_saradc.h b/components/soc/esp32c5/include/soc/regi2c_saradc.h new file mode 100644 index 00000000000..a5f8fbf611d --- /dev/null +++ b/components/soc/esp32c5/include/soc/regi2c_saradc.h @@ -0,0 +1,55 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +/** + * @file regi2c_saradc.h + * @brief Register definitions for analog to calibrate initial code for getting a more precise voltage of SAR ADC. + * + * This file lists register fields of SAR, located on an internal configuration + * bus. These definitions are used via macros defined in regi2c_ctrl.h, by + * function in adc_ll.h. + */ + +#define I2C_SAR_ADC 0X69 +#define I2C_SAR_ADC_HOSTID 0 + +#define I2C_SAR_ADC_SAR1_INIT_CODE_LSB 0x0 +#define I2C_SAR_ADC_SAR1_INIT_CODE_LSB_MSB 0x7 +#define I2C_SAR_ADC_SAR1_INIT_CODE_LSB_LSB 0x0 + +#define I2C_SAR_ADC_SAR1_INIT_CODE_MSB 0x1 +#define I2C_SAR_ADC_SAR1_INIT_CODE_MSB_MSB 0x3 +#define I2C_SAR_ADC_SAR1_INIT_CODE_MSB_LSB 0x0 + +#define ADC_SAR1_SAMPLE_CYCLE_ADDR 0x2 +#define ADC_SAR1_SAMPLE_CYCLE_ADDR_MSB 0x2 +#define ADC_SAR1_SAMPLE_CYCLE_ADDR_LSB 0x0 + +#define ADC_SAR1_DREF_ADDR 0x2 +#define ADC_SAR1_DREF_ADDR_MSB 0x6 +#define ADC_SAR1_DREF_ADDR_LSB 0x4 + +#define ADC_SAR2_INITIAL_CODE_LOW_ADDR 0x3 +#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_MSB 0x7 +#define ADC_SAR2_INITIAL_CODE_LOW_ADDR_LSB 0x0 + +#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR 0x4 +#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_MSB 0x3 +#define ADC_SAR2_INITIAL_CODE_HIGH_ADDR_LSB 0x0 + +#define ADC_SAR2_SAMPLE_CYCLE_ADDR 0x5 +#define ADC_SAR2_SAMPLE_CYCLE_ADDR_MSB 0x2 +#define ADC_SAR2_SAMPLE_CYCLE_ADDR_LSB 0x0 + +#define ADC_SAR2_DREF_ADDR 0x5 +#define ADC_SAR2_DREF_ADDR_MSB 0x6 +#define ADC_SAR2_DREF_ADDR_LSB 0x4 + +#define I2C_SARADC_TSENS_DAC 0x6 +#define I2C_SARADC_TSENS_DAC_MSB 0x3 +#define I2C_SARADC_TSENS_DAC_LSB 0x0 diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index 25d312c41c6..34d9b540253 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -17,7 +17,7 @@ #pragma once /*-------------------------- COMMON CAPS ---------------------------------------*/ -// #define SOC_ADC_SUPPORTED 1 // TODO: [ESP32C5] IDF-8701 +#define SOC_ADC_SUPPORTED 1 // #define SOC_DEDICATED_GPIO_SUPPORTED 1 // TODO: [ESP32C5] IDF-8725 #define SOC_UART_SUPPORTED 1 #define SOC_GDMA_SUPPORTED 1 @@ -94,32 +94,32 @@ /*-------------------------- ADC CAPS -------------------------------*/ /*!< SAR ADC Module*/ -// #define SOC_ADC_DIG_CTRL_SUPPORTED 1 -// #define SOC_ADC_DIG_IIR_FILTER_SUPPORTED 1 -// #define SOC_ADC_MONITOR_SUPPORTED 1 -// #define SOC_ADC_DIG_SUPPORTED_UNIT(UNIT) 1 //Digital controller supported ADC unit -// #define SOC_ADC_DMA_SUPPORTED 1 +#define SOC_ADC_DIG_CTRL_SUPPORTED 1 +#define SOC_ADC_DIG_IIR_FILTER_SUPPORTED 1 +#define SOC_ADC_MONITOR_SUPPORTED 1 +#define SOC_ADC_DIG_SUPPORTED_UNIT(UNIT) 1 //Digital controller supported ADC unit +#define SOC_ADC_DMA_SUPPORTED 1 #define SOC_ADC_PERIPH_NUM (1U) -// #define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) (7) -#define SOC_ADC_MAX_CHANNEL_NUM (7) -// #define SOC_ADC_ATTEN_NUM (4) +#define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) (6) +#define SOC_ADC_MAX_CHANNEL_NUM (6) +#define SOC_ADC_ATTEN_NUM (4) /*!< Digital */ -// #define SOC_ADC_DIGI_CONTROLLER_NUM (1U) -// #define SOC_ADC_PATT_LEN_MAX (8) /*!< Two pattern tables, each contains 4 items. Each item takes 1 byte */ -// #define SOC_ADC_DIGI_MAX_BITWIDTH (12) -// #define SOC_ADC_DIGI_MIN_BITWIDTH (12) -// #define SOC_ADC_DIGI_IIR_FILTER_NUM (2) -// #define SOC_ADC_DIGI_MONITOR_NUM (2) -// #define SOC_ADC_DIGI_RESULT_BYTES (4) -// #define SOC_ADC_DIGI_DATA_BYTES_PER_CONV (4) +#define SOC_ADC_DIGI_CONTROLLER_NUM (1U) +#define SOC_ADC_PATT_LEN_MAX (8) /*!< Two pattern tables, each contains 4 items. Each item takes 1 byte */ +#define SOC_ADC_DIGI_MAX_BITWIDTH (12) +#define SOC_ADC_DIGI_MIN_BITWIDTH (12) +#define SOC_ADC_DIGI_IIR_FILTER_NUM (2) +#define SOC_ADC_DIGI_MONITOR_NUM (2) +#define SOC_ADC_DIGI_RESULT_BYTES (4) +#define SOC_ADC_DIGI_DATA_BYTES_PER_CONV (4) /*!< F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interval <= 4095 */ -// #define SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333 -// #define SOC_ADC_SAMPLE_FREQ_THRES_LOW 611 +#define SOC_ADC_SAMPLE_FREQ_THRES_HIGH 83333 +#define SOC_ADC_SAMPLE_FREQ_THRES_LOW 611 /*!< RTC */ -// #define SOC_ADC_RTC_MIN_BITWIDTH (12) -// #define SOC_ADC_RTC_MAX_BITWIDTH (12) +#define SOC_ADC_RTC_MIN_BITWIDTH (12) +#define SOC_ADC_RTC_MAX_BITWIDTH (12) /*!< Calibration */ // #define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/ @@ -127,10 +127,10 @@ // #define SOC_ADC_CALIB_CHAN_COMPENS_SUPPORTED (1) /*!< support channel compensation to the HW offset calibration */ /*!< Interrupt */ -// #define SOC_ADC_TEMPERATURE_SHARE_INTR (1) +// #define SOC_ADC_TEMPERATURE_SHARE_INTR (1) // TODO: [ESP32C5] IDF-8727 /*!< ADC power control is shared by PWDET */ -// #define SOC_ADC_SHARED_POWER 1 +#define SOC_ADC_SHARED_POWER 1 // ESP32C5-TODO: Copy from esp32C5, need check /*-------------------------- APB BACKUP DMA CAPS -------------------------------*/ diff --git a/docs/docs_not_updated/esp32c5.txt b/docs/docs_not_updated/esp32c5.txt index 10d49479d1f..c01cdc9ce57 100644 --- a/docs/docs_not_updated/esp32c5.txt +++ b/docs/docs_not_updated/esp32c5.txt @@ -76,8 +76,6 @@ api-reference/storage/fatfsgen.rst api-reference/storage/index.rst api-reference/storage/nvs_partition_parse.rst api-reference/peripherals/sdspi_share.rst -api-reference/peripherals/adc_continuous.rst -api-reference/peripherals/adc_oneshot.rst api-reference/peripherals/usb_host.rst api-reference/peripherals/twai.rst api-reference/peripherals/usb_host/usb_host_notes_arch.rst diff --git a/docs/en/api-reference/peripherals/adc_continuous.rst b/docs/en/api-reference/peripherals/adc_continuous.rst index a22c733430b..0b8ff393993 100644 --- a/docs/en/api-reference/peripherals/adc_continuous.rst +++ b/docs/en/api-reference/peripherals/adc_continuous.rst @@ -3,7 +3,7 @@ Analog to Digital Converter (ADC) Continuous Mode Driver :link_to_translation:`zh_CN:[中文]` -{IDF_TARGET_ADC_NUM:default="two", esp32c2="one", esp32c6="one", esp32h2="one"} +{IDF_TARGET_ADC_NUM:default="two", esp32c2="one", esp32c6="one", esp32h2="one", esp32c5="one"} Introduction ------------ diff --git a/docs/en/api-reference/peripherals/adc_oneshot.rst b/docs/en/api-reference/peripherals/adc_oneshot.rst index bec0bee1862..0f07197216c 100644 --- a/docs/en/api-reference/peripherals/adc_oneshot.rst +++ b/docs/en/api-reference/peripherals/adc_oneshot.rst @@ -3,7 +3,7 @@ Analog to Digital Converter (ADC) Oneshot Mode Driver :link_to_translation:`zh_CN:[中文]` -{IDF_TARGET_ADC_NUM:default="two", esp32c2="one", esp32c6="one", esp32h2="one"} +{IDF_TARGET_ADC_NUM:default="two", esp32c2="one", esp32c6="one", esp32h2="one", esp32c5="one"} Introduction ------------ diff --git a/docs/zh_CN/api-reference/peripherals/adc_continuous.rst b/docs/zh_CN/api-reference/peripherals/adc_continuous.rst index 3e3ccdcc714..b9158a9cf37 100644 --- a/docs/zh_CN/api-reference/peripherals/adc_continuous.rst +++ b/docs/zh_CN/api-reference/peripherals/adc_continuous.rst @@ -3,7 +3,7 @@ :link_to_translation:`en:[English]` -{IDF_TARGET_ADC_NUM:default="两", esp32c2="一", esp32c6="一", esp32h2="一"} +{IDF_TARGET_ADC_NUM:default="两", esp32c2="一", esp32c6="一", esp32h2="一", esp32c5="一"} 简介 ------------ diff --git a/docs/zh_CN/api-reference/peripherals/adc_oneshot.rst b/docs/zh_CN/api-reference/peripherals/adc_oneshot.rst index 7c8687b480e..093adfde30e 100644 --- a/docs/zh_CN/api-reference/peripherals/adc_oneshot.rst +++ b/docs/zh_CN/api-reference/peripherals/adc_oneshot.rst @@ -3,7 +3,7 @@ :link_to_translation:`en:[English]` -{IDF_TARGET_ADC_NUM:default="两", esp32c2="一", esp32c6="一", esp32h2="一"} +{IDF_TARGET_ADC_NUM:default="两", esp32c2="一", esp32c6="一", esp32h2="一", esp32c5="一"} 简介 ---- diff --git a/examples/peripherals/adc/continuous_read/README.md b/examples/peripherals/adc/continuous_read/README.md index e02022f3c10..614dedffb6a 100644 --- a/examples/peripherals/adc/continuous_read/README.md +++ b/examples/peripherals/adc/continuous_read/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | # ADC DMA Example diff --git a/examples/peripherals/adc/continuous_read/pytest_adc_continuous.py b/examples/peripherals/adc/continuous_read/pytest_adc_continuous.py index 7c820be545e..c891db39e8b 100644 --- a/examples/peripherals/adc/continuous_read/pytest_adc_continuous.py +++ b/examples/peripherals/adc/continuous_read/pytest_adc_continuous.py @@ -1,6 +1,5 @@ # SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD # SPDX-License-Identifier: CC0-1.0 - import pytest from pytest_embedded.dut import Dut @@ -11,6 +10,7 @@ @pytest.mark.esp32c3 @pytest.mark.esp32c6 @pytest.mark.esp32h2 +@pytest.mark.esp32c5 @pytest.mark.adc def test_adc_continuous(dut: Dut) -> None: res = dut.expect(r'TASK: ret is 0, ret_num is (\d+) bytes') diff --git a/examples/peripherals/adc/oneshot_read/README.md b/examples/peripherals/adc/oneshot_read/README.md index 15404c47ee1..431ae899044 100644 --- a/examples/peripherals/adc/oneshot_read/README.md +++ b/examples/peripherals/adc/oneshot_read/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | # ADC Single Read Example diff --git a/examples/peripherals/adc/oneshot_read/pytest_adc_oneshot.py b/examples/peripherals/adc/oneshot_read/pytest_adc_oneshot.py index 8bb86e3c00b..4fb24a6d3c7 100644 --- a/examples/peripherals/adc/oneshot_read/pytest_adc_oneshot.py +++ b/examples/peripherals/adc/oneshot_read/pytest_adc_oneshot.py @@ -10,6 +10,7 @@ @pytest.mark.esp32c3 @pytest.mark.esp32c6 @pytest.mark.esp32h2 +@pytest.mark.esp32c5 @pytest.mark.adc def test_adc_oneshot(dut: Dut) -> None: dut.expect(r'EXAMPLE: ADC1 Channel\[(\d+)\] Raw Data: (\d+)', timeout=5) From 2f49a2e9c842dcdd582ce186755afa1cf3af6c38 Mon Sep 17 00:00:00 2001 From: gaoxu Date: Sat, 13 Jul 2024 14:06:57 +0800 Subject: [PATCH 042/113] feat(adc): add ADC func clock enable function on C5,C6,H2 --- components/esp_hw_support/adc_share_hw_ctrl.c | 6 ++++++ components/hal/esp32c5/include/hal/adc_ll.h | 11 +++++++++++ components/hal/esp32c6/include/hal/adc_ll.h | 11 +++++++++++ components/hal/esp32h2/include/hal/adc_ll.h | 11 +++++++++++ 4 files changed, 39 insertions(+) diff --git a/components/esp_hw_support/adc_share_hw_ctrl.c b/components/esp_hw_support/adc_share_hw_ctrl.c index 32f3c67b79b..a9054d47a13 100644 --- a/components/esp_hw_support/adc_share_hw_ctrl.c +++ b/components/esp_hw_support/adc_share_hw_ctrl.c @@ -207,6 +207,9 @@ void adc_apb_periph_claim(void) if (s_adc_digi_ctrlr_cnt == 1) { ADC_BUS_CLK_ATOMIC() { adc_ll_enable_bus_clock(true); +#if SOC_RCC_IS_INDEPENDENT + adc_ll_enable_func_clock(true); +#endif adc_ll_reset_register(); } } @@ -221,6 +224,9 @@ void adc_apb_periph_free(void) if (s_adc_digi_ctrlr_cnt == 0) { ADC_BUS_CLK_ATOMIC() { adc_ll_enable_bus_clock(false); +#if SOC_RCC_IS_INDEPENDENT + adc_ll_enable_func_clock(false); +#endif } } else if (s_adc_digi_ctrlr_cnt < 0) { portEXIT_CRITICAL(&s_spinlock); diff --git a/components/hal/esp32c5/include/hal/adc_ll.h b/components/hal/esp32c5/include/hal/adc_ll.h index 616ea25e610..7c491440b42 100644 --- a/components/hal/esp32c5/include/hal/adc_ll.h +++ b/components/hal/esp32c5/include/hal/adc_ll.h @@ -566,6 +566,17 @@ static inline void adc_ll_enable_bus_clock(bool enable) PCR.saradc_conf.saradc_reg_clk_en = enable; } +#if SOC_RCC_IS_INDEPENDENT +/** + * @brief Enable the ADC function clock + * @param enable true to enable, false to disable + */ +static inline void adc_ll_enable_func_clock(bool enable) +{ + PCR.saradc_clkm_conf.saradc_clkm_en = enable; +} +#endif + /** * @brief Reset ADC module */ diff --git a/components/hal/esp32c6/include/hal/adc_ll.h b/components/hal/esp32c6/include/hal/adc_ll.h index db51a869daa..439f4c0514b 100644 --- a/components/hal/esp32c6/include/hal/adc_ll.h +++ b/components/hal/esp32c6/include/hal/adc_ll.h @@ -565,6 +565,17 @@ static inline void adc_ll_enable_bus_clock(bool enable) PCR.saradc_conf.saradc_reg_clk_en = enable; } +#if SOC_RCC_IS_INDEPENDENT +/** + * @brief Enable the ADC function clock + * @param enable true to enable, false to disable + */ +static inline void adc_ll_enable_func_clock(bool enable) +{ + PCR.saradc_clkm_conf.saradc_clkm_en = enable; +} +#endif + /** * @brief Reset ADC module */ diff --git a/components/hal/esp32h2/include/hal/adc_ll.h b/components/hal/esp32h2/include/hal/adc_ll.h index 8c02ddd191d..ab7f8fa58f6 100644 --- a/components/hal/esp32h2/include/hal/adc_ll.h +++ b/components/hal/esp32h2/include/hal/adc_ll.h @@ -566,6 +566,17 @@ static inline void adc_ll_enable_bus_clock(bool enable) PCR.saradc_conf.saradc_reg_clk_en = enable; } +#if SOC_RCC_IS_INDEPENDENT +/** + * @brief Enable the ADC function clock + * @param enable true to enable, false to disable + */ +static inline void adc_ll_enable_func_clock(bool enable) +{ + PCR.saradc_clkm_conf.saradc_clkm_en = enable; +} +#endif + /** * @brief Reset ADC module */ From 8c22cb6c6a2b0ac41bc04458b46ddb23b5eb6052 Mon Sep 17 00:00:00 2001 From: Armando Date: Wed, 10 Jul 2024 10:01:22 +0800 Subject: [PATCH 043/113] feat(psram): support bss on psram on p4 --- components/esp_psram/esp_psram.c | 9 ++++++++ .../include/esp_private/esp_psram_extram.h | 7 +++++- components/esp_system/ld/esp32p4/memory.ld.in | 9 ++++++++ .../esp_system/ld/esp32p4/sections.ld.in | 22 +++++++++++++++++++ components/esp_system/port/cpu_start.c | 7 +----- 5 files changed, 47 insertions(+), 7 deletions(-) diff --git a/components/esp_psram/esp_psram.c b/components/esp_psram/esp_psram.c index 23cd5f1b59f..debbf9de31b 100644 --- a/components/esp_psram/esp_psram.c +++ b/components/esp_psram/esp_psram.c @@ -11,6 +11,7 @@ * When we add more types of external RAM memory, this can be made into a more intelligent dispatcher. *----------------------------------------------------------------------------------------------------*/ #include +#include #include "sdkconfig.h" #include "esp_attr.h" #include "esp_err.h" @@ -521,3 +522,11 @@ bool esp_psram_extram_test(void) return true; } + +void esp_psram_bss_init(void) +{ +#if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY + size_t size = (&_ext_ram_bss_end - &_ext_ram_bss_start) * sizeof(_ext_ram_bss_start); + memset(&_ext_ram_bss_start, 0, size); +#endif +} diff --git a/components/esp_psram/include/esp_private/esp_psram_extram.h b/components/esp_psram/include/esp_private/esp_psram_extram.h index 5cd7e52a153..0b44e1bfd87 100644 --- a/components/esp_psram/include/esp_private/esp_psram_extram.h +++ b/components/esp_psram/include/esp_private/esp_psram_extram.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -55,6 +55,11 @@ esp_err_t esp_psram_extram_reserve_dma_pool(size_t size); */ bool esp_psram_extram_test(void); +/** + * @brief Init .bss on psram + */ +void esp_psram_bss_init(void); + #if CONFIG_IDF_TARGET_ESP32 /** * @brief Force a writeback of the data in the PSRAM cache. This is to be called whenever diff --git a/components/esp_system/ld/esp32p4/memory.ld.in b/components/esp_system/ld/esp32p4/memory.ld.in index 8c76daee195..226803c2933 100644 --- a/components/esp_system/ld/esp32p4/memory.ld.in +++ b/components/esp_system/ld/esp32p4/memory.ld.in @@ -103,6 +103,9 @@ MEMORY This segment is placed at the beginning of LP RAM, as the end of LP RAM is occupied by LP ROM stack/data */ lp_reserved_seg(RW) : org = 0x50108000, len = RESERVE_RTC_MEM + + /* PSRAM seg */ + extern_ram_seg(RWX) : org = 0x48000000, len = IDROM_SEG_SIZE } /* Heap ends at top of dram0_0_seg */ @@ -135,6 +138,12 @@ REGION_ALIAS("rtc_reserved_seg", lp_reserved_seg ); REGION_ALIAS("rodata_seg_high", sram_high); #endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS +#if CONFIG_SPIRAM_XIP_FROM_PSRAM + REGION_ALIAS("ext_ram_seg", drom_seg); +#else + REGION_ALIAS("ext_ram_seg", extern_ram_seg); +#endif //#if CONFIG_SPIRAM_XIP_FROM_PSRAM + /** * If rodata default segment is placed in `drom_seg`, then flash's first rodata section must * also be first in the segment. diff --git a/components/esp_system/ld/esp32p4/sections.ld.in b/components/esp_system/ld/esp32p4/sections.ld.in index 38d844c4bd1..ef288b49a95 100644 --- a/components/esp_system/ld/esp32p4/sections.ld.in +++ b/components/esp_system/ld/esp32p4/sections.ld.in @@ -475,6 +475,28 @@ SECTIONS mapping[rodata_noload] } > rodata_seg_low +#if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY +#if CONFIG_SPIRAM_XIP_FROM_PSRAM + /** + * This section is required to skip flash sections, because `extern_ram_seg` + * and `drom_seg` / `irom_seg` are on the same bus when xip on psram + */ + .ext_ram.dummy (NOLOAD): + { + . = ORIGIN(ext_ram_seg) + (_rodata_reserved_end - _flash_rodata_dummy_start); + . = ALIGN (0x10000); + } > ext_ram_seg +#endif //CONFIG_SPIRAM_XIP_FROM_PSRAM + + /* This section holds .ext_ram.bss data, and will be put in PSRAM */ + .ext_ram.bss (NOLOAD) : + { + _ext_ram_bss_start = ABSOLUTE(.); + mapping[extern_ram] + ALIGNED_SYMBOL(4, _ext_ram_bss_end) + } > ext_ram_seg +#endif //CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY + .dram0.bss (NOLOAD) : { ALIGNED_SYMBOL(4, _bss_start_low) diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c index ca0c15209c7..649007cdfaa 100644 --- a/components/esp_system/port/cpu_start.c +++ b/components/esp_system/port/cpu_start.c @@ -148,11 +148,6 @@ extern int _mtvt_table; static const char *TAG = "cpu_start"; -#if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY -extern int _ext_ram_bss_start; -extern int _ext_ram_bss_end; -#endif - #ifdef CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY extern int _iram_bss_start; extern int _iram_bss_end; @@ -683,7 +678,7 @@ void IRAM_ATTR call_start_cpu0(void) #endif // !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP #if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY - memset(&_ext_ram_bss_start, 0, (&_ext_ram_bss_end - &_ext_ram_bss_start) * sizeof(_ext_ram_bss_start)); + esp_psram_bss_init(); #endif //Enable trace memory and immediately start trace. From b7b09bf57b5ea94354e0a42bc7b0325a7062f8b1 Mon Sep 17 00:00:00 2001 From: Armando Date: Wed, 10 Jul 2024 10:02:47 +0800 Subject: [PATCH 044/113] test(psram): enable bss psram test --- .../esp_common/test_apps/.build-test-rules.yml | 4 ++-- .../test_apps/esp_common/pytest_esp_common.py | 18 ++++++++++++++++-- .../esp_common/sdkconfig.xip_psram_esp32p4 | 6 ++++++ 3 files changed, 24 insertions(+), 4 deletions(-) create mode 100644 components/esp_common/test_apps/esp_common/sdkconfig.xip_psram_esp32p4 diff --git a/components/esp_common/test_apps/.build-test-rules.yml b/components/esp_common/test_apps/.build-test-rules.yml index 2c33d11d12e..19d922b73cf 100644 --- a/components/esp_common/test_apps/.build-test-rules.yml +++ b/components/esp_common/test_apps/.build-test-rules.yml @@ -3,6 +3,6 @@ components/esp_common/test_apps/esp_common: disable: - if: CONFIG_NAME == "psram" and SOC_SPIRAM_SUPPORTED != 1 - - if: CONFIG_NAME == "psram" and IDF_TARGET in ["esp32p4", "esp32c5"] + - if: CONFIG_NAME == "psram" and IDF_TARGET in ["esp32c5"] temporary: true - reason: esp32p4/c5 is not supported yet # TODO: IDF-7557 + reason: esp32c5 is not supported yet # TODO: IDF-8689 diff --git a/components/esp_common/test_apps/esp_common/pytest_esp_common.py b/components/esp_common/test_apps/esp_common/pytest_esp_common.py index 983220995f6..1a31480cc2f 100644 --- a/components/esp_common/test_apps/esp_common/pytest_esp_common.py +++ b/components/esp_common/test_apps/esp_common/pytest_esp_common.py @@ -1,6 +1,5 @@ -# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD +# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD # SPDX-License-Identifier: CC0-1.0 - import pytest from pytest_embedded import Dut @@ -51,6 +50,7 @@ def run_multiple_stages(dut: Dut, test_case_num: int, stages: int) -> None: @pytest.mark.esp32 @pytest.mark.esp32s2 @pytest.mark.esp32s3 +@pytest.mark.esp32p4 @pytest.mark.generic @pytest.mark.parametrize( 'config', @@ -89,3 +89,17 @@ def test_esp_attr_xip_psram_esp32s2(dut: Dut) -> None: ) def test_esp_attr_xip_psram_esp32s3(dut: Dut) -> None: dut.run_all_single_board_cases() + + +# psram attr tests with xip_psram +@pytest.mark.esp32p4 +@pytest.mark.generic +@pytest.mark.parametrize( + 'config', + [ + 'xip_psram_esp32p4' + ], + indirect=True, +) +def test_esp_attr_xip_psram_esp32p4(dut: Dut) -> None: + dut.run_all_single_board_cases() diff --git a/components/esp_common/test_apps/esp_common/sdkconfig.xip_psram_esp32p4 b/components/esp_common/test_apps/esp_common/sdkconfig.xip_psram_esp32p4 new file mode 100644 index 00000000000..706f080ca94 --- /dev/null +++ b/components/esp_common/test_apps/esp_common/sdkconfig.xip_psram_esp32p4 @@ -0,0 +1,6 @@ +# For XiP PSRAM EXT_RAM_BSS_ATTR + +CONFIG_IDF_TARGET="esp32p4" +CONFIG_SPIRAM=y +CONFIG_SPIRAM_XIP_FROM_PSRAM=y +CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY=y From 3dc80527ab3dc0d7cc0960cb197cf06ae9634754 Mon Sep 17 00:00:00 2001 From: Mahavir Jain Date: Fri, 12 Jul 2024 11:50:17 +0530 Subject: [PATCH 045/113] feat: add compiler config for not merging const sections Probably GCC-13.x and on-wards uses "-fmerge-constants" to merge the const section (string/floating-point) across compilation units. This makes it difficult to properly analyze the size output of rodata section across libraries, the merged section (big in size) is showed across a single library. The config option added here can help to disable this compiler behavior and help to provide better size analysis. It can be used during development phase only as it increases rodata section size. --- CMakeLists.txt | 4 ++++ Kconfig | 9 +++++++++ docs/en/api-guides/tools/idf-size.rst | 2 +- .../system/build_test/sdkconfig.ci.no_merge_constants | 1 + 4 files changed, 15 insertions(+), 1 deletion(-) create mode 100644 tools/test_apps/system/build_test/sdkconfig.ci.no_merge_constants diff --git a/CMakeLists.txt b/CMakeLists.txt index b381db84844..6cedae7de38 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -136,6 +136,10 @@ if(CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE) list(APPEND compile_definitions "-DNDEBUG") endif() +if(CONFIG_COMPILER_NO_MERGE_CONSTANTS) + list(APPEND compile_options "-fno-merge-constants") +endif() + if(CONFIG_COMPILER_STACK_CHECK_MODE_NORM) list(APPEND compile_options "-fstack-protector") elseif(CONFIG_COMPILER_STACK_CHECK_MODE_STRONG) diff --git a/Kconfig b/Kconfig index b5c529cbebb..244a1f9e5ec 100644 --- a/Kconfig +++ b/Kconfig @@ -514,6 +514,15 @@ mainmenu "Espressif IoT Development Framework Configuration" help Stack smashing protection. + config COMPILER_NO_MERGE_CONSTANTS + bool "Disable merging const sections" + depends on IDF_TOOLCHAIN_GCC + help + Disable merging identical constants (string/floating-point) across compilation units. + This helps in better size analysis of the application binary as the rodata section + distribution is more uniform across libraries. On downside, it may increase + the binary size and hence should be used during development phase only. + config COMPILER_WARN_WRITE_STRINGS bool "Enable -Wwrite-strings warning flag" default "n" diff --git a/docs/en/api-guides/tools/idf-size.rst b/docs/en/api-guides/tools/idf-size.rst index d456f5392e0..0d5741621f1 100644 --- a/docs/en/api-guides/tools/idf-size.rst +++ b/docs/en/api-guides/tools/idf-size.rst @@ -136,7 +136,7 @@ The table is sorted in descending order of the total contribution of the static .. note:: - The size of the ``.rodata`` section in the ``Flash Data`` memory type may appear very large for a single archive. This occurs due to linker relaxations. The linker may attempt to combine object file sections with ``MERGE`` and ``STRINGS`` flags from all archives into one to perform tail string optimization. Consequently, one archive may end up with a very large ``.rodata`` section, containing string literals from other archives. This is evident in the ``.rodata`` section of the ``libesp_app_format.a`` archive. + The size of the ``.rodata`` section in the ``Flash Data`` memory type may appear very large for a single archive. This occurs due to linker relaxations. The linker may attempt to combine object file sections with ``MERGE`` and ``STRINGS`` flags from all archives into one to perform tail string optimization. Consequently, one archive may end up with a very large ``.rodata`` section, containing string literals from other archives. This is evident in the ``.rodata`` section of the ``libesp_app_format.a`` archive. The specific compiler behavior here can be turned off by enabling :ref:`CONFIG_COMPILER_NO_MERGE_CONSTANTS` option (only for GCC toolchain), please read help for more details. Source File Usage Summary ``idf.py size-files`` diff --git a/tools/test_apps/system/build_test/sdkconfig.ci.no_merge_constants b/tools/test_apps/system/build_test/sdkconfig.ci.no_merge_constants new file mode 100644 index 00000000000..d30e4da72b6 --- /dev/null +++ b/tools/test_apps/system/build_test/sdkconfig.ci.no_merge_constants @@ -0,0 +1 @@ +CONFIG_COMPILER_NO_MERGE_CONSTANTS=y From 9d2b2d4d912e2a57989c088bfb36051dffd2f3f8 Mon Sep 17 00:00:00 2001 From: linruihao Date: Fri, 12 Jul 2024 15:00:09 +0800 Subject: [PATCH 046/113] fix(coex): Fixed coexist scheme phase index overflow issue --- components/esp_coex/lib | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_coex/lib b/components/esp_coex/lib index 56d324c3fe3..d99dfd1883a 160000 --- a/components/esp_coex/lib +++ b/components/esp_coex/lib @@ -1 +1 @@ -Subproject commit 56d324c3fe3fb7649f8736bbb3b9f00b7f612449 +Subproject commit d99dfd1883a1468b8986362a1382a4f46e918b60 From 0ff10095980ee26abf07bc3e53af968f3211e7ca Mon Sep 17 00:00:00 2001 From: Jakub Kocka Date: Mon, 8 Jul 2024 14:20:35 +0200 Subject: [PATCH 047/113] docs(tools): Changed USB Drivers (Windows Only) section of DFU New driver was created for ESP32-S2, so there is no need to manually install it using tools --- docs/en/api-guides/dfu.rst | 17 ++++++++++++++--- docs/zh_CN/api-guides/dfu.rst | 19 +++++++++++++++---- 2 files changed, 29 insertions(+), 7 deletions(-) diff --git a/docs/en/api-guides/dfu.rst b/docs/en/api-guides/dfu.rst index 4e5a293fc92..2ad2befb48f 100644 --- a/docs/en/api-guides/dfu.rst +++ b/docs/en/api-guides/dfu.rst @@ -116,11 +116,22 @@ Restart your computer so the previous setting could take into affect or run ``su USB Drivers (Windows Only) -------------------------- -``dfu-util`` uses `libusb` to access the device. You have to register on Windows the device with the `WinUSB` driver. +``dfu-util`` uses `libusb` to access the device. On Windows, the `WinUSB` driver is the recommended driver which has to be installed for the device to work properly. For more details please see the `libusb wiki `_. -Please see the `libusb wiki `_ for more details. +.. only:: esp32s2 -The drivers can be installed by the `Zadig tool `_. Please make sure that the device is in download mode before you run the tool and that it detects the {IDF_TARGET_NAME} device before you install the drivers. The Zadig tool might detect several USB interfaces of {IDF_TARGET_NAME}. Please install the WinUSB driver only for the interface where there is no driver installed (probably it is Interface 2) and do not re-install the driver for the other interface. + The development board driver can be downloaded from https://github.com/espressif/esp-win-usb-drivers/releases. The files need to be extracted and `installed `_. This should change or install the WinUSB driver for the right interface of the device. + +.. note:: + + If the feature is not working please proceed with the manual driver assignment. Otherwise, the following section can be skipped. + +USB Drivers (Windows Only) - manual driver assignment +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +Manual driver assignment can be performed with the `Zadig tool `_. Please make sure that the device is in download mode before running the tool and that the {IDF_TARGET_NAME} device is detected before the driver installation. + +The Zadig tool might detect several USB interfaces of {IDF_TARGET_NAME}. Please install the `WinUSB` driver **only** for the interface where there is no driver installed (probably it is Interface 2) and do not re-install the driver for the other interface. .. warning:: diff --git a/docs/zh_CN/api-guides/dfu.rst b/docs/zh_CN/api-guides/dfu.rst index c38ecb2abbd..cc0f476ef55 100644 --- a/docs/zh_CN/api-guides/dfu.rst +++ b/docs/zh_CN/api-guides/dfu.rst @@ -114,13 +114,24 @@ Udev 是 Linux 内核的设备管理器，允许用户在没有 ``sudo`` 的情 .. _api_guide_dfu_flash_win: USB 驱动（仅限 Windows） -------------------------------- +------------------------ -``dfu-util`` 使用 `libusb` 来访问设备。你需要在 Windows 上使用 `WinUSB` 驱动程序注册设备。 +``dfu-util`` 使用 `libusb` 访问设备。在 Windows 上，必须先安装 `WinUSB` 驱动程序才能使设备正常工作。详情请参阅 `libusb wiki `_。 -更多详细信息，请参考 `libusb wiki `_。 +.. only:: esp32s2 -可以通过 `Zadig 工具 `_ 安装驱动程序。请确保在运行该工具之前设备处于下载模式，并确保在安装驱动程序之前检测到 {IDF_TARGET_NAME} 设备。Zadig 工具可能会检测到 {IDF_TARGET_NAME} 的多个 USB 接口。请只为没有安装驱动的接口（可能是接口 2）安装 WinUSB 驱动，不要重新安装其他接口驱动。 + 开发板驱动程序可以从 https://github.com/espressif/esp-win-usb-drivers/releases 下载。文件需要解压并 `安装 `_。进行以上操作，可以为正确的设备接口更改或安装 WinUSB 驱动程序。 + +.. note:: + + 如果该功能无法正常运作，请手动分配驱动程序；若设备正常工作，请跳过以下章节。 + +USB 驱动（仅限 Windows）- 手动分配驱动程序 +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +可以使用 `Zadig 工具 `_ 手动分配驱动程序。在运行工具前，请确保设备处于下载模式，且在安装驱动程序之前已检测到 {IDF_TARGET_NAME} 设备。 + +Zadig 工具可能会检测到 {IDF_TARGET_NAME} 的多个 USB 接口。请 **仅为** 没有安装驱动程序的接口（可能是接口 2）安装 `WinUSB` 驱动程序，不要重新安装其他接口的驱动程序。 .. warning:: From b82e26593e98b0b7aca4d7a2aaba4b23b485b01c Mon Sep 17 00:00:00 2001 From: Sachin Billore Date: Sat, 1 Jun 2024 12:33:40 +0530 Subject: [PATCH 048/113] fix(apm): minor fixes for apm api --- components/hal/esp32c5/include/hal/apm_ll.h | 70 +++++------ components/hal/esp32c6/include/hal/apm_ll.h | 129 +++++++------------- components/hal/esp32h2/include/hal/apm_ll.h | 101 +++++---------- components/hal/include/hal/apm_hal.h | 8 +- 4 files changed, 116 insertions(+), 192 deletions(-) diff --git a/components/hal/esp32c5/include/hal/apm_ll.h b/components/hal/esp32c5/include/hal/apm_ll.h index fdde15988d1..d735bb922ad 100644 --- a/components/hal/esp32c5/include/hal/apm_ll.h +++ b/components/hal/esp32c5/include/hal/apm_ll.h @@ -36,73 +36,73 @@ extern "C" { #define APM_LL_MASTER_MAX 32 #define LP_APM0_MAX_ACCESS_PATH 0x1 -#define HP_APM_MAX_ACCESS_PATH 0x4 +#define HP_APM_MAX_ACCESS_PATH 0x5 #define LP_APM_MAX_ACCESS_PATH 0x2 #define APM_CTRL_REGION_FILTER_EN_REG(apm_ctrl) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION_FILTER_EN_REG) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION_FILTER_EN_REG) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION_FILTER_EN_REG) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION_FILTER_EN_REG) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION_FILTER_EN_REG) : \ + (LP_APM_REGION_FILTER_EN_REG)); \ }) #define TEE_LL_MODE_CTRL_REG(master_id) (TEE_M0_MODE_CTRL_REG + 4 * (master_id)) #define APM_LL_REGION_ADDR_START_REG(apm_ctrl, regn_num) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \ + (LP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num))); \ }) #define APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num) \ ({\ (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \ ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : 0)); \ + (LP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num))); \ }) #define APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ATTR_REG + 0xC * (regn_num)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ATTR_REG + 0xC * (regn_num)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ATTR_REG + 0xC * (regn_num)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ATTR_REG + 0xC * (regn_num)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ATTR_REG + 0xC * (regn_num)) : \ + (LP_APM_REGION0_ATTR_REG + 0xC * (regn_num))); \ }) #define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ + (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path))); \ }) #define APM_CTRL_M_REGION_STATUS_CLR (BIT(0)) #define APM_LL_APM_CTRL_EXCP_CLR_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \ + (LP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path))); \ }) #define APM_LL_TEE_EXCP_INFO0_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \ + (LP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path))); \ }) #define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ + (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path))); \ }) #define APM_LL_TEE_EXCP_INFO1_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \ + (LP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path))); \ }) #define APM_LL_SEC_MODE_REGION_ATTR(sec_mode, regn_pms) ((regn_pms) << (4 * (sec_mode - 1))) @@ -111,24 +111,24 @@ extern "C" { #define APM_LL_APM_CTRL_INT_EN_REG(apm_ctrl) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_INT_EN_REG) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_INT_EN_REG) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_INT_EN_REG) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_INT_EN_REG) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_INT_EN_REG) : \ + (LP_APM_INT_EN_REG)); \ }) #define APM_CTRL_CLK_EN (BIT(0)) #define APM_LL_APM_CTRL_CLOCK_GATE_REG(apm_ctrl) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_CLOCK_GATE_REG) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_CLOCK_GATE_REG) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_CLOCK_GATE_REG) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_CLOCK_GATE_REG) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_CLOCK_GATE_REG) : \ + (LP_APM_CLOCK_GATE_REG)); \ }) #define APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_FUNC_CTRL_REG) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_FUNC_CTRL_REG) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_FUNC_CTRL_REG) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_FUNC_CTRL_REG) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_FUNC_CTRL_REG) : \ + (LP_APM_FUNC_CTRL_REG)); \ }) /** diff --git a/components/hal/esp32c6/include/hal/apm_ll.h b/components/hal/esp32c6/include/hal/apm_ll.h index fc7b3fa4ce5..0288568707c 100644 --- a/components/hal/esp32c6/include/hal/apm_ll.h +++ b/components/hal/esp32c6/include/hal/apm_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -15,7 +15,6 @@ #include "soc/hp_apm_reg.h" #include "soc/lp_apm_reg.h" #include "soc/interrupts.h" -#include "hal/assert.h" #ifdef __cplusplus extern "C" { @@ -41,68 +40,68 @@ extern "C" { #define APM_CTRL_REGION_FILTER_EN_REG(apm_ctrl) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION_FILTER_EN_REG) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION_FILTER_EN_REG) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION_FILTER_EN_REG) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION_FILTER_EN_REG) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION_FILTER_EN_REG) : \ + (LP_APM_REGION_FILTER_EN_REG)); \ }) #define TEE_LL_MODE_CTRL_REG(master_id) (TEE_M0_MODE_CTRL_REG + 4 * (master_id)) #define APM_LL_REGION_ADDR_START_REG(apm_ctrl, regn_num) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \ + (LP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num))); \ }) #define APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \ + (LP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num))); \ }) #define APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : \ + (LP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num))); \ }) #define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ + (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path))); \ }) #define APM_CTRL_M_REGION_STATUS_CLR (BIT(0)) #define APM_LL_APM_CTRL_EXCP_CLR_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \ + (LP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path))); \ }) #define APM_LL_TEE_EXCP_INFO0_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \ + (LP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path))); \ }) #define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ + (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path))); \ }) #define APM_LL_TEE_EXCP_INFO1_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \ + (LP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path))); \ }) #define APM_LL_SEC_MODE_REGION_ATTR(sec_mode, regn_pms) ((regn_pms) << (4 * (sec_mode - 1))) @@ -111,24 +110,24 @@ extern "C" { #define APM_LL_APM_CTRL_INT_EN_REG(apm_ctrl) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_INT_EN_REG) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_INT_EN_REG) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_INT_EN_REG) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_INT_EN_REG) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_INT_EN_REG) : \ + (LP_APM_INT_EN_REG)); \ }) #define APM_CTRL_CLK_EN (BIT(0)) #define APM_LL_APM_CTRL_CLOCK_GATE_REG(apm_ctrl) \ ({\ - (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_CLOCK_GATE_REG) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_CLOCK_GATE_REG) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_CLOCK_GATE_REG) : 0)); \ + (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_CLOCK_GATE_REG) : \ + ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_CLOCK_GATE_REG) : \ + (LP_APM_CLOCK_GATE_REG)); \ }) #define APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl) \ ({\ (LP_APM0_CTRL == apm_ctrl) ? (LP_APM0_FUNC_CTRL_REG) : \ ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_FUNC_CTRL_REG) : \ - ((LP_APM_CTRL == apm_ctrl) ? (LP_APM_FUNC_CTRL_REG) : 0)); \ + (LP_APM_FUNC_CTRL_REG)); \ }) /** @@ -259,11 +258,6 @@ static inline void apm_ll_apm_ctrl_region_filter_enable(apm_ll_apm_ctrl_t apm_ct static inline void apm_ll_apm_ctrl_filter_enable(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path, bool enable) { - HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || - ((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - if (enable) { REG_SET_BIT(APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl), BIT(apm_m_path)); } else { @@ -281,10 +275,6 @@ static inline void apm_ll_apm_ctrl_filter_enable(apm_ll_apm_ctrl_t apm_ctrl, static inline void apm_ll_apm_ctrl_set_region_start_address(apm_ll_apm_ctrl_t apm_ctrl, uint32_t regn_num, uint32_t addr) { - HAL_ASSERT((((apm_ctrl == LP_APM0_CTRL) || (apm_ctrl == LP_APM_CTRL)) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) || - ((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM)) - ); - REG_WRITE(APM_LL_REGION_ADDR_START_REG(apm_ctrl, regn_num), addr); } @@ -298,10 +288,6 @@ static inline void apm_ll_apm_ctrl_set_region_start_address(apm_ll_apm_ctrl_t ap static inline void apm_ll_apm_ctrl_set_region_end_address(apm_ll_apm_ctrl_t apm_ctrl, uint32_t regn_num, uint32_t addr) { - HAL_ASSERT((((apm_ctrl == LP_APM0_CTRL) || (apm_ctrl == LP_APM_CTRL)) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) || - ((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM)) - ); - REG_WRITE(APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num), addr); } @@ -316,10 +302,6 @@ static inline void apm_ll_apm_ctrl_set_region_end_address(apm_ll_apm_ctrl_t apm_ static inline void apm_ll_apm_ctrl_sec_mode_region_attr_config(apm_ll_apm_ctrl_t apm_ctrl, uint32_t regn_num, apm_ll_secure_mode_t sec_mode, uint32_t regn_pms) { - HAL_ASSERT((((apm_ctrl == LP_APM0_CTRL) || (apm_ctrl == LP_APM_CTRL)) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) || - ((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM)) - ); - uint32_t val = 0; val = REG_READ(APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num)); val &= ~APM_LL_SEC_MODE_REGION_ATTR_M(sec_mode); @@ -336,11 +318,6 @@ static inline void apm_ll_apm_ctrl_sec_mode_region_attr_config(apm_ll_apm_ctrl_t static inline uint8_t apm_ll_apm_ctrl_exception_status(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path) { - HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || - ((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - return REG_READ(APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path)); } @@ -353,11 +330,6 @@ static inline uint8_t apm_ll_apm_ctrl_exception_status(apm_ll_apm_ctrl_t apm_ctr static inline void apm_ll_apm_ctrl_exception_clear(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path) { - HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || - ((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - REG_SET_BIT(APM_LL_APM_CTRL_EXCP_CLR_REG(apm_ctrl, apm_m_path), APM_CTRL_M_REGION_STATUS_CLR); } @@ -370,11 +342,6 @@ static inline void apm_ll_apm_ctrl_exception_clear(apm_ll_apm_ctrl_t apm_ctrl, */ static inline void apm_ll_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t *excp_info) { - HAL_ASSERT(((excp_info->apm_path.apm_ctrl == LP_APM0_CTRL) && (excp_info->apm_path.apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || - ((excp_info->apm_path.apm_ctrl == HP_APM_CTRL) && (excp_info->apm_path.apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((excp_info->apm_path.apm_ctrl == LP_APM_CTRL) && (excp_info->apm_path.apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - excp_info->excp_id = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path), APM_LL_CTRL_EXCEPTION_ID); excp_info->excp_mode = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path), @@ -395,11 +362,6 @@ static inline void apm_ll_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t static inline void apm_ll_apm_ctrl_interrupt_enable(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path, bool enable) { - HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || - ((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - if (enable) { REG_SET_BIT(APM_LL_APM_CTRL_INT_EN_REG(apm_ctrl), BIT(apm_m_path)); } else { @@ -442,25 +404,20 @@ static inline void apm_ll_apm_ctrl_reset_event_enable(bool enable) } /** - * @brief Return APM Ctrl interrupt source number. + * @brief Fetch the APM Ctrl interrupt source number. * * @param apm_ctrl APM Ctrl (LP_APM0/HP_APM/LP_APM) * @param apm_m_path APM Ctrl access patch(M[0:n]) */ -static inline esp_err_t apm_ll_apm_ctrl_get_int_src_num(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path) +static inline int apm_ll_apm_ctrl_get_int_src_num(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path) { - HAL_ASSERT(((apm_ctrl == LP_APM0_CTRL) && (apm_m_path < LP_APM0_MAX_ACCESS_PATH)) || - ((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - switch (apm_ctrl) { - case LP_APM0_CTRL : - return (ETS_LP_APM0_INTR_SOURCE); - case HP_APM_CTRL : - return (ETS_HP_APM_M0_INTR_SOURCE + apm_m_path); - case LP_APM_CTRL : - return (ETS_LP_APM_M0_INTR_SOURCE + apm_m_path); + case LP_APM0_CTRL : + return (ETS_LP_APM0_INTR_SOURCE); + case HP_APM_CTRL : + return (ETS_HP_APM_M0_INTR_SOURCE + apm_m_path); + case LP_APM_CTRL : + return (ETS_LP_APM_M0_INTR_SOURCE + apm_m_path); } return -1; diff --git a/components/hal/esp32h2/include/hal/apm_ll.h b/components/hal/esp32h2/include/hal/apm_ll.h index b95effad697..cc0046ce274 100644 --- a/components/hal/esp32h2/include/hal/apm_ll.h +++ b/components/hal/esp32h2/include/hal/apm_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -14,7 +14,6 @@ #include "soc/hp_apm_reg.h" #include "soc/lp_apm_reg.h" #include "soc/interrupts.h" -#include "hal/assert.h" #ifdef __cplusplus extern "C" { @@ -39,59 +38,59 @@ extern "C" { #define APM_CTRL_REGION_FILTER_EN_REG(apm_ctrl) \ ({\ - (LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION_FILTER_EN_REG) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION_FILTER_EN_REG) : 0); \ + (LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION_FILTER_EN_REG) : \ + (HP_APM_REGION_FILTER_EN_REG); \ }) #define TEE_LL_MODE_CTRL_REG(master_id) (TEE_M0_MODE_CTRL_REG + 4 * (master_id)) #define APM_LL_REGION_ADDR_START_REG(apm_ctrl, regn_num) \ ({\ - (LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : 0); \ + (LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)) : \ + (HP_APM_REGION0_ADDR_START_REG + 0xC * (regn_num)); \ }) #define APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num) \ ({\ - (LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : 0); \ + (LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)) : \ + (HP_APM_REGION0_ADDR_END_REG + 0xC * (regn_num)); \ }) #define APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num) \ ({\ - (LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : 0); \ + (LP_APM_CTRL == apm_ctrl) ? (LP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)) : \ + (HP_APM_REGION0_PMS_ATTR_REG + 0xC * (regn_num)); \ }) #define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : 0); \ + (LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ + (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)); \ }) #define APM_CTRL_M_REGION_STATUS_CLR (BIT(0)) #define APM_LL_APM_CTRL_EXCP_CLR_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : 0); \ + (LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)) : \ + (HP_APM_M0_STATUS_CLR_REG + 0x10 * (apm_m_path)); \ }) #define APM_LL_TEE_EXCP_INFO0_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : 0); \ + (LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)) : \ + (HP_APM_M0_EXCEPTION_INFO0_REG + 0x10 * (apm_m_path)); \ }) #define APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : 0); \ + (LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)) : \ + (HP_APM_M0_STATUS_REG + 0x10 * (apm_m_path)); \ }) #define APM_LL_TEE_EXCP_INFO1_REG(apm_ctrl, apm_m_path) \ ({\ - (LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : 0); \ + (LP_APM_CTRL == apm_ctrl) ? (LP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)) : \ + (HP_APM_M0_EXCEPTION_INFO1_REG + 0x10 * (apm_m_path)); \ }) #define APM_LL_SEC_MODE_REGION_ATTR(sec_mode, regn_pms) ((regn_pms) << (4 * (sec_mode - 1))) @@ -100,21 +99,21 @@ extern "C" { #define APM_LL_APM_CTRL_INT_EN_REG(apm_ctrl) \ ({\ - (LP_APM_CTRL == apm_ctrl) ? (LP_APM_INT_EN_REG) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_INT_EN_REG) : 0); \ + (LP_APM_CTRL == apm_ctrl) ? (LP_APM_INT_EN_REG) : \ + (HP_APM_INT_EN_REG); \ }) #define APM_CTRL_CLK_EN (BIT(0)) #define APM_LL_APM_CTRL_CLOCK_GATE_REG(apm_ctrl) \ ({\ - (LP_APM_CTRL == apm_ctrl) ? (LP_APM_CLOCK_GATE_REG) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_CLOCK_GATE_REG) : 0); \ + (LP_APM_CTRL == apm_ctrl) ? (LP_APM_CLOCK_GATE_REG) : \ + (HP_APM_CLOCK_GATE_REG); \ }) #define APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl) \ ({\ - (LP_APM_CTRL == apm_ctrl) ? (LP_APM_FUNC_CTRL_REG) : \ - ((HP_APM_CTRL == apm_ctrl) ? (HP_APM_FUNC_CTRL_REG) : 0); \ + (LP_APM_CTRL == apm_ctrl) ? (LP_APM_FUNC_CTRL_REG) : \ + (HP_APM_FUNC_CTRL_REG); \ }) /** @@ -242,10 +241,6 @@ static inline void apm_ll_apm_ctrl_region_filter_enable(apm_ll_apm_ctrl_t apm_ct static inline void apm_ll_apm_ctrl_filter_enable(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path, bool enable) { - HAL_ASSERT(((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - if (enable) { REG_SET_BIT(APM_LL_APM_CTRL_FUNC_CTRL_REG(apm_ctrl), BIT(apm_m_path)); } else { @@ -263,10 +258,6 @@ static inline void apm_ll_apm_ctrl_filter_enable(apm_ll_apm_ctrl_t apm_ctrl, static inline void apm_ll_apm_ctrl_set_region_start_address(apm_ll_apm_ctrl_t apm_ctrl, uint32_t regn_num, uint32_t addr) { - HAL_ASSERT(((apm_ctrl == LP_APM_CTRL) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) || - ((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM)) - ); - REG_WRITE(APM_LL_REGION_ADDR_START_REG(apm_ctrl, regn_num), addr); } @@ -280,10 +271,6 @@ static inline void apm_ll_apm_ctrl_set_region_start_address(apm_ll_apm_ctrl_t ap static inline void apm_ll_apm_ctrl_set_region_end_address(apm_ll_apm_ctrl_t apm_ctrl, uint32_t regn_num, uint32_t addr) { - HAL_ASSERT(((apm_ctrl == LP_APM_CTRL) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) || - ((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM)) - ); - REG_WRITE(APM_LL_REGION_ADDR_END_REG(apm_ctrl, regn_num), addr); } @@ -298,10 +285,6 @@ static inline void apm_ll_apm_ctrl_set_region_end_address(apm_ll_apm_ctrl_t apm_ static inline void apm_ll_apm_ctrl_sec_mode_region_attr_config(apm_ll_apm_ctrl_t apm_ctrl, uint32_t regn_num, apm_ll_secure_mode_t sec_mode, uint32_t regn_pms) { - HAL_ASSERT(((apm_ctrl == LP_APM_CTRL) && (regn_num <= APM_LL_LP_MAX_REGION_NUM)) || - ((apm_ctrl == HP_APM_CTRL) && (regn_num <= APM_LL_HP_MAX_REGION_NUM)) - ); - uint32_t val = 0; val = REG_READ(APM_LL_REGION_ADDR_ATTR_REG(apm_ctrl, regn_num)); val &= ~APM_LL_SEC_MODE_REGION_ATTR_M(sec_mode); @@ -318,10 +301,6 @@ static inline void apm_ll_apm_ctrl_sec_mode_region_attr_config(apm_ll_apm_ctrl_t static inline uint8_t apm_ll_apm_ctrl_exception_status(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path) { - HAL_ASSERT(((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - return REG_READ(APM_LL_APM_CTRL_EXCP_STATUS_REG(apm_ctrl, apm_m_path)); } @@ -334,10 +313,6 @@ static inline uint8_t apm_ll_apm_ctrl_exception_status(apm_ll_apm_ctrl_t apm_ctr static inline void apm_ll_apm_ctrl_exception_clear(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path) { - HAL_ASSERT(((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - REG_SET_BIT(APM_LL_APM_CTRL_EXCP_CLR_REG(apm_ctrl, apm_m_path), APM_CTRL_M_REGION_STATUS_CLR); } @@ -350,10 +325,6 @@ static inline void apm_ll_apm_ctrl_exception_clear(apm_ll_apm_ctrl_t apm_ctrl, */ static inline void apm_ll_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t *excp_info) { - HAL_ASSERT(((excp_info->apm_path.apm_ctrl == HP_APM_CTRL) && (excp_info->apm_path.apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((excp_info->apm_path.apm_ctrl == LP_APM_CTRL) && (excp_info->apm_path.apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - excp_info->excp_id = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path), APM_LL_CTRL_EXCEPTION_ID); excp_info->excp_mode = REG_GET_FIELD(APM_LL_TEE_EXCP_INFO0_REG(excp_info->apm_path.apm_ctrl, excp_info->apm_path.apm_m_path), @@ -374,10 +345,6 @@ static inline void apm_ll_apm_ctrl_get_exception_info(apm_ctrl_exception_info_t static inline void apm_ll_apm_ctrl_interrupt_enable(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path, bool enable) { - HAL_ASSERT(((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - if (enable) { REG_SET_BIT(APM_LL_APM_CTRL_INT_EN_REG(apm_ctrl), BIT(apm_m_path)); } else { @@ -420,22 +387,18 @@ static inline void apm_ll_apm_ctrl_reset_event_enable(bool enable) } /** - * @brief Return APM Ctrl interrupt source number. + * @brief Fetch the APM Ctrl interrupt source number. * - * @param apm_ctrl APM Ctrl (LP_APM/HP_APM) + * @param apm_ctrl APM Ctrl (LP_APM0/HP_APM/LP_APM) * @param apm_m_path APM Ctrl access patch(M[0:n]) */ -static inline esp_err_t apm_ll_apm_ctrl_get_int_src_num(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path) +static inline int apm_ll_apm_ctrl_get_int_src_num(apm_ll_apm_ctrl_t apm_ctrl, apm_ll_ctrl_access_path_t apm_m_path) { - HAL_ASSERT(((apm_ctrl == HP_APM_CTRL) && (apm_m_path < HP_APM_MAX_ACCESS_PATH)) || - ((apm_ctrl == LP_APM_CTRL) && (apm_m_path < LP_APM_MAX_ACCESS_PATH)) - ); - switch (apm_ctrl) { - case HP_APM_CTRL : - return (ETS_HP_APM_M0_INTR_SOURCE + apm_m_path); - case LP_APM_CTRL : - return (ETS_LP_APM_M0_INTR_SOURCE); + case HP_APM_CTRL : + return (ETS_HP_APM_M0_INTR_SOURCE + apm_m_path); + case LP_APM_CTRL : + return (ETS_LP_APM_M0_INTR_SOURCE + apm_m_path); } return -1; diff --git a/components/hal/include/hal/apm_hal.h b/components/hal/include/hal/apm_hal.h index 6f8b6eb5e93..94898df37c9 100644 --- a/components/hal/include/hal/apm_hal.h +++ b/components/hal/include/hal/apm_hal.h @@ -238,11 +238,15 @@ void apm_hal_apm_ctrl_master_sec_mode_config(apm_ctrl_secure_mode_config_t *sec_ void apm_hal_apm_ctrl_reset_event_enable(bool enable); /** - * @brief Returns APM Ctrl access path interrupt source number. + * @brief Fetch the APM Ctrl access path interrupt source number. * * @param apm_path APM controller and access path to be configured + * + * @return + * - valid interrupt source number on success + * - -1: invalid interrupt source */ -esp_err_t apm_hal_apm_ctrl_get_int_src_num(apm_ctrl_path_t *apm_path); +int apm_hal_apm_ctrl_get_int_src_num(apm_ctrl_path_t *apm_path); #endif //CONFIG_IDF_TARGET_ESP32P4 From 4ec9a8412d6b110d41e666422ba9f679469a0fcb Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Mon, 15 Jul 2024 16:02:56 +0800 Subject: [PATCH 049/113] feat(ulp): include sdkconfig macros in cmake build --- components/ulp/cmake/CMakeLists.txt | 19 ++++++++++--------- components/ulp/project_include.cmake | 11 ++--------- 2 files changed, 12 insertions(+), 18 deletions(-) diff --git a/components/ulp/cmake/CMakeLists.txt b/components/ulp/cmake/CMakeLists.txt index 99f10c6bd1a..0664238e4cc 100644 --- a/components/ulp/cmake/CMakeLists.txt +++ b/components/ulp/cmake/CMakeLists.txt @@ -5,8 +5,8 @@ project(${ULP_APP_NAME} ASM C) add_executable(${ULP_APP_NAME}) set(CMAKE_EXECUTABLE_SUFFIX ".elf") -option(ULP_COCPU_IS_RISCV "Use RISC-V based ULP" OFF) -option(ULP_COCPU_IS_LP_CORE "Use RISC-V based LP Core" OFF) +# Import all sdkconfig variables into the cmake build +include(${SDKCONFIG_CMAKE}) function(create_arg_file arguments output_file) # Escape all spaces @@ -20,7 +20,7 @@ endfunction() message(STATUS "Building ULP app ${ULP_APP_NAME}") # Check the supported assembler version -if(NOT (ULP_COCPU_IS_RISCV OR ULP_COCPU_IS_LP_CORE)) +if(CONFIG_ULP_COPROC_TYPE_FSM) check_expected_tool_version("esp32ulp-elf" ${CMAKE_ASM_COMPILER}) endif() @@ -28,6 +28,8 @@ endif() set(ULP_MAP_GEN ${PYTHON} ${IDF_PATH}/components/ulp/esp32ulp_mapgen.py) get_filename_component(sdkconfig_dir ${SDKCONFIG_HEADER} DIRECTORY) + + foreach(include ${COMPONENT_INCLUDES}) list(APPEND component_includes -I${include}) endforeach() @@ -41,9 +43,9 @@ list(APPEND ULP_PREPROCESSOR_ARGS -I${IDF_PATH}/components/esp_system/ld) target_include_directories(${ULP_APP_NAME} PRIVATE ${COMPONENT_INCLUDES}) # Pre-process the linker script -if(ULP_COCPU_IS_RISCV) +if(CONFIG_ULP_COPROC_TYPE_RISCV) set(ULP_LD_TEMPLATE ${IDF_PATH}/components/ulp/ld/ulp_riscv.ld) -elseif(ULP_COCPU_IS_LP_CORE) +elseif(CONFIG_ULP_COPROC_TYPE_LP_CORE) set(ULP_LD_TEMPLATE ${IDF_PATH}/components/ulp/ld/lp_core_riscv.ld) else() set(ULP_LD_TEMPLATE ${IDF_PATH}/components/ulp/ld/ulp_fsm.ld) @@ -69,8 +71,7 @@ target_link_options(${ULP_APP_NAME} PRIVATE SHELL:-T ${CMAKE_CURRENT_BINARY_DIR} # To avoid warning "Manually-specified variables were not used by the project" set(bypassWarning "${IDF_TARGET}") -set(bypassWarning "${CONFIG_ESP_ROM_HAS_LP_ROM}") -if(ULP_COCPU_IS_RISCV) +if(CONFIG_ULP_COPROC_TYPE_RISCV) #risc-v ulp uses extra files for building: list(APPEND ULP_S_SOURCES "${IDF_PATH}/components/ulp/ulp_riscv/ulp_core/ulp_riscv_vectors.S" @@ -98,7 +99,7 @@ if(ULP_COCPU_IS_RISCV) target_compile_definitions(${ULP_APP_NAME} PRIVATE IS_ULP_COCPU) target_compile_definitions(${ULP_APP_NAME} PRIVATE ULP_RISCV_REGISTER_OPS) -elseif(ULP_COCPU_IS_LP_CORE) +elseif(CONFIG_ULP_COPROC_TYPE_LP_CORE) list(APPEND ULP_S_SOURCES "${IDF_PATH}/components/ulp/lp_core/lp_core/start.S" "${IDF_PATH}/components/ulp/lp_core/lp_core/vector.S" @@ -168,7 +169,7 @@ else() endif() -if(ULP_COCPU_IS_LP_CORE) +if(CONFIG_ULP_COPROC_TYPE_LP_CORE) set(ULP_BASE_ADDR "0x0") else() set(ULP_BASE_ADDR "0x50000000") diff --git a/components/ulp/project_include.cmake b/components/ulp/project_include.cmake index b6134042ff4..7585854d028 100644 --- a/components/ulp/project_include.cmake +++ b/components/ulp/project_include.cmake @@ -30,6 +30,7 @@ function(ulp_embed_binary app_name s_sources exp_dep_srcs) string(REPLACE ";" "|" ulp_s_sources "${ulp_s_sources}") idf_build_get_property(sdkconfig_header SDKCONFIG_HEADER) + idf_build_get_property(sdkconfig_cmake SDKCONFIG_CMAKE) idf_build_get_property(idf_path IDF_PATH) idf_build_get_property(idf_target IDF_TARGET) idf_build_get_property(python PYTHON) @@ -41,17 +42,11 @@ function(ulp_embed_binary app_name s_sources exp_dep_srcs) elseif(IDF_TARGET STREQUAL "esp32s2" OR IDF_TARGET STREQUAL "esp32s3") if(CONFIG_ULP_COPROC_TYPE_RISCV STREQUAL "y") set(TOOLCHAIN_FLAG ${idf_path}/components/ulp/cmake/toolchain-ulp-riscv.cmake) - set(ULP_IS_RISCV ON) else() set(TOOLCHAIN_FLAG ${idf_path}/components/ulp/cmake/toolchain-${idf_target}-ulp.cmake) - set(ULP_IS_RISCV OFF) endif() elseif(CONFIG_ULP_COPROC_TYPE_LP_CORE) set(TOOLCHAIN_FLAG ${idf_path}/components/ulp/cmake/toolchain-lp-core-riscv.cmake) - set(ULP_IS_LP_CORE_RISCV ON) - if(CONFIG_ESP_ROM_HAS_LP_ROM) - set(CONFIG_ESP_ROM_HAS_LP_ROM ON) - endif() endif() externalproject_add(${app_name} @@ -68,10 +63,8 @@ function(ulp_embed_binary app_name s_sources exp_dep_srcs) -DIDF_TARGET=${idf_target} -DIDF_PATH=${idf_path} -DSDKCONFIG_HEADER=${SDKCONFIG_HEADER} + -DSDKCONFIG_CMAKE=${SDKCONFIG_CMAKE} -DPYTHON=${python} - -DULP_COCPU_IS_RISCV=${ULP_IS_RISCV} - -DULP_COCPU_IS_LP_CORE=${ULP_IS_LP_CORE_RISCV} - -DCONFIG_ESP_ROM_HAS_LP_ROM=${CONFIG_ESP_ROM_HAS_LP_ROM} ${extra_cmake_args} BUILD_COMMAND ${CMAKE_COMMAND} --build ${CMAKE_CURRENT_BINARY_DIR}/${app_name} --target build BUILD_BYPRODUCTS ${ulp_artifacts} ${ulp_artifacts_extras} ${ulp_ps_sources} From 3111f47fb8802fa943b8bb3be89ca92464e93ac5 Mon Sep 17 00:00:00 2001 From: sibeibei Date: Mon, 15 Jul 2024 16:20:01 +0800 Subject: [PATCH 050/113] fix(pm): ssn update failed when dut wakeup from lightsleep --- components/esp_wifi/lib | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_wifi/lib b/components/esp_wifi/lib index 76bdd0b967a..eff8552fc2c 160000 --- a/components/esp_wifi/lib +++ b/components/esp_wifi/lib @@ -1 +1 @@ -Subproject commit 76bdd0b967afa7d75c9466ab0ad05601418a074d +Subproject commit eff8552fc2c890de9304250192e542d7a38c3480 From c2d0ac06471f9f2115b6407fc5cd9dcabcd57e7d Mon Sep 17 00:00:00 2001 From: Armando Date: Mon, 15 Jul 2024 16:48:48 +0800 Subject: [PATCH 051/113] fix(isp): fixed isp doc title issue --- docs/en/api-reference/peripherals/isp.rst | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/docs/en/api-reference/peripherals/isp.rst b/docs/en/api-reference/peripherals/isp.rst index d5cce70e3fd..242602a0b24 100644 --- a/docs/en/api-reference/peripherals/isp.rst +++ b/docs/en/api-reference/peripherals/isp.rst @@ -153,7 +153,8 @@ Enable and Disable ISP ^^^^^^^^^^^^^^^^^^^^^^ ISP ---------- +~~~ + Before doing ISP pipeline, you need to enable the ISP processor first, by calling :cpp:func:`esp_isp_enable`. This function: * Switches the driver state from **init** to **enable**. @@ -161,7 +162,7 @@ Before doing ISP pipeline, you need to enable the ISP processor first, by callin Calling :cpp:func:`esp_isp_disable` does the opposite, that is, put the driver back to the **init** state. ISP AF Processor ----------------- +~~~~~~~~~~~~~~~~ Before doing ISP AF, you need to enable the ISP AF processor first, by calling :cpp:func:`esp_isp_af_controller_enable`. This function: @@ -231,7 +232,7 @@ Calling :cpp:func:`esp_isp_af_env_detector_set_threshold` to set the threshold o ESP_ERROR_CHECK(esp_isp_af_env_detector_set_threshold(env_detector, definition_thresh, luminance_thresh)); ISP AWB Processor ------------------ +~~~~~~~~~~~~~~~~~ Before doing ISP AWB, you need to enable the ISP AWB processor first, by calling :cpp:func:`esp_isp_awb_controller_enable`. This function: @@ -244,7 +245,7 @@ Calling :cpp:func:`esp_isp_awb_controller_disable` does the opposite, that is, p AWB One-shot and Continuous Statistics ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -Calling :cpp:func:`esp_isp_awb_controller_get_oneshot_result` to get oneshot AWB statistics result of white patches. You can take following code as reference. +Calling :cpp:func:`esp_isp_awb_controller_get_oneshot_statistics` to get oneshot AWB statistics result of white patches. You can take following code as reference. Aside from the above oneshot API, the ISP AWB driver also provides a way to start AWB statistics continuously. Calling :cpp:func:`esp_isp_awb_controller_start_continuous_statistics` starts the continuous statistics and :cpp:func:`esp_isp_awb_controller_stop_continuous_statistics` stops it. @@ -292,7 +293,7 @@ Note that if you want to use the continuous statistics, you need to register the .. _isp_bf: ISP BF Processor ----------------- +~~~~~~~~~~~~~~~~ This pipeline is used for doing image input denoising under bayer mode. From 0f57d6cf3489eced64fea2aca90752fe96664e18 Mon Sep 17 00:00:00 2001 From: Rahul Tank Date: Tue, 14 May 2024 15:58:17 +0530 Subject: [PATCH 052/113] fix(nimble): Fixed BLE security vulnerability when using fixed IRK --- components/bt/host/nimble/Kconfig.in | 10 ++++++++++ components/bt/host/nimble/nimble | 2 +- .../bt/host/nimble/port/include/esp_nimble_cfg.h | 8 ++++++++ 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/components/bt/host/nimble/Kconfig.in b/components/bt/host/nimble/Kconfig.in index d02293a87a3..5bb08e5ac70 100644 --- a/components/bt/host/nimble/Kconfig.in +++ b/components/bt/host/nimble/Kconfig.in @@ -164,6 +164,16 @@ config BT_NIMBLE_NVS_PERSIST help Enable this flag to make bonding persistent across device reboots +config BT_NIMBLE_SMP_ID_RESET + bool "Reset device identity when all bonding records are deleted" + default n + help + There are tracking risks associated with using a fixed or static IRK. + If enabled this option, Bluedroid will assign a new randomly-generated IRK + when all pairing and bonding records are deleted. This would decrease the ability + of a previously paired peer to be used to determine whether a device + with which it previously shared an IRK is within range. + menuconfig BT_NIMBLE_SECURITY_ENABLE bool "Enable BLE SM feature" depends on BT_NIMBLE_ENABLED diff --git a/components/bt/host/nimble/nimble b/components/bt/host/nimble/nimble index ec9f21253ae..46ae5865554 160000 --- a/components/bt/host/nimble/nimble +++ b/components/bt/host/nimble/nimble @@ -1 +1 @@ -Subproject commit ec9f21253ae539b44855fed223bee52979a9d251 +Subproject commit 46ae5865554f2fd7df829b6b9b5ca24522b9ad76 diff --git a/components/bt/host/nimble/port/include/esp_nimble_cfg.h b/components/bt/host/nimble/port/include/esp_nimble_cfg.h index d2fa3338866..fc77f592f98 100644 --- a/components/bt/host/nimble/port/include/esp_nimble_cfg.h +++ b/components/bt/host/nimble/port/include/esp_nimble_cfg.h @@ -892,6 +892,14 @@ #define MYNEWT_VAL_BLE_SM_THEIR_KEY_DIST (0) #endif +#ifndef MYNEWT_VAL_BLE_SMP_ID_RESET +#ifdef CONFIG_BT_NIMBLE_SMP_ID_RESET +#define MYNEWT_VAL_BLE_SMP_ID_RESET CONFIG_BT_NIMBLE_SMP_ID_RESET +#else +#define MYNEWT_VAL_BLE_SMP_ID_RESET (0) +#endif +#endif + #ifndef MYNEWT_VAL_BLE_CRYPTO_STACK_MBEDTLS #define MYNEWT_VAL_BLE_CRYPTO_STACK_MBEDTLS (CONFIG_BT_NIMBLE_CRYPTO_STACK_MBEDTLS) #endif From 3c7a83303a1d2f0d57eb5b72c9db3df8775de7ff Mon Sep 17 00:00:00 2001 From: Armando Date: Mon, 24 Jun 2024 18:14:13 +0800 Subject: [PATCH 053/113] feat(ppa): added ppa dsi example --- docs/en/api-reference/peripherals/ppa.rst | 5 + examples/peripherals/.build-test-rules.yml | 7 + .../components/dsi_init/example_dsi_init.c | 22 +- .../dsi_init/include/example_dsi_init.h | 14 +- .../camera/camera_dsi/main/camera_dsi_main.c | 4 +- .../isp/auto_focus/main/isp_af_dsi_main.c | 4 +- .../peripherals/ppa/ppa_dsi/CMakeLists.txt | 6 + examples/peripherals/ppa/ppa_dsi/README.md | 123 ++++++ .../ppa/ppa_dsi/main/CMakeLists.txt | 17 + .../ppa/ppa_dsi/main/Kconfig.projbuild | 28 ++ .../ppa/ppa_dsi/main/idf_component.yml | 7 + examples/peripherals/ppa/ppa_dsi/main/image.c | 250 +++++++++++ examples/peripherals/ppa/ppa_dsi/main/image.h | 9 + .../peripherals/ppa/ppa_dsi/main/image.jpg | Bin 0 -> 43700 bytes .../ppa/ppa_dsi/main/ppa_dsi_main.c | 404 ++++++++++++++++++ .../peripherals/ppa/ppa_dsi/pytest_ppa_dsi.py | 10 + .../ppa/ppa_dsi/sdkconfig.defaults | 3 + 17 files changed, 902 insertions(+), 11 deletions(-) create mode 100644 examples/peripherals/ppa/ppa_dsi/CMakeLists.txt create mode 100644 examples/peripherals/ppa/ppa_dsi/README.md create mode 100644 examples/peripherals/ppa/ppa_dsi/main/CMakeLists.txt create mode 100644 examples/peripherals/ppa/ppa_dsi/main/Kconfig.projbuild create mode 100644 examples/peripherals/ppa/ppa_dsi/main/idf_component.yml create mode 100644 examples/peripherals/ppa/ppa_dsi/main/image.c create mode 100644 examples/peripherals/ppa/ppa_dsi/main/image.h create mode 100644 examples/peripherals/ppa/ppa_dsi/main/image.jpg create mode 100644 examples/peripherals/ppa/ppa_dsi/main/ppa_dsi_main.c create mode 100644 examples/peripherals/ppa/ppa_dsi/pytest_ppa_dsi.py create mode 100644 examples/peripherals/ppa/ppa_dsi/sdkconfig.defaults diff --git a/docs/en/api-reference/peripherals/ppa.rst b/docs/en/api-reference/peripherals/ppa.rst index e108558839c..ae34ff7ac98 100644 --- a/docs/en/api-reference/peripherals/ppa.rst +++ b/docs/en/api-reference/peripherals/ppa.rst @@ -142,6 +142,11 @@ Performance Overview The PPA operations are acted on the target block of an input picture. Therefore, the time it takes to complete a PPA transaction is proportional to the amount of the data in the block. The size of the entire picture has no influence on the performance. More importantly, the PPA performance highly relies on the PSRAM bandwidth if the pictures are located in the PSRAM section. When there are quite a few peripherals reading and writing to the PSRAM at the same time, the performance of PPA operation will be greatly reduced. +Application Examples +^^^^^^^^^^^^^^^^^^^^ + +* PPA with DSI display example: :example:`peripherals/ppa/ppa_dsi`. This example used image will be first scaled up, rotated at counter-clockwise direction and rotated back, mirrored and mirror back, and scaled down. Then the image will be blended with a whole red image with less transparency. Next the `ESP32` word will be color-keyed out. Lastly a frame will be filled around the `ESP32`. + API Reference ------------- diff --git a/examples/peripherals/.build-test-rules.yml b/examples/peripherals/.build-test-rules.yml index 6949eafd206..cdfc182f291 100644 --- a/examples/peripherals/.build-test-rules.yml +++ b/examples/peripherals/.build-test-rules.yml @@ -281,6 +281,13 @@ examples/peripherals/pcnt: depends_components: - esp_driver_pcnt +examples/peripherals/ppa/ppa_dsi: + disable: + - if: SOC_PPA_SUPPORTED != 1 or SOC_MIPI_DSI_SUPPORTED != 1 + depends_components: + - esp_driver_ppa + - esp_lcd + examples/peripherals/rmt: disable: - if: SOC_RMT_SUPPORTED != 1 diff --git a/examples/peripherals/camera/camera_dsi/components/dsi_init/example_dsi_init.c b/examples/peripherals/camera/camera_dsi/components/dsi_init/example_dsi_init.c index 15790143194..d660820791f 100644 --- a/examples/peripherals/camera/camera_dsi/components/dsi_init/example_dsi_init.c +++ b/examples/peripherals/camera/camera_dsi/components/dsi_init/example_dsi_init.c @@ -8,15 +8,13 @@ #include "esp_log.h" #include "esp_lcd_mipi_dsi.h" #include "esp_lcd_panel_ops.h" +#include "esp_lcd_panel_io.h" #include "esp_lcd_ili9881c.h" #include "example_dsi_init.h" #include "example_dsi_init_config.h" -void example_dsi_resource_alloc(esp_lcd_panel_handle_t *ili9881c_ctrl_panel, esp_lcd_panel_handle_t *mipi_dpi_panel, void **frame_buffer) +void example_dsi_resource_alloc(esp_lcd_panel_handle_t *ili9881c_ctrl_panel, esp_lcd_dsi_bus_handle_t *mipi_dsi_bus, esp_lcd_panel_io_handle_t *mipi_dbi_io, esp_lcd_panel_handle_t *mipi_dpi_panel, void **frame_buffer) { - esp_lcd_dsi_bus_handle_t mipi_dsi_bus = NULL; - esp_lcd_panel_io_handle_t mipi_dbi_io = NULL; - //---------------DSI resource allocation------------------// esp_lcd_dsi_bus_config_t bus_config = { .bus_id = 0, @@ -24,21 +22,21 @@ void example_dsi_resource_alloc(esp_lcd_panel_handle_t *ili9881c_ctrl_panel, esp .phy_clk_src = MIPI_DSI_PHY_CLK_SRC_DEFAULT, .lane_bit_rate_mbps = 1000, // 1000 Mbps }; - ESP_ERROR_CHECK(esp_lcd_new_dsi_bus(&bus_config, &mipi_dsi_bus)); + ESP_ERROR_CHECK(esp_lcd_new_dsi_bus(&bus_config, mipi_dsi_bus)); esp_lcd_dbi_io_config_t dbi_config = { .virtual_channel = 0, .lcd_cmd_bits = 8, .lcd_param_bits = 8, }; - ESP_ERROR_CHECK(esp_lcd_new_panel_io_dbi(mipi_dsi_bus, &dbi_config, &mipi_dbi_io)); + ESP_ERROR_CHECK(esp_lcd_new_panel_io_dbi(*mipi_dsi_bus, &dbi_config, mipi_dbi_io)); esp_lcd_panel_dev_config_t lcd_dev_config = { .bits_per_pixel = 16, .rgb_ele_order = LCD_RGB_ELEMENT_ORDER_RGB, .reset_gpio_num = -1, }; - ESP_ERROR_CHECK(esp_lcd_new_panel_ili9881c(mipi_dbi_io, &lcd_dev_config, ili9881c_ctrl_panel)); + ESP_ERROR_CHECK(esp_lcd_new_panel_ili9881c(*mipi_dbi_io, &lcd_dev_config, ili9881c_ctrl_panel)); esp_lcd_dpi_panel_config_t dpi_config = { .dpi_clk_src = MIPI_DSI_DPI_CLK_SRC_DEFAULT, @@ -56,7 +54,7 @@ void example_dsi_resource_alloc(esp_lcd_panel_handle_t *ili9881c_ctrl_panel, esp .vsync_front_porch = EXAMPLE_MIPI_DSI_IMAGE_VFP, }, }; - ESP_ERROR_CHECK(esp_lcd_new_panel_dpi(mipi_dsi_bus, &dpi_config, mipi_dpi_panel)); + ESP_ERROR_CHECK(esp_lcd_new_panel_dpi(*mipi_dsi_bus, &dpi_config, mipi_dpi_panel)); ESP_ERROR_CHECK(esp_lcd_dpi_panel_get_frame_buffer(*mipi_dpi_panel, 1, frame_buffer)); } @@ -74,3 +72,11 @@ void example_dpi_panel_init(esp_lcd_panel_handle_t mipi_dpi_panel) //---------------DPI Panel Init------------------// ESP_ERROR_CHECK(esp_lcd_panel_init(mipi_dpi_panel)); } + +void example_dsi_resource_destroy(esp_lcd_panel_handle_t ili9881c_ctrl_panel, esp_lcd_dsi_bus_handle_t mipi_dsi_bus, esp_lcd_panel_io_handle_t mipi_dbi_io, esp_lcd_panel_handle_t mipi_dpi_panel) +{ + ESP_ERROR_CHECK(esp_lcd_panel_del(mipi_dpi_panel)); + ESP_ERROR_CHECK(esp_lcd_panel_del(ili9881c_ctrl_panel)); + ESP_ERROR_CHECK(esp_lcd_panel_io_del(mipi_dbi_io)); + ESP_ERROR_CHECK(esp_lcd_del_dsi_bus(mipi_dsi_bus)); +} diff --git a/examples/peripherals/camera/camera_dsi/components/dsi_init/include/example_dsi_init.h b/examples/peripherals/camera/camera_dsi/components/dsi_init/include/example_dsi_init.h index df04c79eb15..d495e5d6ced 100644 --- a/examples/peripherals/camera/camera_dsi/components/dsi_init/include/example_dsi_init.h +++ b/examples/peripherals/camera/camera_dsi/components/dsi_init/include/example_dsi_init.h @@ -18,10 +18,12 @@ extern "C" { * @brief DSI init function * * @param[out] ili9881c_ctrl_panel ILI9881C panel handle + * @param[out] mipi_dsi_bus MIPI DSI bus handle + * @param[out] mipi_dbi_io MIPI DBI io handle * @param[out] mipi_dpi_panel MIPI DPI panel handle * @param[out] frame_buffer frame buffer */ -void example_dsi_resource_alloc(esp_lcd_panel_handle_t *ili9881c_ctrl_panel, esp_lcd_panel_handle_t *mipi_dpi_panel, void **frame_buffer); +void example_dsi_resource_alloc(esp_lcd_panel_handle_t *ili9881c_ctrl_panel, esp_lcd_dsi_bus_handle_t *mipi_dsi_bus, esp_lcd_panel_io_handle_t *mipi_dbi_io, esp_lcd_panel_handle_t *mipi_dpi_panel, void **frame_buffer); /** * @brief DSI ILI9881C panel init function @@ -37,6 +39,16 @@ void example_dsi_ili9881c_panel_init(esp_lcd_panel_handle_t ili9881c_ctrl_panel) */ void example_dpi_panel_init(esp_lcd_panel_handle_t mipi_dpi_panel); +/** + * @brief Destroy DSI related resources + * + * @param[in] ili9881c_ctrl_panel ILI9881C panel handle + * @param[in] mipi_dsi_bus MIPI DSI bus handle + * @param[in] mipi_dbi_io MIPI DBI io handle + * @param[in] mipi_dpi_panel MIPI DPI panel handle + */ +void example_dsi_resource_destroy(esp_lcd_panel_handle_t ili9881c_ctrl_panel, esp_lcd_dsi_bus_handle_t mipi_dsi_bus, esp_lcd_panel_io_handle_t mipi_dbi_io, esp_lcd_panel_handle_t mipi_dpi_panel); + #ifdef __cplusplus } #endif diff --git a/examples/peripherals/camera/camera_dsi/main/camera_dsi_main.c b/examples/peripherals/camera/camera_dsi/main/camera_dsi_main.c index a5c5c2dcb70..fa17cffaa07 100644 --- a/examples/peripherals/camera/camera_dsi/main/camera_dsi_main.c +++ b/examples/peripherals/camera/camera_dsi/main/camera_dsi_main.c @@ -34,6 +34,8 @@ static bool s_camera_get_finished_trans(esp_cam_ctlr_handle_t handle, esp_cam_ct void app_main(void) { esp_err_t ret = ESP_FAIL; + esp_lcd_dsi_bus_handle_t mipi_dsi_bus = NULL; + esp_lcd_panel_io_handle_t mipi_dbi_io = NULL; esp_lcd_panel_handle_t ili9881c_ctrl_panel = NULL; esp_lcd_panel_handle_t mipi_dpi_panel = NULL; void *frame_buffer = NULL; @@ -53,7 +55,7 @@ void app_main(void) * ISP convert to RGB565 */ //---------------DSI Init------------------// - example_dsi_resource_alloc(&ili9881c_ctrl_panel, &mipi_dpi_panel, &frame_buffer); + example_dsi_resource_alloc(&ili9881c_ctrl_panel, &mipi_dsi_bus, &mipi_dbi_io, &mipi_dpi_panel, &frame_buffer); //---------------Necessary variable config------------------// frame_buffer_size = CONFIG_EXAMPLE_MIPI_CSI_DISP_HRES * CONFIG_EXAMPLE_MIPI_DSI_DISP_VRES * EXAMPLE_RGB565_BITS_PER_PIXEL / 8; diff --git a/examples/peripherals/isp/auto_focus/main/isp_af_dsi_main.c b/examples/peripherals/isp/auto_focus/main/isp_af_dsi_main.c index 2e60bac2551..8f167c66c13 100644 --- a/examples/peripherals/isp/auto_focus/main/isp_af_dsi_main.c +++ b/examples/peripherals/isp/auto_focus/main/isp_af_dsi_main.c @@ -176,6 +176,8 @@ static void af_task(void *arg) void app_main(void) { esp_err_t ret = ESP_FAIL; + esp_lcd_dsi_bus_handle_t mipi_dsi_bus = NULL; + esp_lcd_panel_io_handle_t mipi_dbi_io = NULL; esp_lcd_panel_handle_t ili9881c_ctrl_panel = NULL; esp_lcd_panel_handle_t mipi_dpi_panel = NULL; void *frame_buffer = NULL; @@ -195,7 +197,7 @@ void app_main(void) * ISP convert to RGB565 */ //---------------DSI Init------------------// - example_dsi_resource_alloc(&ili9881c_ctrl_panel, &mipi_dpi_panel, &frame_buffer); + example_dsi_resource_alloc(&ili9881c_ctrl_panel, &mipi_dsi_bus, &mipi_dbi_io, &mipi_dpi_panel, &frame_buffer); //---------------Necessary variable config------------------// frame_buffer_size = CONFIG_EXAMPLE_MIPI_CSI_DISP_HRES * CONFIG_EXAMPLE_MIPI_DSI_DISP_VRES * EXAMPLE_RGB565_BITS_PER_PIXEL / 8; diff --git a/examples/peripherals/ppa/ppa_dsi/CMakeLists.txt b/examples/peripherals/ppa/ppa_dsi/CMakeLists.txt new file mode 100644 index 00000000000..41d2d696acf --- /dev/null +++ b/examples/peripherals/ppa/ppa_dsi/CMakeLists.txt @@ -0,0 +1,6 @@ +# The following lines of boilerplate have to be in your project's CMakeLists +# in this exact order for cmake to work correctly +cmake_minimum_required(VERSION 3.16) + +include($ENV{IDF_PATH}/tools/cmake/project.cmake) +project(ppa_dsi) diff --git a/examples/peripherals/ppa/ppa_dsi/README.md b/examples/peripherals/ppa/ppa_dsi/README.md new file mode 100644 index 00000000000..da5cf56e880 --- /dev/null +++ b/examples/peripherals/ppa/ppa_dsi/README.md @@ -0,0 +1,123 @@ +| Supported Targets | ESP32-P4 | +| ----------------- | -------- | + + +# PPA DSI example + +## Overview + +This example demonstrates how to use the esp_driver_ppa component to process a given image and display it via DSI interface. + +The example used image will be first scaled up, rotated at counter-clockwise direction and rotated back, mirrored and mirror back, and scaled down. Then the image will be blended with a whole red image with less transparency. Next the `ESP32` word will be color-keyed out. Lastly a frame will be filled around the `ESP32`. + +## Usage + +The subsections below give only absolutely necessary information. For full steps to configure ESP-IDF and use it to build and run projects, see [ESP-IDF Getting Started](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/index.html#get-started). + + +### Hardware Required + +This example requires: + +- ILI9881C LCD screen +- ESP32P4 devkit + + + GND + ┌─────────────────────────────────────────────────────────┐ + │ │ + │ │ + │ │ + │ │ + │ │ + │ │ + │ │ + │ │ + ┌───────────────-─────────────┴──────────────────┐ │ + │ │ ┌──────────┴───────────┐ + │ │ DSI DATA 1P │ │ + │ ├───────────────────────────┤ │ + │ │ │ │ + │ │ DSI DATA 1N │ │ + │ ├───────────────────────────┤ │ + │ ESP32-P4 │ │ │ + │ │ DSI CLK N │ ILI9881C │ + │ ├───────────────────────────┤ │ + │ │ │ │ + │ │ DSI CLK P │ │ + │ ├───────────────────────────┤ │ + │ │ │ │ + │ │ DSI DATA 0P │ │ + │ ├───────────────────────────┤ │ + │ │ │ │ + │ │ DSI DATA 0N │ │ + │ ├───────────────────────────┤ │ + │ │ │ │ + │ │ └──────────────────────┘ + │ │ + │ │ + │ │ + │ │ + │ │ + │ │ + └────────────────────────────────────────────────┘ + + +### Set Chip Target + +First of all, your target must be supported by both: + +- **By your ESP-IDF version**: For the full list of supported targets, run: + ``` + idf.py --list-targets + ``` +- **By this example**: For the full list of supported targets, refer to the supported targets table at the top of this README. + +After you make sure that your target is supported, go to your example project directory and [set the chip target](https://docs.espressif.com/projects/esp-idf/en/latest/api-guides/tools/idf-py.html#select-the-target-chip-set-target): + +``` +idf.py set-target +``` + +For example, to set esp32-P4 as the chip target, run: + +``` +idf.py set-target esp32p4 +``` + + +### Build and Flash + +Execute the following command to build the project, flash it to your development board, and run the monitor tool to view the serial output: + +``` +idf.py build flash monitor +``` + +This command can be reduced to `idf.py flash monitor`. + +If the above command fails, check the log on the serial monitor which usually provides information on the possible cause of the issue. + +To exit the serial monitor, use `Ctrl` + `]`. + + +## Example Output + +If you see the following console output, your example should be running correctly: + +``` +I (1555) main_task: Calling app_main() +I (1555) ili9881c: ID1: 0x98, ID2: 0x81, ID3: 0x5c +I (1795) ppa_dsi: JPEG image decoded! Size of the decoded image is: 320px x 240px +start srm operations +start blend operations +start fill operations +I (10085) main_task: Returned from app_main() +``` + + +## Reference + +- Link to the ESP-IDF feature's API reference, for example [ESP-IDF: Pixel-Processing Accelerator](https://docs.espressif.com/projects/esp-idf/en/latest/api-reference/peripherals/ppa.html) +- [ESP-IDF Getting Started](https://docs.espressif.com/projects/esp-idf/en/latest/get-started/index.html#get-started) +- [Project Configuration](https://docs.espressif.com/projects/esp-idf/en/latest/api-reference/kconfig.html) (Kconfig Options) diff --git a/examples/peripherals/ppa/ppa_dsi/main/CMakeLists.txt b/examples/peripherals/ppa/ppa_dsi/main/CMakeLists.txt new file mode 100644 index 00000000000..61a29afb082 --- /dev/null +++ b/examples/peripherals/ppa/ppa_dsi/main/CMakeLists.txt @@ -0,0 +1,17 @@ +set(srcs "ppa_dsi_main.c") + +if(CONFIG_EXAMPLE_SOURCE_IMAGE_FORMAT_RGB565) + list(APPEND srcs "image.c") +endif() + +set(embed_files) + +if(CONFIG_EXAMPLE_SOURCE_IMAGE_FORMAT_JPEG) + list(APPEND embed_files "image.jpg") +endif() + +idf_component_register(SRCS ${srcs} + INCLUDE_DIRS "." + REQUIRES esp_mm esp_driver_ppa dsi_init + EMBED_FILES ${embed_files} + ) diff --git a/examples/peripherals/ppa/ppa_dsi/main/Kconfig.projbuild b/examples/peripherals/ppa/ppa_dsi/main/Kconfig.projbuild new file mode 100644 index 00000000000..2a9eb651d1e --- /dev/null +++ b/examples/peripherals/ppa/ppa_dsi/main/Kconfig.projbuild @@ -0,0 +1,28 @@ +menu "Example Configuration" + config EXAMPLE_USED_LDO_CHAN_ID + int "example used LDO channel ID" + default 3 + help + Example used LDO channel ID, you may check datasheet to know more details. + + config EXAMPLE_USED_LDO_VOLTAGE_MV + int "example used LDO voltage in mV" + default 2500 + range 0 3300 + help + Example used LDO voltage, in mV + + choice EXAMPLE_SOURCE_IMAGE_FORMAT + prompt "Select source image format" + default EXAMPLE_SOURCE_IMAGE_FORMAT_JPEG + help + Select the source image format + + config EXAMPLE_SOURCE_IMAGE_FORMAT_JPEG + bool "JPEG" + + config EXAMPLE_SOURCE_IMAGE_FORMAT_RGB565 + bool "RGB565" + endchoice + +endmenu diff --git a/examples/peripherals/ppa/ppa_dsi/main/idf_component.yml b/examples/peripherals/ppa/ppa_dsi/main/idf_component.yml new file mode 100644 index 00000000000..b001ac9e048 --- /dev/null +++ b/examples/peripherals/ppa/ppa_dsi/main/idf_component.yml @@ -0,0 +1,7 @@ +dependencies: + espressif/esp_lcd_ili9881c: "*" + idf: + version: ">=5.3.0" + dsi_init: + path: ${IDF_PATH}/examples/peripherals/camera/camera_dsi/components/dsi_init + esp_jpeg: ">=1.0.2" diff --git a/examples/peripherals/ppa/ppa_dsi/main/image.c b/examples/peripherals/ppa/ppa_dsi/main/image.c new file mode 100644 index 00000000000..33c0f8b13e4 --- /dev/null +++ b/examples/peripherals/ppa/ppa_dsi/main/image.c @@ -0,0 +1,250 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +const uint8_t image_map[] = { + 0x5a, 0x0b, 0x3a, 0x0b, 0x39, 0x03, 0x39, 0x03, 0x39, 0x03, 0x39, 0x03, 0x19, 0x03, 0x19, 0x03, 0x19, 0x03, 0x19, 0x03, 0x19, 0x03, 0x19, 0x03, 0x19, 0x03, 0x19, 0x03, 0x19, 0x03, 0x19, 0x03, 0x38, 0x03, 0x17, 0x0b, 0xd6, 0x12, 0xb7, 0x4b, 0xff, 0xd6, 0x3d, 0xef, 0x5d, 0xef, 0x5f, 0xd7, 0x34, 0x1b, 0x99, 0x03, 0xba, 0x03, 0x9a, 0x03, 0x99, 0x03, 0x9a, 0x03, 0x9a, 0x03, 0x59, 0x03, 0x9b, 0x0b, 0x59, 0x03, 0x39, 0x03, 0x59, 0x03, 0x38, 0x03, 0x38, 0x03, 0x59, 0x03, 0x38, 0x03, 0x79, 0x0b, 0x38, 0x03, 0x79, 0x0b, 0x58, 0x0b, 0x5c, 0x34, 0xf6, 0x0a, 0x16, 0x13, 0x34, 0x2b, 0xbd, 0xc6, 0x1c, 0xe7, 0x3c, 0xe7, 0x3f, 0xcf, 0x35, 0x2b, 0x96, 0x0a, 0x98, 0x0a, 0x58, 0x02, 0x58, 0x02, 0x58, 0x02, 0x58, 0x02, 0x58, 0x0a, 0x57, 0x02, 0x57, 0x02, 0x37, 0x02, 0x37, 0x02, 0x57, 0x0a, 0x37, 0x02, 0x37, 0x02, 0x37, 0x02, 0x37, 0x02, 0x37, 0x0a, 0x57, 0x0a, 0x58, 0x0a, 0x17, 0x02, 0x17, 0x02, 0x36, 0x02, 0xf1, 0x09, 0x1c, 0xb6, 0xfc, 0xde, 0xfb, 0xe6, 0x1d, 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zK8?i2P2m%|$~h$1cbP>kp`x@LGjhNuKMotK2AfQM;uE)-$5)PDJo=iApN&l;45 zm;#(3}Q`39`}0xV-6V95fQm&a{*#;@R|6SPyCfSeG!Pj ztMXS~pW7aMaGbX`{7C(4PyXyB8IrH=4zZSx1O&!6=2^5jnzFWt$lDv;kgq>>L$}xA zn{~mdIUDjc2}(;0p^IPK_qiSp3b;>TbCJu70#WI+Ul(tt)yAz4`ZK#CY3Ir%GYDIU zxbDA$UKDjvAXADMHADL4H+RNkjI`(y<`j5F`wl-yX5{>;4)Gq(UfNsuS@T>fpqrp_ z9}?41{aD3G)C>3>=1uT-IZYQe{7!dq#+iE7f^(3{81T&-gFUG z$xCgGe`A;Yn~W}rp}Iz*)2cqJpFDO9oK~P*X#CbU#@7x%rA2(w^&49b?IUcRSBO3M z5aSJKOHUw_%83ts0*>u2zj>;;>PvqIlYawfGn(WM3t5Kr{*dL*Pea^8y%k2oQ$*?*ST##F?+>t@$n&CJSNw*Ia!*FKX6oBrRDYpguP z@iyiFJp(bK;A>lH+h-<6l{VBZCNyG1vRuX>+t4iJ!$l&0YnQ7+2$KcTg58Gy3Hf4$ zeeYuu$nD18$sc9W=DY(mX8V11@&Q3d_QOxo# znU`j(;ryRQY??C91*lMKw_#w_U7UcZ{ahGwYf(z<(USwwhYjZuCqoi}0s*bsTlabnQ^Mr{+UeLyzpic%7v +#include +#include +#include "esp_attr.h" +#include "esp_log.h" +#include "esp_check.h" +#include "freertos/FreeRTOS.h" +#include "esp_lcd_mipi_dsi.h" +#include "esp_lcd_panel_ops.h" +#include "esp_lcd_ili9881c.h" +#include "esp_ldo_regulator.h" +#include "driver/ppa.h" +#include "example_dsi_init.h" +#include "example_dsi_init_config.h" +#if CONFIG_EXAMPLE_SOURCE_IMAGE_FORMAT_JPEG +#include "jpeg_decoder.h" +#else +#include "image.h" +#endif + +#define EXAMPLE_IMAGE_H 240 +#define EXAMPLE_IMAGE_W 320 +#define EXAMPLE_BUFFER_CNT_CYCLE(buffer_cnt) (((buffer_cnt) + 1) % 2) + +static const char *TAG = "ppa_dsi"; + +#if CONFIG_EXAMPLE_SOURCE_IMAGE_FORMAT_JPEG +//Reference the binary-included jpeg file +extern const uint8_t image_jpg_start[] asm("_binary_image_jpg_start"); +extern const uint8_t image_jpg_end[] asm("_binary_image_jpg_end"); + +//Decode the embedded image into pixel lines that can be used with the rest of the logic. +esp_err_t s_get_rgb565_image(uint16_t **pixels) +{ + *pixels = NULL; + esp_err_t ret = ESP_OK; + + //Allocate pixel memory. Each line is an array of EXAMPLE_IMAGE_W 16-bit pixels; the `*pixels` array itself contains pointers to these lines. + *pixels = calloc(EXAMPLE_IMAGE_H * EXAMPLE_IMAGE_W, sizeof(uint16_t)); + ESP_GOTO_ON_FALSE((*pixels), ESP_ERR_NO_MEM, err, TAG, "Error allocating memory for lines"); + + //JPEG decode config + esp_jpeg_image_cfg_t jpeg_cfg = { + .indata = (uint8_t *)image_jpg_start, + .indata_size = image_jpg_end - image_jpg_start, + .outbuf = (uint8_t*)(*pixels), + .outbuf_size = EXAMPLE_IMAGE_W * EXAMPLE_IMAGE_H * sizeof(uint16_t), + .out_format = JPEG_IMAGE_FORMAT_RGB565, + .out_scale = JPEG_IMAGE_SCALE_0, + .flags = { + .swap_color_bytes = 0, + } + }; + + //JPEG decode + esp_jpeg_image_output_t outimg; + esp_jpeg_decode(&jpeg_cfg, &outimg); + + ESP_LOGI(TAG, "JPEG image decoded! Size of the decoded image is: %dpx x %dpx", outimg.width, outimg.height); + + return ret; +err: + //Something went wrong! Exit cleanly, de-allocating everything we allocated. + if (*pixels != NULL) { + free(*pixels); + } + return ret; +} +#else +esp_err_t s_get_rgb565_image(uint16_t **pixels) +{ + *pixels = (uint16_t *)image_map; + return ESP_OK; +} +#endif + +void s_srm_ops(void *in_buf, void **out_buf, size_t buf_size, esp_lcd_panel_handle_t mipi_dpi_panel, ppa_client_handle_t ppa_srm_handle, void *clear_buf) +{ + ppa_srm_oper_config_t srm_config = { + .in.buffer = in_buf, + .in.pic_w = EXAMPLE_IMAGE_W, + .in.pic_h = EXAMPLE_IMAGE_H, + .in.block_w = EXAMPLE_IMAGE_W, + .in.block_h = EXAMPLE_IMAGE_H, + .in.block_offset_x = 0, + .in.block_offset_y = 0, + .in.srm_cm = PPA_SRM_COLOR_MODE_RGB565, + .out.buffer = out_buf[0], + .out.buffer_size = buf_size, + .out.pic_w = EXAMPLE_IMAGE_W, + .out.pic_h = EXAMPLE_IMAGE_H, + .out.block_offset_x = 0, + .out.block_offset_y = 0, + .out.srm_cm = PPA_SRM_COLOR_MODE_RGB565, + .rotation_angle = PPA_SRM_ROTATION_ANGLE_0, + .scale_x = 1, + .scale_y = 1, + .rgb_swap = 0, + .byte_swap = 0, + .mode = PPA_TRANS_MODE_BLOCKING, + }; + + //scale up from x0.5, x1, to x1.5 + const float size_mul[3] = {0.5, 1, 1.5}; + const float mul[3] = {0.5, 2, 1.5}; + int buffer_cnt = 0; + for (int i = 0; i < 3; i++) { + srm_config.out.pic_w = EXAMPLE_IMAGE_W * size_mul[i]; + srm_config.out.pic_h = EXAMPLE_IMAGE_H * size_mul[i]; + srm_config.scale_x = mul[i]; + srm_config.scale_y = mul[i]; + ESP_ERROR_CHECK(ppa_do_scale_rotate_mirror(ppa_srm_handle, &srm_config)); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W * size_mul[i], EXAMPLE_IMAGE_H * size_mul[i], out_buf[buffer_cnt])); + vTaskDelay(800 / portTICK_PERIOD_MS); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W * mul[i], EXAMPLE_IMAGE_H * mul[i], clear_buf)); + srm_config.in.buffer = out_buf[i % 2]; + srm_config.out.buffer = out_buf[1 - i % 2]; + srm_config.in.pic_w = EXAMPLE_IMAGE_W * size_mul[i]; + srm_config.in.pic_h = EXAMPLE_IMAGE_H * size_mul[i]; + srm_config.in.block_w = EXAMPLE_IMAGE_W * size_mul[i]; + srm_config.in.block_h = EXAMPLE_IMAGE_H * size_mul[i]; + buffer_cnt = EXAMPLE_BUFFER_CNT_CYCLE(buffer_cnt); + } + + //rotate the x1.5 image in CCW direction + srm_config.rotation_angle = PPA_SRM_ROTATION_ANGLE_90; + srm_config.scale_x = 1; + srm_config.scale_y = 1; + srm_config.out.pic_w = EXAMPLE_IMAGE_H * 1.5; + srm_config.out.pic_h = EXAMPLE_IMAGE_W * 1.5; + ESP_ERROR_CHECK(ppa_do_scale_rotate_mirror(ppa_srm_handle, &srm_config)); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_H * 1.5, EXAMPLE_IMAGE_W * 1.5, out_buf[buffer_cnt])); + vTaskDelay(800 / portTICK_PERIOD_MS); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_H * 1.5, EXAMPLE_IMAGE_W * 1.5, clear_buf)); + srm_config.in.buffer = out_buf[buffer_cnt]; + srm_config.in.pic_w = EXAMPLE_IMAGE_H * 1.5; + srm_config.in.pic_h = EXAMPLE_IMAGE_W * 1.5; + srm_config.in.block_w = EXAMPLE_IMAGE_H * 1.5; + srm_config.in.block_h = EXAMPLE_IMAGE_W * 1.5; + srm_config.out.buffer = out_buf[1 - buffer_cnt]; + buffer_cnt = EXAMPLE_BUFFER_CNT_CYCLE(buffer_cnt); + + //rotate the x1.5 image back in CW direction + srm_config.rotation_angle = PPA_SRM_ROTATION_ANGLE_270; + srm_config.out.pic_w = EXAMPLE_IMAGE_W * 1.5; + srm_config.out.pic_h = EXAMPLE_IMAGE_H * 1.5; + ESP_ERROR_CHECK(ppa_do_scale_rotate_mirror(ppa_srm_handle, &srm_config)); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W * 1.5, EXAMPLE_IMAGE_H * 1.5, out_buf[buffer_cnt])); + vTaskDelay(800 / portTICK_PERIOD_MS); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W * 1.5, EXAMPLE_IMAGE_H * 1.5, clear_buf)); + srm_config.rotation_angle = PPA_SRM_ROTATION_ANGLE_0; + srm_config.in.buffer = out_buf[buffer_cnt]; + srm_config.in.pic_w = EXAMPLE_IMAGE_W * 1.5; + srm_config.in.pic_h = EXAMPLE_IMAGE_H * 1.5; + srm_config.in.block_w = EXAMPLE_IMAGE_W * 1.5; + srm_config.in.block_h = EXAMPLE_IMAGE_H * 1.5; + srm_config.out.buffer = out_buf[1 - buffer_cnt]; + buffer_cnt = EXAMPLE_BUFFER_CNT_CYCLE(buffer_cnt); + + //mirror the x1.5 image along both x and y axis, then mirror it back + for (int i = 0; i < 2; i++) { + srm_config.mirror_x = 1; + srm_config.mirror_y = 1; + ESP_ERROR_CHECK(ppa_do_scale_rotate_mirror(ppa_srm_handle, &srm_config)); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W * 1.5, EXAMPLE_IMAGE_H * 1.5, out_buf[buffer_cnt])); + vTaskDelay(800 / portTICK_PERIOD_MS); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W * 1.5, EXAMPLE_IMAGE_H * 1.5, clear_buf)); + srm_config.in.buffer = out_buf[buffer_cnt]; + srm_config.out.buffer = out_buf[1 - buffer_cnt]; + buffer_cnt = EXAMPLE_BUFFER_CNT_CYCLE(buffer_cnt); + } + + //back to 1x original image + srm_config.in.buffer = in_buf; + srm_config.in.pic_w = EXAMPLE_IMAGE_W; + srm_config.in.pic_h = EXAMPLE_IMAGE_H; + srm_config.in.block_w = EXAMPLE_IMAGE_W; + srm_config.in.block_h = EXAMPLE_IMAGE_H; + srm_config.out.buffer = out_buf[buffer_cnt]; + srm_config.rotation_angle = PPA_SRM_ROTATION_ANGLE_0; + srm_config.out.pic_w = EXAMPLE_IMAGE_W; + srm_config.out.pic_h = EXAMPLE_IMAGE_H; + srm_config.scale_x = 1; + srm_config.scale_y = 1; + srm_config.mirror_x = 0; + srm_config.mirror_y = 0; + ESP_ERROR_CHECK(ppa_do_scale_rotate_mirror(ppa_srm_handle, &srm_config)); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W, EXAMPLE_IMAGE_H, out_buf[buffer_cnt])); + vTaskDelay(800 / portTICK_PERIOD_MS); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W, EXAMPLE_IMAGE_H, clear_buf)); +} + +void s_blend_ops(void *bg_buf, void *fg_buf, void *out_buf, size_t buf_size, esp_lcd_panel_handle_t mipi_dpi_panel, ppa_client_handle_t ppa_blend_handle, void *clear_buf) +{ + //this operation will blend the bg_buf with the fg_buf + ppa_blend_oper_config_t blend_config = { + .in_bg.buffer = bg_buf, + .in_bg.pic_w = EXAMPLE_IMAGE_W, + .in_bg.pic_h = EXAMPLE_IMAGE_H, + .in_bg.block_w = EXAMPLE_IMAGE_W, + .in_bg.block_h = EXAMPLE_IMAGE_H, + .in_bg.block_offset_x = 0, + .in_bg.block_offset_y = 0, + .in_bg.blend_cm = PPA_SRM_COLOR_MODE_RGB565, + .in_fg.buffer = fg_buf, + .in_fg.pic_w = EXAMPLE_IMAGE_W, + .in_fg.pic_h = EXAMPLE_IMAGE_H, + .in_fg.block_w = EXAMPLE_IMAGE_W, + .in_fg.block_h = EXAMPLE_IMAGE_H, + .in_fg.block_offset_x = 0, + .in_fg.block_offset_y = 0, + .in_fg.blend_cm = PPA_BLEND_COLOR_MODE_A8, + .out.buffer = out_buf, + .out.buffer_size = buf_size, + .out.pic_w = EXAMPLE_IMAGE_W, + .out.pic_h = EXAMPLE_IMAGE_H, + .out.block_offset_x = 0, + .out.block_offset_y = 0, + .out.blend_cm = PPA_SRM_COLOR_MODE_RGB565, + .bg_alpha_update_mode = PPA_ALPHA_SCALE, + .bg_alpha_scale_ratio = 0.9, + .fg_alpha_update_mode = PPA_ALPHA_SCALE, + .fg_alpha_scale_ratio = 0.5, + .fg_fix_rgb_val = { + .b = 0xd3, + .g = 0x03, + .r = 0xff, + }, + .bg_ck_en = false, + .fg_ck_en = false, + .mode = PPA_TRANS_MODE_BLOCKING, + }; + ESP_ERROR_CHECK(ppa_do_blend(ppa_blend_handle, &blend_config)); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W, EXAMPLE_IMAGE_H, out_buf)); + vTaskDelay(800 / portTICK_PERIOD_MS); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W, EXAMPLE_IMAGE_H, clear_buf)); + + //the `ESP32` in the bg_buf will be color-keyed out + memset(fg_buf, 0xff, buf_size); + blend_config.fg_alpha_update_mode = PPA_ALPHA_NO_CHANGE; + blend_config.in_bg.blend_cm = PPA_SRM_COLOR_MODE_RGB565; + blend_config.fg_fix_rgb_val = (color_pixel_rgb888_data_t) {}; + blend_config.bg_ck_en = true; + blend_config.bg_ck_rgb_low_thres = (color_pixel_rgb888_data_t) { + .b = 0, + .g = 0, + .r = 0x80, + }; + blend_config.bg_ck_rgb_high_thres = (color_pixel_rgb888_data_t) { + .b = 0x40, + .g = 0x40, + .r = 0xfe, + }; + ESP_ERROR_CHECK(ppa_do_blend(ppa_blend_handle, &blend_config)); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W, EXAMPLE_IMAGE_H, out_buf)); + vTaskDelay(800 / portTICK_PERIOD_MS); +} + +void s_fill_ops(void *out_buf, size_t buf_size, esp_lcd_panel_handle_t mipi_dpi_panel, ppa_client_handle_t ppa_fill_handle) +{ + int buffer_cnt = 0; + ppa_fill_oper_config_t fill_config = { + .out.buffer = out_buf, + .out.buffer_size = buf_size, + .out.pic_w = EXAMPLE_IMAGE_W, + .out.pic_h = EXAMPLE_IMAGE_H, + .out.block_offset_x = 0, + .out.block_offset_y = 20, + .out.fill_cm = PPA_FILL_COLOR_MODE_RGB565, + .fill_block_w = 10, + .fill_block_h = 200, + .fill_argb_color = { + .a = 0x80, + .r = 0xe0, + .g = 0x10, + .b = 0x10, + }, + .mode = PPA_TRANS_MODE_BLOCKING, + }; + + //below ops will add a frame to the `ESP32` characters + ESP_ERROR_CHECK(ppa_do_fill(ppa_fill_handle, &fill_config)); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W, EXAMPLE_IMAGE_H, out_buf)); + buffer_cnt = EXAMPLE_BUFFER_CNT_CYCLE(buffer_cnt); + + fill_config.out.block_offset_x = 0; + fill_config.out.block_offset_y = 20; + fill_config.fill_block_w = 320; + fill_config.fill_block_h = 10; + ESP_ERROR_CHECK(ppa_do_fill(ppa_fill_handle, &fill_config)); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W, EXAMPLE_IMAGE_H, out_buf)); + buffer_cnt = EXAMPLE_BUFFER_CNT_CYCLE(buffer_cnt); + + fill_config.out.block_offset_x = 310; + fill_config.out.block_offset_y = 20; + fill_config.fill_block_w = 10; + fill_config.fill_block_h = 200; + ESP_ERROR_CHECK(ppa_do_fill(ppa_fill_handle, &fill_config)); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W, EXAMPLE_IMAGE_H, out_buf)); + buffer_cnt = EXAMPLE_BUFFER_CNT_CYCLE(buffer_cnt); + + fill_config.out.block_offset_x = 0; + fill_config.out.block_offset_y = 220; + fill_config.fill_block_w = 320; + fill_config.fill_block_h = 10; + ESP_ERROR_CHECK(ppa_do_fill(ppa_fill_handle, &fill_config)); + ESP_ERROR_CHECK(esp_lcd_panel_draw_bitmap(mipi_dpi_panel, 0, 0, EXAMPLE_IMAGE_W, EXAMPLE_IMAGE_H, out_buf)); + buffer_cnt = EXAMPLE_BUFFER_CNT_CYCLE(buffer_cnt); + vTaskDelay(800 / portTICK_PERIOD_MS); +} + +void app_main(void) +{ + uint16_t *pixels = NULL; + esp_lcd_dsi_bus_handle_t mipi_dsi_bus = NULL; + esp_lcd_panel_io_handle_t mipi_dbi_io = NULL; + esp_lcd_panel_handle_t ili9881c_ctrl_panel = NULL; + esp_lcd_panel_handle_t mipi_dpi_panel = NULL; + + //---------------MIPI LDO Init------------------// + esp_ldo_channel_handle_t ldo_mipi_phy = NULL; + esp_ldo_channel_config_t ldo_mipi_phy_config = { + .chan_id = CONFIG_EXAMPLE_USED_LDO_CHAN_ID, + .voltage_mv = CONFIG_EXAMPLE_USED_LDO_VOLTAGE_MV, + }; + ESP_ERROR_CHECK(esp_ldo_acquire_channel(&ldo_mipi_phy_config, &ldo_mipi_phy)); + + //---------------DSI Init------------------// + example_dsi_resource_alloc(&ili9881c_ctrl_panel, &mipi_dsi_bus, &mipi_dbi_io, &mipi_dpi_panel, NULL); + example_dsi_ili9881c_panel_init(ili9881c_ctrl_panel); + example_dpi_panel_init(mipi_dpi_panel); + + //---------------Get Source image------------------// + ESP_ERROR_CHECK(s_get_rgb565_image(&pixels)); + size_t out_buf_size = EXAMPLE_IMAGE_H * EXAMPLE_IMAGE_W * 4 * 2; + uint8_t *out_buf[2] = {}; + for (int i = 0; i < 2; i++) { + out_buf[i] = heap_caps_calloc(out_buf_size, 1, MALLOC_CAP_DMA | MALLOC_CAP_SPIRAM); + if (!out_buf[i]) { + ESP_LOGE(TAG, "no mem for out_buf"); + return ; + } + } + + uint8_t *clear_buf = heap_caps_calloc(out_buf_size, 1, MALLOC_CAP_DMA | MALLOC_CAP_SPIRAM); + if (!clear_buf) { + ESP_LOGE(TAG, "no mem for clear_buf"); + return ; + } + + //---------------SRM------------------// + ppa_client_handle_t ppa_srm_handle = NULL; + ppa_client_config_t ppa_srm_config = { + .oper_type = PPA_OPERATION_SRM, + .max_pending_trans_num = 1, + }; + ESP_ERROR_CHECK(ppa_register_client(&ppa_srm_config, &ppa_srm_handle)); + printf("start srm operations\n"); + s_srm_ops(pixels, (void **)out_buf, out_buf_size, mipi_dpi_panel, ppa_srm_handle, clear_buf); + + uint8_t *fg_buf = heap_caps_calloc(out_buf_size, 1, MALLOC_CAP_DMA | MALLOC_CAP_SPIRAM); + if (!fg_buf) { + ESP_LOGE(TAG, "no mem for fg_buf"); + return ; + } + memset(fg_buf, 0xff, out_buf_size); + + //---------------BLEND------------------// + ppa_client_handle_t ppa_blend_handle = NULL; + ppa_client_config_t ppa_blend_config = { + .oper_type = PPA_OPERATION_BLEND, + .max_pending_trans_num = 1, + }; + ESP_ERROR_CHECK(ppa_register_client(&ppa_blend_config, &ppa_blend_handle)); + printf("start blend operations\n"); + s_blend_ops(pixels, fg_buf, out_buf[0], out_buf_size, mipi_dpi_panel, ppa_blend_handle, clear_buf); + + //---------------FILL------------------// + ppa_client_handle_t ppa_fill_handle = NULL; + ppa_client_config_t ppa_fill_config = { + .oper_type = PPA_OPERATION_FILL, + .max_pending_trans_num = 1, + }; + ESP_ERROR_CHECK(ppa_register_client(&ppa_fill_config, &ppa_fill_handle)); + printf("start fill operations\n"); + s_fill_ops(out_buf[0], out_buf_size, mipi_dpi_panel, ppa_fill_handle); + +#if CONFIG_EXAMPLE_SOURCE_IMAGE_FORMAT_JPEG + free(pixels); +#endif + free(out_buf[0]); + free(out_buf[1]); + free(clear_buf); + free(fg_buf); + ESP_ERROR_CHECK(ppa_unregister_client(ppa_srm_handle)); + ESP_ERROR_CHECK(ppa_unregister_client(ppa_blend_handle)); + ESP_ERROR_CHECK(ppa_unregister_client(ppa_fill_handle)); + example_dsi_resource_destroy(ili9881c_ctrl_panel, mipi_dsi_bus, mipi_dbi_io, mipi_dpi_panel); +} diff --git a/examples/peripherals/ppa/ppa_dsi/pytest_ppa_dsi.py b/examples/peripherals/ppa/ppa_dsi/pytest_ppa_dsi.py new file mode 100644 index 00000000000..65eece56575 --- /dev/null +++ b/examples/peripherals/ppa/ppa_dsi/pytest_ppa_dsi.py @@ -0,0 +1,10 @@ +# SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: CC0-1.0 +import pytest +from pytest_embedded import Dut + + +@pytest.mark.esp32p4 +@pytest.mark.generic +def test_ppa_dsi(dut: Dut) -> None: + dut.expect_exact('Calling app_main()') diff --git a/examples/peripherals/ppa/ppa_dsi/sdkconfig.defaults b/examples/peripherals/ppa/ppa_dsi/sdkconfig.defaults new file mode 100644 index 00000000000..73cebe337da --- /dev/null +++ b/examples/peripherals/ppa/ppa_dsi/sdkconfig.defaults @@ -0,0 +1,3 @@ +CONFIG_SPIRAM=y +CONFIG_IDF_EXPERIMENTAL_FEATURES=y +CONFIG_SPIRAM_SPEED_200M=y From 9b387caf19cf25b694a48cfe7042590a5daa9e66 Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Tue, 16 Jul 2024 09:31:16 +0800 Subject: [PATCH 054/113] fix(etm): add ulp etm ll functions --- components/hal/esp32c5/include/hal/etm_ll.h | 5 +++++ components/soc/esp32c5/include/soc/soc_etm_source.h | 4 ++-- components/ulp/test_apps/.build-test-rules.yml | 6 ------ 3 files changed, 7 insertions(+), 8 deletions(-) diff --git a/components/hal/esp32c5/include/hal/etm_ll.h b/components/hal/esp32c5/include/hal/etm_ll.h index 6708cd7f17e..a042b0f922b 100644 --- a/components/hal/esp32c5/include/hal/etm_ll.h +++ b/components/hal/esp32c5/include/hal/etm_ll.h @@ -11,6 +11,7 @@ #include #include "hal/assert.h" #include "hal/misc.h" +#include "hal/lp_aon_ll.h" #include "soc/soc_etm_struct.h" #include "soc/pcr_struct.h" @@ -112,6 +113,10 @@ static inline void etm_ll_channel_set_task(soc_etm_dev_t *hw, uint32_t chan, uin HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[chan].tid, chn_task_id, task); } +#define etm_ll_is_lpcore_wakeup_triggered() lp_aon_ll_get_lpcore_etm_wakeup_flag() + +#define etm_ll_clear_lpcore_wakeup_status() lp_aon_ll_clear_lpcore_etm_wakeup_flag() + #ifdef __cplusplus } #endif diff --git a/components/soc/esp32c5/include/soc/soc_etm_source.h b/components/soc/esp32c5/include/soc/soc_etm_source.h index c1b6f4f49d2..32470c56fb8 100644 --- a/components/soc/esp32c5/include/soc/soc_etm_source.h +++ b/components/soc/esp32c5/include/soc/soc_etm_source.h @@ -292,8 +292,8 @@ #define I2S0_TASK_START_TX 140 #define I2S0_TASK_STOP_RX 141 #define I2S0_TASK_STOP_TX 142 -#define ULP_TASK_WAKEUP_CPU 143 -#define ULP_TASK_INT_CPU 144 +#define ULP_TASK_WAKEUP_CPU 137 +#define ULP_TASK_INT_CPU 138 #define RTC_TASK_START 145 #define RTC_TASK_STOP 146 #define RTC_TASK_CLR 147 diff --git a/components/ulp/test_apps/.build-test-rules.yml b/components/ulp/test_apps/.build-test-rules.yml index b601d66f143..0f1c3e5be96 100644 --- a/components/ulp/test_apps/.build-test-rules.yml +++ b/components/ulp/test_apps/.build-test-rules.yml @@ -3,17 +3,11 @@ components/ulp/test_apps/lp_core: disable: - if: SOC_LP_CORE_SUPPORTED != 1 - depends_components: - - ulp components/ulp/test_apps/ulp_fsm: enable: - if: SOC_ULP_FSM_SUPPORTED == 1 - depends_components: - - ulp components/ulp/test_apps/ulp_riscv: disable: - if: SOC_RISCV_COPROC_SUPPORTED != 1 - depends_components: - - ulp From 3712dfa6c5633191174f2b125da7c8bea609c7f2 Mon Sep 17 00:00:00 2001 From: Xu Si Yu Date: Mon, 1 Jul 2024 14:49:17 +0800 Subject: [PATCH 055/113] feat(openthread): update openthread submodule --- components/openthread/CMakeLists.txt | 2 + components/openthread/Kconfig | 3 +- components/openthread/openthread | 2 +- .../openthread-core-esp32x-ftd-config.h | 4 +- .../openthread-core-esp32x-mtd-config.h | 4 +- .../openthread-core-esp32x-radio-config.h | 4 +- .../openthread-core-esp32x-spinel-config.h | 4 +- components/openthread/sbom_openthread.yml | 2 +- .../src/esp_openthread_netif_glue.c | 2 +- .../src/port/esp_openthread_radio.c | 26 +++++++--- .../src/port/esp_openthread_radio_spinel.cpp | 49 ++++++++++++++----- .../src/spinel/esp_radio_spinel.cpp | 20 +++++++- .../esp_radio_spinel_uart_interface.cpp | 1 + examples/openthread/ot_rcp/sdkconfig.defaults | 5 ++ 14 files changed, 96 insertions(+), 32 deletions(-) diff --git a/components/openthread/CMakeLists.txt b/components/openthread/CMakeLists.txt index 39cc5b78b81..7a1db20cf12 100644 --- a/components/openthread/CMakeLists.txt +++ b/components/openthread/CMakeLists.txt @@ -266,6 +266,8 @@ if(CONFIG_OPENTHREAD_ENABLED OR CONFIG_OPENTHREAD_SPINEL_ONLY) PUBLIC "OPENTHREAD_CONFIG_FILE=\"openthread-core-esp32x-${CONFIG_FILE_TYPE}-config.h\"" "${device_type}" + "OPENTHREAD_PROJECT_LIB_CONFIG_FILE=\"openthread-core-esp32x-${CONFIG_FILE_TYPE}-config.h\"" + "${device_type}" PRIVATE "PACKAGE_VERSION=\"${IDF_VERSION_FOR_OPENTHREAD_PACKAGE}-${OPENTHREAD_VERSION}\"" "OPENTHREAD_BUILD_DATETIME=\"${OT_BUILD_TIMESTAMP}\"" diff --git a/components/openthread/Kconfig b/components/openthread/Kconfig index 740479a940a..56739b5ec3d 100644 --- a/components/openthread/Kconfig +++ b/components/openthread/Kconfig @@ -259,7 +259,8 @@ menu "OpenThread" config OPENTHREAD_SPINEL_RX_FRAME_BUFFER_SIZE int "The size of openthread spinel rx frame buffer" depends on OPENTHREAD_ENABLED || OPENTHREAD_SPINEL_ONLY - default 2048 + default 1024 if OPENTHREAD_MTD || OPENTHREAD_RADIO + default 2048 if OPENTHREAD_FTD || OPENTHREAD_SPINEL_ONLY config OPENTHREAD_MAC_MAX_CSMA_BACKOFFS_DIRECT int "Maximum backoffs times before declaring a channel access failure." diff --git a/components/openthread/openthread b/components/openthread/openthread index be7d36e4ff9..f32c18bc084 160000 --- a/components/openthread/openthread +++ b/components/openthread/openthread @@ -1 +1 @@ -Subproject commit be7d36e4ff9cf7df6dfce54e58a31163c87b93f7 +Subproject commit f32c18bc0840f400182456e58ae3900fc2fb4af7 diff --git a/components/openthread/private_include/openthread-core-esp32x-ftd-config.h b/components/openthread/private_include/openthread-core-esp32x-ftd-config.h index bf61bc9094c..5c851511f5c 100644 --- a/components/openthread/private_include/openthread-core-esp32x-ftd-config.h +++ b/components/openthread/private_include/openthread-core-esp32x-ftd-config.h @@ -355,13 +355,13 @@ #define OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS 3 /** - * @def OPENTHREAD_CONFIG_PLATFORM_RADIO_SPINEL_RX_FRAME_BUFFER_SIZE + * @def OPENTHREAD_LIB_SPINEL_RX_FRAME_BUFFER_SIZE * * Specifies the rx frame buffer size used by `SpinelInterface` in RCP host code. This is applicable/used when * `RadioSpinel` platform is used. * */ -#define OPENTHREAD_CONFIG_PLATFORM_RADIO_SPINEL_RX_FRAME_BUFFER_SIZE CONFIG_OPENTHREAD_SPINEL_RX_FRAME_BUFFER_SIZE +#define OPENTHREAD_LIB_SPINEL_RX_FRAME_BUFFER_SIZE CONFIG_OPENTHREAD_SPINEL_RX_FRAME_BUFFER_SIZE /** * @def OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE diff --git a/components/openthread/private_include/openthread-core-esp32x-mtd-config.h b/components/openthread/private_include/openthread-core-esp32x-mtd-config.h index 40ac95b9ebd..8067323649b 100644 --- a/components/openthread/private_include/openthread-core-esp32x-mtd-config.h +++ b/components/openthread/private_include/openthread-core-esp32x-mtd-config.h @@ -169,13 +169,13 @@ #define OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS 3 /** - * @def OPENTHREAD_CONFIG_PLATFORM_RADIO_SPINEL_RX_FRAME_BUFFER_SIZE + * @def OPENTHREAD_LIB_SPINEL_RX_FRAME_BUFFER_SIZE * * Specifies the rx frame buffer size used by `SpinelInterface` in RCP host code. This is applicable/used when * `RadioSpinel` platform is used. * */ -#define OPENTHREAD_CONFIG_PLATFORM_RADIO_SPINEL_RX_FRAME_BUFFER_SIZE 1024 +#define OPENTHREAD_LIB_SPINEL_RX_FRAME_BUFFER_SIZE CONFIG_OPENTHREAD_SPINEL_RX_FRAME_BUFFER_SIZE /** * @def OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE diff --git a/components/openthread/private_include/openthread-core-esp32x-radio-config.h b/components/openthread/private_include/openthread-core-esp32x-radio-config.h index cd8ad159092..aba848fe496 100644 --- a/components/openthread/private_include/openthread-core-esp32x-radio-config.h +++ b/components/openthread/private_include/openthread-core-esp32x-radio-config.h @@ -142,13 +142,13 @@ #define OPENTHREAD_CONFIG_MAX_STATECHANGE_HANDLERS 3 /** - * @def OPENTHREAD_CONFIG_PLATFORM_RADIO_SPINEL_RX_FRAME_BUFFER_SIZE + * @def OPENTHREAD_LIB_SPINEL_RX_FRAME_BUFFER_SIZE * * Specifies the rx frame buffer size used by `SpinelInterface` in RCP host code. This is applicable/used when * `RadioSpinel` platform is used. * */ -#define OPENTHREAD_CONFIG_PLATFORM_RADIO_SPINEL_RX_FRAME_BUFFER_SIZE 1024 +#define OPENTHREAD_LIB_SPINEL_RX_FRAME_BUFFER_SIZE CONFIG_OPENTHREAD_SPINEL_RX_FRAME_BUFFER_SIZE /** * @def OPENTHREAD_CONFIG_PLATFORM_USEC_TIMER_ENABLE diff --git a/components/openthread/private_include/openthread-core-esp32x-spinel-config.h b/components/openthread/private_include/openthread-core-esp32x-spinel-config.h index 68d5b8240a3..35c33d55a60 100644 --- a/components/openthread/private_include/openthread-core-esp32x-spinel-config.h +++ b/components/openthread/private_include/openthread-core-esp32x-spinel-config.h @@ -39,13 +39,13 @@ #endif /** - * @def OPENTHREAD_CONFIG_PLATFORM_RADIO_SPINEL_RX_FRAME_BUFFER_SIZE + * @def OPENTHREAD_LIB_SPINEL_RX_FRAME_BUFFER_SIZE * * Specifies the rx frame buffer size used by `SpinelInterface` in RCP host code. This is applicable/used when * `RadioSpinel` platform is used. * */ -#define OPENTHREAD_CONFIG_PLATFORM_RADIO_SPINEL_RX_FRAME_BUFFER_SIZE CONFIG_OPENTHREAD_SPINEL_RX_FRAME_BUFFER_SIZE +#define OPENTHREAD_LIB_SPINEL_RX_FRAME_BUFFER_SIZE CONFIG_OPENTHREAD_SPINEL_RX_FRAME_BUFFER_SIZE /** * @def OPENTHREAD_CONFIG_MAC_MAX_CSMA_BACKOFFS_DIRECT diff --git a/components/openthread/sbom_openthread.yml b/components/openthread/sbom_openthread.yml index ae0203670fb..7738bbe0a2e 100644 --- a/components/openthread/sbom_openthread.yml +++ b/components/openthread/sbom_openthread.yml @@ -5,4 +5,4 @@ supplier: 'Organization: Espressif Systems (Shanghai) CO LTD' originator: 'Organization: Google LLC' description: OpenThread released by Google is an open-source implementation of the Thread networking url: https://github.com/espressif/openthread -hash: be7d36e4ff9cf7df6dfce54e58a31163c87b93f7 +hash: f32c18bc0840f400182456e58ae3900fc2fb4af7 diff --git a/components/openthread/src/esp_openthread_netif_glue.c b/components/openthread/src/esp_openthread_netif_glue.c index 8e0ff030855..e7184698682 100644 --- a/components/openthread/src/esp_openthread_netif_glue.c +++ b/components/openthread/src/esp_openthread_netif_glue.c @@ -320,7 +320,7 @@ void *esp_openthread_netif_glue_init(const esp_openthread_platform_config_t *con otIp6SetAddressCallback(instance, process_thread_address, instance); otIp6SetReceiveCallback(instance, process_thread_receive, instance); otIp6SetReceiveFilterEnabled(instance, true); - otIcmp6SetEchoMode(instance, OT_ICMP6_ECHO_HANDLER_DISABLED); + otIcmp6SetEchoMode(instance, OT_ICMP6_ECHO_HANDLER_RLOC_ALOC_ONLY); s_openthread_netif_glue.event_fd = eventfd(0, 0); if (s_openthread_netif_glue.event_fd < 0) { diff --git a/components/openthread/src/port/esp_openthread_radio.c b/components/openthread/src/port/esp_openthread_radio.c index 07041438b27..4276809c528 100644 --- a/components/openthread/src/port/esp_openthread_radio.c +++ b/components/openthread/src/port/esp_openthread_radio.c @@ -64,10 +64,13 @@ static otRadioFrame s_ack_frame; static int s_ed_power; static esp_ieee802154_tx_error_t s_tx_error; static int s_radio_event_fd = -1; -static bool s_diag_mode = false; static const char *s_radio_workflow = "radio"; static uint8_t s_txrx_events; +#if CONFIG_OPENTHREAD_DIAG +static bool s_diag_mode = false; +#endif + #if OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT static otRadioIeInfo s_transmit_ie_info; #endif // OPENTHREAD_CONFIG_MAC_HEADER_IE_SUPPORT @@ -113,7 +116,7 @@ static inline bool get_event(uint8_t event) esp_err_t esp_openthread_radio_init(const esp_openthread_platform_config_t *config) { ESP_RETURN_ON_FALSE(s_radio_event_fd == -1, ESP_ERR_INVALID_STATE, OT_PLAT_LOG_TAG, - "Radio was initalized already!"); + "Radio was initialized already!"); s_radio_event_fd = eventfd(0, EFD_SUPPORT_ISR); @@ -165,7 +168,7 @@ esp_err_t esp_openthread_radio_process(otInstance *aInstance, const esp_openthre if (get_event(EVENT_TX_DONE)) { clr_event(EVENT_TX_DONE); -#if OPENTHREAD_CONFIG_DIAG_ENABLE +#if CONFIG_OPENTHREAD_DIAG if (otPlatDiagModeGet()) { otPlatDiagRadioTransmitDone(aInstance, &s_transmit_frame, OT_ERROR_NONE); } else @@ -183,7 +186,7 @@ esp_err_t esp_openthread_radio_process(otInstance *aInstance, const esp_openthre if (get_event(EVENT_TX_FAILED)) { clr_event(EVENT_TX_FAILED); -#if OPENTHREAD_CONFIG_DIAG_ENABLE +#if CONFIG_OPENTHREAD_DIAG if (otPlatDiagModeGet()) { otPlatDiagRadioTransmitDone(aInstance, &s_transmit_frame, OT_ERROR_CHANNEL_ACCESS_FAILURE); } else @@ -219,7 +222,7 @@ esp_err_t esp_openthread_radio_process(otInstance *aInstance, const esp_openthre while (atomic_load(&s_recv_queue.used)) { if (s_receive_frame[s_recv_queue.head].mPsdu != NULL) { -#if OPENTHREAD_CONFIG_DIAG_ENABLE +#if CONFIG_OPENTHREAD_DIAG if (otPlatDiagModeGet()) { otPlatDiagRadioReceiveDone(aInstance, &s_receive_frame[s_recv_queue.head], OT_ERROR_NONE); } else @@ -302,7 +305,7 @@ otError otPlatRadioTransmit(otInstance *aInstance, otRadioFrame *aFrame) { esp_ieee802154_set_channel(aFrame->mChannel); - aFrame->mPsdu[-1] = aFrame->mLength; // lenth locates one byte before the psdu (esp_openthread_radio_tx_psdu); + aFrame->mPsdu[-1] = aFrame->mLength; // length locates one byte before the psdu (esp_openthread_radio_tx_psdu); if (otMacFrameIsSecurityEnabled(aFrame) && !aFrame->mInfo.mTxInfo.mIsSecurityProcessed) { if (!s_transmit_frame.mInfo.mTxInfo.mIsARetx) { @@ -447,6 +450,15 @@ int8_t otPlatRadioGetReceiveSensitivity(otInstance *aInstance) return ESP_RECEIVE_SENSITIVITY; } +#if CONFIG_OPENTHREAD_DIAG + +void otPlatDiagSetOutputCallback(otInstance *aInstance, otPlatDiagOutputCallback aCallback, void *aContext) +{ + OT_UNUSED_VARIABLE(aInstance); + OT_UNUSED_VARIABLE(aCallback); + OT_UNUSED_VARIABLE(aContext); +} + void otPlatDiagModeSet(bool mode) { s_diag_mode = mode; @@ -479,6 +491,8 @@ void otPlatDiagAlarmCallback(otInstance *aInstance) OT_UNUSED_VARIABLE(aInstance); } +#endif // CONFIG_OPENTHREAD_DIAG + #if OPENTHREAD_CONFIG_THREAD_VERSION >= OT_THREAD_VERSION_1_2 void otPlatRadioSetMacKey(otInstance *aInstance, uint8_t aKeyIdMode, uint8_t aKeyId, const otMacKeyMaterial *aPrevKey, const otMacKeyMaterial *aCurrKey, const otMacKeyMaterial *aNextKey, otRadioKeyType aKeyType) diff --git a/components/openthread/src/port/esp_openthread_radio_spinel.cpp b/components/openthread/src/port/esp_openthread_radio_spinel.cpp index a926138f9a5..34eccebc8ad 100644 --- a/components/openthread/src/port/esp_openthread_radio_spinel.cpp +++ b/components/openthread/src/port/esp_openthread_radio_spinel.cpp @@ -6,6 +6,7 @@ #include "esp_openthread_radio.h" +#include "link_raw.h" #include "sdkconfig.h" #include "esp_check.h" #include "esp_err.h" @@ -23,9 +24,11 @@ #include "openthread/platform/diag.h" #include "openthread/platform/radio.h" #include "platform/exit_code.h" +#include "spinel_driver.hpp" using ot::Spinel::RadioSpinel; using esp::openthread::SpinelInterfaceAdapter; +using ot::Spinel::SpinelDriver; #if CONFIG_OPENTHREAD_RADIO_SPINEL_UART // CONFIG_OPENTHREAD_RADIO_SPINEL_UART using esp::openthread::UartSpinelInterface; @@ -35,7 +38,17 @@ using esp::openthread::SpiSpinelInterface; static SpinelInterfaceAdapter s_spinel_interface; #endif +static SpinelDriver s_spinel_driver; static RadioSpinel s_radio; +static otRadioCaps s_radio_caps = (OT_RADIO_CAPS_ENERGY_SCAN | +#if CONFIG_OPENTHREAD_RX_ON_WHEN_IDLE + OT_RADIO_CAPS_RX_ON_WHEN_IDLE | +#endif + OT_RADIO_CAPS_TRANSMIT_SEC | + OT_RADIO_CAPS_RECEIVE_TIMING | + OT_RADIO_CAPS_TRANSMIT_TIMING | + OT_RADIO_CAPS_ACK_TIMEOUT | + OT_RADIO_CAPS_SLEEP_TO_TX); static const char *radiospinel_workflow = "radio_spinel"; @@ -60,7 +73,7 @@ esp_err_t esp_openthread_radio_init(const esp_openthread_platform_config_t *conf #if CONFIG_OPENTHREAD_DIAG callbacks.mDiagReceiveDone = otPlatDiagRadioReceiveDone; callbacks.mDiagTransmitDone = otPlatDiagRadioTransmitDone; -#endif // OPENTHREAD_CONFIG_DIAG_ENABLE +#endif // CONFIG_OPENTHREAD_DIAG callbacks.mEnergyScanDone = otPlatRadioEnergyScanDone; callbacks.mReceiveDone = otPlatRadioReceiveDone; callbacks.mTransmitDone = otPlatRadioTxDone; @@ -70,14 +83,15 @@ esp_err_t esp_openthread_radio_init(const esp_openthread_platform_config_t *conf esp_openthread_radio_config_set(&config->radio_config); #if CONFIG_OPENTHREAD_RADIO_SPINEL_UART // CONFIG_OPENTHREAD_RADIO_SPINEL_UART ESP_RETURN_ON_ERROR(s_spinel_interface.GetSpinelInterface().Enable(config->radio_config.radio_uart_config), OT_PLAT_LOG_TAG, - "Spinel interface init falied"); + "Spinel interface init failed"); #else // CONFIG_OPENTHREAD_RADIO_SPINEL_SPI ESP_RETURN_ON_ERROR(s_spinel_interface.GetSpinelInterface().Enable(config->radio_config.radio_spi_config), OT_PLAT_LOG_TAG, "Spinel interface init failed"); #endif - s_radio.Init(s_spinel_interface.GetSpinelInterface(), /*reset_radio=*/true, /*skip_rcp_compatibility_check=*/false, iidList, ot::Spinel::kSpinelHeaderMaxNumIid); + s_spinel_driver.Init(s_spinel_interface.GetSpinelInterface(), true, iidList, ot::Spinel::kSpinelHeaderMaxNumIid); + s_radio.Init(/*skip_rcp_compatibility_check=*/false, /*reset_radio=*/true, &s_spinel_driver, s_radio_caps); #if CONFIG_OPENTHREAD_RADIO_SPINEL_SPI // CONFIG_OPENTHREAD_RADIO_SPINEL_SPI - ESP_RETURN_ON_ERROR(s_spinel_interface.GetSpinelInterface().AfterRadioInit(), OT_PLAT_LOG_TAG, "Spinel interface init falied"); + ESP_RETURN_ON_ERROR(s_spinel_interface.GetSpinelInterface().AfterRadioInit(), OT_PLAT_LOG_TAG, "Spinel interface init failed"); #endif return esp_openthread_platform_workflow_register(&esp_openthread_radio_update, &esp_openthread_radio_process, radiospinel_workflow); @@ -106,7 +120,7 @@ esp_err_t esp_openthread_rcp_init(void) const esp_openthread_radio_config_t *radio_config = esp_openthread_radio_config_get(); #if CONFIG_OPENTHREAD_RADIO_SPINEL_UART ESP_RETURN_ON_ERROR(s_spinel_interface.GetSpinelInterface().Enable(radio_config->radio_uart_config), OT_PLAT_LOG_TAG, - "Spinel interface init falied"); + "Spinel interface init failed"); #else // CONFIG_OPENTHREAD_RADIO_SPINEL_SPI ESP_RETURN_ON_ERROR(s_spinel_interface.GetSpinelInterface().Enable(radio_config->radio_spi_config), OT_PLAT_LOG_TAG, "Spinel interface init failed"); @@ -128,6 +142,7 @@ void esp_openthread_radio_deinit(void) esp_err_t esp_openthread_radio_process(otInstance *instance, const esp_openthread_mainloop_context_t *mainloop) { + s_spinel_driver.Process((void *)mainloop); s_radio.Process((void *)mainloop); return ESP_OK; @@ -211,7 +226,8 @@ int8_t otPlatRadioGetRssi(otInstance *instance) otRadioCaps otPlatRadioGetCaps(otInstance *instance) { - return s_radio.GetRadioCaps(); + s_radio_caps = s_radio.GetRadioCaps(); + return s_radio_caps; } bool otPlatRadioGetPromiscuous(otInstance *instance) @@ -319,7 +335,7 @@ void otPlatRadioSetMacFrameCounter(otInstance *aInstance, uint32_t aMacFrameCoun SuccessOrDie(s_radio.SetMacFrameCounter(aMacFrameCounter, true)); } -#if OPENTHREAD_CONFIG_DIAG_ENABLE +#if CONFIG_OPENTHREAD_DIAG otError otPlatDiagProcess(otInstance *instance, int argc, char *argv[], char *output, size_t output_max_len) { // deliver the platform specific diags commands to radio only ncp. @@ -331,12 +347,19 @@ otError otPlatDiagProcess(otInstance *instance, int argc, char *argv[], char *ou cur += snprintf(cur, static_cast(end - cur), "%s ", argv[index]); } - return s_radio.PlatDiagProcess(cmd, output, output_max_len); + return s_radio.PlatDiagProcess(cmd); +} + +void otPlatDiagSetOutputCallback(otInstance *aInstance, otPlatDiagOutputCallback aCallback, void *aContext) +{ + OT_UNUSED_VARIABLE(aInstance); + OT_UNUSED_VARIABLE(aCallback); + OT_UNUSED_VARIABLE(aContext); } void otPlatDiagModeSet(bool aMode) { - SuccessOrExit(s_radio.PlatDiagProcess(aMode ? "start" : "stop", NULL, 0)); + SuccessOrExit(s_radio.PlatDiagProcess(aMode ? "start" : "stop")); s_radio.SetDiagEnabled(aMode); exit: @@ -353,7 +376,7 @@ void otPlatDiagTxPowerSet(int8_t tx_power) char cmd[OPENTHREAD_CONFIG_DIAG_CMD_LINE_BUFFER_SIZE]; snprintf(cmd, sizeof(cmd), "power %d", tx_power); - SuccessOrExit(s_radio.PlatDiagProcess(cmd, NULL, 0)); + SuccessOrExit(s_radio.PlatDiagProcess(cmd)); exit: return; @@ -364,7 +387,7 @@ void otPlatDiagChannelSet(uint8_t channel) char cmd[OPENTHREAD_CONFIG_DIAG_CMD_LINE_BUFFER_SIZE]; snprintf(cmd, sizeof(cmd), "channel %d", channel); - SuccessOrExit(s_radio.PlatDiagProcess(cmd, NULL, 0)); + SuccessOrExit(s_radio.PlatDiagProcess(cmd)); exit: return; @@ -378,13 +401,13 @@ void otPlatDiagAlarmCallback(otInstance *instance) { } +#endif // CONFIG_OPENTHREAD_DIAG + const char *otPlatRadioGetVersionString(otInstance *aInstance) { return s_radio.GetVersion(); } -#endif // OPENTHREAD_CONFIG_DIAG_ENABLE - uint64_t otPlatRadioGetNow(otInstance *aInstance) { OT_UNUSED_VARIABLE(aInstance); diff --git a/components/openthread/src/spinel/esp_radio_spinel.cpp b/components/openthread/src/spinel/esp_radio_spinel.cpp index 2b7bcfdf16b..2057433ce43 100644 --- a/components/openthread/src/spinel/esp_radio_spinel.cpp +++ b/components/openthread/src/spinel/esp_radio_spinel.cpp @@ -12,17 +12,27 @@ #include "esp_radio_spinel.h" #include "esp_radio_spinel_adapter.hpp" #include "esp_radio_spinel_uart_interface.hpp" +#include "spinel_driver.hpp" using ot::Spinel::RadioSpinel; using ot::Spinel::RadioSpinelCallbacks; using esp::radio_spinel::SpinelInterfaceAdapter; using esp::radio_spinel::UartSpinelInterface; +using ot::Spinel::SpinelDriver; static SpinelInterfaceAdapter s_spinel_interface[ot::Spinel::kSpinelHeaderMaxNumIid]; static RadioSpinel s_radio[ot::Spinel::kSpinelHeaderMaxNumIid]; static esp_radio_spinel_callbacks_t s_esp_radio_spinel_callbacks[ot::Spinel::kSpinelHeaderMaxNumIid]; +static SpinelDriver s_spinel_driver[ot::Spinel::kSpinelHeaderMaxNumIid]; otRadioFrame s_transmit_frame; +static otRadioCaps s_radio_caps = (OT_RADIO_CAPS_ENERGY_SCAN | + OT_RADIO_CAPS_TRANSMIT_SEC | + OT_RADIO_CAPS_RECEIVE_TIMING | + OT_RADIO_CAPS_TRANSMIT_TIMING | + OT_RADIO_CAPS_ACK_TIMEOUT | + OT_RADIO_CAPS_SLEEP_TO_TX); + static esp_radio_spinel_idx_t get_index_from_instance(otInstance *instance) { // TZ-563: Implement the function to get the esp radio spinel idx from otInstance for multipan rcp @@ -213,7 +223,8 @@ void esp_radio_spinel_init(esp_radio_spinel_idx_t idx) // Multipan is not currently supported iidList[0] = 0; - s_radio[idx].Init(s_spinel_interface[idx].GetSpinelInterface(), /*reset_radio=*/true, /*skip_rcp_compatibility_check=*/false, iidList, ot::Spinel::kSpinelHeaderMaxNumIid); + s_spinel_driver[idx].Init(s_spinel_interface[idx].GetSpinelInterface(), true, iidList, ot::Spinel::kSpinelHeaderMaxNumIid); + s_radio[idx].Init(/*skip_rcp_compatibility_check=*/false, /*reset_radio=*/true, &s_spinel_driver[idx], s_radio_caps); } esp_err_t esp_radio_spinel_enable(esp_radio_spinel_idx_t idx) @@ -309,6 +320,7 @@ void esp_radio_spinel_radio_update(esp_radio_spinel_mainloop_context_t *mainloop void esp_radio_spinel_radio_process(esp_radio_spinel_mainloop_context_t *mainloop_context, esp_radio_spinel_idx_t idx) { + s_spinel_driver[idx].Process((void *)mainloop_context); s_radio[idx].Process(static_cast(mainloop_context)); } @@ -354,3 +366,9 @@ esp_err_t esp_radio_spinel_rcp_version_get(char *running_rcp_version, esp_radio_ strcpy(running_rcp_version, rcp_version); return ESP_OK; } + +esp_err_t esp_radio_spinel_set_rcp_ready(esp_radio_spinel_idx_t idx) +{ + s_spinel_driver[idx].SetCoprocessorReady(); + return ESP_OK; +} diff --git a/components/openthread/src/spinel/esp_radio_spinel_uart_interface.cpp b/components/openthread/src/spinel/esp_radio_spinel_uart_interface.cpp index 56806500590..b01ef694c27 100644 --- a/components/openthread/src/spinel/esp_radio_spinel_uart_interface.cpp +++ b/components/openthread/src/spinel/esp_radio_spinel_uart_interface.cpp @@ -11,6 +11,7 @@ #include "esp_openthread_common_macro.h" #include "openthread/platform/time.h" #include "hdlc.hpp" +#include "core/common/code_utils.hpp" namespace esp { namespace radio_spinel { diff --git a/examples/openthread/ot_rcp/sdkconfig.defaults b/examples/openthread/ot_rcp/sdkconfig.defaults index 002c6f9f305..91439591345 100644 --- a/examples/openthread/ot_rcp/sdkconfig.defaults +++ b/examples/openthread/ot_rcp/sdkconfig.defaults @@ -8,6 +8,11 @@ CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table +# +# Wireless Coexistence +# +CONFIG_ESP_COEX_SW_COEXIST_ENABLE=n + # # OpenThread # From d25b1375b579eb00b423ed365e50dace170eeeb2 Mon Sep 17 00:00:00 2001 From: zwl Date: Tue, 16 Jul 2024 10:16:15 +0800 Subject: [PATCH 056/113] fix(bluetooth/controller): fixed alloc memory fail when use uhci on ESP32-C6 and ESP32-H2 --- .../transport/driver/uart/hci_driver_uart_dma.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/components/bt/porting/transport/driver/uart/hci_driver_uart_dma.c b/components/bt/porting/transport/driver/uart/hci_driver_uart_dma.c index a90fb749a11..3111a7cea3c 100644 --- a/components/bt/porting/transport/driver/uart/hci_driver_uart_dma.c +++ b/components/bt/porting/transport/driver/uart/hci_driver_uart_dma.c @@ -423,6 +423,10 @@ int hci_driver_uart_dma_tx_start(esp_bt_hci_tl_callback_t callback, void *arg) uart_env.tx.link_head = lldesc_head; uart_env.tx.callback = callback; uart_env.tx.arg = arg; + /* The DMA interrupt may have been triggered before setting the tx_state, + * So we set it first. + */ + hci_driver_uart_dma_txstate_set(HCI_TRANS_TX_START); gdma_start(s_tx_channel, (intptr_t)(uart_env.tx.link_head)); return 0; } else { @@ -513,6 +517,11 @@ hci_driver_uart_dma_process_task(void *p) while (true) { xSemaphoreTake(s_hci_driver_uart_dma_env.process_sem, portMAX_DELAY); ESP_LOGD(TAG, "task run:%d\n",s_hci_driver_uart_dma_env.hci_tx_state); + /* Process Tx data */ + if (s_hci_driver_uart_dma_env.hci_tx_state == HCI_TRANS_TX_IDLE) { + hci_driver_uart_dma_tx_start(hci_driver_uart_dma_send_callback, (void*)&uart_env); + } + if (s_hci_driver_uart_dma_env.rxinfo_mem_exhausted) { rx_data = (void *)uart_env.rx.link_head->buf; rx_len = uart_env.rx.link_head->length; @@ -553,14 +562,6 @@ hci_driver_uart_dma_process_task(void *p) os_memblock_put(s_hci_driver_uart_dma_env.hci_rx_data_pool, rx_data); } } - - /* Process Tx data */ - if (s_hci_driver_uart_dma_env.hci_tx_state == HCI_TRANS_TX_IDLE) { - ret = hci_driver_uart_dma_tx_start(hci_driver_uart_dma_send_callback, (void*)&uart_env); - if (!ret) { - s_hci_driver_uart_dma_env.hci_tx_state = HCI_TRANS_TX_START; - } - } } } From fdfab41f9526813c5e4923a3e7f99c404226aa9a Mon Sep 17 00:00:00 2001 From: wanlei Date: Wed, 24 Apr 2024 12:26:15 +0800 Subject: [PATCH 057/113] feat(esp32c61): enable c61 ci build --- .gitlab/ci/default-build-test-rules.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitlab/ci/default-build-test-rules.yml b/.gitlab/ci/default-build-test-rules.yml index 2fbd2205212..def222985b3 100644 --- a/.gitlab/ci/default-build-test-rules.yml +++ b/.gitlab/ci/default-build-test-rules.yml @@ -7,8 +7,8 @@ # # This file should ONLY be used during bringup. Should be reset to empty after the bringup process extra_default_build_targets: - - esp32p4 - esp32c5 + - esp32c61 bypass_check_test_targets: - esp32c61 From 3cf069c7d85033c47412f9355753175c80b4dea9 Mon Sep 17 00:00:00 2001 From: wanlei Date: Mon, 29 Apr 2024 19:55:27 +0800 Subject: [PATCH 058/113] feat(esp32c61): disable unsupported build test --- .../app_trace/test_apps/.build-test-rules.yml | 4 +- .../test_apps/.build-test-rules.yml | 4 +- .../test_apps/bootloader_support/README.md | 4 +- .../driver/test_apps/.build-test-rules.yml | 4 +- components/efuse/test_apps/README.md | 4 +- components/esp-tls/test_apps/README.md | 4 +- .../esp_common/test_apps/esp_common/README.md | 4 +- .../test_apps/.build-test-rules.yml | 4 + .../test_apps/.build-test-rules.yml | 6 + .../test_apps/uart_vfs/README.md | 4 +- .../esp_http_client/test_apps/README.md | 4 +- .../esp_http_server/test_apps/README.md | 4 +- .../test_apps/.build-test-rules.yml | 9 +- .../esp_hw_support_unity_tests/README.md | 4 +- .../main/CMakeLists.txt | 5 +- components/esp_mm/test_apps/mm/README.md | 4 +- components/esp_mm/test_apps/mmap_hw/README.md | 4 +- .../test_apps/test_app_esp_netif/README.md | 4 +- .../esp_pm/test_apps/.build-test-rules.yml | 4 +- .../esp_rom/test_apps/rom_tests/README.md | 4 +- components/esp_system/Kconfig | 2 + .../esp_system/test_apps/console/README.md | 4 +- .../esp_system_unity_tests/README.md | 4 +- .../main/CMakeLists.txt | 5 +- components/esp_timer/test_apps/README.md | 4 +- .../esp_timer/test_apps/main/CMakeLists.txt | 9 +- .../fatfs/test_apps/.build-test-rules.yml | 4 +- components/fatfs/test_apps/flash_ro/README.md | 4 +- components/fatfs/test_apps/flash_wl/README.md | 4 +- .../freertos/test_apps/.build-test-rules.yml | 3 + components/hal/test_apps/crypto/README.md | 4 +- .../heap/test_apps/.build-test-rules.yml | 3 + components/lwip/test_apps/README.md | 4 +- components/mbedtls/test_apps/README.md | 4 +- .../newlib/test_apps/.build-test-rules.yml | 4 + .../newlib/test_apps/newlib/main/test_time.c | 2 + components/nvs_flash/test_apps/README.md | 4 +- components/protocomm/test_apps/README.md | 4 +- .../test_apps/pthread_unity_tests/README.md | 4 +- .../esp32c61/include/soc/Kconfig.soc_caps.in | 342 +----------------- .../soc/esp32c61/include/soc/soc_caps.h | 183 +++++----- .../spi_flash/test_apps/.build-test-rules.yml | 11 +- .../test_apps/esp_flash_stress/README.md | 4 +- .../test_apps/flash_encryption/README.md | 6 +- .../spi_flash/test_apps/flash_mmap/README.md | 4 +- components/spiffs/test_apps/README.md | 4 +- components/tcp_transport/test_apps/README.md | 4 +- .../vfs/test_apps/.build-test-rules.yml | 4 +- .../cmake/component_manager/README.md | 4 +- .../build_system/cmake/import_lib/README.md | 4 +- .../cmake/import_prebuilt/README.md | 4 +- .../build_system/cmake/multi_config/README.md | 4 +- examples/build_system/cmake/plugins/README.md | 4 +- examples/build_system/wrappers/README.md | 4 +- .../bootloader_hooks/README.md | 4 +- .../bootloader_override/README.md | 4 +- examples/cxx/exceptions/README.md | 4 +- examples/cxx/pthread/README.md | 4 +- examples/cxx/rtti/README.md | 4 +- examples/ethernet/.build-test-rules.yml | 12 +- examples/network/bridge/README.md | 4 +- examples/network/vlan_support/README.md | 4 +- examples/peripherals/.build-test-rules.yml | 4 +- .../peripherals/gpio/generic_gpio/README.md | 4 +- .../uart/nmea0183_parser/README.md | 4 +- .../uart/uart_async_rxtxtasks/README.md | 4 +- examples/peripherals/uart/uart_echo/README.md | 4 +- .../uart/uart_echo_rs485/README.md | 4 +- .../peripherals/uart/uart_events/README.md | 4 +- examples/peripherals/uart/uart_repl/README.md | 6 +- .../peripherals/uart/uart_select/README.md | 4 +- examples/phy/.build-test-rules.yml | 4 +- examples/protocols/.build-test-rules.yml | 104 +++--- .../http_server/restful_server/README.md | 2 +- examples/protocols/l2tap/README.md | 2 +- .../modbus/tcp/mb_tcp_master/README.md | 3 +- .../protocols/sockets/non_blocking/README.md | 4 +- .../protocols/sockets/tcp_client/README.md | 2 +- examples/security/flash_encryption/README.md | 4 +- examples/storage/.build-test-rules.yml | 8 +- .../storage/custom_flash_driver/README.md | 4 +- examples/storage/fatfsgen/README.md | 4 +- examples/storage/littlefs/README.md | 4 +- examples/storage/nvs_rw_blob/README.md | 4 +- examples/storage/nvs_rw_value/README.md | 4 +- examples/storage/nvs_rw_value_cxx/README.md | 4 +- examples/storage/nvsgen/README.md | 4 +- .../partition_api/partition_find/README.md | 4 +- .../partition_api/partition_mmap/README.md | 4 +- .../partition_api/partition_ops/README.md | 4 +- examples/storage/parttool/README.md | 4 +- examples/storage/semihost_vfs/README.md | 4 +- examples/storage/spiffs/README.md | 4 +- examples/storage/spiffsgen/README.md | 4 +- examples/storage/wear_levelling/README.md | 4 +- examples/system/.build-test-rules.yml | 20 +- examples/system/app_trace_basic/README.md | 4 +- examples/system/app_trace_to_plot/README.md | 4 +- examples/system/base_mac_address/README.md | 6 +- examples/system/console/advanced/README.md | 4 +- examples/system/console/basic/README.md | 4 +- examples/system/efuse/README.md | 4 +- .../esp_event/default_event_loop/README.md | 4 +- .../esp_event/user_event_loops/README.md | 4 +- examples/system/eventfd/README.md | 4 +- .../system/freertos/real_time_stats/README.md | 6 +- examples/system/gdbstub/README.md | 4 +- examples/system/heap_task_tracking/README.md | 4 +- examples/system/ota/otatool/README.md | 4 +- examples/system/pthread/README.md | 4 +- examples/system/rt_mqueue/README.md | 4 +- examples/system/select/README.md | 4 +- examples/system/startup_time/README.md | 4 +- examples/system/task_watchdog/README.md | 4 +- examples/system/unit_test/README.md | 4 +- examples/wifi/itwt/README.md | 4 +- .../build_system/bootloader/README.md | 4 +- .../build_system/ldgen_test/README.md | 4 +- .../protocols/mqtt/build_test/README.md | 4 +- .../protocols/network_tests/README.md | 4 +- tools/test_apps/storage/.build-test-rules.yml | 4 +- .../partition_table_readonly/README.md | 4 +- tools/test_apps/system/.build-test-rules.yml | 4 + .../system/bootloader_sections/README.md | 4 +- tools/test_apps/system/build_test/README.md | 4 +- .../test_apps/system/cxx_build_test/README.md | 4 +- .../test_apps/system/esp_intr_dump/README.md | 4 +- .../test_apps/system/g1_components/README.md | 4 +- tools/test_apps/system/gdb/README.md | 4 +- .../system/gdb_loadable_elf/README.md | 4 +- .../system/gdbstub_runtime/README.md | 4 +- .../system/ram_loadable_app/README.md | 4 +- tools/test_apps/system/startup/README.md | 4 +- 133 files changed, 452 insertions(+), 741 deletions(-) diff --git a/components/app_trace/test_apps/.build-test-rules.yml b/components/app_trace/test_apps/.build-test-rules.yml index 6976e3b934d..cb147bedd6a 100644 --- a/components/app_trace/test_apps/.build-test-rules.yml +++ b/components/app_trace/test_apps/.build-test-rules.yml @@ -8,6 +8,6 @@ components/app_trace/test_apps: - driver - esp_hw_support disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not support yet # TODO: [ESP32C5] IDF-8705 + reason: not support yet # TODO: [ESP32C5] IDF-8705, [ESP32C61] IDF-9306 diff --git a/components/app_update/test_apps/.build-test-rules.yml b/components/app_update/test_apps/.build-test-rules.yml index d5682ad14d0..4bcee9b3ad6 100644 --- a/components/app_update/test_apps/.build-test-rules.yml +++ b/components/app_update/test_apps/.build-test-rules.yml @@ -2,6 +2,6 @@ components/app_update/test_apps: disable: - - if: IDF_TARGET in ["esp32c5"] + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: target esp32c5 is not supported yet # TODO: [ESP32C5] IDF-8640, IDF-10317 + reason: target esp32c5 is not supported yet # TODO: [ESP32C5] IDF-8640, IDF-10317, [ESP32C61] IDF-9245 diff --git a/components/bootloader_support/test_apps/bootloader_support/README.md b/components/bootloader_support/test_apps/bootloader_support/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/bootloader_support/test_apps/bootloader_support/README.md +++ b/components/bootloader_support/test_apps/bootloader_support/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/driver/test_apps/.build-test-rules.yml b/components/driver/test_apps/.build-test-rules.yml index a90d12dd6e8..cea2987e205 100644 --- a/components/driver/test_apps/.build-test-rules.yml +++ b/components/driver/test_apps/.build-test-rules.yml @@ -30,9 +30,9 @@ components/driver/test_apps/legacy_adc_driver: components/driver/test_apps/legacy_i2c_driver: disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not support yet # TODO: [ESP32C5] IDF-10307 + reason: not support yet # TODO: [ESP32C5] IDF-10307, [ESP32C61] IDF-9296 disable_test: - if: IDF_TARGET == "esp32p4" temporary: true diff --git a/components/efuse/test_apps/README.md b/components/efuse/test_apps/README.md index bae04212cab..273797f03ae 100644 --- a/components/efuse/test_apps/README.md +++ b/components/efuse/test_apps/README.md @@ -1,3 +1,3 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | Linux | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | ----- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | Linux | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | ----- | diff --git a/components/esp-tls/test_apps/README.md b/components/esp-tls/test_apps/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/esp-tls/test_apps/README.md +++ b/components/esp-tls/test_apps/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_common/test_apps/esp_common/README.md b/components/esp_common/test_apps/esp_common/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/esp_common/test_apps/esp_common/README.md +++ b/components/esp_common/test_apps/esp_common/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_driver_gpio/test_apps/.build-test-rules.yml b/components/esp_driver_gpio/test_apps/.build-test-rules.yml index 8132f076cca..741de20f56b 100644 --- a/components/esp_driver_gpio/test_apps/.build-test-rules.yml +++ b/components/esp_driver_gpio/test_apps/.build-test-rules.yml @@ -1,6 +1,10 @@ # Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps components/esp_driver_gpio/test_apps: + disable: + - if: IDF_TARGET in ["esp32c61"] + temporary: true + reason: not support yet # TODO: [esp32c61] IDF-9877 disable_test: - if: IDF_TARGET in ["esp32p4"] temporary: true diff --git a/components/esp_driver_uart/test_apps/.build-test-rules.yml b/components/esp_driver_uart/test_apps/.build-test-rules.yml index 403036b446e..c6916dd7d18 100644 --- a/components/esp_driver_uart/test_apps/.build-test-rules.yml +++ b/components/esp_driver_uart/test_apps/.build-test-rules.yml @@ -3,6 +3,9 @@ components/esp_driver_uart/test_apps/rs485: disable: - if: SOC_UART_SUPPORTED != 1 + - if: IDF_TARGET in ["esp32c61"] + temporary: true + reason: IDF-9320 uart driver disable_test: - if: IDF_TARGET != "esp32" temporary: true @@ -14,6 +17,9 @@ components/esp_driver_uart/test_apps/rs485: components/esp_driver_uart/test_apps/uart: disable: - if: SOC_UART_SUPPORTED != 1 + - if: IDF_TARGET in ["esp32c61"] + temporary: true + reason: IDF-9320 uart driver disable_test: - if: IDF_TARGET == "esp32p4" temporary: true diff --git a/components/esp_driver_uart/test_apps/uart_vfs/README.md b/components/esp_driver_uart/test_apps/uart_vfs/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/esp_driver_uart/test_apps/uart_vfs/README.md +++ b/components/esp_driver_uart/test_apps/uart_vfs/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_http_client/test_apps/README.md b/components/esp_http_client/test_apps/README.md index 351f5fdebc7..7b4730e9190 100644 --- a/components/esp_http_client/test_apps/README.md +++ b/components/esp_http_client/test_apps/README.md @@ -1,3 +1,3 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_http_server/test_apps/README.md b/components/esp_http_server/test_apps/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/esp_http_server/test_apps/README.md +++ b/components/esp_http_server/test_apps/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_hw_support/test_apps/.build-test-rules.yml b/components/esp_hw_support/test_apps/.build-test-rules.yml index 09fb7029314..75a3f94f997 100644 --- a/components/esp_hw_support/test_apps/.build-test-rules.yml +++ b/components/esp_hw_support/test_apps/.build-test-rules.yml @@ -5,6 +5,9 @@ components/esp_hw_support/test_apps/dma: - if: IDF_TARGET in ["esp32"] temporary: false reason: No general DMA controller on ESP32 + - if: IDF_TARGET in ["esp32c61"] + temporary: true + reason: not supported [ESP32C61] IDF-9310 depends_filepatterns: - components/esp_hw_support/dma/**/* @@ -32,9 +35,9 @@ components/esp_hw_support/test_apps/rtc_8md256: components/esp_hw_support/test_apps/rtc_clk: disable: - - if: IDF_TARGET in ["esp32c6", "esp32h2", "esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32c6", "esp32h2", "esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: Unsupported on C6 for now. TODO IDF-5645, TODO IDF-7514, TODO C5 IDF-8667 + reason: Unsupported on C6 for now. TODO IDF-5645, TODO IDF-7514, TODO C5 IDF-8667, TODO C61 IDF-9274 components/esp_hw_support/test_apps/rtc_power_modes: enable: @@ -44,4 +47,4 @@ components/esp_hw_support/test_apps/rtc_power_modes: components/esp_hw_support/test_apps/wakeup_tests: disable: - - if: IDF_TARGET in ["esp32c5", "esp32p4", "linux"] + - if: IDF_TARGET in ["esp32c5", "esp32p4", "linux", "esp32c61"] diff --git a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/README.md b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/README.md +++ b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/CMakeLists.txt b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/CMakeLists.txt index 26c3f712a80..5bd97e4951b 100644 --- a/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/CMakeLists.txt +++ b/components/esp_hw_support/test_apps/esp_hw_support_unity_tests/main/CMakeLists.txt @@ -1,7 +1,6 @@ set(srcs "test_app_main.c" "test_dport.c" "test_fp.c" - "test_intr_alloc.c" "test_dport_xt_highint5.S" "test_ds.c" "test_hmac.c" @@ -21,6 +20,10 @@ if(CONFIG_SOC_ETM_SUPPORTED) list(APPEND srcs "test_etm_core.c") endif() +if(CONFIG_SOC_GPTIMER_SUPPORTED) + list(APPEND SRC "test_intr_alloc.c") +endif() + # In order for the cases defined by `TEST_CASE` to be linked into the final elf, # the component can be registered as WHOLE_ARCHIVE idf_component_register(SRCS ${srcs} diff --git a/components/esp_mm/test_apps/mm/README.md b/components/esp_mm/test_apps/mm/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/esp_mm/test_apps/mm/README.md +++ b/components/esp_mm/test_apps/mm/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_mm/test_apps/mmap_hw/README.md b/components/esp_mm/test_apps/mmap_hw/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/esp_mm/test_apps/mmap_hw/README.md +++ b/components/esp_mm/test_apps/mmap_hw/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_netif/test_apps/test_app_esp_netif/README.md b/components/esp_netif/test_apps/test_app_esp_netif/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/esp_netif/test_apps/test_app_esp_netif/README.md +++ b/components/esp_netif/test_apps/test_app_esp_netif/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_pm/test_apps/.build-test-rules.yml b/components/esp_pm/test_apps/.build-test-rules.yml index 67cf500b6ce..86afa715356 100644 --- a/components/esp_pm/test_apps/.build-test-rules.yml +++ b/components/esp_pm/test_apps/.build-test-rules.yml @@ -5,8 +5,8 @@ components/esp_pm/test_apps: - if: INCLUDE_DEFAULT == 1 disable: - if: CONFIG_NAME == "pm_pd_top_sleep" and IDF_TARGET not in ["esp32c6", "esp32h2", "esp32p4"] - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not support yet # TODO: [ESP32C5] IDF-8643 + reason: not support yet # TODO: [ESP32C5] IDF-8643, [ESP32C61] IDF-9250 depends_components: - esp_pm diff --git a/components/esp_rom/test_apps/rom_tests/README.md b/components/esp_rom/test_apps/rom_tests/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/esp_rom/test_apps/rom_tests/README.md +++ b/components/esp_rom/test_apps/rom_tests/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_system/Kconfig b/components/esp_system/Kconfig index 870ab3cf0cc..5a64617fed7 100644 --- a/components/esp_system/Kconfig +++ b/components/esp_system/Kconfig @@ -323,6 +323,7 @@ menu "ESP System Settings" default 21 if IDF_TARGET_ESP32C3 default 10 if IDF_TARGET_ESP32C5 default 16 if IDF_TARGET_ESP32C6 + default 5 if IDF_TARGET_ESP32C61 default 37 if IDF_TARGET_ESP32P4 default 24 if IDF_TARGET_ESP32H2 default 43 @@ -342,6 +343,7 @@ menu "ESP System Settings" default 20 if IDF_TARGET_ESP32C3 default 11 if IDF_TARGET_ESP32C5 default 17 if IDF_TARGET_ESP32C6 + default 4 if IDF_TARGET_ESP32C61 default 38 if IDF_TARGET_ESP32P4 default 23 if IDF_TARGET_ESP32H2 default 44 diff --git a/components/esp_system/test_apps/console/README.md b/components/esp_system/test_apps/console/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/esp_system/test_apps/console/README.md +++ b/components/esp_system/test_apps/console/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_system/test_apps/esp_system_unity_tests/README.md b/components/esp_system/test_apps/esp_system_unity_tests/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/esp_system/test_apps/esp_system_unity_tests/README.md +++ b/components/esp_system/test_apps/esp_system_unity_tests/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_system/test_apps/esp_system_unity_tests/main/CMakeLists.txt b/components/esp_system/test_apps/esp_system_unity_tests/main/CMakeLists.txt index 0e7335e2f42..94141c53ab3 100644 --- a/components/esp_system/test_apps/esp_system_unity_tests/main/CMakeLists.txt +++ b/components/esp_system/test_apps/esp_system_unity_tests/main/CMakeLists.txt @@ -8,7 +8,6 @@ set(requires "unity" set(SRC "test_app_main.c" "test_backtrace.c" - "test_delay.c" "test_ipc.c" "test_reset_reason.c" "test_shared_stack_printf.c" @@ -21,6 +20,10 @@ if(CONFIG_SOC_SYSTIMER_SUPPORT_ETM) list(APPEND SRC "test_systick_etm.c") endif() +if(CONFIG_SOC_GPTIMER_SUPPORTED) + list(APPEND SRC "test_delay.c") +endif() + if(CONFIG_ESP_IPC_ISR_ENABLE) list(APPEND SRC "test_ipc_isr.c") if(CONFIG_IDF_TARGET_ARCH_XTENSA) diff --git a/components/esp_timer/test_apps/README.md b/components/esp_timer/test_apps/README.md index 351f5fdebc7..7b4730e9190 100644 --- a/components/esp_timer/test_apps/README.md +++ b/components/esp_timer/test_apps/README.md @@ -1,3 +1,3 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_timer/test_apps/main/CMakeLists.txt b/components/esp_timer/test_apps/main/CMakeLists.txt index 15fc56ac952..c89a9424fc2 100644 --- a/components/esp_timer/test_apps/main/CMakeLists.txt +++ b/components/esp_timer/test_apps/main/CMakeLists.txt @@ -1,4 +1,7 @@ -set(srcs "test_app_main.c" "test_esp_timer.c" "test_ets_timer.c") +set(srcs + "test_app_main.c" + "test_ets_timer.c" +) if(CONFIG_SOC_LIGHT_SLEEP_SUPPORTED) list(APPEND srcs "test_esp_timer_light_sleep.c") @@ -8,6 +11,10 @@ if(CONFIG_SOC_SYSTIMER_SUPPORT_ETM) list(APPEND srcs "test_esp_timer_etm.c") endif() +if(CONFIG_SOC_GPTIMER_SUPPORTED) + list(APPEND srcs "test_esp_timer.c") +endif() + idf_component_register(SRCS ${srcs} PRIV_INCLUDE_DIRS "../../private_include" PRIV_REQUIRES cmock test_utils esp_timer spi_flash esp_psram esp_driver_gpio diff --git a/components/fatfs/test_apps/.build-test-rules.yml b/components/fatfs/test_apps/.build-test-rules.yml index 25c58d1f479..5aae749df65 100644 --- a/components/fatfs/test_apps/.build-test-rules.yml +++ b/components/fatfs/test_apps/.build-test-rules.yml @@ -24,9 +24,9 @@ components/fatfs/test_apps/flash_wl: components/fatfs/test_apps/sdcard: disable: - - if: IDF_TARGET in ["esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: target esp32p4, esp32c5 is not supported yet # TODO: [ESP32P4] IDF-7501 [ESP32C5] IDF-8704 + reason: target esp32p4, esp32c5 is not supported yet # TODO: [ESP32P4] IDF-7501 [ESP32C5] IDF-8704, [esp32c61] IDF-9305 disable_test: - if: IDF_TARGET not in ["esp32", "esp32c3"] temporary: true diff --git a/components/fatfs/test_apps/flash_ro/README.md b/components/fatfs/test_apps/flash_ro/README.md index 6bf7583055f..4a52ff36d78 100644 --- a/components/fatfs/test_apps/flash_ro/README.md +++ b/components/fatfs/test_apps/flash_ro/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | This test app runs a few FATFS test cases in a read-only FAT partition. diff --git a/components/fatfs/test_apps/flash_wl/README.md b/components/fatfs/test_apps/flash_wl/README.md index e7a249990cf..98a0aeec71a 100644 --- a/components/fatfs/test_apps/flash_wl/README.md +++ b/components/fatfs/test_apps/flash_wl/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | This test app runs a few FATFS test cases in a wear levelling FAT partition. diff --git a/components/freertos/test_apps/.build-test-rules.yml b/components/freertos/test_apps/.build-test-rules.yml index 44a3a7d585e..369f14081df 100644 --- a/components/freertos/test_apps/.build-test-rules.yml +++ b/components/freertos/test_apps/.build-test-rules.yml @@ -5,6 +5,9 @@ components/freertos/test_apps/freertos: - if: CONFIG_NAME == "smp" and IDF_TARGET == "esp32p4" temporary: true reason: target(s) not supported yet + - if: IDF_TARGET in ["esp32c61"] + temporary: true + reason: target(s) not supported yet # TODO: [esp32c61] IDF-9280 disable_test: - if: CONFIG_NAME == "smp" and IDF_TARGET == "esp32c5" temporary: true diff --git a/components/hal/test_apps/crypto/README.md b/components/hal/test_apps/crypto/README.md index 21c9f846185..4e2c6f4f57a 100644 --- a/components/hal/test_apps/crypto/README.md +++ b/components/hal/test_apps/crypto/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | ## Crypto peripherals test diff --git a/components/heap/test_apps/.build-test-rules.yml b/components/heap/test_apps/.build-test-rules.yml index 1e3b8ecd8cf..ca893a4ba41 100644 --- a/components/heap/test_apps/.build-test-rules.yml +++ b/components/heap/test_apps/.build-test-rules.yml @@ -3,6 +3,9 @@ components/heap/test_apps/heap_tests: disable: - if: IDF_TARGET == "linux" + - if: IDF_TARGET in ["esp32c61"] + temporary: true + reason: not support yet # TODO: [esp32c61] IDF-9858 - if: CONFIG_NAME == "psram" and SOC_SPIRAM_SUPPORTED != 1 - if: CONFIG_NAME == "psram_all_ext" and SOC_SPIRAM_SUPPORTED != 1 # These 3 configs are build only for non-nightly, buildig for a single target is sufficient diff --git a/components/lwip/test_apps/README.md b/components/lwip/test_apps/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/lwip/test_apps/README.md +++ b/components/lwip/test_apps/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/mbedtls/test_apps/README.md b/components/mbedtls/test_apps/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/mbedtls/test_apps/README.md +++ b/components/mbedtls/test_apps/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/newlib/test_apps/.build-test-rules.yml b/components/newlib/test_apps/.build-test-rules.yml index 8383b02ebce..bbd175f8a1e 100644 --- a/components/newlib/test_apps/.build-test-rules.yml +++ b/components/newlib/test_apps/.build-test-rules.yml @@ -1,3 +1,7 @@ # Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps components/newlib/test_apps/newlib: + disable: + - if: IDF_TARGET in ["esp32c61"] + temporary: true + reason: not supported yet # TODO: [esp32c61] IDF-9284 diff --git a/components/newlib/test_apps/newlib/main/test_time.c b/components/newlib/test_apps/newlib/main/test_time.c index 584b6588802..3c8929a6501 100644 --- a/components/newlib/test_apps/newlib/main/test_time.c +++ b/components/newlib/test_apps/newlib/main/test_time.c @@ -39,6 +39,8 @@ #include "esp32c2/rtc.h" #elif CONFIG_IDF_TARGET_ESP32C6 #include "esp32c6/rtc.h" +#elif CONFIG_IDF_TARGET_ESP32C61 +#include "esp32c61/rtc.h" #elif CONFIG_IDF_TARGET_ESP32H2 #include "esp32h2/rtc.h" #elif CONFIG_IDF_TARGET_ESP32P4 diff --git a/components/nvs_flash/test_apps/README.md b/components/nvs_flash/test_apps/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/nvs_flash/test_apps/README.md +++ b/components/nvs_flash/test_apps/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/protocomm/test_apps/README.md b/components/protocomm/test_apps/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/protocomm/test_apps/README.md +++ b/components/protocomm/test_apps/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/pthread/test_apps/pthread_unity_tests/README.md b/components/pthread/test_apps/pthread_unity_tests/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/pthread/test_apps/pthread_unity_tests/README.md +++ b/components/pthread/test_apps/pthread_unity_tests/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in index 43920c58115..0cb5341d2f4 100644 --- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in @@ -219,138 +219,14 @@ config SOC_DEDIC_PERIPH_ALWAYS_ENABLE bool default y -config SOC_I2C_NUM - int - default 1 - -config SOC_HP_I2C_NUM - int - default 1 - -config SOC_I2C_FIFO_LEN - int - default 32 - -config SOC_I2C_CMD_REG_NUM - int - default 8 - -config SOC_I2C_SUPPORT_SLAVE - bool - default y - -config SOC_I2C_SUPPORT_HW_FSM_RST - bool - default y - -config SOC_I2C_SUPPORT_HW_CLR_BUS - bool - default y - -config SOC_I2C_SUPPORT_XTAL - bool - default y - -config SOC_I2C_SUPPORT_RTC - bool - default y - -config SOC_I2C_SUPPORT_10BIT_ADDR - bool - default y - -config SOC_I2C_SLAVE_SUPPORT_BROADCAST - bool - default y - -config SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE - bool - default y - -config SOC_I2C_SLAVE_SUPPORT_I2CRAM_ACCESS - bool - default y - -config SOC_I2C_SLAVE_SUPPORT_SLAVE_UNMATCH - bool - default y - -config SOC_LP_I2C_NUM - int - default 1 - -config SOC_LP_I2C_FIFO_LEN - int - default 16 - -config SOC_I2S_NUM - int - default 1 - -config SOC_I2S_HW_VERSION_2 - bool - default y - -config SOC_I2S_SUPPORTS_XTAL - bool - default y - -config SOC_I2S_SUPPORTS_PLL_F160M - bool - default y - -config SOC_I2S_SUPPORTS_PCM - bool - default y - -config SOC_I2S_SUPPORTS_PDM - bool - default y - -config SOC_I2S_SUPPORTS_PDM_TX - bool - default y - -config SOC_I2S_PDM_MAX_TX_LINES - int - default 2 - -config SOC_I2S_SUPPORTS_TDM - bool - default y - config SOC_LEDC_SUPPORT_PLL_DIV_CLOCK bool default y -config SOC_LEDC_SUPPORT_XTAL_CLOCK - bool - default y - config SOC_LEDC_CHANNEL_NUM int default 6 -config SOC_LEDC_TIMER_BIT_WIDTH - int - default 20 - -config SOC_LEDC_SUPPORT_FADE_STOP - bool - default y - -config SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED - bool - default y - -config SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX - int - default 16 - -config SOC_LEDC_FADE_PARAMS_BIT_WIDTH - int - default 10 - config SOC_MMU_PAGE_SIZE_CONFIGURABLE bool default y @@ -387,78 +263,6 @@ config SOC_MPU_REGION_WO_SUPPORTED bool default n -config SOC_PCNT_GROUPS - int - default 1 - -config SOC_PCNT_UNITS_PER_GROUP - int - default 4 - -config SOC_PCNT_CHANNELS_PER_UNIT - int - default 2 - -config SOC_PCNT_THRES_POINT_PER_UNIT - int - default 2 - -config SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE - bool - default y - -config SOC_MCPWM_GROUPS - int - default 1 - -config SOC_MCPWM_TIMERS_PER_GROUP - int - default 3 - -config SOC_MCPWM_OPERATORS_PER_GROUP - int - default 3 - -config SOC_MCPWM_COMPARATORS_PER_OPERATOR - int - default 2 - -config SOC_MCPWM_GENERATORS_PER_OPERATOR - int - default 2 - -config SOC_MCPWM_TRIGGERS_PER_OPERATOR - int - default 2 - -config SOC_MCPWM_GPIO_FAULTS_PER_GROUP - int - default 3 - -config SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP - bool - default y - -config SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER - int - default 3 - -config SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP - int - default 3 - -config SOC_MCPWM_SWSYNC_CAN_PROPAGATE - bool - default y - -config SOC_MCPWM_SUPPORT_ETM - bool - default y - -config SOC_MCPWM_CAPTURE_CLK_FROM_GROUP - bool - default y - config SOC_MPI_MEM_BLOCKS_NUM int default 4 @@ -471,34 +275,6 @@ config SOC_RSA_MAX_BIT_LEN int default 3072 -config SOC_SHA_DMA_MAX_BUFFER_SIZE - int - default 3968 - -config SOC_SHA_SUPPORT_DMA - bool - default y - -config SOC_SHA_SUPPORT_RESUME - bool - default y - -config SOC_SHA_GDMA - bool - default y - -config SOC_SHA_SUPPORT_SHA1 - bool - default y - -config SOC_SHA_SUPPORT_SHA224 - bool - default y - -config SOC_SHA_SUPPORT_SHA256 - bool - default y - config SOC_SPI_PERIPH_NUM int default 2 @@ -507,46 +283,10 @@ config SOC_SPI_MAX_CS_NUM int default 6 -config SOC_SPI_MAXIMUM_BUFFER_SIZE - int - default 64 - -config SOC_SPI_SUPPORT_DDRCLK - bool - default y - -config SOC_SPI_SLAVE_SUPPORT_SEG_TRANS - bool - default y - -config SOC_SPI_SUPPORT_CD_SIG - bool - default y - -config SOC_SPI_SUPPORT_CONTINUOUS_TRANS - bool - default y - -config SOC_SPI_SUPPORT_CLK_XTAL - bool - default y - -config SOC_SPI_SUPPORT_CLK_PLL_F80M - bool - default y - -config SOC_SPI_SUPPORT_CLK_RC_FAST - bool - default y - config SOC_MEMSPI_IS_INDEPENDENT bool default y -config SOC_SPI_MAX_PRE_DIVIDER - int - default 16 - config SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE bool default y @@ -619,10 +359,6 @@ config SOC_SYSTIMER_ALARM_MISS_COMPENSATE bool default y -config SOC_SYSTIMER_SUPPORT_ETM - bool - default y - config SOC_LP_TIMER_BIT_WIDTH_LO int default 32 @@ -639,47 +375,15 @@ config SOC_TIMER_GROUP_TIMERS_PER_GROUP int default 1 -config SOC_TIMER_GROUP_COUNTER_BIT_WIDTH - int - default 54 - -config SOC_TIMER_GROUP_SUPPORT_XTAL - bool - default y - -config SOC_TIMER_GROUP_SUPPORT_RC_FAST - bool - default y - config SOC_TIMER_GROUP_TOTAL_TIMERS int default 2 -config SOC_TIMER_SUPPORT_ETM - bool - default y - -config SOC_MWDT_SUPPORT_XTAL - bool - default y - -config SOC_TWAI_CONTROLLER_NUM - int - default 2 - -config SOC_TWAI_CLK_SUPPORT_XTAL - bool - default y - -config SOC_TWAI_BRP_MIN - int - default 2 - -config SOC_TWAI_BRP_MAX +config SOC_TIMER_GROUP_COUNTER_BIT_WIDTH int - default 32768 + default 54 -config SOC_TWAI_SUPPORTS_RX_STATUS +config SOC_TIMER_GROUP_SUPPORT_XTAL bool default y @@ -879,10 +583,6 @@ config SOC_PM_PAU_LINK_NUM int default 4 -config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION - bool - default y - config SOC_MODEM_CLOCK_IS_INDEPENDENT bool default y @@ -903,42 +603,6 @@ config SOC_RCC_IS_INDEPENDENT bool default y -config SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC - bool - default y - -config SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL - bool - default y - -config SOC_TEMPERATURE_SENSOR_INTR_SUPPORT - bool - default y - -config SOC_WIFI_HW_TSF - bool - default y - -config SOC_WIFI_FTM_SUPPORT - bool - default n - -config SOC_WIFI_GCMP_SUPPORT - bool - default y - -config SOC_WIFI_WAPI_SUPPORT - bool - default y - -config SOC_WIFI_CSI_SUPPORT - bool - default y - -config SOC_WIFI_HE_SUPPORT - bool - default y - config SOC_PHY_COMBO_MODULE bool default y diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index 1a38385826f..2f1e6eaa622 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -231,50 +231,51 @@ /*-------------------------- I2C CAPS ----------------------------------------*/ // ESP32-C61 has 1 I2C -#define SOC_I2C_NUM (1U) -#define SOC_HP_I2C_NUM (1U) +// #define SOC_I2C_NUM (1U) +// #define SOC_HP_I2C_NUM (1U) -#define SOC_I2C_FIFO_LEN (32) /*!< I2C hardware FIFO depth */ -#define SOC_I2C_CMD_REG_NUM (8) /*!< Number of I2C command registers */ -#define SOC_I2C_SUPPORT_SLAVE (1) +// #define SOC_I2C_FIFO_LEN (32) /*!< I2C hardware FIFO depth */ +// #define SOC_I2C_CMD_REG_NUM (8) /*!< Number of I2C command registers */ +// #define SOC_I2C_SUPPORT_SLAVE (1) -#define SOC_I2C_SUPPORT_HW_FSM_RST (1) -#define SOC_I2C_SUPPORT_HW_CLR_BUS (1) +// #define SOC_I2C_SUPPORT_HW_FSM_RST (1) +// #define SOC_I2C_SUPPORT_HW_CLR_BUS (1) -#define SOC_I2C_SUPPORT_XTAL (1) -#define SOC_I2C_SUPPORT_RTC (1) -#define SOC_I2C_SUPPORT_10BIT_ADDR (1) -#define SOC_I2C_SLAVE_SUPPORT_BROADCAST (1) -#define SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE (1) -#define SOC_I2C_SLAVE_SUPPORT_I2CRAM_ACCESS (1) -#define SOC_I2C_SLAVE_SUPPORT_SLAVE_UNMATCH (1) +// #define SOC_I2C_SUPPORT_XTAL (1) +// #define SOC_I2C_SUPPORT_RTC (1) +// #define SOC_I2C_SUPPORT_10BIT_ADDR (1) +// #define SOC_I2C_SLAVE_SUPPORT_BROADCAST (1) +// #define SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE (1) +// #define SOC_I2C_SLAVE_SUPPORT_I2CRAM_ACCESS (1) +// #define SOC_I2C_SLAVE_SUPPORT_SLAVE_UNMATCH (1) /*-------------------------- LP_I2C CAPS -------------------------------------*/ // ESP32-C61 has 1 LP_I2C -#define SOC_LP_I2C_NUM (1U) +// #define SOC_LP_I2C_NUM (1U) -#define SOC_LP_I2C_FIFO_LEN (16) /*!< LP_I2C hardware FIFO depth */ +// #define SOC_LP_I2C_FIFO_LEN (16) /*!< LP_I2C hardware FIFO depth */ -/*-------------------------- I2S CAPS ----------------------------------------*/ -#define SOC_I2S_NUM (1U) -#define SOC_I2S_HW_VERSION_2 (1) -#define SOC_I2S_SUPPORTS_XTAL (1) -#define SOC_I2S_SUPPORTS_PLL_F160M (1) -#define SOC_I2S_SUPPORTS_PCM (1) -#define SOC_I2S_SUPPORTS_PDM (1) -#define SOC_I2S_SUPPORTS_PDM_TX (1) -#define SOC_I2S_PDM_MAX_TX_LINES (2) -#define SOC_I2S_SUPPORTS_TDM (1) +// /*-------------------------- I2S CAPS ----------------------------------------*/ +// #define SOC_I2S_NUM (1U) +// #define SOC_I2S_HW_VERSION_2 (1) +// #define SOC_I2S_SUPPORTS_XTAL (1) +// #define SOC_I2S_SUPPORTS_PLL_F160M (1) +// #define SOC_I2S_SUPPORTS_PCM (1) +// #define SOC_I2S_SUPPORTS_PDM (1) +// #define SOC_I2S_SUPPORTS_PDM_TX (1) +// #define SOC_I2S_PDM_MAX_TX_LINES (2) +// #define SOC_I2S_SUPPORTS_TDM (1) /*-------------------------- LEDC CAPS ---------------------------------------*/ +//TODO: [ESP32C61] IDF-9291 #define SOC_LEDC_SUPPORT_PLL_DIV_CLOCK (1) -#define SOC_LEDC_SUPPORT_XTAL_CLOCK (1) +// #define SOC_LEDC_SUPPORT_XTAL_CLOCK (1) #define SOC_LEDC_CHANNEL_NUM (6) -#define SOC_LEDC_TIMER_BIT_WIDTH (20) -#define SOC_LEDC_SUPPORT_FADE_STOP (1) -#define SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED (1) -#define SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX (16) -#define SOC_LEDC_FADE_PARAMS_BIT_WIDTH (10) +// #define SOC_LEDC_TIMER_BIT_WIDTH (20) +// #define SOC_LEDC_SUPPORT_FADE_STOP (1) +// #define SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED (1) +// #define SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX (16) +// #define SOC_LEDC_FADE_PARAMS_BIT_WIDTH (10) /*-------------------------- MMU CAPS ----------------------------------------*/ #define SOC_MMU_PAGE_SIZE_CONFIGURABLE (1) @@ -290,26 +291,26 @@ #define SOC_MPU_REGION_WO_SUPPORTED 0 /*-------------------------- PCNT CAPS ---------------------------------------*/ -#define SOC_PCNT_GROUPS 1U -#define SOC_PCNT_UNITS_PER_GROUP 4 -#define SOC_PCNT_CHANNELS_PER_UNIT 2 -#define SOC_PCNT_THRES_POINT_PER_UNIT 2 -#define SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE 1 +// #define SOC_PCNT_GROUPS 1U +// #define SOC_PCNT_UNITS_PER_GROUP 4 +// #define SOC_PCNT_CHANNELS_PER_UNIT 2 +// #define SOC_PCNT_THRES_POINT_PER_UNIT 2 +// #define SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE 1 /*-------------------------- MCPWM CAPS --------------------------------------*/ -#define SOC_MCPWM_GROUPS (1U) ///< 1 MCPWM groups on the chip (i.e., the number of independent MCPWM peripherals) -#define SOC_MCPWM_TIMERS_PER_GROUP (3) ///< The number of timers that each group has -#define SOC_MCPWM_OPERATORS_PER_GROUP (3) ///< The number of operators that each group has -#define SOC_MCPWM_COMPARATORS_PER_OPERATOR (2) ///< The number of comparators that each operator has -#define SOC_MCPWM_GENERATORS_PER_OPERATOR (2) ///< The number of generators that each operator has -#define SOC_MCPWM_TRIGGERS_PER_OPERATOR (2) ///< The number of triggers that each operator has -#define SOC_MCPWM_GPIO_FAULTS_PER_GROUP (3) ///< The number of fault signal detectors that each group has -#define SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP (1) ///< The number of capture timers that each group has -#define SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER (3) ///< The number of capture channels that each capture timer has -#define SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP (3) ///< The number of GPIO synchros that each group has -#define SOC_MCPWM_SWSYNC_CAN_PROPAGATE (1) ///< Software sync event can be routed to its output -#define SOC_MCPWM_SUPPORT_ETM (1) ///< Support ETM (Event Task Matrix) -#define SOC_MCPWM_CAPTURE_CLK_FROM_GROUP (1) ///< Capture timer shares clock with other PWM timers +// #define SOC_MCPWM_GROUPS (1U) ///< 1 MCPWM groups on the chip (i.e., the number of independent MCPWM peripherals) +// #define SOC_MCPWM_TIMERS_PER_GROUP (3) ///< The number of timers that each group has +// #define SOC_MCPWM_OPERATORS_PER_GROUP (3) ///< The number of operators that each group has +// #define SOC_MCPWM_COMPARATORS_PER_OPERATOR (2) ///< The number of comparators that each operator has +// #define SOC_MCPWM_GENERATORS_PER_OPERATOR (2) ///< The number of generators that each operator has +// #define SOC_MCPWM_TRIGGERS_PER_OPERATOR (2) ///< The number of triggers that each operator has +// #define SOC_MCPWM_GPIO_FAULTS_PER_GROUP (3) ///< The number of fault signal detectors that each group has +// #define SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP (1) ///< The number of capture timers that each group has +// #define SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER (3) ///< The number of capture channels that each capture timer has +// #define SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP (3) ///< The number of GPIO synchros that each group has +// #define SOC_MCPWM_SWSYNC_CAN_PROPAGATE (1) ///< Software sync event can be routed to its output +// #define SOC_MCPWM_SUPPORT_ETM (1) ///< Support ETM (Event Task Matrix) +// #define SOC_MCPWM_CAPTURE_CLK_FROM_GROUP (1) ///< Capture timer shares clock with other PWM timers /*------------------------ USB SERIAL JTAG CAPS ------------------------------*/ // \#define SOC_USB_SERIAL_JTAG_SUPPORT_LIGHT_SLEEP (1) /*!< Support to maintain minimum usb communication during light sleep */ // TODO: IDF-6395 @@ -329,42 +330,42 @@ for SHA this means that the biggest safe amount of bytes is 31 blocks of 128 bytes = 3968 */ -#define SOC_SHA_DMA_MAX_BUFFER_SIZE (3968) -#define SOC_SHA_SUPPORT_DMA (1) +// #define SOC_SHA_DMA_MAX_BUFFER_SIZE (3968) +// #define SOC_SHA_SUPPORT_DMA (1) -/* The SHA engine is able to resume hashing from a user */ -#define SOC_SHA_SUPPORT_RESUME (1) +// /* The SHA engine is able to resume hashing from a user */ +// #define SOC_SHA_SUPPORT_RESUME (1) -/* Has a centralized DMA, which is shared with all peripherals */ -#define SOC_SHA_GDMA (1) +// /* Has a centralized DMA, which is shared with all peripherals */ +// #define SOC_SHA_GDMA (1) -/* Supported HW algorithms */ -#define SOC_SHA_SUPPORT_SHA1 (1) -#define SOC_SHA_SUPPORT_SHA224 (1) -#define SOC_SHA_SUPPORT_SHA256 (1) +// /* Supported HW algorithms */ +// #define SOC_SHA_SUPPORT_SHA1 (1) +// #define SOC_SHA_SUPPORT_SHA224 (1) +// #define SOC_SHA_SUPPORT_SHA256 (1) /*-------------------------- SPI CAPS ----------------------------------------*/ #define SOC_SPI_PERIPH_NUM 2 #define SOC_SPI_PERIPH_CS_NUM(i) 6 #define SOC_SPI_MAX_CS_NUM 6 -#define SOC_SPI_MAXIMUM_BUFFER_SIZE 64 +// #define SOC_SPI_MAX_PRE_DIVIDER 16 +// #define SOC_SPI_MAXIMUM_BUFFER_SIZE 64 -#define SOC_SPI_SUPPORT_DDRCLK 1 -#define SOC_SPI_SLAVE_SUPPORT_SEG_TRANS 1 -#define SOC_SPI_SUPPORT_CD_SIG 1 -#define SOC_SPI_SUPPORT_CONTINUOUS_TRANS 1 +// #define SOC_SPI_SUPPORT_DDRCLK 1 +// #define SOC_SPI_SLAVE_SUPPORT_SEG_TRANS 1 +// #define SOC_SPI_SUPPORT_CD_SIG 1 +// #define SOC_SPI_SUPPORT_CONTINUOUS_TRANS 1 // #define SOC_SPI_SUPPORT_SLAVE_HD_VER2 1 // TODO : [ESP32C61] IDF-9301 -#define SOC_SPI_SUPPORT_CLK_XTAL 1 -#define SOC_SPI_SUPPORT_CLK_PLL_F80M 1 -#define SOC_SPI_SUPPORT_CLK_RC_FAST 1 +// #define SOC_SPI_SUPPORT_CLK_XTAL 1 +// #define SOC_SPI_SUPPORT_CLK_PLL_F80M 1 +// #define SOC_SPI_SUPPORT_CLK_RC_FAST 1 -// Peripheral supports DIO, DOUT, QIO, or QOUT -// host_id = 0 -> SPI0/SPI1, host_id = 1 -> SPI2, +// // Peripheral supports DIO, DOUT, QIO, or QOUT +// // host_id = 0 -> SPI0/SPI1, host_id = 1 -> SPI2, #define SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(host_id) ({(void)host_id; 1;}) #define SOC_MEMSPI_IS_INDEPENDENT 1 -#define SOC_SPI_MAX_PRE_DIVIDER 16 /*-------------------------- SPI MEM CAPS ---------------------------------------*/ #define SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE (1) @@ -388,7 +389,7 @@ #define SOC_SYSTIMER_SUPPORT_RC_FAST 1 // Systimer can use RC_FAST clock source #define SOC_SYSTIMER_INT_LEVEL 1 // Systimer peripheral uses level interrupt #define SOC_SYSTIMER_ALARM_MISS_COMPENSATE 1 // Systimer peripheral can generate interrupt immediately if t(target) > t(current) -#define SOC_SYSTIMER_SUPPORT_ETM 1 // Systimer comparator can generate ETM event +// #define SOC_SYSTIMER_SUPPORT_ETM 1 // Systimer comparator can generate ETM event /*-------------------------- LP_TIMER CAPS ----------------------------------*/ #define SOC_LP_TIMER_BIT_WIDTH_LO 32 // Bit width of lp_timer low part @@ -397,21 +398,21 @@ /*--------------------------- TIMER GROUP CAPS ---------------------------------------*/ #define SOC_TIMER_GROUPS (2) #define SOC_TIMER_GROUP_TIMERS_PER_GROUP (1U) +#define SOC_TIMER_GROUP_TOTAL_TIMERS (2) #define SOC_TIMER_GROUP_COUNTER_BIT_WIDTH (54) #define SOC_TIMER_GROUP_SUPPORT_XTAL (1) -#define SOC_TIMER_GROUP_SUPPORT_RC_FAST (1) -#define SOC_TIMER_GROUP_TOTAL_TIMERS (2) -#define SOC_TIMER_SUPPORT_ETM (1) +// #define SOC_TIMER_GROUP_SUPPORT_RC_FAST (1) +// #define SOC_TIMER_SUPPORT_ETM (1) /*--------------------------- WATCHDOG CAPS ---------------------------------------*/ -#define SOC_MWDT_SUPPORT_XTAL (1) +// #define SOC_MWDT_SUPPORT_XTAL (1) /*-------------------------- TWAI CAPS ---------------------------------------*/ -#define SOC_TWAI_CONTROLLER_NUM 2 -#define SOC_TWAI_CLK_SUPPORT_XTAL 1 -#define SOC_TWAI_BRP_MIN 2 -#define SOC_TWAI_BRP_MAX 32768 -#define SOC_TWAI_SUPPORTS_RX_STATUS 1 +// #define SOC_TWAI_CONTROLLER_NUM 2 +// #define SOC_TWAI_CLK_SUPPORT_XTAL 1 +// #define SOC_TWAI_BRP_MIN 2 +// #define SOC_TWAI_BRP_MAX 32768 +// #define SOC_TWAI_SUPPORTS_RX_STATUS 1 /*-------------------------- eFuse CAPS----------------------------*/ @@ -501,7 +502,7 @@ #define SOC_PM_PAU_LINK_NUM (4) /*-------------------------- CLOCK SUBSYSTEM CAPS ----------------------------------------*/ -#define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1) +// #define SOC_CLK_RC_FAST_SUPPORT_CALIBRATION (1) //TODO: [ESP32C61] IDF-9249 #define SOC_MODEM_CLOCK_IS_INDEPENDENT (1) #define SOC_CLK_XTAL32K_SUPPORTED (1) /*!< Support to connect an external low frequency crystal */ @@ -511,18 +512,18 @@ #define SOC_RCC_IS_INDEPENDENT 1 /*!< Reset and Clock Control is independent, thanks to the PCR registers */ /*-------------------------- Temperature Sensor CAPS -------------------------------------*/ -#define SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC (1) -#define SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL (1) -#define SOC_TEMPERATURE_SENSOR_INTR_SUPPORT (1) +// #define SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC (1) +// #define SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL (1) +// #define SOC_TEMPERATURE_SENSOR_INTR_SUPPORT (1) /*------------------------------------ WI-FI CAPS ------------------------------------*/ -#define SOC_WIFI_HW_TSF (1) /*!< Support hardware TSF */ -#define SOC_WIFI_FTM_SUPPORT (0) /*!< Support FTM */ -#define SOC_WIFI_GCMP_SUPPORT (1) /*!< Support GCMP(GCMP128 and GCMP256) */ -#define SOC_WIFI_WAPI_SUPPORT (1) /*!< Support WAPI */ -#define SOC_WIFI_CSI_SUPPORT (1) /*!< Support CSI */ +// #define SOC_WIFI_HW_TSF (1) /*!< Support hardware TSF */ +// #define SOC_WIFI_FTM_SUPPORT (0) /*!< Support FTM */ +// #define SOC_WIFI_GCMP_SUPPORT (1) /*!< Support GCMP(GCMP128 and GCMP256) */ +// #define SOC_WIFI_WAPI_SUPPORT (1) /*!< Support WAPI */ +// #define SOC_WIFI_CSI_SUPPORT (1) /*!< Support CSI */ // #define SOC_WIFI_MESH_SUPPORT (1) /*!< Support WIFI MESH */ -#define SOC_WIFI_HE_SUPPORT (1) /*!< Support Wi-Fi 6 */ +// #define SOC_WIFI_HE_SUPPORT (1) /*!< Support Wi-Fi 6 */ /*---------------------------------- Bluetooth CAPS ----------------------------------*/ // \#define SOC_BLE_SUPPORTED (1) /*!< Support Bluetooth Low Energy hardware */ diff --git a/components/spi_flash/test_apps/.build-test-rules.yml b/components/spi_flash/test_apps/.build-test-rules.yml index a580b216a39..e24939c79b0 100644 --- a/components/spi_flash/test_apps/.build-test-rules.yml +++ b/components/spi_flash/test_apps/.build-test-rules.yml @@ -2,9 +2,9 @@ components/spi_flash/test_apps/esp_flash: disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not support yet # TODO: [ESP32C5] IDF-8715 + reason: not support yet # TODO: [ESP32C5] IDF-8715, [esp32c61] IDF-9314 depends_filepatterns: - components/bootloader_support/bootloader_flash/**/* depends_components: @@ -39,6 +39,9 @@ components/spi_flash/test_apps/flash_mmap: components/spi_flash/test_apps/flash_suspend: disable: - if: SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND != 1 + - if: IDF_TARGET == "esp32c61" + temporary: true + reason: not support yet # TODO: [ESP32C61] IDF-9255 disable_test: - if: IDF_TARGET != "esp32c3" temporary: true @@ -49,9 +52,9 @@ components/spi_flash/test_apps/flash_suspend: components/spi_flash/test_apps/mspi_test: disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not support yet # TODO: [ESP32C5] IDF-8715 + reason: not support yet # TODO: [ESP32C5] IDF-8715, [esp32c61] IDF9316 - if: CONFIG_NAME == "psram" and SOC_SPIRAM_SUPPORTED != 1 - if: CONFIG_NAME == "xip_psram" and SOC_SPIRAM_SUPPORTED != 1 - if: CONFIG_NAME == "psram" and IDF_TARGET in ["esp32p4"] diff --git a/components/spi_flash/test_apps/esp_flash_stress/README.md b/components/spi_flash/test_apps/esp_flash_stress/README.md index bf47d80ec64..fb8e4a96b8b 100644 --- a/components/spi_flash/test_apps/esp_flash_stress/README.md +++ b/components/spi_flash/test_apps/esp_flash_stress/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/spi_flash/test_apps/flash_encryption/README.md b/components/spi_flash/test_apps/flash_encryption/README.md index 458eaae0927..d7952e0d44a 100644 --- a/components/spi_flash/test_apps/flash_encryption/README.md +++ b/components/spi_flash/test_apps/flash_encryption/README.md @@ -1,6 +1,6 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | ## Prepare runner -To prepare flash encryption tunner, you can run `encrypt_flash.sh`. Note that doing so will burn efuses. \ No newline at end of file +To prepare flash encryption tunner, you can run `encrypt_flash.sh`. Note that doing so will burn efuses. diff --git a/components/spi_flash/test_apps/flash_mmap/README.md b/components/spi_flash/test_apps/flash_mmap/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/spi_flash/test_apps/flash_mmap/README.md +++ b/components/spi_flash/test_apps/flash_mmap/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/spiffs/test_apps/README.md b/components/spiffs/test_apps/README.md index 16fcfff0ebe..c67bed143cc 100644 --- a/components/spiffs/test_apps/README.md +++ b/components/spiffs/test_apps/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | This is a test app for spiffs component. diff --git a/components/tcp_transport/test_apps/README.md b/components/tcp_transport/test_apps/README.md index 3a502b1f86f..7b96141437e 100644 --- a/components/tcp_transport/test_apps/README.md +++ b/components/tcp_transport/test_apps/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/components/vfs/test_apps/.build-test-rules.yml b/components/vfs/test_apps/.build-test-rules.yml index a9145fd4c37..5a050d00c46 100644 --- a/components/vfs/test_apps/.build-test-rules.yml +++ b/components/vfs/test_apps/.build-test-rules.yml @@ -1,8 +1,8 @@ components/vfs/test_apps: disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not support yet # TODO: [ESP32C5] IDF-8704 + reason: not support yet # TODO: [ESP32C5] IDF-8704, [esp32c61] IDF-9305 disable_test: - if: IDF_TARGET not in ["esp32", "esp32c2", "esp32c3", "esp32c6", "esp32h2", "esp32s3"] temporary: true diff --git a/examples/build_system/cmake/component_manager/README.md b/examples/build_system/cmake/component_manager/README.md index 974a423556b..8d152f35b8d 100644 --- a/examples/build_system/cmake/component_manager/README.md +++ b/examples/build_system/cmake/component_manager/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Using the component manager for downloading dependencies diff --git a/examples/build_system/cmake/import_lib/README.md b/examples/build_system/cmake/import_lib/README.md index 10dc2b05222..8db29368fe6 100644 --- a/examples/build_system/cmake/import_lib/README.md +++ b/examples/build_system/cmake/import_lib/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Import Third-Party CMake Library Example diff --git a/examples/build_system/cmake/import_prebuilt/README.md b/examples/build_system/cmake/import_prebuilt/README.md index a9ec1e4d9a0..1adcadaa4ab 100644 --- a/examples/build_system/cmake/import_prebuilt/README.md +++ b/examples/build_system/cmake/import_prebuilt/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Import Prebuilt Library Example diff --git a/examples/build_system/cmake/multi_config/README.md b/examples/build_system/cmake/multi_config/README.md index fbaa5ff6041..12333e5afa0 100644 --- a/examples/build_system/cmake/multi_config/README.md +++ b/examples/build_system/cmake/multi_config/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Multiple Build Configurations Example diff --git a/examples/build_system/cmake/plugins/README.md b/examples/build_system/cmake/plugins/README.md index bbcceb724ba..331e8e115ea 100644 --- a/examples/build_system/cmake/plugins/README.md +++ b/examples/build_system/cmake/plugins/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Link Time Plugins Registration diff --git a/examples/build_system/wrappers/README.md b/examples/build_system/wrappers/README.md index 41967272940..08b91a4c09e 100644 --- a/examples/build_system/wrappers/README.md +++ b/examples/build_system/wrappers/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Using wrapper to redefine IDF functions diff --git a/examples/custom_bootloader/bootloader_hooks/README.md b/examples/custom_bootloader/bootloader_hooks/README.md index 3ba822f5251..28f704496de 100644 --- a/examples/custom_bootloader/bootloader_hooks/README.md +++ b/examples/custom_bootloader/bootloader_hooks/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Bootloader hooks diff --git a/examples/custom_bootloader/bootloader_override/README.md b/examples/custom_bootloader/bootloader_override/README.md index 03a20611b21..78d15e06b7f 100644 --- a/examples/custom_bootloader/bootloader_override/README.md +++ b/examples/custom_bootloader/bootloader_override/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Bootloader override diff --git a/examples/cxx/exceptions/README.md b/examples/cxx/exceptions/README.md index e6fe8053647..f95a0f95242 100644 --- a/examples/cxx/exceptions/README.md +++ b/examples/cxx/exceptions/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Example: C++ exception handling diff --git a/examples/cxx/pthread/README.md b/examples/cxx/pthread/README.md index 5620cb083f4..73d7429080e 100644 --- a/examples/cxx/pthread/README.md +++ b/examples/cxx/pthread/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # C++ pthread Example diff --git a/examples/cxx/rtti/README.md b/examples/cxx/rtti/README.md index 3d0bb0d36e0..c61170f09ea 100644 --- a/examples/cxx/rtti/README.md +++ b/examples/cxx/rtti/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Example: C++ run-time type info (RTTI) diff --git a/examples/ethernet/.build-test-rules.yml b/examples/ethernet/.build-test-rules.yml index e52a8067320..56f1ebae6ce 100644 --- a/examples/ethernet/.build-test-rules.yml +++ b/examples/ethernet/.build-test-rules.yml @@ -4,9 +4,9 @@ examples/ethernet/basic: enable: - if: INCLUDE_DEFAULT == 1 disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8697 + reason: not supported yet # TODO: [ESP32C5] IDF-8697, [esp32c61] IDF-9298 disable_test: - if: IDF_TARGET not in ["esp32"] temporary: true @@ -21,9 +21,9 @@ examples/ethernet/basic: examples/ethernet/enc28j60: disable: - - if: IDF_TARGET in ["esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: target esp32p4, esp32c5 is not supported yet # TODO: [ESP32P4] IDF-8073 [ESP32C5] IDF-8697 + reason: target esp32p4, esp32c5 is not supported yet # TODO: [ESP32P4] IDF-8073 [ESP32C5] IDF-8697, [esp32c61] IDF-9298 depends_components: - esp_eth - esp_netif @@ -34,9 +34,9 @@ examples/ethernet/enc28j60: examples/ethernet/iperf: disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8697 + reason: not supported yet # TODO: [ESP32C5] IDF-8697, [esp32c61] IDF-9298 disable_test: - if: IDF_TARGET not in ["esp32"] temporary: true diff --git a/examples/network/bridge/README.md b/examples/network/bridge/README.md index c7910f5cbfa..a3fb3ccab92 100644 --- a/examples/network/bridge/README.md +++ b/examples/network/bridge/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Bridge Example (See the README.md file in the upper level 'examples' directory for more information about examples.) diff --git a/examples/network/vlan_support/README.md b/examples/network/vlan_support/README.md index 051b9f3143c..ee1b820d5f1 100644 --- a/examples/network/vlan_support/README.md +++ b/examples/network/vlan_support/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Ethernet VLAN Support Example diff --git a/examples/peripherals/.build-test-rules.yml b/examples/peripherals/.build-test-rules.yml index 15fa7295af1..f7fd70f16ea 100644 --- a/examples/peripherals/.build-test-rules.yml +++ b/examples/peripherals/.build-test-rules.yml @@ -399,13 +399,13 @@ examples/peripherals/timer_group/gptimer: examples/peripherals/timer_group/gptimer_capture_hc_sr04: disable: - - if: SOC_TIMER_SUPPORT_ETM != 1 + - if: SOC_GPTIMER_SUPPORTED != 1 or SOC_TIMER_SUPPORT_ETM != 1 depends_components: - esp_driver_gptimer examples/peripherals/timer_group/wiegand_interface: disable: - - if: SOC_TIMER_GROUP_TOTAL_TIMERS < 2 + - if: SOC_GPTIMER_SUPPORTED != 1 or SOC_TIMER_GROUP_TOTAL_TIMERS < 2 depends_components: - esp_driver_gptimer diff --git a/examples/peripherals/gpio/generic_gpio/README.md b/examples/peripherals/gpio/generic_gpio/README.md index e6ac34b725c..a25a6bdf7c1 100644 --- a/examples/peripherals/gpio/generic_gpio/README.md +++ b/examples/peripherals/gpio/generic_gpio/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Example: GPIO diff --git a/examples/peripherals/uart/nmea0183_parser/README.md b/examples/peripherals/uart/nmea0183_parser/README.md index b682ed90b4c..746e20af3a2 100644 --- a/examples/peripherals/uart/nmea0183_parser/README.md +++ b/examples/peripherals/uart/nmea0183_parser/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # NMEA Parser Example diff --git a/examples/peripherals/uart/uart_async_rxtxtasks/README.md b/examples/peripherals/uart/uart_async_rxtxtasks/README.md index 1c4e6d5da11..b3933f3d2fb 100644 --- a/examples/peripherals/uart/uart_async_rxtxtasks/README.md +++ b/examples/peripherals/uart/uart_async_rxtxtasks/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # UART Asynchronous Example with Separate Receive and Transfer Tasks diff --git a/examples/peripherals/uart/uart_echo/README.md b/examples/peripherals/uart/uart_echo/README.md index 334856229cb..485a430c3bb 100644 --- a/examples/peripherals/uart/uart_echo/README.md +++ b/examples/peripherals/uart/uart_echo/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # UART Echo Example diff --git a/examples/peripherals/uart/uart_echo_rs485/README.md b/examples/peripherals/uart/uart_echo_rs485/README.md index 3c08e9285bd..fdf84d9caad 100644 --- a/examples/peripherals/uart/uart_echo_rs485/README.md +++ b/examples/peripherals/uart/uart_echo_rs485/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # UART RS485 Echo Example diff --git a/examples/peripherals/uart/uart_events/README.md b/examples/peripherals/uart/uart_events/README.md index e8397f72cae..c802e4a4333 100644 --- a/examples/peripherals/uart/uart_events/README.md +++ b/examples/peripherals/uart/uart_events/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # UART Events Example diff --git a/examples/peripherals/uart/uart_repl/README.md b/examples/peripherals/uart/uart_repl/README.md index a3b5cd4555e..8c6a5353437 100644 --- a/examples/peripherals/uart/uart_repl/README.md +++ b/examples/peripherals/uart/uart_repl/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # UART REPL Example @@ -61,4 +61,4 @@ USB monitoring <------ TX -----------> RX----+ Adapter ``` -If everything goes fine, the output on default UART should be "Result: Success". Else, it should be "Result: Failure". \ No newline at end of file +If everything goes fine, the output on default UART should be "Result: Success". Else, it should be "Result: Failure". diff --git a/examples/peripherals/uart/uart_select/README.md b/examples/peripherals/uart/uart_select/README.md index b0dc2088006..3e1845d165e 100644 --- a/examples/peripherals/uart/uart_select/README.md +++ b/examples/peripherals/uart/uart_select/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # UART Select Example diff --git a/examples/phy/.build-test-rules.yml b/examples/phy/.build-test-rules.yml index 68eea70a324..1072fffc25c 100644 --- a/examples/phy/.build-test-rules.yml +++ b/examples/phy/.build-test-rules.yml @@ -2,9 +2,9 @@ examples/phy/antenna: disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8851 + reason: not supported yet # TODO: [ESP32C5] IDF-8851, [esp32c61] IDF-9859 - if: IDF_TARGET in ["esp32p4", "esp32h2"] reason: not supported examples/phy/cert_test: diff --git a/examples/protocols/.build-test-rules.yml b/examples/protocols/.build-test-rules.yml index 71197480d59..912fd85e41d 100644 --- a/examples/protocols/.build-test-rules.yml +++ b/examples/protocols/.build-test-rules.yml @@ -15,9 +15,9 @@ examples/protocols/esp_http_client: enable: - if: INCLUDE_DEFAULT == 1 or IDF_TARGET == "linux" disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8697 + reason: not supported yet # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET not in ["esp32", "linux"] depends_filepatterns: @@ -26,9 +26,9 @@ examples/protocols/esp_http_client: examples/protocols/esp_local_ctrl: <<: *default_dependencies disable: - - if: IDF_TARGET in ["esp32h2", "esp32c5"] + - if: IDF_TARGET in ["esp32h2", "esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8697 + reason: not supported yet # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET not in ["esp32", "esp32c3", "esp32s3"] reason: only test on these targets @@ -39,9 +39,9 @@ examples/protocols/esp_local_ctrl: examples/protocols/http_request: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8697 + reason: not supported yet # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET != "esp32" reason: only test on esp32 @@ -49,9 +49,9 @@ examples/protocols/http_request: examples/protocols/http_server: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8697 + reason: not supported yet # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET not in ["esp32", "esp32c3", "esp32s3"] reason: only test on these targets @@ -61,9 +61,9 @@ examples/protocols/http_server: examples/protocols/http_server/captive_portal: <<: *default_dependencies disable: - - if: IDF_TARGET in ["esp32h2", "esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32h2", "esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: not supported on p4 # TODO: IDF-8076 [ESP32C5] IDF-8697 + reason: not supported yet # TODO: IDF-8076 [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET != "esp32" reason: only test on esp32 @@ -73,18 +73,18 @@ examples/protocols/http_server/captive_portal: examples/protocols/http_server/restful_server: <<: *default_dependencies disable: - - if: IDF_TARGET in ["esp32h2", "esp32c5"] + - if: IDF_TARGET in ["esp32h2", "esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8697 + reason: not supported yet # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 depends_filepatterns: - components/esp_http_server/**/* examples/protocols/http_server/ws_echo_server: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8697 + reason: not supported yet # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET != "esp32" reason: only test on esp32 @@ -96,9 +96,9 @@ examples/protocols/https_mbedtls: enable: - if: INCLUDE_DEFAULT == 1 or IDF_TARGET == "linux" disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8697 + reason: not supported yet # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET != "esp32" reason: only test on esp32 @@ -106,9 +106,9 @@ examples/protocols/https_mbedtls: examples/protocols/https_request: <<: *default_dependencies disable: - - if: IDF_TARGET in ["esp32h2", "esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32h2", "esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: not supported on h2, p4 and c5 # TODO: IDF-9076 (H2) [ESP32C5] IDF-8697 + reason: not supported on h2, p4 and c5 # TODO: IDF-9076 (H2) [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET != "esp32" reason: only test on esp32 @@ -116,9 +116,9 @@ examples/protocols/https_request: examples/protocols/https_server/simple: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8697 + reason: not supported yet # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET not in ["esp32", "esp32c3", "esp32s3"] reason: only test on these targets @@ -129,9 +129,9 @@ examples/protocols/https_server/simple: examples/protocols/https_server/wss_server: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8697 + reason: not supported yet # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET != "esp32" reason: only test on esp32 @@ -141,9 +141,9 @@ examples/protocols/https_server/wss_server: examples/protocols/https_x509_bundle: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8697 + reason: not supported yet # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET != "esp32" reason: only test on esp32 @@ -153,18 +153,18 @@ examples/protocols/https_x509_bundle: examples/protocols/icmp_echo: <<: *default_dependencies disable: - - if: IDF_TARGET in ["esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: not supported on p4 and c5 # TODO: [ESP32-C5] IDF-8697 + reason: not supported on p4 and c5 # TODO: [ESP32-C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: SOC_WIFI_SUPPORTED != 1 examples/protocols/l2tap: <<: *default_dependencies disable: - - if: IDF_TARGET in ["esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: not supported on p4 and c5 # TODO: [ESP32C5] IDF-8697 + reason: not supported on p4 and c5 # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET != "esp32" reason: only test on esp32 @@ -172,34 +172,34 @@ examples/protocols/l2tap: examples/protocols/modbus: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8697 + reason: not supported yet # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 depends_filepatterns: - examples/protocols/modbus/mb_example_common/**/* examples/protocols/mqtt: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported on c5 # TODO: [ESP32C5] IDF-8697 + reason: not supported on c5 # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 depends_filepatterns: - components/mqtt/**/* examples/protocols/mqtt/custom_outbox: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported on c5 # TODO: [ESP32C5] IDF-8697 + reason: not supported on c5 # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 examples/protocols/mqtt/ssl: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported on c5 # TODO: [ESP32C5] IDF-8697 + reason: not supported on c5 # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET != "esp32" reason: only test on esp32 @@ -214,9 +214,9 @@ examples/protocols/mqtt/ssl_ds: examples/protocols/mqtt/tcp: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported on c5 # TODO: [ESP32C5] IDF-8697 + reason: not supported on c5 # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET != "esp32" reason: only test on esp32 @@ -224,9 +224,9 @@ examples/protocols/mqtt/tcp: examples/protocols/mqtt/ws: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported on c5 # TODO: [ESP32C5] IDF-8697 + reason: not supported on c5 # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET != "esp32" reason: only test on esp32 @@ -234,9 +234,9 @@ examples/protocols/mqtt/ws: examples/protocols/mqtt/wss: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported on c5 # TODO: [ESP32C5] IDF-8697 + reason: not supported on c5 # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET != "esp32" reason: only test on esp32 @@ -244,9 +244,9 @@ examples/protocols/mqtt/wss: examples/protocols/mqtt5: <<: *default_dependencies disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported on c5 # TODO: [ESP32C5] IDF-8697 + reason: not supported on c5 # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: IDF_TARGET != "esp32" reason: only test on esp32 @@ -254,9 +254,9 @@ examples/protocols/mqtt5: examples/protocols/smtp_client: <<: *default_dependencies disable: - - if: IDF_TARGET in ["esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: not supported on p4 and c5 # TODO: [ESP32C5] IDF-8697 + reason: not supported on p4 and c5 # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 examples/protocols/sntp: <<: *default_dependencies @@ -268,9 +268,9 @@ examples/protocols/sntp: examples/protocols/sockets: <<: *default_dependencies disable: - - if: IDF_TARGET in ["esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: not supported on p4 and c5 # TODO: [ESP32C5] IDF-8697 + reason: not supported on p4 and c5 # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 disable_test: - if: SOC_WIFI_SUPPORTED != 1 @@ -288,14 +288,14 @@ examples/protocols/sockets/tcp_client: - if: SOC_WIFI_SUPPORTED != 1 # linux target won't work with CONFIG_EXAMPLE_SOCKET_IP_INPUT_STDIN=y disable: - - if: IDF_TARGET in ["esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: not supported on p4 and c5 # TODO: [ESP32C5] IDF-8697 + reason: not supported on p4 and c5 # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 examples/protocols/static_ip: <<: *default_dependencies disable: - if: IDF_TARGET in ["esp32h2"] - - if: IDF_TARGET in ["esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: not supported on p4 and c5 # TODO: [ESP32C5] IDF-8697 + reason: not supported on p4 and c5 # TODO: [ESP32C5] IDF-8697, [ESP32C61] IDF-9298 diff --git a/examples/protocols/http_server/restful_server/README.md b/examples/protocols/http_server/restful_server/README.md index e95ba79b99a..bc39fb3bdc7 100644 --- a/examples/protocols/http_server/restful_server/README.md +++ b/examples/protocols/http_server/restful_server/README.md @@ -21,7 +21,7 @@ This example designs several APIs to fetch resources as follows: ### About mDNS -The IP address of an IoT device may vary from time to time, so it’s impracticable to hard code the IP address in the webpage. In this example, we use the `mDNS` to parse the domain name `esp-home.local`, so that we can alway get access to the web server by this URL no matter what the real IP address behind it. See [here](https://docs.espressif.com/projects/esp-idf/en/latest/api-reference/protocols/mdns.html) for more information about mDNS. +The IP address of an IoT device may vary from time to time, so it’s impracticable to hard code the IP address in the webpage. In this example, we use the `mDNS` to parse the domain name `esp-home.local`, so that we can always get access to the web server by this URL no matter what the real IP address behind it. See [here](https://docs.espressif.com/projects/esp-idf/en/latest/api-reference/protocols/mdns.html) for more information about mDNS. **Notes: mDNS is installed by default on most operating systems or is available as separate package.** diff --git a/examples/protocols/l2tap/README.md b/examples/protocols/l2tap/README.md index b077d71640f..9f7a97afa95 100644 --- a/examples/protocols/l2tap/README.md +++ b/examples/protocols/l2tap/README.md @@ -69,7 +69,7 @@ python3 pytest_example_l2tap_echo.py [] [] * `dest_mac_address` - MAC address of the destination device (the ESP32 board with flashed example). ESP 32 board MAC address is printed by the example so you can find it in monitor output under "Ethernet HW Addr". Broadcast address is used when this parameter is omitted. -* `host_eth_interface` - name of host PC Ethernet device on which the frame is to be transmitted/received. When this parameter is omitted, the script tries to find Ethernet interface automatically. If you need, you can find names of installed Network interfaces by running either of bellow commands on Linux: +* `host_eth_interface` - name of host PC Ethernet device on which the frame is to be transmitted/received. When this parameter is omitted, the script tries to find Ethernet interface automatically. If you need, you can find names of installed Network interfaces by running either of below commands on Linux: ```bash $ ifconfig diff --git a/examples/protocols/modbus/tcp/mb_tcp_master/README.md b/examples/protocols/modbus/tcp/mb_tcp_master/README.md index 7f298e1cae4..14e09abea74 100644 --- a/examples/protocols/modbus/tcp/mb_tcp_master/README.md +++ b/examples/protocols/modbus/tcp/mb_tcp_master/README.md @@ -115,7 +115,7 @@ I (5664) example_connect: - IPv6 address: fe80:0000:0000:0000:bedd:c2ff:fed1:b21 I (5674) uart: ESP_INTR_FLAG_IRAM flag not set while CONFIG_UART_ISR_IN_IRAM is enabled, flag updated I (5684) MASTER_TEST: Leave IP(0) = [192.168.1.21] set by user. I (5694) MASTER_TEST: IP(1) is not set in the table. -I (5694) MASTER_TEST: Configured 1 IP addresse(s). +I (5694) MASTER_TEST: Configured 1 IP address(es). I (5704) MASTER_TEST: Modbus master stack initialized... I (5704) MB_TCP_MASTER_PORT: TCP master stack initialized. I (5724) MB_TCP_MASTER_PORT: Host[IP]: "192.168.1.21"[192.168.1.21] @@ -143,4 +143,3 @@ I (47094) MASTER_TEST: Alarm triggered by cid #7. I (47094) MASTER_TEST: Destroy master... ``` The example reads the characteristics from slave device(s), while alarm is not triggered in the slave device (See the "Example parameters definition"). The output line describes Timestamp, Cid of characteristic, Characteristic name (Units), Characteristic value (Hex data). - diff --git a/examples/protocols/sockets/non_blocking/README.md b/examples/protocols/sockets/non_blocking/README.md index e551d259a7f..d6b1712fa45 100644 --- a/examples/protocols/sockets/non_blocking/README.md +++ b/examples/protocols/sockets/non_blocking/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # TCP non-blocking client and server examples diff --git a/examples/protocols/sockets/tcp_client/README.md b/examples/protocols/sockets/tcp_client/README.md index 59218a487ef..1d0f3b65c43 100644 --- a/examples/protocols/sockets/tcp_client/README.md +++ b/examples/protocols/sockets/tcp_client/README.md @@ -23,7 +23,7 @@ Set following parameters under ```Example Configuration``` Options: * Set `IPV6 Address` in case your chose IP version IPV6 above. * For IPv6 there's an additional option for ```Interface selection```. - * Enter the name of the interface to explicitely establish communication over a specific interface. + * Enter the name of the interface to explicitly establish communication over a specific interface. * On selecting ```Auto``` the example will find the first interface with an IPv6 address and use it. * Set `Port` number that represents remote port the example will connect to. diff --git a/examples/security/flash_encryption/README.md b/examples/security/flash_encryption/README.md index cf4c7364369..866a8fdabae 100644 --- a/examples/security/flash_encryption/README.md +++ b/examples/security/flash_encryption/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Flash Encryption diff --git a/examples/storage/.build-test-rules.yml b/examples/storage/.build-test-rules.yml index e28311bda05..2bdea003dbc 100644 --- a/examples/storage/.build-test-rules.yml +++ b/examples/storage/.build-test-rules.yml @@ -26,9 +26,9 @@ examples/storage/ext_flash_fatfs: - spi_flash - driver disable: - - if: IDF_TARGET in ["esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: not supported on p4 and c5 # TODO: [ESP32C5] IDF-8715 + reason: not supported on p4 and c5 # TODO: [ESP32C5] IDF-8715, [ESP32C61] IDF-9314 disable_test: - if: IDF_TARGET not in ["esp32"] temporary: true @@ -111,9 +111,9 @@ examples/storage/perf_benchmark: - esp_partition - esp_driver_sdmmc disable: - - if: IDF_TARGET == "esp32c5" + - if: IDF_TARGET in ["esp32c5", "esp32c61"] temporary: true - reason: not supported yet # TODO: [ESP32C5] IDF-8704, IDF-10314 + reason: not supported yet # TODO: [ESP32C5] IDF-8704, IDF-10314, [ESP32C61] IDF-9314 disable_test: - if: IDF_TARGET == "esp32p4" and CONFIG_NAME in ["sdmmc_1line", "sdmmc_4line", "sdspi_1line"] temporary: true diff --git a/examples/storage/custom_flash_driver/README.md b/examples/storage/custom_flash_driver/README.md index c936097cb89..aa314093434 100644 --- a/examples/storage/custom_flash_driver/README.md +++ b/examples/storage/custom_flash_driver/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Custom Flash Driver Example diff --git a/examples/storage/fatfsgen/README.md b/examples/storage/fatfsgen/README.md index 29fb29db7fd..2d0164cf27b 100644 --- a/examples/storage/fatfsgen/README.md +++ b/examples/storage/fatfsgen/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # FATFS partition generation example diff --git a/examples/storage/littlefs/README.md b/examples/storage/littlefs/README.md index d8fbb7d5d0b..fed9fec96da 100644 --- a/examples/storage/littlefs/README.md +++ b/examples/storage/littlefs/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # About LittleFS diff --git a/examples/storage/nvs_rw_blob/README.md b/examples/storage/nvs_rw_blob/README.md index bdded9bfc5a..868b1521f08 100644 --- a/examples/storage/nvs_rw_blob/README.md +++ b/examples/storage/nvs_rw_blob/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Non-Volatile Storage (NVS) Read and Write Example diff --git a/examples/storage/nvs_rw_value/README.md b/examples/storage/nvs_rw_value/README.md index 3f5c3ebd5d3..68847e2bbdb 100644 --- a/examples/storage/nvs_rw_value/README.md +++ b/examples/storage/nvs_rw_value/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Non-Volatile Storage (NVS) Read and Write Example diff --git a/examples/storage/nvs_rw_value_cxx/README.md b/examples/storage/nvs_rw_value_cxx/README.md index 5cbf93de814..d4fd7a02747 100644 --- a/examples/storage/nvs_rw_value_cxx/README.md +++ b/examples/storage/nvs_rw_value_cxx/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Non-Volatile Storage (NVS) C++ Read and Write Example diff --git a/examples/storage/nvsgen/README.md b/examples/storage/nvsgen/README.md index 6993f8483c9..b3507d6170f 100644 --- a/examples/storage/nvsgen/README.md +++ b/examples/storage/nvsgen/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # NVS Partition Image Generation on Build Example diff --git a/examples/storage/partition_api/partition_find/README.md b/examples/storage/partition_api/partition_find/README.md index 15fe7c0aab4..e2c096a4151 100644 --- a/examples/storage/partition_api/partition_find/README.md +++ b/examples/storage/partition_api/partition_find/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Finding Partitions Example diff --git a/examples/storage/partition_api/partition_mmap/README.md b/examples/storage/partition_api/partition_mmap/README.md index 85a67b6dd63..06162c6a98f 100644 --- a/examples/storage/partition_api/partition_mmap/README.md +++ b/examples/storage/partition_api/partition_mmap/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Partition Memory Map Example diff --git a/examples/storage/partition_api/partition_ops/README.md b/examples/storage/partition_api/partition_ops/README.md index fd916fc2ea4..ae4b23c3f00 100644 --- a/examples/storage/partition_api/partition_ops/README.md +++ b/examples/storage/partition_api/partition_ops/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Partition Read, Write, Erase Example diff --git a/examples/storage/parttool/README.md b/examples/storage/parttool/README.md index de135fb8926..89434343ed8 100644 --- a/examples/storage/parttool/README.md +++ b/examples/storage/parttool/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Partitions Tool Example diff --git a/examples/storage/semihost_vfs/README.md b/examples/storage/semihost_vfs/README.md index a1b3009a653..0cf77e01fa4 100644 --- a/examples/storage/semihost_vfs/README.md +++ b/examples/storage/semihost_vfs/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Semihosting VFS driver example diff --git a/examples/storage/spiffs/README.md b/examples/storage/spiffs/README.md index 3a233ba5702..455fcd57389 100644 --- a/examples/storage/spiffs/README.md +++ b/examples/storage/spiffs/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # SPIFFS example diff --git a/examples/storage/spiffsgen/README.md b/examples/storage/spiffsgen/README.md index 96a892f78bc..a95598ac4f5 100644 --- a/examples/storage/spiffsgen/README.md +++ b/examples/storage/spiffsgen/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # SPIFFS Image Generation on Build Example diff --git a/examples/storage/wear_levelling/README.md b/examples/storage/wear_levelling/README.md index 5777cc39067..b4158590058 100644 --- a/examples/storage/wear_levelling/README.md +++ b/examples/storage/wear_levelling/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Wear levelling example diff --git a/examples/system/.build-test-rules.yml b/examples/system/.build-test-rules.yml index 4c7dfc8f392..7481a8b4c2b 100644 --- a/examples/system/.build-test-rules.yml +++ b/examples/system/.build-test-rules.yml @@ -39,9 +39,9 @@ examples/system/deep_sleep: examples/system/deep_sleep_wake_stub: disable: - - if: IDF_TARGET in ["esp32c2", "esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32c2", "esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: target(s) is not supported yet # TODO: [ESP32C5] IDF-8638 + reason: target(s) is not supported yet # TODO: [ESP32C5] IDF-8638, [esp32c61] IDF-9245 examples/system/efuse: enable: @@ -141,9 +141,9 @@ examples/system/light_sleep: examples/system/ota/advanced_https_ota: disable: - - if: IDF_TARGET in ["esp32h2", "esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32h2", "esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: target esp32h2, esp32c5 is not supported yet, esp32p4 is not supported with bluedroid/nimble case + reason: target esp32h2, esp32c5 esp32c61 is not supported yet, esp32p4 is not supported with bluedroid/nimble case disable_test: - if: IDF_TARGET not in ["esp32", "esp32c3", "esp32s3"] temporary: true @@ -161,9 +161,9 @@ examples/system/ota/advanced_https_ota: examples/system/ota/native_ota_example: disable: - - if: IDF_TARGET in ["esp32h2", "esp32c5"] + - if: IDF_TARGET in ["esp32h2", "esp32c5", "esp32c61"] temporary: true - reason: target esp32h2, esp32c5 is not supported yet + reason: target esp32h2, esp32c5, esp32c61 is not supported yet disable_test: - if: IDF_TARGET != "esp32" reason: Only esp32 has ethernet runners @@ -184,9 +184,9 @@ examples/system/ota/otatool: examples/system/ota/pre_encrypted_ota: disable: - - if: IDF_TARGET in ["esp32h2", "esp32c5"] + - if: IDF_TARGET in ["esp32h2", "esp32c5", "esp32c61"] temporary: true - reason: target esp32h2, esp32c5 is not supported yet + reason: target esp32h2, esp32c5, esp32c61 is not supported yet disable_test: - if: IDF_TARGET != "esp32" temporary: true @@ -202,9 +202,9 @@ examples/system/ota/pre_encrypted_ota: examples/system/ota/simple_ota_example: disable: - - if: IDF_TARGET in ["esp32h2", "esp32p4", "esp32c5"] + - if: IDF_TARGET in ["esp32h2", "esp32p4", "esp32c5", "esp32c61"] temporary: true - reason: target esp32h2, esp32p4, esp32c5 is not supported yet + reason: target esp32h2, esp32p4, esp32c5 esp32c61 is not supported yet - if: CONFIG_NAME == "spiram" and SOC_SPIRAM_SUPPORTED != 1 disable_test: - if: IDF_TARGET not in ["esp32", "esp32c3", "esp32s3"] diff --git a/examples/system/app_trace_basic/README.md b/examples/system/app_trace_basic/README.md index 2da31cd059a..b02e44b350c 100644 --- a/examples/system/app_trace_basic/README.md +++ b/examples/system/app_trace_basic/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C61 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | --------- | -------- | -------- | # Application Level Tracing Example (Basic) diff --git a/examples/system/app_trace_to_plot/README.md b/examples/system/app_trace_to_plot/README.md index 3ff84736518..5c9b702563e 100644 --- a/examples/system/app_trace_to_plot/README.md +++ b/examples/system/app_trace_to_plot/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Application Level Tracing Example (Plotting) diff --git a/examples/system/base_mac_address/README.md b/examples/system/base_mac_address/README.md index 1aa4f2dae8b..51e012f3487 100644 --- a/examples/system/base_mac_address/README.md +++ b/examples/system/base_mac_address/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Base MAC Address @@ -93,4 +93,4 @@ E (288) system_api: Base MAC address from BLK3 of EFUSE version error, version = E (298) BASE_MAC: Failed to get base MAC address from EFUSE BLK3. (ESP_ERR_INVALID_VERSION) I (308) BASE_MAC: Defaulting to base MAC address in BLK0 of EFUSE I (308) BASE_MAC: Base MAC Address read from EFUSE BLK0 -``` \ No newline at end of file +``` diff --git a/examples/system/console/advanced/README.md b/examples/system/console/advanced/README.md index a86268b3c76..43ca13ffc4f 100644 --- a/examples/system/console/advanced/README.md +++ b/examples/system/console/advanced/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Console Example diff --git a/examples/system/console/basic/README.md b/examples/system/console/basic/README.md index 45c86f4cc18..42387e5c625 100644 --- a/examples/system/console/basic/README.md +++ b/examples/system/console/basic/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Basic Console Example (`esp_console_repl`) diff --git a/examples/system/efuse/README.md b/examples/system/efuse/README.md index 67564da1dcd..475c9826b24 100644 --- a/examples/system/efuse/README.md +++ b/examples/system/efuse/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | Linux | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | ----- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | Linux | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | ----- | # eFuse Example diff --git a/examples/system/esp_event/default_event_loop/README.md b/examples/system/esp_event/default_event_loop/README.md index 3f8df792352..6bce5b8a8fb 100644 --- a/examples/system/esp_event/default_event_loop/README.md +++ b/examples/system/esp_event/default_event_loop/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Default Event Loop Example diff --git a/examples/system/esp_event/user_event_loops/README.md b/examples/system/esp_event/user_event_loops/README.md index 8d71fbbea3e..55f04df47f4 100644 --- a/examples/system/esp_event/user_event_loops/README.md +++ b/examples/system/esp_event/user_event_loops/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # User Event Loops Example diff --git a/examples/system/eventfd/README.md b/examples/system/eventfd/README.md index 439388a6c56..f3367fa4b64 100644 --- a/examples/system/eventfd/README.md +++ b/examples/system/eventfd/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # eventfd example diff --git a/examples/system/freertos/real_time_stats/README.md b/examples/system/freertos/real_time_stats/README.md index 9e66114458b..9c1bc29c1d6 100644 --- a/examples/system/freertos/real_time_stats/README.md +++ b/examples/system/freertos/real_time_stats/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # FreeRTOS Real Time Stats Example @@ -72,4 +72,4 @@ During the examples initialization process, multiple `spin` tasks are created. T ### Understanding the stats -From the log output, it can be seen that the spin tasks consume nearly an equal amount of time over the specified stats collection period of `print_real_time_stats()`. The real time stats also display the CPU time consumption of other tasks created by default in ESP-IDF (e.g. `IDLE` and `ipc` tasks). \ No newline at end of file +From the log output, it can be seen that the spin tasks consume nearly an equal amount of time over the specified stats collection period of `print_real_time_stats()`. The real time stats also display the CPU time consumption of other tasks created by default in ESP-IDF (e.g. `IDLE` and `ipc` tasks). diff --git a/examples/system/gdbstub/README.md b/examples/system/gdbstub/README.md index 3f105f5c183..2236d75a241 100644 --- a/examples/system/gdbstub/README.md +++ b/examples/system/gdbstub/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | # GDBstub example diff --git a/examples/system/heap_task_tracking/README.md b/examples/system/heap_task_tracking/README.md index 3be6907e82d..7f8cb912831 100644 --- a/examples/system/heap_task_tracking/README.md +++ b/examples/system/heap_task_tracking/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Heap Task Tracking Example diff --git a/examples/system/ota/otatool/README.md b/examples/system/ota/otatool/README.md index 8ee6bbc5861..31f16d86f93 100644 --- a/examples/system/ota/otatool/README.md +++ b/examples/system/ota/otatool/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-C61 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | # OTA Tool Example diff --git a/examples/system/pthread/README.md b/examples/system/pthread/README.md index f95b3c83cbf..f5ac440ac42 100644 --- a/examples/system/pthread/README.md +++ b/examples/system/pthread/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Pthread Example diff --git a/examples/system/rt_mqueue/README.md b/examples/system/rt_mqueue/README.md index f5400e96742..d0924d71f11 100644 --- a/examples/system/rt_mqueue/README.md +++ b/examples/system/rt_mqueue/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # POSIX Message Queue Example diff --git a/examples/system/select/README.md b/examples/system/select/README.md index 56463959355..5b2e3308f82 100644 --- a/examples/system/select/README.md +++ b/examples/system/select/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Synchronous I/O multiplexing example diff --git a/examples/system/startup_time/README.md b/examples/system/startup_time/README.md index 86b9afc3e12..74622582ea9 100644 --- a/examples/system/startup_time/README.md +++ b/examples/system/startup_time/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Startup Time Example diff --git a/examples/system/task_watchdog/README.md b/examples/system/task_watchdog/README.md index e8d1c73bf61..acdbbcdb372 100644 --- a/examples/system/task_watchdog/README.md +++ b/examples/system/task_watchdog/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Task Watchdog Example diff --git a/examples/system/unit_test/README.md b/examples/system/unit_test/README.md index 4e7a0a5697b..e5298981764 100644 --- a/examples/system/unit_test/README.md +++ b/examples/system/unit_test/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Unit Testing diff --git a/examples/wifi/itwt/README.md b/examples/wifi/itwt/README.md index a4a16a2528c..265fe586aff 100644 --- a/examples/wifi/itwt/README.md +++ b/examples/wifi/itwt/README.md @@ -8,7 +8,7 @@ This example shows how to use itwt of wifi. Itwt only works in station mode. And AP needs to support the capability of itwt. -Itwt can works under differnet power save mode. +Itwt can works under different power save mode. ### Modem sleep (supported) This is default mode. Under this mode, can support console command "itwt, probe" to config itwt. @@ -17,7 +17,7 @@ This is default mode. Under this mode, can support console command "itwt, probe" * probe: this command will send a probe request to update tsf time with ap ### Light Sleep (will support) -Need system suport light sleep. Console command will not support in this mode. +Need system support light sleep. Console command will not support in this mode. ### Typical current consumption with Itwt enabled diff --git a/tools/test_apps/build_system/bootloader/README.md b/tools/test_apps/build_system/bootloader/README.md index 3a502b1f86f..7b96141437e 100644 --- a/tools/test_apps/build_system/bootloader/README.md +++ b/tools/test_apps/build_system/bootloader/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/tools/test_apps/build_system/ldgen_test/README.md b/tools/test_apps/build_system/ldgen_test/README.md index b24e140f405..a4db75e2fd7 100644 --- a/tools/test_apps/build_system/ldgen_test/README.md +++ b/tools/test_apps/build_system/ldgen_test/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | Runs a build test to check ldgen places libraries, objects and symbols correctly as specified in the linker fragments. Specifically, this app diff --git a/tools/test_apps/protocols/mqtt/build_test/README.md b/tools/test_apps/protocols/mqtt/build_test/README.md index 23dc2cfbbf9..4f186a5e86b 100644 --- a/tools/test_apps/protocols/mqtt/build_test/README.md +++ b/tools/test_apps/protocols/mqtt/build_test/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Build only test for C++ diff --git a/tools/test_apps/protocols/network_tests/README.md b/tools/test_apps/protocols/network_tests/README.md index 8da7308af96..fb994aaea73 100644 --- a/tools/test_apps/protocols/network_tests/README.md +++ b/tools/test_apps/protocols/network_tests/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Intel net test suite for LwIP network stack diff --git a/tools/test_apps/storage/.build-test-rules.yml b/tools/test_apps/storage/.build-test-rules.yml index b82d3253e82..d27c0ab8933 100644 --- a/tools/test_apps/storage/.build-test-rules.yml +++ b/tools/test_apps/storage/.build-test-rules.yml @@ -19,9 +19,9 @@ tools/test_apps/storage/partition_table_readonly: tools/test_apps/storage/sdmmc_console: disable: - - if: IDF_TARGET in ["esp32h2"] + - if: IDF_TARGET in ["esp32h2", "esp32c61"] temporary: true - reason: Console component not supported on H2 yet + reason: Console component not supported on H2 yet, TODO [ESP32C61] IDF-9305 sdspi disable_test: - if: IDF_TARGET not in ["esp32", "esp32s2", "esp32c3"] temporary: true diff --git a/tools/test_apps/storage/partition_table_readonly/README.md b/tools/test_apps/storage/partition_table_readonly/README.md index 3a502b1f86f..7b96141437e 100644 --- a/tools/test_apps/storage/partition_table_readonly/README.md +++ b/tools/test_apps/storage/partition_table_readonly/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/tools/test_apps/system/.build-test-rules.yml b/tools/test_apps/system/.build-test-rules.yml index 4d704049da2..b11db03fab1 100644 --- a/tools/test_apps/system/.build-test-rules.yml +++ b/tools/test_apps/system/.build-test-rules.yml @@ -72,6 +72,10 @@ tools/test_apps/system/no_embedded_paths: tools/test_apps/system/panic: enable: - if: INCLUDE_DEFAULT == 1 or IDF_TARGET in ["esp32p4"] # preview targets + disable: + - if: IDF_TARGET == "esp32c61" + temporary: true + reason: not supported # TODO: [ESP32c61] IDF-9268 tools/test_apps/system/ram_loadable_app: disable: diff --git a/tools/test_apps/system/bootloader_sections/README.md b/tools/test_apps/system/bootloader_sections/README.md index 3a502b1f86f..7b96141437e 100644 --- a/tools/test_apps/system/bootloader_sections/README.md +++ b/tools/test_apps/system/bootloader_sections/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/tools/test_apps/system/build_test/README.md b/tools/test_apps/system/build_test/README.md index 37dba5c140e..1aef9a5f7a9 100644 --- a/tools/test_apps/system/build_test/README.md +++ b/tools/test_apps/system/build_test/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | This project is for testing if the application can be built with a particular sdkconfig setting. diff --git a/tools/test_apps/system/cxx_build_test/README.md b/tools/test_apps/system/cxx_build_test/README.md index 9f10fd995c5..371ab304bfd 100644 --- a/tools/test_apps/system/cxx_build_test/README.md +++ b/tools/test_apps/system/cxx_build_test/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # C++ build test diff --git a/tools/test_apps/system/esp_intr_dump/README.md b/tools/test_apps/system/esp_intr_dump/README.md index de5462f0939..2edf948c68f 100644 --- a/tools/test_apps/system/esp_intr_dump/README.md +++ b/tools/test_apps/system/esp_intr_dump/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # Test for esp_intr_dump diff --git a/tools/test_apps/system/g1_components/README.md b/tools/test_apps/system/g1_components/README.md index a57b58b0360..0f9105bc2d2 100644 --- a/tools/test_apps/system/g1_components/README.md +++ b/tools/test_apps/system/g1_components/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # "G1"-components-only app diff --git a/tools/test_apps/system/gdb/README.md b/tools/test_apps/system/gdb/README.md index d137dba8190..4a5c3dcdb19 100644 --- a/tools/test_apps/system/gdb/README.md +++ b/tools/test_apps/system/gdb/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # IDF GDB test application diff --git a/tools/test_apps/system/gdb_loadable_elf/README.md b/tools/test_apps/system/gdb_loadable_elf/README.md index d29850b90a1..3296c7a65d3 100644 --- a/tools/test_apps/system/gdb_loadable_elf/README.md +++ b/tools/test_apps/system/gdb_loadable_elf/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C61 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | # Loadable ELF test application diff --git a/tools/test_apps/system/gdbstub_runtime/README.md b/tools/test_apps/system/gdbstub_runtime/README.md index 3a502b1f86f..7b96141437e 100644 --- a/tools/test_apps/system/gdbstub_runtime/README.md +++ b/tools/test_apps/system/gdbstub_runtime/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | diff --git a/tools/test_apps/system/ram_loadable_app/README.md b/tools/test_apps/system/ram_loadable_app/README.md index 76930508c72..d284a950d86 100644 --- a/tools/test_apps/system/ram_loadable_app/README.md +++ b/tools/test_apps/system/ram_loadable_app/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | # RAM loadable app Example diff --git a/tools/test_apps/system/startup/README.md b/tools/test_apps/system/startup/README.md index 3a502b1f86f..7b96141437e 100644 --- a/tools/test_apps/system/startup/README.md +++ b/tools/test_apps/system/startup/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- | From 156c1c0891c411d98a6a2db9cf729b4c1baa0469 Mon Sep 17 00:00:00 2001 From: laokaiyao Date: Tue, 16 Jul 2024 16:56:36 +0800 Subject: [PATCH 059/113] fix(etm): fix the outdated etm source on c5 --- .../soc/esp32c5/include/soc/soc_etm_source.h | 112 +++++++++--------- 1 file changed, 56 insertions(+), 56 deletions(-) diff --git a/components/soc/esp32c5/include/soc/soc_etm_source.h b/components/soc/esp32c5/include/soc/soc_etm_source.h index 32470c56fb8..d3d24514300 100644 --- a/components/soc/esp32c5/include/soc/soc_etm_source.h +++ b/components/soc/esp32c5/include/soc/soc_etm_source.h @@ -30,8 +30,8 @@ #define GPIO_EVT_CH5_ANY_EDGE 22 #define GPIO_EVT_CH6_ANY_EDGE 23 #define GPIO_EVT_CH7_ANY_EDGE 24 -#define GPIO_EVT_ZERO_DET_POS 25 -#define GPIO_EVT_ZERO_DET_NEG 26 +#define GPIO_EVT_ZERO_DET_POS0 25 +#define GPIO_EVT_ZERO_DET_NEG0 26 #define LEDC_EVT_DUTY_CHNG_END_CH0 27 #define LEDC_EVT_DUTY_CHNG_END_CH1 28 #define LEDC_EVT_DUTY_CHNG_END_CH2 29 @@ -111,44 +111,44 @@ #define REGDMA_EVT_ERR1 103 #define REGDMA_EVT_ERR2 104 #define REGDMA_EVT_ERR3 105 -#define GDMA_EVT_IN_DONE_CH0 106 -#define GDMA_EVT_IN_DONE_CH1 107 -#define GDMA_EVT_IN_DONE_CH2 108 -#define GDMA_EVT_IN_SUC_EOF_CH0 109 -#define GDMA_EVT_IN_SUC_EOF_CH1 110 -#define GDMA_EVT_IN_SUC_EOF_CH2 111 -#define GDMA_EVT_IN_FIFO_EMPTY_CH0 112 -#define GDMA_EVT_IN_FIFO_EMPTY_CH1 113 -#define GDMA_EVT_IN_FIFO_EMPTY_CH2 114 -#define GDMA_EVT_IN_FIFO_FULL_CH0 115 -#define GDMA_EVT_IN_FIFO_FULL_CH1 116 -#define GDMA_EVT_IN_FIFO_FULL_CH2 117 -#define GDMA_EVT_OUT_DONE_CH0 118 -#define GDMA_EVT_OUT_DONE_CH1 119 -#define GDMA_EVT_OUT_DONE_CH2 120 -#define GDMA_EVT_OUT_EOF_CH0 121 -#define GDMA_EVT_OUT_EOF_CH1 122 -#define GDMA_EVT_OUT_EOF_CH2 123 -#define GDMA_EVT_OUT_TOTAL_EOF_CH0 124 -#define GDMA_EVT_OUT_TOTAL_EOF_CH1 125 -#define GDMA_EVT_OUT_TOTAL_EOF_CH2 126 -#define GDMA_EVT_OUT_FIFO_EMPTY_CH0 127 -#define GDMA_EVT_OUT_FIFO_EMPTY_CH1 128 -#define GDMA_EVT_OUT_FIFO_EMPTY_CH2 129 -#define GDMA_EVT_OUT_FIFO_FULL_CH0 130 -#define GDMA_EVT_OUT_FIFO_FULL_CH1 131 -#define GDMA_EVT_OUT_FIFO_FULL_CH2 132 -#define TMPSNSR_EVT_OVER_LIMIT 133 -#define I2S0_EVT_RX_DONE 134 -#define I2S0_EVT_TX_DONE 135 -#define I2S0_EVT_X_WORDS_RECEIVED 136 -#define I2S0_EVT_X_WORDS_SENT 137 -#define ULP_EVT_ERR_INTR 138 -#define ULP_EVT_HALT 139 -#define ULP_EVT_START_INTR 140 -#define RTC_EVT_TICK 141 -#define RTC_EVT_OVF 142 -#define RTC_EVT_CMP 143 +#define TMPSNSR_EVT_OVER_LIMIT 106 +#define I2S0_EVT_RX_DONE 107 +#define I2S0_EVT_TX_DONE 108 +#define I2S0_EVT_X_WORDS_RECEIVED 109 +#define I2S0_EVT_X_WORDS_SENT 110 +#define ULP_EVT_ERR_INTR 111 +#define ULP_EVT_HALT 112 +#define ULP_EVT_START_INTR 113 +#define RTC_EVT_TICK 114 +#define RTC_EVT_OVF 115 +#define RTC_EVT_CMP 116 +#define GDMA_EVT_IN_DONE_CH0 117 +#define GDMA_EVT_IN_DONE_CH1 118 +#define GDMA_EVT_IN_DONE_CH2 119 +#define GDMA_EVT_IN_SUC_EOF_CH0 120 +#define GDMA_EVT_IN_SUC_EOF_CH1 121 +#define GDMA_EVT_IN_SUC_EOF_CH2 122 +#define GDMA_EVT_IN_FIFO_EMPTY_CH0 123 +#define GDMA_EVT_IN_FIFO_EMPTY_CH1 124 +#define GDMA_EVT_IN_FIFO_EMPTY_CH2 125 +#define GDMA_EVT_IN_FIFO_FULL_CH0 126 +#define GDMA_EVT_IN_FIFO_FULL_CH1 127 +#define GDMA_EVT_IN_FIFO_FULL_CH2 128 +#define GDMA_EVT_OUT_DONE_CH0 129 +#define GDMA_EVT_OUT_DONE_CH1 130 +#define GDMA_EVT_OUT_DONE_CH2 131 +#define GDMA_EVT_OUT_EOF_CH0 132 +#define GDMA_EVT_OUT_EOF_CH1 133 +#define GDMA_EVT_OUT_EOF_CH2 134 +#define GDMA_EVT_OUT_TOTAL_EOF_CH0 135 +#define GDMA_EVT_OUT_TOTAL_EOF_CH1 136 +#define GDMA_EVT_OUT_TOTAL_EOF_CH2 137 +#define GDMA_EVT_OUT_FIFO_EMPTY_CH0 138 +#define GDMA_EVT_OUT_FIFO_EMPTY_CH1 139 +#define GDMA_EVT_OUT_FIFO_EMPTY_CH2 140 +#define GDMA_EVT_OUT_FIFO_FULL_CH0 141 +#define GDMA_EVT_OUT_FIFO_FULL_CH1 142 +#define GDMA_EVT_OUT_FIFO_FULL_CH2 143 #define PMU_EVT_SLEEP_WEEKUP 144 #define GPIO_TASK_CH0_SET 1 #define GPIO_TASK_CH1_SET 2 @@ -280,22 +280,22 @@ #define REGDMA_TASK_START1 128 #define REGDMA_TASK_START2 129 #define REGDMA_TASK_START3 130 -#define GDMA_TASK_IN_START_CH0 131 -#define GDMA_TASK_IN_START_CH1 132 -#define GDMA_TASK_IN_START_CH2 133 -#define GDMA_TASK_OUT_START_CH0 134 -#define GDMA_TASK_OUT_START_CH1 135 -#define GDMA_TASK_OUT_START_CH2 136 -#define TMPSNSR_TASK_START_SAMPLE 137 -#define TMPSNSR_TASK_STOP_SAMPLE 138 -#define I2S0_TASK_START_RX 139 -#define I2S0_TASK_START_TX 140 -#define I2S0_TASK_STOP_RX 141 -#define I2S0_TASK_STOP_TX 142 +#define TMPSNSR_TASK_START_SAMPLE 131 +#define TMPSNSR_TASK_STOP_SAMPLE 132 +#define I2S0_TASK_START_RX 133 +#define I2S0_TASK_START_TX 134 +#define I2S0_TASK_STOP_RX 135 +#define I2S0_TASK_STOP_TX 136 #define ULP_TASK_WAKEUP_CPU 137 #define ULP_TASK_INT_CPU 138 -#define RTC_TASK_START 145 -#define RTC_TASK_STOP 146 -#define RTC_TASK_CLR 147 -#define RTC_TASK_TRIGGERFLW 148 +#define RTC_TASK_START 139 +#define RTC_TASK_STOP 140 +#define RTC_TASK_CLR 141 +#define RTC_TASK_TRIGGERFLW 142 +#define GDMA_TASK_IN_START_CH0 143 +#define GDMA_TASK_IN_START_CH1 144 +#define GDMA_TASK_IN_START_CH2 145 +#define GDMA_TASK_OUT_START_CH0 146 +#define GDMA_TASK_OUT_START_CH1 147 +#define GDMA_TASK_OUT_START_CH2 148 #define PMU_TASK_SLEEP_REQ 149 From ddc3c2b78be402c037835aca2d350dc8f4067832 Mon Sep 17 00:00:00 2001 From: Peter Marcisovsky Date: Tue, 16 Jul 2024 11:32:22 +0200 Subject: [PATCH 060/113] refactor(usb_host): Update USB Host multiconfig public API - previous usb_host_get_config_desc_free() - updated usb_host_free_config_desc() --- components/usb/include/usb/usb_host.h | 4 ++-- .../usb/test_apps/usb_host/main/multiconf_client_async.c | 2 +- components/usb/usb_host.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/components/usb/include/usb/usb_host.h b/components/usb/include/usb/usb_host.h index 823a42b1585..b9a1c4dabb1 100644 --- a/components/usb/include/usb/usb_host.h +++ b/components/usb/include/usb/usb_host.h @@ -352,7 +352,7 @@ esp_err_t usb_host_get_active_config_descriptor(usb_device_handle_t dev_hdl, con * - The USB Host library only caches a device's active configuration descriptor. * - This function reads any configuration descriptor of a particular device (specified by bConfigurationValue). * - This function will read the specified configuration descriptor via control transfers, and allocate memory to store that descriptor. - * - Users can call usb_host_get_config_desc_free() to free the descriptor's memory afterwards. + * - Users can call usb_host_free_config_desc() to free the descriptor's memory afterwards. * * @note This function can block * @note A client must call usb_host_device_open() on the device first @@ -373,7 +373,7 @@ esp_err_t usb_host_get_config_desc(usb_host_client_handle_t client_hdl, usb_devi * @param[out] config_desc Configuration descriptor * @return esp_err_t */ -esp_err_t usb_host_get_config_desc_free(const usb_config_desc_t *config_desc); +esp_err_t usb_host_free_config_desc(const usb_config_desc_t *config_desc); // ----------------------------------------------- Interface Functions ------------------------------------------------- diff --git a/components/usb/test_apps/usb_host/main/multiconf_client_async.c b/components/usb/test_apps/usb_host/main/multiconf_client_async.c index 26e67069a9a..811a1dbdc14 100644 --- a/components/usb/test_apps/usb_host/main/multiconf_client_async.c +++ b/components/usb/test_apps/usb_host/main/multiconf_client_async.c @@ -146,7 +146,7 @@ void multiconf_client_async_task(void *arg) TEST_ASSERT_EQUAL_MEMORY_MESSAGE(config_desc_ref, multiconf_obj.config_desc_cached, sizeof(usb_config_desc_t), "Configuration descriptors do not match"); // Free the memory used to store the config descriptor - TEST_ASSERT_EQUAL(ESP_OK, usb_host_get_config_desc_free(multiconf_obj.config_desc_cached)); + TEST_ASSERT_EQUAL(ESP_OK, usb_host_free_config_desc(multiconf_obj.config_desc_cached)); multiconf_obj.next_stage = TEST_STAGE_DEV_CLOSE; skip_event_handling = true; break; diff --git a/components/usb/usb_host.c b/components/usb/usb_host.c index 9bbf31c19d1..2f5dc6fbed9 100644 --- a/components/usb/usb_host.c +++ b/components/usb/usb_host.c @@ -1173,7 +1173,7 @@ esp_err_t usb_host_get_config_desc(usb_host_client_handle_t client_hdl, usb_devi return ret; } -esp_err_t usb_host_get_config_desc_free(const usb_config_desc_t *config_desc) +esp_err_t usb_host_free_config_desc(const usb_config_desc_t *config_desc) { HOST_CHECK(config_desc != NULL, ESP_ERR_INVALID_ARG); heap_caps_free((usb_config_desc_t*)config_desc); From 38bdfe195e8a679a140398adf59b40840197f71d Mon Sep 17 00:00:00 2001 From: Armando Date: Tue, 16 Jul 2024 11:48:47 +0800 Subject: [PATCH 061/113] fix(aes): fixed aes wrong dma desc alignment --- components/mbedtls/port/aes/dma/esp_aes_dma_core.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/components/mbedtls/port/aes/dma/esp_aes_dma_core.c b/components/mbedtls/port/aes/dma/esp_aes_dma_core.c index 928252cc204..e09310355ed 100644 --- a/components/mbedtls/port/aes/dma/esp_aes_dma_core.c +++ b/components/mbedtls/port/aes/dma/esp_aes_dma_core.c @@ -615,7 +615,8 @@ int esp_aes_process_dma(esp_aes_context *ctx, const unsigned char *input, unsign } #if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE - if (esp_cache_msync(output_desc, ALIGN_UP(output_dma_desc_num * sizeof(crypto_dma_desc_t), output_cache_line_size), ESP_CACHE_MSYNC_FLAG_DIR_M2C) != ESP_OK) { + size_t output_desc_cache_line_size = get_cache_line_size(output_desc); + if (esp_cache_msync(output_desc, ALIGN_UP(output_dma_desc_num * sizeof(crypto_dma_desc_t), output_desc_cache_line_size), ESP_CACHE_MSYNC_FLAG_DIR_M2C) != ESP_OK) { ESP_LOGE(TAG, "Output DMA descriptor cache sync M2C failed"); ret = -1; goto cleanup; @@ -834,7 +835,8 @@ int esp_aes_process_dma_gcm(esp_aes_context *ctx, const unsigned char *input, un } #if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE - if (esp_cache_msync(output_desc, ALIGN_UP(output_dma_desc_num * sizeof(crypto_dma_desc_t), output_cache_line_size), ESP_CACHE_MSYNC_FLAG_DIR_M2C) != ESP_OK) { + size_t output_desc_cache_line_size = get_cache_line_size(output_desc); + if (esp_cache_msync(output_desc, ALIGN_UP(output_dma_desc_num * sizeof(crypto_dma_desc_t), output_desc_cache_line_size), ESP_CACHE_MSYNC_FLAG_DIR_M2C) != ESP_OK) { ESP_LOGE(TAG, "Output DMA descriptor cache sync M2C failed"); ret = -1; goto cleanup; From da4c55fdbbc6b6415cadb1ab1aab20ce6c86face Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Tue, 18 Jun 2024 20:39:34 +0800 Subject: [PATCH 062/113] feat(esp_hw_support): support esp32p4 gpio wakeup deepsleep --- components/esp_hw_support/include/esp_private/esp_pmu.h | 6 +++++- components/esp_hw_support/sleep_modes.c | 4 ++-- components/soc/esp32c2/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c2/include/soc/soc_caps.h | 1 + components/soc/esp32c3/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c3/include/soc/soc_caps.h | 1 + components/soc/esp32c5/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c5/include/soc/soc_caps.h | 1 + components/soc/esp32c6/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c6/include/soc/soc_caps.h | 1 + components/soc/esp32c61/include/soc/Kconfig.soc_caps.in | 4 ++++ components/soc/esp32c61/include/soc/soc_caps.h | 1 + components/soc/esp32p4/include/soc/Kconfig.soc_caps.in | 8 ++++++++ components/soc/esp32p4/include/soc/soc_caps.h | 2 ++ 14 files changed, 42 insertions(+), 3 deletions(-) diff --git a/components/esp_hw_support/include/esp_private/esp_pmu.h b/components/esp_hw_support/include/esp_private/esp_pmu.h index 02a2c5762f8..47db5ab0666 100644 --- a/components/esp_hw_support/include/esp_private/esp_pmu.h +++ b/components/esp_hw_support/include/esp_private/esp_pmu.h @@ -62,7 +62,11 @@ typedef enum { #define RTC_EXT1_TRIG_EN 0 #endif -#define RTC_GPIO_TRIG_EN PMU_GPIO_WAKEUP_EN //!< GPIO wakeup +#if SOC_LP_IO_HAS_INDEPENDENT_WAKEUP_SOURCE +#define RTC_GPIO_TRIG_EN (PMU_GPIO_WAKEUP_EN | PMU_LP_GPIO_WAKEUP_EN) //!< GPIO & LP_GPIO wakeup +#else +#define RTC_GPIO_TRIG_EN (PMU_GPIO_WAKEUP_EN) +#endif #if SOC_LP_TIMER_SUPPORTED #define RTC_TIMER_TRIG_EN PMU_LP_TIMER_WAKEUP_EN //!< Timer wakeup diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index 63fcec1f3d3..0c84bf9f4c1 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -217,8 +217,8 @@ typedef struct { uint32_t ext0_rtc_gpio_num : 5; #endif #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP - uint32_t gpio_wakeup_mask : 8; // 8 is the maximum RTCIO number in all chips that support GPIO wakeup - uint32_t gpio_trigger_mode : 8; + uint32_t gpio_wakeup_mask : SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT; // Only RTC_GPIO supports wakeup deepsleep + uint32_t gpio_trigger_mode : SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT; #endif uint32_t sleep_time_adjustment; uint32_t ccount_ticks_record; diff --git a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in index c8fd88516dd..2e711551174 100644 --- a/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c2/include/soc/Kconfig.soc_caps.in @@ -311,6 +311,10 @@ config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK int default 0 +config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT + int + default 6 + config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK hex default 0x00000000001FFFC0 diff --git a/components/soc/esp32c2/include/soc/soc_caps.h b/components/soc/esp32c2/include/soc/soc_caps.h index 545f4e5cdbc..9ee2f14fed6 100644 --- a/components/soc/esp32c2/include/soc/soc_caps.h +++ b/components/soc/esp32c2/include/soc/soc_caps.h @@ -135,6 +135,7 @@ #define SOC_GPIO_OUT_RANGE_MAX 20 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5) +#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (6) // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_6~GPIO_NUM_20) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x00000000001FFFC0ULL diff --git a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in index d16372d9724..95dff02b456 100644 --- a/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c3/include/soc/Kconfig.soc_caps.in @@ -403,6 +403,10 @@ config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK int default 0 +config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT + int + default 6 + config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK hex default 0x00000000003FFFC0 diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h index 1b18dda18a8..e51177a0518 100644 --- a/components/soc/esp32c3/include/soc/soc_caps.h +++ b/components/soc/esp32c3/include/soc/soc_caps.h @@ -173,6 +173,7 @@ #define SOC_GPIO_OUT_RANGE_MAX 21 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5) +#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (6) // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_6~GPIO_NUM_21) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x00000000003FFFC0ULL diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index 9563ff9a9b6..7237c4d01fa 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -351,6 +351,10 @@ config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK int default 0 +config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT + int + default 8 + config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK hex default 0x0000000001FFFF00 diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index d64a2d66133..f52f09d9e3c 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -210,6 +210,7 @@ #define SOC_GPIO_OUT_RANGE_MAX 28 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6 | BIT7) +#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (8) // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_8~GPIO_NUM_28) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x0000000001FFFF00ULL diff --git a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in index 8c3894401bb..5f0e1d9ee43 100644 --- a/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c6/include/soc/Kconfig.soc_caps.in @@ -503,6 +503,10 @@ config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK int default 0 +config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT + int + default 8 + config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK hex default 0x000000007FFFFF00 diff --git a/components/soc/esp32c6/include/soc/soc_caps.h b/components/soc/esp32c6/include/soc/soc_caps.h index f062dcd9c75..9a75285a3bf 100644 --- a/components/soc/esp32c6/include/soc/soc_caps.h +++ b/components/soc/esp32c6/include/soc/soc_caps.h @@ -204,6 +204,7 @@ #define SOC_GPIO_OUT_RANGE_MAX 30 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6 | BIT7) +#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (8) // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_8~GPIO_NUM_30) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x000000007FFFFF00ULL diff --git a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in index 43920c58115..5fefbfe6fba 100644 --- a/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c61/include/soc/Kconfig.soc_caps.in @@ -191,6 +191,10 @@ config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK int default 0 +config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT + int + default 7 + config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK hex default 0x00000000003FFF80 diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index 1a38385826f..c0bbd26d916 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -201,6 +201,7 @@ #define SOC_GPIO_OUT_RANGE_MAX 21 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6) +#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (7) // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_7~GPIO_NUM_21) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x00000000003FFF80ULL diff --git a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in index 7b0f8b7842e..df3a8813b7a 100644 --- a/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32p4/include/soc/Kconfig.soc_caps.in @@ -599,6 +599,10 @@ config SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP bool default y +config SOC_LP_IO_HAS_INDEPENDENT_WAKEUP_SOURCE + bool + default y + config SOC_GPIO_VALID_GPIO_MASK hex default 0x007FFFFFFFFFFFFF @@ -615,6 +619,10 @@ config SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK int default 0 +config SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT + int + default 16 + config SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK hex default 0x007FFFFFFFFF0000 diff --git a/components/soc/esp32p4/include/soc/soc_caps.h b/components/soc/esp32p4/include/soc/soc_caps.h index d82591c07f2..9b39b548074 100644 --- a/components/soc/esp32p4/include/soc/soc_caps.h +++ b/components/soc/esp32p4/include/soc/soc_caps.h @@ -233,6 +233,7 @@ #define SOC_GPIO_SUPPORT_RTC_INDEPENDENT (1) // GPIO0~15 on ESP32P4 can support chip deep sleep wakeup #define SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP (1) +#define SOC_LP_IO_HAS_INDEPENDENT_WAKEUP_SOURCE (1) #define SOC_GPIO_VALID_GPIO_MASK (0x007FFFFFFFFFFFFF) #define SOC_GPIO_VALID_OUTPUT_GPIO_MASK SOC_GPIO_VALID_GPIO_MASK @@ -241,6 +242,7 @@ #define SOC_GPIO_OUT_RANGE_MAX 54 #define SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK (0ULL | 0xFFFF) +#define SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT (16) // digital I/O pad powered by VDD3P3_CPU or VDD_SPI(GPIO_NUM_16~GPIO_NUM_54) #define SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK 0x007FFFFFFFFF0000ULL From f43b3afcec3b8089fee6dfa4f901b66e24f40f8c Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Wed, 19 Jun 2024 20:37:36 +0800 Subject: [PATCH 063/113] fix(esp_hw_support): hold LP_IO mode if LP_PERI domain powerdown in sleep --- components/esp_hw_support/port/esp32p4/pmu_sleep.c | 9 ++++++--- .../port/esp32p4/private_include/pmu_param.h | 11 ++++++++++- 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/components/esp_hw_support/port/esp32p4/pmu_sleep.c b/components/esp_hw_support/port/esp32p4/pmu_sleep.c index 04355078fdf..cdda568baab 100644 --- a/components/esp_hw_support/port/esp32p4/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32p4/pmu_sleep.c @@ -154,6 +154,10 @@ const pmu_sleep_config_t* pmu_sleep_config_default( if (dslp) { config->param.lp_sys.analog_wait_target_cycle = rtc_time_us_to_slowclk(PMU_LP_ANALOG_WAIT_TARGET_TIME_DSLP_US, slowclk_period); + + pmu_sleep_digital_config_t digital_default = PMU_SLEEP_DIGITAL_DSLP_CONFIG_DEFAULT(pd_flags); + config->digital = digital_default; + pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags); config->analog = analog_default; } else { @@ -200,6 +204,7 @@ static void pmu_sleep_power_init(pmu_context_t *ctx, const pmu_sleep_power_confi static void pmu_sleep_digital_init(pmu_context_t *ctx, const pmu_sleep_digital_config_t *dig) { pmu_ll_hp_set_dig_pad_slp_sel (ctx->hal->dev, HP(SLEEP), dig->syscntl.dig_pad_slp_sel); + pmu_ll_hp_set_hold_all_lp_pad (ctx->hal->dev, HP(SLEEP), dig->syscntl.lp_pad_hold_all); } static void pmu_sleep_analog_init(pmu_context_t *ctx, const pmu_sleep_analog_config_t *analog, bool dslp) @@ -255,9 +260,7 @@ void pmu_sleep_init(const pmu_sleep_config_t *config, bool dslp) { assert(PMU_instance()); pmu_sleep_power_init(PMU_instance(), &config->power, dslp); - if(!dslp){ - pmu_sleep_digital_init(PMU_instance(), &config->digital); - } + pmu_sleep_digital_init(PMU_instance(), &config->digital); pmu_sleep_analog_init(PMU_instance(), &config->analog, dslp); pmu_sleep_param_init(PMU_instance(), &config->param, dslp); } diff --git a/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h b/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h index a3c48c04202..0d2bb42bf65 100644 --- a/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h +++ b/components/esp_hw_support/port/esp32p4/private_include/pmu_param.h @@ -314,9 +314,18 @@ typedef struct { pmu_hp_sys_cntl_reg_t syscntl; } pmu_sleep_digital_config_t; + +#define PMU_SLEEP_DIGITAL_DSLP_CONFIG_DEFAULT(pd_flags) { \ + .syscntl = { \ + .dig_pad_slp_sel = 0, \ + .lp_pad_hold_all = (pd_flags & PMU_SLEEP_PD_LP_PERIPH) ? 1 : 0, \ + } \ +} + #define PMU_SLEEP_DIGITAL_LSLP_CONFIG_DEFAULT(pd_flags) { \ .syscntl = { \ - .dig_pad_slp_sel = ((pd_flags) & PMU_SLEEP_PD_TOP) ? 0 : 1, \ + .dig_pad_slp_sel = (pd_flags & PMU_SLEEP_PD_TOP) ? 0 : 1, \ + .lp_pad_hold_all = (pd_flags & PMU_SLEEP_PD_LP_PERIPH) ? 1 : 0, \ } \ } From cb8c67f55fa1ab87418b3100b3c0feb41a513094 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Thu, 27 Jun 2024 16:19:15 +0800 Subject: [PATCH 064/113] feat(example): update gpio/ext1 wakeup avaliable IO num in example Kconfig --- examples/system/deep_sleep/main/Kconfig.projbuild | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/examples/system/deep_sleep/main/Kconfig.projbuild b/examples/system/deep_sleep/main/Kconfig.projbuild index 51dffc1f8ca..7c34046cda6 100644 --- a/examples/system/deep_sleep/main/Kconfig.projbuild +++ b/examples/system/deep_sleep/main/Kconfig.projbuild @@ -44,6 +44,7 @@ menu "Example Configuration" range 7 14 if IDF_TARGET_ESP32H2 range 0 21 if IDF_TARGET_ESP32S2 range 0 21 if IDF_TARGET_ESP32S3 + range 0 15 if IDF_TARGET_ESP32P4 choice EXAMPLE_EXT1_WAKEUP_PIN_1_SEL prompt "Enable wakeup from PIN_1" @@ -118,6 +119,7 @@ menu "Example Configuration" range 7 14 if IDF_TARGET_ESP32H2 range 0 21 if IDF_TARGET_ESP32S2 range 0 21 if IDF_TARGET_ESP32S3 + range 0 15 if IDF_TARGET_ESP32P4 choice EXAMPLE_EXT1_WAKEUP_PIN_2_SEL prompt "Enable wakeup from PIN_2" @@ -247,7 +249,7 @@ menu "Example Configuration" if we turn off the RTC_PERIPH domain or if certain chips lack the RTC_PERIPH domain, we will use the HOLD feature to maintain the pull-up and pull-down on the pins during sleep. but if we turn on the RTC_PERIPH domain, we don not need to use HOLD feature and this will - increase some power comsumption. + increase some power consumption. EXT0 wakeup source resides in the same power domain as RTCIO (RTC Periph), so internal pull-up/downs are always available. There's no need to explicitly force it on for EXT0. @@ -259,7 +261,7 @@ menu "Example Configuration" depends on SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP help This option enables wake up from GPIO. Be aware that if you use low level to trigger wakeup, we strongly - recommand you to connect external pull-up resistance. + recommend you to connect external pull-up resistance. menu "GPIO wakeup configuration" visible if EXAMPLE_GPIO_WAKEUP @@ -268,6 +270,7 @@ menu "Example Configuration" int "Enable wakeup from GPIO" default 0 range 0 7 if IDF_TARGET_ESP32C6 + range 0 15 if IDF_TARGET_ESP32P4 range 0 5 if !IDF_TARGET_ESP32C6 config EXAMPLE_GPIO_WAKEUP_HIGH_LEVEL From c2bb64fbe847f6d81fefe260194db51b5b7c2436 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Thu, 11 Jul 2024 17:34:32 +0800 Subject: [PATCH 065/113] fix(esp_hw_support): stall another core during cpu/mem/apb freq switching --- .../esp_hw_support/port/esp32p4/rtc_clk.c | 23 ++++++++++++++++++- .../hal/esp32p4/include/hal/cpu_utility_ll.h | 4 ++++ 2 files changed, 26 insertions(+), 1 deletion(-) diff --git a/components/esp_hw_support/port/esp32p4/rtc_clk.c b/components/esp_hw_support/port/esp32p4/rtc_clk.c index 343aaf1955a..4bcccf422e1 100644 --- a/components/esp_hw_support/port/esp32p4/rtc_clk.c +++ b/components/esp_hw_support/port/esp32p4/rtc_clk.c @@ -14,6 +14,7 @@ #include "soc/rtc.h" #include "esp_private/rtc_clk.h" #include "esp_attr.h" +#include "esp_cpu.h" #include "esp_hw_log.h" #include "esp_rom_sys.h" #include "hal/clk_tree_ll.h" @@ -182,7 +183,13 @@ static void rtc_clk_cpu_freq_to_xtal(int cpu_freq, int div, bool to_default) clk_ll_mem_set_divider(mem_divider); clk_ll_sys_set_divider(sys_divider); clk_ll_apb_set_divider(apb_divider); +#if (!defined(BOOTLOADER_BUILD) && (CONFIG_FREERTOS_NUMBER_OF_CORES == 2)) + esp_cpu_stall(1 - esp_cpu_get_core_id()); +#endif clk_ll_bus_update(); +#if (!defined(BOOTLOADER_BUILD) && (CONFIG_FREERTOS_NUMBER_OF_CORES == 2)) + esp_cpu_unstall(1 - esp_cpu_get_core_id()); +#endif esp_rom_set_cpu_ticks_per_us(cpu_freq); } @@ -194,7 +201,13 @@ static void rtc_clk_cpu_freq_to_8m(void) clk_ll_sys_set_divider(1); clk_ll_apb_set_divider(1); clk_ll_cpu_set_src(SOC_CPU_CLK_SRC_RC_FAST); +#if (!defined(BOOTLOADER_BUILD) && (CONFIG_FREERTOS_NUMBER_OF_CORES == 2)) + esp_cpu_stall(1 - esp_cpu_get_core_id()); +#endif clk_ll_bus_update(); +#if (!defined(BOOTLOADER_BUILD) && (CONFIG_FREERTOS_NUMBER_OF_CORES == 2)) + esp_cpu_unstall(1 - esp_cpu_get_core_id()); +#endif esp_rom_set_cpu_ticks_per_us(20); } @@ -240,14 +253,22 @@ static void rtc_clk_cpu_freq_to_cpll_mhz(int cpu_freq_mhz, hal_utils_clk_div_t * // Update bit does not control CPU clock sel mux. Therefore, there may be a middle state during the switch (CPU rises) // Since this is upscaling, we need to configure the frequency division coefficient before switching the clock source. // Otherwise, an intermediate state will occur, in the intermediate state, the frequency of APB/MEM does not meet the - // timing requirements. If there are periperals/CPU access that depend on these two clocks at this moment, some exception + // timing requirements. If there are periperals access that depend on these two clocks at this moment, some exception // might occur. clk_ll_cpu_set_divider(div->integer, div->numerator, div->denominator); clk_ll_mem_set_divider(mem_divider); clk_ll_sys_set_divider(sys_divider); clk_ll_apb_set_divider(apb_divider); +#if (!defined(BOOTLOADER_BUILD) && (CONFIG_FREERTOS_NUMBER_OF_CORES == 2)) + // During frequency switching, non-frequency switching cores may have ongoing memory accesses, which may cause access + // failures, stalling non-frequency switching cores here can avoid such failures. + esp_cpu_stall(1 - esp_cpu_get_core_id()); +#endif clk_ll_bus_update(); clk_ll_cpu_set_src(SOC_CPU_CLK_SRC_PLL); +#if (!defined(BOOTLOADER_BUILD) && (CONFIG_FREERTOS_NUMBER_OF_CORES == 2)) + esp_cpu_unstall(1 - esp_cpu_get_core_id()); +#endif esp_rom_set_cpu_ticks_per_us(cpu_freq_mhz); } diff --git a/components/hal/esp32p4/include/hal/cpu_utility_ll.h b/components/hal/esp32p4/include/hal/cpu_utility_ll.h index 38a21cfc3c2..f9686b8ceae 100644 --- a/components/hal/esp32p4/include/hal/cpu_utility_ll.h +++ b/components/hal/esp32p4/include/hal/cpu_utility_ll.h @@ -31,8 +31,10 @@ FORCE_INLINE_ATTR void cpu_utility_ll_stall_cpu(uint32_t cpu_no) { if (cpu_no == 0) { HAL_FORCE_MODIFY_U32_REG_FIELD(PMU.cpu_sw_stall, hpcore0_stall_code, 0x86); + while(!REG_GET_BIT(HP_SYSTEM_CPU_CORESTALLED_ST_REG, HP_SYSTEM_REG_CORE0_CORESTALLED_ST)); } else { HAL_FORCE_MODIFY_U32_REG_FIELD(PMU.cpu_sw_stall, hpcore1_stall_code, 0x86); + while(!REG_GET_BIT(HP_SYSTEM_CPU_CORESTALLED_ST_REG, HP_SYSTEM_REG_CORE1_CORESTALLED_ST)); } } @@ -40,8 +42,10 @@ FORCE_INLINE_ATTR void cpu_utility_ll_unstall_cpu(uint32_t cpu_no) { if (cpu_no == 0) { HAL_FORCE_MODIFY_U32_REG_FIELD(PMU.cpu_sw_stall, hpcore0_stall_code, 0xFF); + while(REG_GET_BIT(HP_SYSTEM_CPU_CORESTALLED_ST_REG, HP_SYSTEM_REG_CORE0_CORESTALLED_ST)); } else { HAL_FORCE_MODIFY_U32_REG_FIELD(PMU.cpu_sw_stall, hpcore1_stall_code, 0xFF); + while(REG_GET_BIT(HP_SYSTEM_CPU_CORESTALLED_ST_REG, HP_SYSTEM_REG_CORE1_CORESTALLED_ST)); } } #endif // SOC_CPU_CORES_NUM > 1 From c503e385ab9af596ba79630af7935880a513af23 Mon Sep 17 00:00:00 2001 From: Armando Date: Tue, 16 Jul 2024 11:04:52 +0800 Subject: [PATCH 066/113] fix(dma): fix esp_dma_is_buffer_alignment_satisfied align issue when l2 cache line 128B --- components/esp_hw_support/dma/esp_dma_utils.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_hw_support/dma/esp_dma_utils.c b/components/esp_hw_support/dma/esp_dma_utils.c index a8e7611a741..0c1f0df1af8 100644 --- a/components/esp_hw_support/dma/esp_dma_utils.c +++ b/components/esp_hw_support/dma/esp_dma_utils.c @@ -130,7 +130,7 @@ bool esp_dma_is_buffer_alignment_satisfied(const void *ptr, size_t size, esp_dma int cache_flags = 0; size_t cache_alignment_bytes = 0; if (esp_ptr_external_ram(ptr)) { - cache_flags |= ESP_DMA_MALLOC_FLAG_PSRAM; + cache_flags |= MALLOC_CAP_SPIRAM; } esp_err_t ret = esp_cache_get_alignment(cache_flags, &cache_alignment_bytes); assert(ret == ESP_OK); From 74a04c140cc9c095d14883d6b7c79f6fde98a1d0 Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Tue, 16 Jul 2024 15:35:10 +0800 Subject: [PATCH 067/113] feat(ulp): add option for routing LP-printf to HP console --- .../esp_rom/esp32p4/ld/esp32p4lp.rom.api.ld | 9 ++++ components/ulp/Kconfig | 19 ++++++++ components/ulp/cmake/CMakeLists.txt | 2 + .../lp_core/include/ulp_lp_core_print.h | 7 +++ .../ulp/lp_core/lp_core/lp_core_print.c | 30 +++++++++++-- .../ulp/lp_core/lp_core/lp_core_startup.c | 11 ++++- .../{ => lp_core_basic_tests}/CMakeLists.txt | 2 +- .../{ => lp_core_basic_tests}/README.md | 0 .../main/CMakeLists.txt | 0 .../main/lp_core/test_main.c | 0 .../main/lp_core/test_main_counter.c | 0 .../main/lp_core/test_main_gpio.c | 0 .../main/lp_core/test_main_i2c.c | 0 .../main/lp_core/test_main_isr.c | 0 .../main/lp_core/test_main_set_timer_wakeup.c | 0 .../main/lp_core/test_main_spi_master.c | 0 .../main/lp_core/test_main_spi_slave.c | 0 .../main/lp_core/test_main_uart.c | 0 .../main/lp_core/test_shared.h | 0 .../main/test_app_main.c | 0 .../main/test_lp_core.c | 0 .../main/test_lp_core_etm.c | 0 .../main/test_lp_core_i2c.c | 0 .../main/test_lp_core_spi.c | 0 .../main/test_lp_core_uart.c | 0 .../pytest_lp_core_basic.py} | 2 +- .../sdkconfig.ci.default | 0 .../sdkconfig.defaults | 0 .../lp_core/lp_core_hp_uart/CMakeLists.txt | 14 ++++++ .../lp_core/lp_core_hp_uart/README.md | 3 ++ .../lp_core_hp_uart/main/CMakeLists.txt | 11 +++++ .../main/lp_core/test_hello_main.c | 16 +++++++ .../lp_core_hp_uart/main/test_app_main.c | 41 ++++++++++++++++++ .../lp_core_hp_uart/main/test_lp_core.c | 43 +++++++++++++++++++ .../lp_core_hp_uart/pytest_lp_core_hp_uart.py | 14 ++++++ .../lp_core_hp_uart/sdkconfig.ci.default | 0 .../lp_core_hp_uart/sdkconfig.defaults | 7 +++ docs/en/api-reference/system/ulp-lp-core.rst | 2 + 38 files changed, 226 insertions(+), 7 deletions(-) create mode 100644 components/esp_rom/esp32p4/ld/esp32p4lp.rom.api.ld rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/CMakeLists.txt (94%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/README.md (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/CMakeLists.txt (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/lp_core/test_main.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/lp_core/test_main_counter.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/lp_core/test_main_gpio.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/lp_core/test_main_i2c.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/lp_core/test_main_isr.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/lp_core/test_main_set_timer_wakeup.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/lp_core/test_main_spi_master.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/lp_core/test_main_spi_slave.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/lp_core/test_main_uart.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/lp_core/test_shared.h (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/test_app_main.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/test_lp_core.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/test_lp_core_etm.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/test_lp_core_i2c.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/test_lp_core_spi.c (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/main/test_lp_core_uart.c (100%) rename components/ulp/test_apps/lp_core/{pytest_lp_core.py => lp_core_basic_tests/pytest_lp_core_basic.py} (91%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/sdkconfig.ci.default (100%) rename components/ulp/test_apps/lp_core/{ => lp_core_basic_tests}/sdkconfig.defaults (100%) create mode 100644 components/ulp/test_apps/lp_core/lp_core_hp_uart/CMakeLists.txt create mode 100644 components/ulp/test_apps/lp_core/lp_core_hp_uart/README.md create mode 100644 components/ulp/test_apps/lp_core/lp_core_hp_uart/main/CMakeLists.txt create mode 100644 components/ulp/test_apps/lp_core/lp_core_hp_uart/main/lp_core/test_hello_main.c create mode 100644 components/ulp/test_apps/lp_core/lp_core_hp_uart/main/test_app_main.c create mode 100644 components/ulp/test_apps/lp_core/lp_core_hp_uart/main/test_lp_core.c create mode 100644 components/ulp/test_apps/lp_core/lp_core_hp_uart/pytest_lp_core_hp_uart.py create mode 100644 components/ulp/test_apps/lp_core/lp_core_hp_uart/sdkconfig.ci.default create mode 100644 components/ulp/test_apps/lp_core/lp_core_hp_uart/sdkconfig.defaults diff --git a/components/esp_rom/esp32p4/ld/esp32p4lp.rom.api.ld b/components/esp_rom/esp32p4/ld/esp32p4lp.rom.api.ld new file mode 100644 index 00000000000..4d7fc793e20 --- /dev/null +++ b/components/esp_rom/esp32p4/ld/esp32p4lp.rom.api.ld @@ -0,0 +1,9 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +/** ROM APIs + */ + +PROVIDE ( esp_rom_output_putc = uart_tx_one_char ); diff --git a/components/ulp/Kconfig b/components/ulp/Kconfig index 94167bd5dfa..53be58f8292 100644 --- a/components/ulp/Kconfig +++ b/components/ulp/Kconfig @@ -106,6 +106,25 @@ menu "Ultra Low Power (ULP) Co-processor" Disabling this option will reduce the LP core binary size by not linking in panic handler functionality. + config ULP_HP_UART_CONSOLE_PRINT + depends on ULP_COPROC_TYPE_LP_CORE + bool + prompt "Route lp_core_printf to the console HP-UART" + help + Set this option to route lp_core_printf to the console HP-UART. + This allows you to easily view print outputs from the LP core, without + having to connect to the LP-UART. This option comes with the following + limitations: + + 1. There is no mutual exclusion between the HP-Core and the LP-Core accessing + the HP-UART, which means that if both cores are logging heavily the output + strings might get mangled together. + 2. The HP-UART can only work while the HP-Core is running, which means that + if the HP-Core is in deep sleep, the LP-Core will not be able to print to the + console HP-UART. + + Due to these limitations it is only recommended to use this option for easy debugging. + For more serious use-cases you should use the LP-UART. endmenu endmenu # Ultra Low Power (ULP) Co-processor diff --git a/components/ulp/cmake/CMakeLists.txt b/components/ulp/cmake/CMakeLists.txt index 0664238e4cc..20db7cdb3f1 100644 --- a/components/ulp/cmake/CMakeLists.txt +++ b/components/ulp/cmake/CMakeLists.txt @@ -135,6 +135,8 @@ elseif(CONFIG_ULP_COPROC_TYPE_LP_CORE) PRIVATE SHELL:-T ${IDF_PATH}/components/esp_rom/${IDF_TARGET}/ld/${IDF_TARGET}lp.rom.newlib.ld) target_link_options(${ULP_APP_NAME} PRIVATE SHELL:-T ${IDF_PATH}/components/esp_rom/${IDF_TARGET}/ld/${IDF_TARGET}lp.rom.version.ld) + target_link_options(${ULP_APP_NAME} + PRIVATE SHELL:-T ${IDF_PATH}/components/esp_rom/${IDF_TARGET}/ld/${IDF_TARGET}lp.rom.api.ld) endif() target_sources(${ULP_APP_NAME} PRIVATE ${ULP_S_SOURCES}) diff --git a/components/ulp/lp_core/lp_core/include/ulp_lp_core_print.h b/components/ulp/lp_core/lp_core/include/ulp_lp_core_print.h index 6544ba72014..27a080581df 100644 --- a/components/ulp/lp_core/lp_core/include/ulp_lp_core_print.h +++ b/components/ulp/lp_core/lp_core/include/ulp_lp_core_print.h @@ -37,3 +37,10 @@ void lp_core_printf(const char* format, ...); extern void ets_install_uart_printf(void); #define lp_core_install_uart_print ets_install_uart_printf #endif /* CONFIG_ULP_ROM_PRINT_ENABLE */ + +/** + * @brief Print a single character from the LP core + * + * @param c character to be printed + */ +void lp_core_print_char(char c); diff --git a/components/ulp/lp_core/lp_core/lp_core_print.c b/components/ulp/lp_core/lp_core/lp_core_print.c index a14a91bcc64..0a704c28a32 100644 --- a/components/ulp/lp_core/lp_core/lp_core_print.c +++ b/components/ulp/lp_core/lp_core/lp_core_print.c @@ -6,25 +6,47 @@ #include #include "sdkconfig.h" #include "ulp_lp_core_uart.h" - -#if !CONFIG_ULP_ROM_PRINT_ENABLE +#include "hal/uart_hal.h" +#include "esp_rom_uart.h" #define LP_UART_PORT_NUM LP_UART_NUM_0 #define BINARY_SUPPORT 1 #define is_digit(c) ((c >= '0') && (c <= '9')) +#if CONFIG_ULP_HP_UART_CONSOLE_PRINT +void __attribute__((alias("hp_uart_send_char"))) lp_core_print_char(char c); + +static void hp_uart_send_char(char t) +{ + uart_dev_t *uart = (uart_dev_t *)UART_LL_GET_HW(CONFIG_ESP_CONSOLE_UART_NUM); + + while (uart_ll_get_txfifo_len(uart) < 2) { + ; + } + uart_ll_write_txfifo(uart, &t, 1); +} +#elif !CONFIG_ULP_ROM_PRINT_ENABLE +void __attribute__((alias("lp_uart_send_char"))) lp_core_print_char(char c); static void lp_uart_send_char(char c) { int tx_len = 0; int loop_cnt = 0; - /* Write one byte to LP UART. Break after few iterations if we are stuck for any reason. */ while (tx_len != 1 && loop_cnt < 1000) { tx_len = lp_core_uart_tx_chars(LP_UART_PORT_NUM, (const void *)&c, 1); loop_cnt++; } } +#else +void __attribute__((alias("lp_rom_send_char"))) lp_core_print_char(char c); +static void lp_rom_send_char(char c) +{ + esp_rom_output_putc(c); +} +#endif // CONFIG_ULP_HP_UART_CONSOLE_PRINT + +#if !CONFIG_ULP_ROM_PRINT_ENABLE // Ported over ROM function _cvt() static int lp_core_cvt(unsigned long long val, char *buf, long radix, char *digits) @@ -268,7 +290,7 @@ int lp_core_printf(const char* format, ...) va_start(ap, format); /* Pass the input string and the argument list to ets_vprintf() */ - int ret = lp_core_ets_vprintf(lp_uart_send_char, format, ap); + int ret = lp_core_ets_vprintf(lp_core_print_char, format, ap); va_end(ap); diff --git a/components/ulp/lp_core/lp_core/lp_core_startup.c b/components/ulp/lp_core/lp_core/lp_core_startup.c index 4d87b07fd1a..81cd5c91bc8 100644 --- a/components/ulp/lp_core/lp_core/lp_core_startup.c +++ b/components/ulp/lp_core/lp_core/lp_core_startup.c @@ -1,18 +1,27 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ +#include "sdkconfig.h" #include "soc/soc_caps.h" +#include "esp_rom_caps.h" +#include "rom/ets_sys.h" #include "ulp_lp_core_utils.h" #include "ulp_lp_core_lp_timer_shared.h" #include "ulp_lp_core_memory_shared.h" +#include "ulp_lp_core_print.h" extern void main(); /* Initialize lp core related system functions before calling user's main*/ void lp_core_startup() { + +#if CONFIG_ULP_HP_UART_CONSOLE_PRINT && ESP_ROM_HAS_LP_ROM + ets_install_putc1(lp_core_print_char); +#endif + ulp_lp_core_update_wakeup_cause(); main(); diff --git a/components/ulp/test_apps/lp_core/CMakeLists.txt b/components/ulp/test_apps/lp_core/lp_core_basic_tests/CMakeLists.txt similarity index 94% rename from components/ulp/test_apps/lp_core/CMakeLists.txt rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/CMakeLists.txt index 5a16c97e491..2881fcd2f42 100644 --- a/components/ulp/test_apps/lp_core/CMakeLists.txt +++ b/components/ulp/test_apps/lp_core/lp_core_basic_tests/CMakeLists.txt @@ -11,4 +11,4 @@ set(EXTRA_COMPONENT_DIRS set(COMPONENTS main) include($ENV{IDF_PATH}/tools/cmake/project.cmake) -project(lp_core_test) +project(lp_core_basic_tests) diff --git a/components/ulp/test_apps/lp_core/README.md b/components/ulp/test_apps/lp_core/lp_core_basic_tests/README.md similarity index 100% rename from components/ulp/test_apps/lp_core/README.md rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/README.md diff --git a/components/ulp/test_apps/lp_core/main/CMakeLists.txt b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/CMakeLists.txt similarity index 100% rename from components/ulp/test_apps/lp_core/main/CMakeLists.txt rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/CMakeLists.txt diff --git a/components/ulp/test_apps/lp_core/main/lp_core/test_main.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/lp_core/test_main.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main.c diff --git a/components/ulp/test_apps/lp_core/main/lp_core/test_main_counter.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_counter.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/lp_core/test_main_counter.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_counter.c diff --git a/components/ulp/test_apps/lp_core/main/lp_core/test_main_gpio.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_gpio.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/lp_core/test_main_gpio.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_gpio.c diff --git a/components/ulp/test_apps/lp_core/main/lp_core/test_main_i2c.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_i2c.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/lp_core/test_main_i2c.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_i2c.c diff --git a/components/ulp/test_apps/lp_core/main/lp_core/test_main_isr.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_isr.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/lp_core/test_main_isr.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_isr.c diff --git a/components/ulp/test_apps/lp_core/main/lp_core/test_main_set_timer_wakeup.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_set_timer_wakeup.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/lp_core/test_main_set_timer_wakeup.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_set_timer_wakeup.c diff --git a/components/ulp/test_apps/lp_core/main/lp_core/test_main_spi_master.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_spi_master.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/lp_core/test_main_spi_master.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_spi_master.c diff --git a/components/ulp/test_apps/lp_core/main/lp_core/test_main_spi_slave.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_spi_slave.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/lp_core/test_main_spi_slave.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_spi_slave.c diff --git a/components/ulp/test_apps/lp_core/main/lp_core/test_main_uart.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_uart.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/lp_core/test_main_uart.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_main_uart.c diff --git a/components/ulp/test_apps/lp_core/main/lp_core/test_shared.h b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_shared.h similarity index 100% rename from components/ulp/test_apps/lp_core/main/lp_core/test_shared.h rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/lp_core/test_shared.h diff --git a/components/ulp/test_apps/lp_core/main/test_app_main.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_app_main.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/test_app_main.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_app_main.c diff --git a/components/ulp/test_apps/lp_core/main/test_lp_core.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/test_lp_core.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core.c diff --git a/components/ulp/test_apps/lp_core/main/test_lp_core_etm.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_etm.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/test_lp_core_etm.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_etm.c diff --git a/components/ulp/test_apps/lp_core/main/test_lp_core_i2c.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_i2c.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/test_lp_core_i2c.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_i2c.c diff --git a/components/ulp/test_apps/lp_core/main/test_lp_core_spi.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_spi.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/test_lp_core_spi.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_spi.c diff --git a/components/ulp/test_apps/lp_core/main/test_lp_core_uart.c b/components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_uart.c similarity index 100% rename from components/ulp/test_apps/lp_core/main/test_lp_core_uart.c rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/main/test_lp_core_uart.c diff --git a/components/ulp/test_apps/lp_core/pytest_lp_core.py b/components/ulp/test_apps/lp_core/lp_core_basic_tests/pytest_lp_core_basic.py similarity index 91% rename from components/ulp/test_apps/lp_core/pytest_lp_core.py rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/pytest_lp_core_basic.py index 0c8a36668c3..325bd2ca59f 100644 --- a/components/ulp/test_apps/lp_core/pytest_lp_core.py +++ b/components/ulp/test_apps/lp_core/lp_core_basic_tests/pytest_lp_core_basic.py @@ -1,4 +1,4 @@ -# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD +# SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD # SPDX-License-Identifier: CC0-1.0 import pytest from pytest_embedded import Dut diff --git a/components/ulp/test_apps/lp_core/sdkconfig.ci.default b/components/ulp/test_apps/lp_core/lp_core_basic_tests/sdkconfig.ci.default similarity index 100% rename from components/ulp/test_apps/lp_core/sdkconfig.ci.default rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/sdkconfig.ci.default diff --git a/components/ulp/test_apps/lp_core/sdkconfig.defaults b/components/ulp/test_apps/lp_core/lp_core_basic_tests/sdkconfig.defaults similarity index 100% rename from components/ulp/test_apps/lp_core/sdkconfig.defaults rename to components/ulp/test_apps/lp_core/lp_core_basic_tests/sdkconfig.defaults diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/CMakeLists.txt b/components/ulp/test_apps/lp_core/lp_core_hp_uart/CMakeLists.txt new file mode 100644 index 00000000000..2c8bfb98612 --- /dev/null +++ b/components/ulp/test_apps/lp_core/lp_core_hp_uart/CMakeLists.txt @@ -0,0 +1,14 @@ +# This is the project CMakeLists.txt file for the test subproject +cmake_minimum_required(VERSION 3.16) + +list(PREPEND SDKCONFIG_DEFAULTS "$ENV{IDF_PATH}/tools/test_apps/configs/sdkconfig.debug_helpers" "sdkconfig.defaults") + +set(EXTRA_COMPONENT_DIRS + "$ENV{IDF_PATH}/tools/unit-test-app/components" +) + +# "Trim" the build. Include the minimal set of components, main, and anything it depends on. +set(COMPONENTS main) + +include($ENV{IDF_PATH}/tools/cmake/project.cmake) +project(lp_core_hp_uart_test) diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/README.md b/components/ulp/test_apps/lp_core/lp_core_hp_uart/README.md new file mode 100644 index 00000000000..59db987a228 --- /dev/null +++ b/components/ulp/test_apps/lp_core/lp_core_hp_uart/README.md @@ -0,0 +1,3 @@ +| Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-P4 | +| ----------------- | -------- | -------- | -------- | + diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/CMakeLists.txt b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/CMakeLists.txt new file mode 100644 index 00000000000..6fce89dfdde --- /dev/null +++ b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/CMakeLists.txt @@ -0,0 +1,11 @@ +set(app_sources "test_app_main.c" "test_lp_core.c") +set(lp_core_sources "lp_core/test_hello_main.c") + +idf_component_register(SRCS ${app_sources} + INCLUDE_DIRS "lp_core" + REQUIRES ulp unity esp_timer test_utils + WHOLE_ARCHIVE) + +set(lp_core_exp_dep_srcs ${app_sources}) + +ulp_embed_binary(lp_core_test_app "${lp_core_sources}" "${lp_core_exp_dep_srcs}") diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/lp_core/test_hello_main.c b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/lp_core/test_hello_main.c new file mode 100644 index 00000000000..3c844cec7df --- /dev/null +++ b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/lp_core/test_hello_main.c @@ -0,0 +1,16 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include "ulp_lp_core_print.h" + +int main(void) +{ + lp_core_printf("Hello, World!\n"); + + return 0; +} diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/test_app_main.c b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/test_app_main.c new file mode 100644 index 00000000000..d8a9a98ccc0 --- /dev/null +++ b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/test_app_main.c @@ -0,0 +1,41 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "unity.h" +#include "unity_test_runner.h" +#include "esp_heap_caps.h" + +// Some resources are lazy allocated in the sleep code, the threshold is left for that case +#define TEST_MEMORY_LEAK_THRESHOLD (-500) + +static size_t before_free_8bit; +static size_t before_free_32bit; + +static void check_leak(size_t before_free, size_t after_free, const char *type) +{ + ssize_t delta = after_free - before_free; + printf("MALLOC_CAP_%s: Before %u bytes free, After %u bytes free (delta %d)\n", type, before_free, after_free, delta); + TEST_ASSERT_MESSAGE(delta >= TEST_MEMORY_LEAK_THRESHOLD, "memory leak"); +} + +void setUp(void) +{ + before_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT); + before_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT); +} + +void tearDown(void) +{ + size_t after_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT); + size_t after_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT); + check_leak(before_free_8bit, after_free_8bit, "8BIT"); + check_leak(before_free_32bit, after_free_32bit, "32BIT"); +} + +void app_main(void) +{ + unity_run_menu(); +} diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/test_lp_core.c b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/test_lp_core.c new file mode 100644 index 00000000000..0d3949cd59a --- /dev/null +++ b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/test_lp_core.c @@ -0,0 +1,43 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include "freertos/FreeRTOS.h" +#include "freertos/task.h" +#include "sdkconfig.h" +#include "unity.h" +#include "soc/soc_caps.h" +#include "esp_rom_caps.h" +#include "lp_core_test_app.h" +#include "ulp_lp_core.h" + +extern const uint8_t lp_core_main_bin_start[] asm("_binary_lp_core_test_app_bin_start"); +extern const uint8_t lp_core_main_bin_end[] asm("_binary_lp_core_test_app_bin_end"); + +static void load_and_start_lp_core_firmware(ulp_lp_core_cfg_t* cfg, const uint8_t* firmware_start, const uint8_t* firmware_end) +{ + TEST_ASSERT(ulp_lp_core_load_binary(firmware_start, + (firmware_end - firmware_start)) == ESP_OK); + + TEST_ASSERT(ulp_lp_core_run(cfg) == ESP_OK); + +} + +TEST_CASE("lp-print can output to hp-uart", "[lp_core]") +{ + /* Load ULP firmware and start the coprocessor */ + ulp_lp_core_cfg_t cfg = { + .wakeup_source = ULP_LP_CORE_WAKEUP_SOURCE_HP_CPU, + }; + + load_and_start_lp_core_firmware(&cfg, lp_core_main_bin_start, lp_core_main_bin_end); + + // Actual test output on UART is checked by pytest, not unity test-case + // We simply wait to allow the lp-core to run once + vTaskDelay(1000 / portTICK_PERIOD_MS); +} diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/pytest_lp_core_hp_uart.py b/components/ulp/test_apps/lp_core/lp_core_hp_uart/pytest_lp_core_hp_uart.py new file mode 100644 index 00000000000..df0edfec741 --- /dev/null +++ b/components/ulp/test_apps/lp_core/lp_core_hp_uart/pytest_lp_core_hp_uart.py @@ -0,0 +1,14 @@ +# SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD +# SPDX-License-Identifier: CC0-1.0 +import pytest +from pytest_embedded import Dut + + +@pytest.mark.esp32c5 +@pytest.mark.esp32c6 +@pytest.mark.esp32p4 +@pytest.mark.generic +def test_lp_core_hp_uart_print(dut: Dut) -> None: + dut.expect_exact('Press ENTER to see the list of tests') + dut.write('"lp-print can output to hp-uart"') + dut.expect_exact('Hello, World!') diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/sdkconfig.ci.default b/components/ulp/test_apps/lp_core/lp_core_hp_uart/sdkconfig.ci.default new file mode 100644 index 00000000000..e69de29bb2d diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/sdkconfig.defaults b/components/ulp/test_apps/lp_core/lp_core_hp_uart/sdkconfig.defaults new file mode 100644 index 00000000000..e3c08c60fa9 --- /dev/null +++ b/components/ulp/test_apps/lp_core/lp_core_hp_uart/sdkconfig.defaults @@ -0,0 +1,7 @@ +CONFIG_ESP_TASK_WDT_INIT=n + +CONFIG_ULP_COPROC_ENABLED=y +CONFIG_ULP_COPROC_TYPE_LP_CORE=y +CONFIG_ULP_COPROC_RESERVE_MEM=12000 +CONFIG_ULP_PANIC_OUTPUT_ENABLE=y +CONFIG_ULP_HP_UART_CONSOLE_PRINT=y diff --git a/docs/en/api-reference/system/ulp-lp-core.rst b/docs/en/api-reference/system/ulp-lp-core.rst index ec5bfa083e6..dd3cb7cd0c7 100644 --- a/docs/en/api-reference/system/ulp-lp-core.rst +++ b/docs/en/api-reference/system/ulp-lp-core.rst @@ -212,6 +212,8 @@ When programming the LP-Core, it can sometimes be challenging to figure out why * Use the LP-UART to print: the LP-Core has access to the LP-UART peripheral, which can be used for printing information independently of the main CPU sleep state. See :example:`system/ulp/lp_core/lp_uart/lp_uart_print` for an example of how to use this driver. +* Routing :cpp:func:`lp_core_printf` to the HP-Core console UART with :ref:`CONFIG_ULP_HP_UART_CONSOLE_PRINT`. This allows you to easily print LP-Core information to the already connected HP-Core console UART. The drawback of this approach is that it requires the main CPU to be awake and since there is no synchronization between the LP and HP cores, the output may be interleaved. + * Share program state through shared variables: as described in :ref:`ulp-lp-core-access-variables`, both the main CPU and the ULP core can easily access global variables in RTC memory. Writing state information to such a variable from the ULP and reading it from the main CPU can help you discern what is happening on the ULP core. The downside of this approach is that it requires the main CPU to be awake, which will not always be the case. Keeping the main CPU awake might even, in some cases, mask problems, as some issues may only occur when certain power domains are powered down. * Panic handler: the LP-Core has a panic handler that can dump the state of the LP-Core registers by the LP-UART when an exception is detected. To enable the panic handler, set the :ref:`CONFIG_ULP_PANIC_OUTPUT_ENABLE` option to ``y``. This option can be kept disabled to reduce LP-RAM usage by the LP-Core application. To recover a backtrace from the panic dump, it is possible to use esp-idf-monitor_., e.g.: From ceda7d04e4412c25ef83afb000b7108d2864e6dc Mon Sep 17 00:00:00 2001 From: zwl Date: Wed, 17 Jul 2024 17:23:28 +0800 Subject: [PATCH 068/113] feat(bluetooth/controller): support default tx power configurable on ESP32C6 and ESP32H2 --- components/bt/controller/esp32c6/Kconfig.in | 50 ++++++++++++++++ components/bt/controller/esp32c6/esp_bt_cfg.h | 2 +- components/bt/controller/esp32h2/Kconfig.in | 59 +++++++++++++++++++ components/bt/controller/esp32h2/esp_bt_cfg.h | 3 +- 4 files changed, 111 insertions(+), 3 deletions(-) diff --git a/components/bt/controller/esp32c6/Kconfig.in b/components/bt/controller/esp32c6/Kconfig.in index 665e34366a1..9de74d8f05f 100644 --- a/components/bt/controller/esp32c6/Kconfig.in +++ b/components/bt/controller/esp32c6/Kconfig.in @@ -621,3 +621,53 @@ config BT_LE_CCA_RSSI_THRESH default 20 help Power threshold of CCA in unit of -1 dBm. + +choice BT_LE_DFT_TX_POWER_LEVEL_DBM + prompt "BLE default Tx power level(dBm)" + default BT_LE_DFT_TX_POWER_LEVEL_P9 + help + Specify default Tx power level(dBm). + config BT_LE_DFT_TX_POWER_LEVEL_N15 + bool "-15dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N12 + bool "-12dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N9 + bool "-9dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N6 + bool "-6dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N3 + bool "-3dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N0 + bool "0dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P3 + bool "+3dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P6 + bool "+6dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P9 + bool "+9dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P12 + bool "+12dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P15 + bool "+15dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P18 + bool "+18dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P20 + bool "+20dBm" +endchoice + +config BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF + int + default -15 if BT_LE_DFT_TX_POWER_LEVEL_N15 + default -12 if BT_LE_DFT_TX_POWER_LEVEL_N12 + default -9 if BT_LE_DFT_TX_POWER_LEVEL_N9 + default -6 if BT_LE_DFT_TX_POWER_LEVEL_N6 + default -3 if BT_LE_DFT_TX_POWER_LEVEL_N3 + default 0 if BT_LE_DFT_TX_POWER_LEVEL_N0 + default 3 if BT_LE_DFT_TX_POWER_LEVEL_P3 + default 6 if BT_LE_DFT_TX_POWER_LEVEL_P6 + default 9 if BT_LE_DFT_TX_POWER_LEVEL_P9 + default 12 if BT_LE_DFT_TX_POWER_LEVEL_P12 + default 15 if BT_LE_DFT_TX_POWER_LEVEL_P15 + default 18 if BT_LE_DFT_TX_POWER_LEVEL_P18 + default 20 if BT_LE_DFT_TX_POWER_LEVEL_P20 + default 0 diff --git a/components/bt/controller/esp32c6/esp_bt_cfg.h b/components/bt/controller/esp32c6/esp_bt_cfg.h index b8bbfd3d4b7..4e24c186140 100644 --- a/components/bt/controller/esp32c6/esp_bt_cfg.h +++ b/components/bt/controller/esp32c6/esp_bt_cfg.h @@ -216,7 +216,7 @@ extern "C" { #define RTC_FREQ_N (32768) /* in Hz */ -#define BLE_LL_TX_PWR_DBM_N (9) +#define BLE_LL_TX_PWR_DBM_N (CONFIG_BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF) #define RUN_BQB_TEST (0) diff --git a/components/bt/controller/esp32h2/Kconfig.in b/components/bt/controller/esp32h2/Kconfig.in index e45aa2030ae..f68a615b7c2 100644 --- a/components/bt/controller/esp32h2/Kconfig.in +++ b/components/bt/controller/esp32h2/Kconfig.in @@ -613,3 +613,62 @@ config BT_LE_CCA_RSSI_THRESH default 20 help Power threshold of CCA in unit of -1 dBm. + +choice BT_LE_DFT_TX_POWER_LEVEL_DBM + prompt "BLE default Tx power level(dBm)" + default BT_LE_DFT_TX_POWER_LEVEL_P9 + help + Specify default Tx power level(dBm). + config BT_LE_DFT_TX_POWER_LEVEL_N24 + bool "-24dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N21 + bool "-21dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N18 + bool "-18dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N15 + bool "-15dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N12 + bool "-12dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N9 + bool "-9dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N6 + bool "-6dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N3 + bool "-3dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N0 + bool "0dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P3 + bool "+3dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P6 + bool "+6dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P9 + bool "+9dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P12 + bool "+12dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P15 + bool "+15dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P18 + bool "+18dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P20 + bool "+20dBm" +endchoice + +config BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF + int + default -24 if BT_LE_DFT_TX_POWER_LEVEL_N24 + default -21 if BT_LE_DFT_TX_POWER_LEVEL_N21 + default -18 if BT_LE_DFT_TX_POWER_LEVEL_N18 + default -15 if BT_LE_DFT_TX_POWER_LEVEL_N15 + default -12 if BT_LE_DFT_TX_POWER_LEVEL_N12 + default -9 if BT_LE_DFT_TX_POWER_LEVEL_N9 + default -6 if BT_LE_DFT_TX_POWER_LEVEL_N6 + default -3 if BT_LE_DFT_TX_POWER_LEVEL_N3 + default 0 if BT_LE_DFT_TX_POWER_LEVEL_N0 + default 3 if BT_LE_DFT_TX_POWER_LEVEL_P3 + default 6 if BT_LE_DFT_TX_POWER_LEVEL_P6 + default 9 if BT_LE_DFT_TX_POWER_LEVEL_P9 + default 12 if BT_LE_DFT_TX_POWER_LEVEL_P12 + default 15 if BT_LE_DFT_TX_POWER_LEVEL_P15 + default 18 if BT_LE_DFT_TX_POWER_LEVEL_P18 + default 20 if BT_LE_DFT_TX_POWER_LEVEL_P20 + default 0 diff --git a/components/bt/controller/esp32h2/esp_bt_cfg.h b/components/bt/controller/esp32h2/esp_bt_cfg.h index b8bbfd3d4b7..22a09be3adc 100644 --- a/components/bt/controller/esp32h2/esp_bt_cfg.h +++ b/components/bt/controller/esp32h2/esp_bt_cfg.h @@ -216,8 +216,7 @@ extern "C" { #define RTC_FREQ_N (32768) /* in Hz */ -#define BLE_LL_TX_PWR_DBM_N (9) - +#define BLE_LL_TX_PWR_DBM_N (CONFIG_BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF) #define RUN_BQB_TEST (0) #define RUN_QA_TEST (0) From 1a19463ceb0e977f36d77ce53a9c6a23db364978 Mon Sep 17 00:00:00 2001 From: zwl Date: Wed, 17 Jul 2024 17:27:42 +0800 Subject: [PATCH 069/113] feat(bluetooth/controller): support default tx power configurable on ESP32C2 --- components/bt/controller/esp32c2/Kconfig.in | 59 +++++++++++++++++++ components/bt/controller/esp32c2/esp_bt_cfg.h | 2 +- 2 files changed, 60 insertions(+), 1 deletion(-) diff --git a/components/bt/controller/esp32c2/Kconfig.in b/components/bt/controller/esp32c2/Kconfig.in index 8699b6b56c5..75355ed098e 100644 --- a/components/bt/controller/esp32c2/Kconfig.in +++ b/components/bt/controller/esp32c2/Kconfig.in @@ -540,3 +540,62 @@ config BT_LE_ROLE_OBSERVER_ENABLE default y help Enable observer role function. + +choice BT_LE_DFT_TX_POWER_LEVEL_DBM + prompt "BLE default Tx power level(dBm)" + default BT_LE_DFT_TX_POWER_LEVEL_P9 + help + Specify default Tx power level(dBm). + config BT_LE_DFT_TX_POWER_LEVEL_N24 + bool "-24dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N21 + bool "-21dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N18 + bool "-18dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N15 + bool "-15dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N12 + bool "-12dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N9 + bool "-9dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N6 + bool "-6dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N3 + bool "-3dBm" + config BT_LE_DFT_TX_POWER_LEVEL_N0 + bool "0dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P3 + bool "+3dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P6 + bool "+6dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P9 + bool "+9dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P12 + bool "+12dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P15 + bool "+15dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P18 + bool "+18dBm" + config BT_LE_DFT_TX_POWER_LEVEL_P20 + bool "+20dBm" +endchoice + +config BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF + int + default -24 if BT_LE_DFT_TX_POWER_LEVEL_N24 + default -21 if BT_LE_DFT_TX_POWER_LEVEL_N21 + default -18 if BT_LE_DFT_TX_POWER_LEVEL_N18 + default -15 if BT_LE_DFT_TX_POWER_LEVEL_N15 + default -12 if BT_LE_DFT_TX_POWER_LEVEL_N12 + default -9 if BT_LE_DFT_TX_POWER_LEVEL_N9 + default -6 if BT_LE_DFT_TX_POWER_LEVEL_N6 + default -3 if BT_LE_DFT_TX_POWER_LEVEL_N3 + default 0 if BT_LE_DFT_TX_POWER_LEVEL_N0 + default 3 if BT_LE_DFT_TX_POWER_LEVEL_P3 + default 6 if BT_LE_DFT_TX_POWER_LEVEL_P6 + default 9 if BT_LE_DFT_TX_POWER_LEVEL_P9 + default 12 if BT_LE_DFT_TX_POWER_LEVEL_P12 + default 15 if BT_LE_DFT_TX_POWER_LEVEL_P15 + default 18 if BT_LE_DFT_TX_POWER_LEVEL_P18 + default 20 if BT_LE_DFT_TX_POWER_LEVEL_P20 + default 0 diff --git a/components/bt/controller/esp32c2/esp_bt_cfg.h b/components/bt/controller/esp32c2/esp_bt_cfg.h index ff0db7c8919..456ddcf9a85 100644 --- a/components/bt/controller/esp32c2/esp_bt_cfg.h +++ b/components/bt/controller/esp32c2/esp_bt_cfg.h @@ -241,7 +241,7 @@ extern "C" { #define RTC_FREQ_N (32000) /* in Hz */ #endif // CONFIG_XTAL_FREQ_26 -#define BLE_LL_TX_PWR_DBM_N (9) +#define BLE_LL_TX_PWR_DBM_N (CONFIG_BT_LE_DFT_TX_POWER_LEVEL_DBM_EFF) #define RUN_BQB_TEST (0) From 01ee296db0e6444749ffdcbd8cd07305ab0172d6 Mon Sep 17 00:00:00 2001 From: Jan Beran Date: Mon, 15 Jul 2024 10:11:15 +0200 Subject: [PATCH 070/113] fix: fix various errors in Kconfig files --- components/app_trace/Kconfig | 7 ++++--- components/bootloader/Kconfig.log.format | 4 +++- components/bootloader/Kconfig.projbuild | 26 ++++++++++++------------ components/esp_system/Kconfig | 4 ++-- components/log/Kconfig.format | 8 ++++++-- components/mbedtls/Kconfig | 4 ++-- 6 files changed, 30 insertions(+), 23 deletions(-) diff --git a/components/app_trace/Kconfig b/components/app_trace/Kconfig index 9ff09cdb595..be61cfd49ef 100644 --- a/components/app_trace/Kconfig +++ b/components/app_trace/Kconfig @@ -14,6 +14,7 @@ menu "Application Level Tracing" config APPTRACE_DEST_NONE bool "None" + endchoice config APPTRACE_DEST_UART @@ -60,7 +61,7 @@ menu "Application Level Tracing" endchoice config APPTRACE_UART_TX_GPIO - int "UART TX on GPIO#" + int "UART TX on GPIO" depends on APPTRACE_DEST_UART_NOUSB range 0 46 default 12 if IDF_TARGET_ESP32 @@ -70,7 +71,7 @@ menu "Application Level Tracing" This GPIO is used for UART TX pin. config APPTRACE_UART_RX_GPIO - int "UART RX on GPIO#" + int "UART RX on GPIO" depends on APPTRACE_DEST_UART_NOUSB range 0 46 default 13 if IDF_TARGET_ESP32 @@ -213,7 +214,7 @@ menu "Application Level Tracing" depends on APPTRACE_SV_ENABLE default APPTRACE_SV_DEST_JTAG help - SystemView witt transfer data trough defined interface. + SystemView will transfer data through the defined interface. config APPTRACE_SV_DEST_JTAG bool "Data destination JTAG" diff --git a/components/bootloader/Kconfig.log.format b/components/bootloader/Kconfig.log.format index 985fa5f43a4..b1b877b0a99 100644 --- a/components/bootloader/Kconfig.log.format +++ b/components/bootloader/Kconfig.log.format @@ -28,9 +28,11 @@ menu "Format" config BOOTLOADER_LOG_TIMESTAMP_SOURCE_NONE bool "None" - depends on No # hide it now, turn it on final MR + depends on NO_SYMBOL # hide it now, turn it on final MR + config BOOTLOADER_LOG_TIMESTAMP_SOURCE_CPU_TICKS bool "Milliseconds Since Boot" + endchoice # BOOTLOADER_LOG_TIMESTAMP_SOURCE endmenu diff --git a/components/bootloader/Kconfig.projbuild b/components/bootloader/Kconfig.projbuild index 4ac03c56cd1..ea0ea7d4bda 100644 --- a/components/bootloader/Kconfig.projbuild +++ b/components/bootloader/Kconfig.projbuild @@ -145,7 +145,7 @@ menu "Bootloader config" config BOOTLOADER_FACTORY_RESET bool "GPIO triggers factory reset" - default N + default n select BOOTLOADER_RESERVE_RTC_MEM if SOC_RTC_FAST_MEM_SUPPORTED help Allows to reset the device to factory settings: @@ -200,7 +200,7 @@ menu "Bootloader config" config BOOTLOADER_APP_TEST bool "GPIO triggers boot from test app partition" - default N + default n depends on !BOOTLOADER_APP_ANTI_ROLLBACK help Allows to run the test app from "TEST" partition. @@ -763,7 +763,7 @@ menu "Security features" config SECURE_BOOT_ENABLE_AGGRESSIVE_KEY_REVOKE bool "Enable Aggressive key revoke strategy" depends on SECURE_BOOT && SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY - default N + default n help If this option is set, ROM bootloader will revoke the public key digest burned in efuse block if it fails to verify the signature of software bootloader with it. @@ -779,7 +779,7 @@ menu "Security features" config SECURE_BOOT_FLASH_BOOTLOADER_DEFAULT bool "Flash bootloader along with other artifacts when using the default flash command" depends on SECURE_BOOT_V2_ENABLED && SECURE_BOOT_BUILD_SIGNED_BINARIES - default N + default n help When Secure Boot V2 is enabled, by default the bootloader is not flashed along with other artifacts like the application and the partition table images, i.e. bootloader has to be separately flashed @@ -819,7 +819,7 @@ menu "Security features" config SECURE_BOOT_INSECURE bool "Allow potentially insecure options" depends on SECURE_BOOT - default N + default n help You can disable some of the default protections offered by secure boot, in order to enable testing or a custom combination of security features. @@ -830,7 +830,7 @@ menu "Security features" config SECURE_FLASH_ENC_ENABLED bool "Enable flash encryption on boot (READ DOCS FIRST)" - default N + default n select SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE help If this option is set, flash contents will be encrypted by the bootloader on first boot. @@ -917,7 +917,7 @@ menu "Security features" config SECURE_BOOT_ALLOW_ROM_BASIC bool "Leave ROM BASIC Interpreter available on reset" depends on (SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT) && IDF_TARGET_ESP32 - default N + default n help By default, the BASIC ROM Console starts on reset if no valid bootloader is read from the flash. @@ -932,7 +932,7 @@ menu "Security features" bool "Allow JTAG Debugging" depends on SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE - default N + default n help If not set (default), the bootloader will permanently disable JTAG (across entire chip) on first boot when either secure boot or flash encryption is enabled. @@ -979,7 +979,7 @@ menu "Security features" config SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS bool "Leave unused digest slots available (not revoke)" depends on SECURE_BOOT_INSECURE && SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS - default N + default n help If not set (default), during startup in the app all unused digest slots will be revoked. To revoke unused slot will be called esp_efuse_set_digest_revoke(num_digest) for each digest. @@ -998,7 +998,7 @@ menu "Security features" bool "Leave UART bootloader encryption enabled" depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE - default N + default n help If not set (default), the bootloader will permanently disable UART bootloader encryption access on first boot. If set, the UART bootloader will still be able to access hardware encryption. @@ -1008,7 +1008,7 @@ menu "Security features" config SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC bool "Leave UART bootloader decryption enabled" depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && IDF_TARGET_ESP32 - default N + default n help If not set (default), the bootloader will permanently disable UART bootloader decryption access on first boot. If set, the UART bootloader will still be able to access hardware decryption. @@ -1020,7 +1020,7 @@ menu "Security features" bool "Leave UART bootloader flash cache enabled" depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && \ (IDF_TARGET_ESP32 || SOC_EFUSE_DIS_DOWNLOAD_ICACHE || SOC_EFUSE_DIS_DOWNLOAD_DCACHE) # NOERROR - default N + default n select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE help If not set (default), the bootloader will permanently disable UART bootloader flash cache access on @@ -1031,7 +1031,7 @@ menu "Security features" config SECURE_FLASH_REQUIRE_ALREADY_ENABLED bool "Require flash encryption to be already enabled" depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT - default N + default n help If not set (default), and flash encryption is not yet enabled in eFuses, the 2nd stage bootloader will enable flash encryption: generate the flash encryption key and program eFuses. diff --git a/components/esp_system/Kconfig b/components/esp_system/Kconfig index 5a64617fed7..10fb36e3595 100644 --- a/components/esp_system/Kconfig +++ b/components/esp_system/Kconfig @@ -315,7 +315,7 @@ menu "ESP System Settings" default -1 if ESP_CONSOLE_NONE config ESP_CONSOLE_UART_TX_GPIO - int "UART TX on GPIO#" + int "UART TX on GPIO" depends on ESP_CONSOLE_UART_CUSTOM range 0 SOC_GPIO_OUT_RANGE_MAX default 1 if IDF_TARGET_ESP32 @@ -335,7 +335,7 @@ menu "ESP System Settings" is reconfigured after the bootloader exits and the app starts. config ESP_CONSOLE_UART_RX_GPIO - int "UART RX on GPIO#" + int "UART RX on GPIO" depends on ESP_CONSOLE_UART_CUSTOM range 0 SOC_GPIO_IN_RANGE_MAX default 3 if IDF_TARGET_ESP32 diff --git a/components/log/Kconfig.format b/components/log/Kconfig.format index 9e5b1bc6f72..ba0c6286ed8 100644 --- a/components/log/Kconfig.format +++ b/components/log/Kconfig.format @@ -39,14 +39,18 @@ menu "Format" config LOG_TIMESTAMP_SOURCE_NONE bool "None" - depends on No # hide it now, turn it on final MR + depends on NO_SYMBOL # hide it now, turn it on final MR + config LOG_TIMESTAMP_SOURCE_RTOS bool "Milliseconds Since Boot" + config LOG_TIMESTAMP_SOURCE_SYSTEM bool "System Time (HH:MM:SS.sss)" + config LOG_TIMESTAMP_SOURCE_SYSTEM_FULL bool "System Time (YY-MM-DD HH:MM:SS.sss)" - depends on No # hide it now, turn it on final MR + depends on NO_SYMBOL # hide it now, turn it on final MR + endchoice # LOG_TIMESTAMP_SOURCE endmenu diff --git a/components/mbedtls/Kconfig b/components/mbedtls/Kconfig index 0f4b84eb97f..77a92287c8a 100644 --- a/components/mbedtls/Kconfig +++ b/components/mbedtls/Kconfig @@ -246,11 +246,11 @@ menu "mbedTLS" See mbedTLS documentation for required API and more details. config MBEDTLS_PKCS7_C - bool "Enable PKCS #7" + bool "Enable PKCS number 7" default y depends on MBEDTLS_X509_CRL_PARSE_C help - Enable PKCS #7 core for using PKCS #7-formatted signatures. + Enable PKCS number 7 core for using PKCS number 7-formatted signatures. config MBEDTLS_SSL_CID_PADDING_GRANULARITY int "Record plaintext padding" From cd59d96ff44d23977c954d8c9a6bdc9eb0c5afa6 Mon Sep 17 00:00:00 2001 From: Aleksei Apaseev Date: Tue, 2 Jul 2024 17:38:41 +0800 Subject: [PATCH 071/113] ci: add dut_log_url column to failed testcases report Introduced changes: - add xml attribute "dut_log_url" to pytest report - add column "dut_log_url" to failed testcases table of dynamic pipeline report - make the table header sticky - add permalinks to the Table Titles - split target test report by testcase type for better clarity - fix the logic of finding the testcases failed on cur branch / other branches --- .gitlab/ci/post_deploy.yml | 1 + conftest.py | 28 ++ tools/ci/dynamic_pipelines/models.py | 1 + tools/ci/dynamic_pipelines/report.py | 361 ++++++++++++------ .../scripts/generate_report.py | 12 +- .../templates/generate_target_test_report.yml | 3 + .../templates/report.template.html | 53 ++- .../reports_sample_data/XUNIT_REPORT.xml | 34 +- .../expected_job_report.html | 56 ++- .../expected_target_test_report.html | 102 +++-- .../test_report_generator.py | 31 +- tools/ci/dynamic_pipelines/utils.py | 51 ++- 12 files changed, 531 insertions(+), 202 deletions(-) diff --git a/.gitlab/ci/post_deploy.yml b/.gitlab/ci/post_deploy.yml index 0c28b547511..fe1ea90f834 100644 --- a/.gitlab/ci/post_deploy.yml +++ b/.gitlab/ci/post_deploy.yml @@ -3,6 +3,7 @@ generate_failed_jobs_report: tags: [build, shiny] image: $ESP_ENV_IMAGE when: always + dependencies: [] # Do not download artifacts from the previous stages artifacts: expire_in: 1 week when: always diff --git a/conftest.py b/conftest.py index 7d8290b071f..af6d356a0e6 100644 --- a/conftest.py +++ b/conftest.py @@ -252,6 +252,34 @@ def set_test_case_name(request: FixtureRequest, test_case_name: str) -> None: request.node.funcargs['test_case_name'] = test_case_name +@pytest.fixture(autouse=True) +def set_dut_log_url(record_xml_attribute: t.Callable[[str, object], None], _pexpect_logfile: str) -> t.Generator: + # Record the "dut_log_url" attribute in the XML report once test execution finished + yield + + if not isinstance(_pexpect_logfile, str): + record_xml_attribute('dut_log_url', 'No log URL found') + return + + ci_pages_url = os.getenv('CI_PAGES_URL') + logdir_pattern = re.compile(rf'({DEFAULT_LOGDIR}/.*)') + match = logdir_pattern.search(_pexpect_logfile) + + if not match: + record_xml_attribute('dut_log_url', 'No log URL found') + return + + if not ci_pages_url: + record_xml_attribute('dut_log_url', _pexpect_logfile) + return + + job_id = os.getenv('CI_JOB_ID', '0') + modified_ci_pages_url = ci_pages_url.replace('esp-idf', '-/esp-idf') + log_url = f'{modified_ci_pages_url}/-/jobs/{job_id}/artifacts/{match.group(1)}' + + record_xml_attribute('dut_log_url', log_url) + + ###################### # Log Util Functions # ###################### diff --git a/tools/ci/dynamic_pipelines/models.py b/tools/ci/dynamic_pipelines/models.py index e661e3ded31..b40d827448d 100644 --- a/tools/ci/dynamic_pipelines/models.py +++ b/tools/ci/dynamic_pipelines/models.py @@ -166,6 +166,7 @@ def from_test_case_node(cls, node: Element) -> t.Optional['TestCase']: 'time': float(node.attrib.get('time') or 0), 'ci_job_url': node.attrib.get('ci_job_url') or '', 'ci_dashboard_url': f'{grafana_base_url}?{encoded_params}', + 'dut_log_url': node.attrib.get('dut_log_url') or 'Not found', } failure_node = node.find('failure') diff --git a/tools/ci/dynamic_pipelines/report.py b/tools/ci/dynamic_pipelines/report.py index dd3951c107d..be8fce0af35 100644 --- a/tools/ci/dynamic_pipelines/report.py +++ b/tools/ci/dynamic_pipelines/report.py @@ -1,11 +1,13 @@ # SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD # SPDX-License-Identifier: Apache-2.0 import abc +import copy import fnmatch import html import os import re import typing as t +from textwrap import dedent import yaml from artifacts_handler import ArtifactType @@ -21,20 +23,24 @@ from .models import GitlabJob from .models import TestCase from .utils import fetch_failed_testcases_failure_ratio +from .utils import format_permalink +from .utils import get_report_url from .utils import is_url from .utils import load_known_failure_cases class ReportGenerator: - REGEX_PATTERN = '#### {}[^####]+' + REGEX_PATTERN = r'#### {}\n[\s\S]*?(?=\n#### |$)' - def __init__(self, project_id: int, mr_iid: int, pipeline_id: int, *, title: str): + def __init__(self, project_id: int, mr_iid: int, pipeline_id: int, job_id: int, commit_id: str, *, title: str): gl_project = Gitlab(project_id).project if mr_iid is not None: self.mr = gl_project.mergerequests.get(mr_iid) else: self.mr = None self.pipeline_id = pipeline_id + self.job_id = job_id + self.commit_id = commit_id self.title = title self.output_filepath = self.title.lower().replace(' ', '_') + '.html' @@ -47,10 +53,30 @@ def get_download_link_for_url(url: str) -> str: return '' + def write_report_to_file(self, report_str: str, job_id: int, output_filepath: str) -> t.Optional[str]: + """ + Writes the report to a file and constructs a modified URL based on environment settings. + + :param report_str: The report content to be written to the file. + :param job_id: The job identifier used to construct the URL. + :param output_filepath: The path to the output file. + :return: The modified URL pointing to the job's artifacts. + """ + if not report_str: + return None + with open(output_filepath, 'w') as file: + file.write(report_str) + + # for example, {URL}/-/esp-idf/-/jobs/{id}/artifacts/list_job_84.txt + # CI_PAGES_URL is {URL}/esp-idf, which missed one `-` + report_url: str = get_report_url(job_id, output_filepath) + return report_url + def generate_html_report(self, table_str: str) -> str: # we're using bootstrap table - table_str = table_str.replace('', '
') - + table_str = table_str.replace( + '
', '
' + ) with open(REPORT_TEMPLATE_FILEPATH) as fr: template = fr.read() @@ -62,19 +88,16 @@ def table_to_html_str(table: PrettyTable) -> str: def create_table_section( self, - report_sections: list, title: str, items: list, headers: list, row_attrs: list, value_functions: t.Optional[list] = None, - ) -> None: + ) -> t.List: """ Appends a formatted section to a report based on the provided items. This section includes a header and a table constructed from the items list with specified headers and attributes. - :param report_sections: List where the HTML report sections are collected. This list is - modified in-place by appending new sections. :param title: Title for the report section. This title is used as a header above the table. :param items: List of item objects to include in the table. Each item should have attributes that correspond to the row_attrs and value_functions specified. @@ -86,17 +109,34 @@ def create_table_section( a function that takes an item and returns a string. This is used for generating dynamic columns based on item data. - :return: None. The function modifies the 'report_sections' list by appending new HTML sections. + :return: List with appended HTML sections. """ if not items: - return + return [] - report_sections.append(f'

{title}

') - report_sections.append( + report_sections = [ + f"""

{title}

""", self._create_table_for_items( items=items, headers=headers, row_attrs=row_attrs, value_functions=value_functions or [] - ) - ) + ), + ] + return report_sections + + @staticmethod + def generate_additional_info_section(title: str, count: int, report_url: t.Optional[str] = None) -> str: + """ + Generate a section for the additional info string. + + :param title: The title of the section. + :param count: The count of test cases. + :param report_url: The URL of the report. If count = 0, only the count will be included. + :return: The formatted additional info section string. + """ + if count != 0 and report_url: + return f'- **{title}:** [{count}]({report_url}/#{format_permalink(title)})\n' + else: + return f'- **{title}:** {count}\n' def _create_table_for_items( self, @@ -185,7 +225,7 @@ def key_func(item: t.Any) -> t.Any: def _get_report_str(self) -> str: raise NotImplementedError - def post_report(self, job_id: int, commit_id: str) -> None: + def post_report(self, print_report_path: bool = True) -> None: # report in html format, otherwise will exceed the limit comment = f'#### {self.title}\n' @@ -194,18 +234,12 @@ def post_report(self, job_id: int, commit_id: str) -> None: if self.additional_info: comment += f'{self.additional_info}\n' - if report_str: - with open(self.output_filepath, 'w') as fw: - fw.write(report_str) - - # for example, {URL}/-/esp-idf/-/jobs/{id}/artifacts/list_job_84.txt - # CI_PAGES_URL is {URL}/esp-idf, which missed one `-` - url = os.getenv('CI_PAGES_URL', '').replace('esp-idf', '-/esp-idf') + report_url_path = self.write_report_to_file(report_str, self.job_id, self.output_filepath) + if print_report_path and report_url_path: + comment += dedent(f""" + Full {self.title} here: {report_url_path} (with commit {self.commit_id[:8]} - comment += f""" -Full {self.title} here: {url}/-/jobs/{job_id}/artifacts/{self.output_filepath} (with commit {commit_id[:8]}) - -""" + """) print(comment) if self.mr is None: @@ -234,11 +268,13 @@ def __init__( project_id: int, mr_iid: int, pipeline_id: int, + job_id: int, + commit_id: str, *, title: str = 'Build Report', apps: t.List[App], ): - super().__init__(project_id, mr_iid, pipeline_id, title=title) + super().__init__(project_id, mr_iid, pipeline_id, job_id, commit_id, title=title) self.apps = apps self.apps_presigned_url_filepath = TEST_RELATED_APPS_DOWNLOAD_URLS_FILENAME @@ -365,14 +401,26 @@ def __init__( project_id: int, mr_iid: int, pipeline_id: int, + job_id: int, + commit_id: str, *, title: str = 'Target Test Report', test_cases: t.List[TestCase], ): - super().__init__(project_id, mr_iid, pipeline_id, title=title) + super().__init__(project_id, mr_iid, pipeline_id, job_id, commit_id, title=title) self.test_cases = test_cases self._known_failure_cases_set = None + self.report_titles_map = { + 'failed_yours': 'Failed Test Cases on Your branch (Excludes Known Failure Cases)', + 'failed_others': 'Failed Test Cases on Other branches (Excludes Known Failure Cases)', + 'failed_known': 'Known Failure Cases', + 'skipped': 'Skipped Test Cases', + 'succeeded': 'Succeeded Test Cases', + } + self.skipped_test_cases_report_file = 'skipped_cases.html' + self.succeeded_cases_report_file = 'succeeded_cases.html' + self.failed_cases_report_file = 'failed_cases.html' @property def known_failure_cases_set(self) -> t.Optional[t.Set[str]]: @@ -382,6 +430,10 @@ def known_failure_cases_set(self) -> t.Optional[t.Set[str]]: return self._known_failure_cases_set def get_known_failure_cases(self) -> t.List[TestCase]: + """ + Retrieve the known failure test cases. + :return: A list of known failure test cases. + """ if self.known_failure_cases_set is None: return [] matched_cases = [ @@ -392,109 +444,187 @@ def get_known_failure_cases(self) -> t.List[TestCase]: ] return matched_cases - def _get_report_str(self) -> str: + @staticmethod + def filter_test_cases( + cur_branch_failures: t.List[TestCase], + other_branch_failures: t.List[TestCase], + ) -> t.Tuple[t.List[TestCase], t.List[TestCase]]: """ - Generate a complete HTML report string by processing test cases. - :return: Complete HTML report string. + Filter the test cases into current branch failures and other branch failures. + + :param cur_branch_failures: List of failed test cases on the current branch. + :param other_branch_failures: List of failed test cases on other branches. + :return: A tuple containing two lists: + - failed_test_cases_cur_branch_only: Test cases that have failed only on the current branch. + - failed_test_cases_other_branch_exclude_cur_branch: Test cases that have failed on other branches + excluding the current branch. """ - report_parts: list = [] + cur_branch_unique_failures = [] + other_branch_failure_map = {tc.name: tc for tc in other_branch_failures} + + for cur_tc in cur_branch_failures: + if cur_tc.latest_failed_count > 0 and ( + cur_tc.name not in other_branch_failure_map + or other_branch_failure_map[cur_tc.name].latest_failed_count == 0 + ): + cur_branch_unique_failures.append(cur_tc) + uniq_fail_names = {cur_tc.name for cur_tc in cur_branch_unique_failures} + other_branch_exclusive_failures = [tc for tc in other_branch_failures if tc.name not in uniq_fail_names] + return cur_branch_unique_failures, other_branch_exclusive_failures + + def get_failed_cases_report_parts(self) -> t.List[str]: + """ + Generate the report parts for failed test cases and update the additional info section. + :return: A list of strings representing the table sections for the failed test cases. + """ known_failures = self.get_known_failure_cases() - known_failure_case_names = {case.name for case in known_failures} failed_test_cases = self._filter_items( - self.test_cases, lambda tc: tc.is_failure and tc.name not in known_failure_case_names - ) - failed_test_cases_with_ratio = self._sort_items( - fetch_failed_testcases_failure_ratio(failed_test_cases), key='latest_failed_count' + self.test_cases, lambda tc: tc.is_failure and tc.name not in {case.name for case in known_failures} ) - skipped_test_cases = self._filter_items(self.test_cases, lambda tc: tc.is_skipped) - successful_test_cases = self._filter_items(self.test_cases, lambda tc: tc.is_success) - - current_branch_failures = self._sort_items( - self._filter_items(failed_test_cases_with_ratio, lambda tc: tc.latest_failed_count == 0), + failed_test_cases_cur_branch = self._sort_items( + fetch_failed_testcases_failure_ratio( + copy.deepcopy(failed_test_cases), + branches_filter={'include_branches': [os.getenv('CI_MERGE_REQUEST_SOURCE_BRANCH_NAME', '')]}, + ), key='latest_failed_count', ) - other_branch_failures = self._sort_items( - self._filter_items( - failed_test_cases_with_ratio, lambda tc: tc.name not in [t.name for t in current_branch_failures] + failed_test_cases_other_branch = self._sort_items( + fetch_failed_testcases_failure_ratio( + copy.deepcopy(failed_test_cases), + branches_filter={'exclude_branches': [os.getenv('CI_MERGE_REQUEST_SOURCE_BRANCH_NAME', '')]}, ), key='latest_failed_count', ) - - self.create_table_section( - report_sections=report_parts, - title='Failed Test Cases on Your branch (Excludes Known Failure Cases)', - items=current_branch_failures, + failed_test_cases_cur_branch, failed_test_cases_other_branch = self.filter_test_cases( + failed_test_cases_cur_branch, failed_test_cases_other_branch + ) + cur_branch_cases_table_section = self.create_table_section( + title=self.report_titles_map['failed_yours'], + items=failed_test_cases_cur_branch, headers=[ 'Test Case', 'Test Script File Path', 'Failure Reason', - 'Failures across all other branches (20 latest testcases)', + f'Failures on your branch (40 latest testcases)', + 'Dut Log URL', 'Job URL', 'Grafana URL', ], - row_attrs=['name', 'file', 'failure', 'ci_job_url', 'ci_dashboard_url'], + row_attrs=['name', 'file', 'failure', 'dut_log_url', 'ci_job_url', 'ci_dashboard_url'], value_functions=[ ( - 'Failures across all other branches (20 latest testcases)', + 'Failures on your branch (40 latest testcases)', lambda item: f"{getattr(item, 'latest_failed_count', '')} / {getattr(item, 'latest_total_count', '')}", ) ], ) - self.create_table_section( - report_sections=report_parts, - title='Failed Test Cases on Other branches (Excludes Known Failure Cases)', - items=other_branch_failures, + other_branch_cases_table_section = self.create_table_section( + title=self.report_titles_map['failed_others'], + items=failed_test_cases_other_branch, headers=[ 'Test Case', 'Test Script File Path', 'Failure Reason', - 'Failures across all other branches (20 latest testcases)', + 'Failures across all other branches (40 latest testcases)', + 'Dut Log URL', 'Job URL', 'Grafana URL', ], - row_attrs=['name', 'file', 'failure', 'ci_job_url', 'ci_dashboard_url'], + row_attrs=['name', 'file', 'failure', 'dut_log_url', 'ci_job_url', 'ci_dashboard_url'], value_functions=[ ( - 'Failures across all other branches (20 latest testcases)', + 'Failures across all other branches (40 latest testcases)', lambda item: f"{getattr(item, 'latest_failed_count', '')} / {getattr(item, 'latest_total_count', '')}", ) ], ) - - self.create_table_section( - report_sections=report_parts, - title='Known Failure Cases', + known_failures_cases_table_section = self.create_table_section( + title=self.report_titles_map['failed_known'], items=known_failures, headers=['Test Case', 'Test Script File Path', 'Failure Reason', 'Job URL', 'Grafana URL'], row_attrs=['name', 'file', 'failure', 'ci_job_url', 'ci_dashboard_url'], ) - self.create_table_section( - report_sections=report_parts, - title='Skipped Test Cases', + failed_cases_report_url = self.write_report_to_file( + self.generate_html_report( + ''.join( + cur_branch_cases_table_section + + other_branch_cases_table_section + + known_failures_cases_table_section + ) + ), + self.job_id, + self.failed_cases_report_file, + ) + self.additional_info += self.generate_additional_info_section( + self.report_titles_map['failed_yours'], len(failed_test_cases_cur_branch), failed_cases_report_url + ) + self.additional_info += self.generate_additional_info_section( + self.report_titles_map['failed_others'], len(failed_test_cases_other_branch), failed_cases_report_url + ) + self.additional_info += self.generate_additional_info_section( + self.report_titles_map['failed_known'], len(known_failures), failed_cases_report_url + ) + return cur_branch_cases_table_section + other_branch_cases_table_section + known_failures_cases_table_section + + def get_skipped_cases_report_parts(self) -> t.List[str]: + """ + Generate the report parts for skipped test cases and update the additional info section. + :return: A list of strings representing the table sections for the skipped test cases. + """ + skipped_test_cases = self._filter_items(self.test_cases, lambda tc: tc.is_skipped) + skipped_cases_table_section = self.create_table_section( + title=self.report_titles_map['skipped'], items=skipped_test_cases, headers=['Test Case', 'Test Script File Path', 'Skipped Reason', 'Grafana URL'], row_attrs=['name', 'file', 'skipped', 'ci_dashboard_url'], ) - self.create_table_section( - report_sections=report_parts, - title='Succeeded Test Cases', - items=successful_test_cases, + skipped_cases_report_url = self.write_report_to_file( + self.generate_html_report(''.join(skipped_cases_table_section)), + self.job_id, + self.skipped_test_cases_report_file, + ) + self.additional_info += self.generate_additional_info_section( + self.report_titles_map['skipped'], len(skipped_test_cases), skipped_cases_report_url + ) + return skipped_cases_table_section + + def get_succeeded_cases_report_parts(self) -> t.List[str]: + """ + Generate the report parts for succeeded test cases and update the additional info section. + :return: A list of strings representing the table sections for the succeeded test cases. + """ + succeeded_test_cases = self._filter_items(self.test_cases, lambda tc: tc.is_success) + succeeded_cases_table_section = self.create_table_section( + title=self.report_titles_map['succeeded'], + items=succeeded_test_cases, headers=['Test Case', 'Test Script File Path', 'Job URL', 'Grafana URL'], row_attrs=['name', 'file', 'ci_job_url', 'ci_dashboard_url'], ) - - self.additional_info = ( - '**Test Case Summary:**\n' - f'- **Failed Test Cases on Your Branch (Excludes Known Failure Cases):** {len(current_branch_failures)}.\n' - f'- **Failed Test Cases on Other Branches (Excludes Known Failure Cases):** {len(other_branch_failures)}.\n' - f'- **Known Failures:** {len(known_failures)}\n' - f'- **Skipped Test Cases:** {len(skipped_test_cases)}\n' - f'- **Succeeded Test Cases:** {len(successful_test_cases)}\n\n' - 'Please check report below for more information.\n\n' + succeeded_cases_report_url = self.write_report_to_file( + self.generate_html_report(''.join(succeeded_cases_table_section)), + self.job_id, + self.succeeded_cases_report_file, + ) + self.additional_info += self.generate_additional_info_section( + self.report_titles_map['succeeded'], len(succeeded_test_cases), succeeded_cases_report_url ) + self.additional_info += '\n' + return succeeded_cases_table_section - return self.generate_html_report(''.join(report_parts)) + def _get_report_str(self) -> str: + """ + Generate a complete HTML report string by processing test cases. + :return: Complete HTML report string. + """ + self.additional_info = f'**Test Case Summary (with commit {self.commit_id[:8]}):**\n' + failed_cases_report_parts = self.get_failed_cases_report_parts() + skipped_cases_report_parts = self.get_skipped_cases_report_parts() + succeeded_cases_report_parts = self.get_succeeded_cases_report_parts() + + return self.generate_html_report( + ''.join(failed_cases_report_parts + skipped_cases_report_parts + succeeded_cases_report_parts) + ) class JobReportGenerator(ReportGenerator): @@ -503,12 +633,19 @@ def __init__( project_id: int, mr_iid: int, pipeline_id: int, + job_id: int, + commit_id: str, *, title: str = 'Job Report', jobs: t.List[GitlabJob], ): - super().__init__(project_id, mr_iid, pipeline_id, title=title) + super().__init__(project_id, mr_iid, pipeline_id, job_id, commit_id, title=title) self.jobs = jobs + self.report_titles_map = { + 'failed_jobs': 'Failed Jobs (Excludes "integration_test" and "target_test" jobs)', + 'succeeded': 'Succeeded Jobs', + } + self.failed_jobs_report_file = 'job_report.html' def _get_report_str(self) -> str: """ @@ -516,7 +653,6 @@ def _get_report_str(self) -> str: :return: Complete HTML report string. """ report_str: str = '' - report_parts: list = [] if not self.jobs: print('No jobs found, skip generating job report') @@ -530,34 +666,41 @@ def _get_report_str(self) -> str: ) succeeded_jobs = self._filter_items(self.jobs, lambda job: job.is_success) - self.additional_info = ( - '**Job Summary:**\n' - f'- **Failed Jobs (Excludes "integration_test" and "target_test" jobs):** {len(relevant_failed_jobs)}\n' - f'- **Succeeded Jobs:** {len(succeeded_jobs)}\n\n' + self.additional_info = f'**Job Summary (with commit {self.commit_id[:8]}):**\n' + self.additional_info += self.generate_additional_info_section( + self.report_titles_map['succeeded'], len(succeeded_jobs) ) - if relevant_failed_jobs: - self.create_table_section( - report_sections=report_parts, - title='Failed Jobs (Excludes "integration_test" and "target_test" jobs)', - items=relevant_failed_jobs, - headers=[ - 'Job Name', - 'Failure Reason', - 'Failure Log', - 'Failures across all other branches (10 latest jobs)', - 'URL', - 'CI Dashboard URL', - ], - row_attrs=['name', 'failure_reason', 'failure_log', 'url', 'ci_dashboard_url'], - value_functions=[ - ( - 'Failures across all other branches (10 latest jobs)', - lambda item: f"{getattr(item, 'latest_failed_count', '')} / {getattr(item, 'latest_total_count', '')}", - ) - ], + if not relevant_failed_jobs: + self.additional_info += self.generate_additional_info_section( + self.report_titles_map['failed_jobs'], len(relevant_failed_jobs) ) - self.additional_info += f'Please check report below for more information.\n\n' - report_str = self.generate_html_report(''.join(report_parts)) + return report_str + + report_sections = self.create_table_section( + title='Failed Jobs (Excludes "integration_test" and "target_test" jobs)', + items=relevant_failed_jobs, + headers=[ + 'Job Name', + 'Failure Reason', + 'Failure Log', + 'Failures across all other branches (10 latest jobs)', + 'URL', + 'CI Dashboard URL', + ], + row_attrs=['name', 'failure_reason', 'failure_log', 'url', 'ci_dashboard_url'], + value_functions=[ + ( + 'Failures across all other branches (10 latest jobs)', + lambda item: f"{getattr(item, 'latest_failed_count', '')} / {getattr(item, 'latest_total_count', '')}", + ) + ], + ) + relevant_failed_jobs_report_url = get_report_url(self.job_id, self.failed_jobs_report_file) + self.additional_info += self.generate_additional_info_section( + self.report_titles_map['failed_jobs'], len(relevant_failed_jobs), relevant_failed_jobs_report_url + ) + + report_str = self.generate_html_report(''.join(report_sections)) return report_str diff --git a/tools/ci/dynamic_pipelines/scripts/generate_report.py b/tools/ci/dynamic_pipelines/scripts/generate_report.py index bb2996d1910..5d2a361b941 100644 --- a/tools/ci/dynamic_pipelines/scripts/generate_report.py +++ b/tools/ci/dynamic_pipelines/scripts/generate_report.py @@ -74,17 +74,17 @@ def generate_build_report(args: argparse.Namespace) -> None: app for file_name in glob.glob(args.app_list_filepattern) for app in import_apps_from_txt(file_name) ] report_generator = BuildReportGenerator( - args.project_id, args.mr_iid, args.pipeline_id, apps=apps + args.project_id, args.mr_iid, args.pipeline_id, args.job_id, args.commit_id, apps=apps ) - report_generator.post_report(args.job_id, args.commit_id) + report_generator.post_report() def generate_target_test_report(args: argparse.Namespace) -> None: test_cases: t.List[t.Any] = parse_testcases_from_filepattern(args.junit_report_filepattern) report_generator = TargetTestReportGenerator( - args.project_id, args.mr_iid, args.pipeline_id, test_cases=test_cases + args.project_id, args.mr_iid, args.pipeline_id, args.job_id, args.commit_id, test_cases=test_cases ) - report_generator.post_report(args.job_id, args.commit_id) + report_generator.post_report(print_report_path=False) def generate_jobs_report(args: argparse.Namespace) -> None: @@ -93,8 +93,8 @@ def generate_jobs_report(args: argparse.Namespace) -> None: if not jobs: return - report_generator = JobReportGenerator(args.project_id, args.mr_iid, args.pipeline_id, jobs=jobs) - report_generator.post_report(args.job_id, args.commit_id) + report_generator = JobReportGenerator(args.project_id, args.mr_iid, args.pipeline_id, args.job_id, args.commit_id, jobs=jobs) + report_generator.post_report(print_report_path=False) if __name__ == '__main__': diff --git a/tools/ci/dynamic_pipelines/templates/generate_target_test_report.yml b/tools/ci/dynamic_pipelines/templates/generate_target_test_report.yml index 8fe17af72e7..88c27ff1608 100644 --- a/tools/ci/dynamic_pipelines/templates/generate_target_test_report.yml +++ b/tools/ci/dynamic_pipelines/templates/generate_target_test_report.yml @@ -6,6 +6,9 @@ generate_pytest_report: artifacts: paths: - target_test_report.html + - failed_cases.html + - skipped_cases.html + - succeeded_cases.html script: - python tools/ci/get_known_failure_cases_file.py - python tools/ci/dynamic_pipelines/scripts/generate_report.py --report-type target_test diff --git a/tools/ci/dynamic_pipelines/templates/report.template.html b/tools/ci/dynamic_pipelines/templates/report.template.html index 6997fa45c1c..bb35367f941 100644 --- a/tools/ci/dynamic_pipelines/templates/report.template.html +++ b/tools/ci/dynamic_pipelines/templates/report.template.html @@ -5,18 +5,29 @@ {{title}} + + @@ -24,8 +35,29 @@ + + + diff --git a/tools/ci/dynamic_pipelines/tests/test_report_generator/reports_sample_data/XUNIT_REPORT.xml b/tools/ci/dynamic_pipelines/tests/test_report_generator/reports_sample_data/XUNIT_REPORT.xml index 8f3737b75d8..0334a681550 100644 --- a/tools/ci/dynamic_pipelines/tests/test_report_generator/reports_sample_data/XUNIT_REPORT.xml +++ b/tools/ci/dynamic_pipelines/tests/test_report_generator/reports_sample_data/XUNIT_REPORT.xml @@ -1,7 +1,7 @@ - + conftest.py:74: in case_tester yield CaseTester(dut, **kwargs) tools/ci/idf_unity_tester.py:202: in __init__ @@ -18,7 +18,7 @@ tools/ci/idf_unity_tester.py:202: in __init__ raise EOFError E EOFError - + conftest.py:74: in case_tester yield CaseTester(dut, **kwargs) tools/ci/idf_unity_tester.py:202: in __init__ @@ -37,9 +37,9 @@ E EOFError - - - + + + /root/.espressif/python_env/idf5.2_py3.9_env/lib/python3.9/site-packages/pytest_embedded/plugin.py:1272: in pytest_runtest_call self._raise_dut_failed_cases_if_exists(duts) # type: ignore /root/.espressif/python_env/idf5.2_py3.9_env/lib/python3.9/site-packages/pytest_embedded/plugin.py:1207: in _raise_dut_failed_cases_if_exists @@ -48,19 +48,19 @@ E AssertionError: Unity test failed - - + + /builds/espressif/esp-idf/tools/test_build_system/test_common.py:134: Linux does not support executing .exe files - - - - - - + + + + + + - + /root/.espressif/python_env/idf5.2_py3.9_env/lib/python3.9/site-packages/pytest_embedded/dut.py:76: in wrapper @@ -95,7 +95,7 @@ E pexpect.exceptions.TIMEOUT: Not found "Press ENTER to see the list of t E Bytes in current buffer (color code eliminated): ce710,len:0x2afc entry 0x403cc710 E Please check the full log here: /builds/espressif/esp-idf/pytest_embedded/2024-05-17_17-50-04/esp32c3.release.test_esp_timer/dut.txt - + /root/.espressif/python_env/idf5.2_py3.9_env/lib/python3.9/site-packages/pytest_embedded/dut.py:76: in wrapper @@ -128,7 +128,7 @@ E pexpect.exceptions.TIMEOUT: Not found "re.compile(b'^[-]+\\s*(\\d+) Tes E Bytes in current buffer (color code eliminated): Serial port /dev/ttyUSB16 Connecting.... Connecting.... esptool.py v4.7.0 Found 1 serial ports Chip is ESP32-C3 (QFN32) (revision v0.3) Features: WiFi, BLE, Embedded Flash 4MB... (total 6673 bytes) E Please check the full log here: /builds/espressif/esp-idf/pytest_embedded/2024-05-17_17-50-04/esp32c3.512safe.test_wear_levelling/dut.txt - + /root/.espressif/python_env/idf5.2_py3.9_env/lib/python3.9/site-packages/pytest_embedded/dut.py:76: in wrapper @@ -161,7 +161,7 @@ E pexpect.exceptions.TIMEOUT: Not found "re.compile(b'^[-]+\\s*(\\d+) Tes E Bytes in current buffer (color code eliminated): Serial port /dev/ttyUSB16 Connecting.... Connecting.... esptool.py v4.7.0 Found 1 serial ports Chip is ESP32-C3 (QFN32) (revision v0.3) Features: WiFi, BLE, Embedded Flash 4MB... (total 24528 bytes) E Please check the full log here: /builds/espressif/esp-idf/pytest_embedded/2024-05-17_17-50-04/esp32c3.release.test_wear_levelling/dut.txt - + /root/.espressif/python_env/idf5.2_py3.9_env/lib/python3.9/site-packages/pytest_embedded/dut.py:76: in wrapper diff --git a/tools/ci/dynamic_pipelines/tests/test_report_generator/reports_sample_data/expected_job_report.html b/tools/ci/dynamic_pipelines/tests/test_report_generator/reports_sample_data/expected_job_report.html index cb76abeacf5..3c75ce390f2 100644 --- a/tools/ci/dynamic_pipelines/tests/test_report_generator/reports_sample_data/expected_job_report.html +++ b/tools/ci/dynamic_pipelines/tests/test_report_generator/reports_sample_data/expected_job_report.html @@ -5,22 +5,34 @@ Job Report + + -

Failed Jobs (Excludes "integration_test" and "target_test" jobs)

+

Failed Jobs (Excludes "integration_test" and "target_test" jobs)

@@ -61,8 +73,29 @@ + + + diff --git a/tools/ci/dynamic_pipelines/tests/test_report_generator/reports_sample_data/expected_target_test_report.html b/tools/ci/dynamic_pipelines/tests/test_report_generator/reports_sample_data/expected_target_test_report.html index 4353e38771a..c2d0b95c970 100644 --- a/tools/ci/dynamic_pipelines/tests/test_report_generator/reports_sample_data/expected_target_test_report.html +++ b/tools/ci/dynamic_pipelines/tests/test_report_generator/reports_sample_data/expected_target_test_report.html @@ -5,28 +5,41 @@ Test Report + + -

Failed Test Cases on Your branch (Excludes Known Failure Cases)

Job Name
+

Failed Test Cases on Other branches (Excludes Known Failure Cases)

- + + @@ -36,7 +49,8 @@ - + + @@ -44,7 +58,8 @@ - + + @@ -52,28 +67,17 @@ - + + - -
Test Case Test Script File Path Failure ReasonFailures across all other branches (20 latest testcases)Failures across all other branches (40 latest testcases)Dut Log URL Job URL Grafana URL
('esp32h2', 'esp32h2').('defaults', 'defaults').test_i2c_multi_device components/driver/test_apps/i2c_test_apps/pytest_i2c.py failed on setup with "EOFError"0 / 200 / 40link link
esp32c3.release.test_esp_timer components/esp_timer/test_apps/pytest_esp_timer_ut.py pexpect.exceptions.TIMEOUT: Not found "Press ENTER to see the list of tests" Bytes in current buffer (color code eliminated): ce710,len:0x2afc entry 0x403cc710 Please check the full log here: /builds/espressif/esp-idf/pytest_embedded/2024-05-17_17-50-04/esp32c3.release.test_esp_timer/dut.txt0 / 200 / 40link link
esp32c3.default.test_wpa_supplicant_ut components/wpa_supplicant/test_apps/pytest_wpa_supplicant_ut.py pexpect.exceptions.TIMEOUT: Not found "Press ENTER to see the list of tests" Bytes in current buffer (color code eliminated): 0 d4 000 00x0000 x0000x00 000000 0 Please check the full log here: /builds/espressif/esp-idf/pytest_embedded/2024-05-17_17-50-04/esp32c3.default.test_wpa_supplicant_ut/dut.txt0 / 200 / 40link link

Failed Test Cases on Other branches (Excludes Known Failure Cases)

- - - - - - - - - - - - + + @@ -81,7 +85,8 @@ - + + @@ -89,7 +94,8 @@ - + + @@ -97,12 +103,14 @@ - + + -
Test CaseTest Script File PathFailure ReasonFailures across all other branches (20 latest testcases)Job URLGrafana URL
('esp32h2', 'esp32h2').('default', 'default').test_i2s_multi_dev components/driver/test_apps/i2s_test_apps/i2s_multi_dev/pytest_i2s_multi_dev.py failed on setup with "EOFError"3 / 203 / 40link link
esp32c2.default.test_wpa_supplicant_ut components/wpa_supplicant/test_apps/pytest_wpa_supplicant_ut.py AssertionError: Unity test failed3 / 203 / 40link link
esp32c3.512safe.test_wear_levelling components/wear_levelling/test_apps/pytest_wear_levelling.py pexpect.exceptions.TIMEOUT: Not found "re.compile(b'^[-]+\\s*(\\d+) Tests (\\d+) Failures (\\d+) Ignored\\s*(?POK|FAIL)', re.MULTILINE)" Bytes in current buffer (color code eliminated): Serial port /dev/ttyUSB16 Connecting.... Connecting.... esptool.py v4.7.0 Found 1 serial ports Chip is ESP32-C3 (QFN32) (revision v0.3) Features: WiFi, BLE, Embedded Flash 4MB... (total 6673 bytes) Please check the full log here: /builds/espressif/esp-idf/pytest_embedded/2024-05-17_17-50-04/esp32c3.512safe.test_wear_levelling/dut.txt3 / 203 / 40link link
esp32c3.release.test_wear_levelling components/wear_levelling/test_apps/pytest_wear_levelling.py pexpect.exceptions.TIMEOUT: Not found "re.compile(b'^[-]+\\s*(\\d+) Tests (\\d+) Failures (\\d+) Ignored\\s*(?POK|FAIL)', re.MULTILINE)" Bytes in current buffer (color code eliminated): Serial port /dev/ttyUSB16 Connecting.... Connecting.... esptool.py v4.7.0 Found 1 serial ports Chip is ESP32-C3 (QFN32) (revision v0.3) Features: WiFi, BLE, Embedded Flash 4MB... (total 24528 bytes) Please check the full log here: /builds/espressif/esp-idf/pytest_embedded/2024-05-17_17-50-04/esp32c3.release.test_wear_levelling/dut.txt3 / 203 / 40link link

Known Failure Cases

+

Known Failure Cases

@@ -142,7 +150,8 @@ -
Test Caselink

Skipped Test Cases

+

Skipped Test Cases

@@ -159,7 +168,8 @@ -
Test Caselink

Succeeded Test Cases

+

Succeeded Test Cases

@@ -228,8 +238,29 @@ + + + diff --git a/tools/ci/dynamic_pipelines/tests/test_report_generator/test_report_generator.py b/tools/ci/dynamic_pipelines/tests/test_report_generator/test_report_generator.py index 551eaece9f5..abdd8a7b646 100644 --- a/tools/ci/dynamic_pipelines/tests/test_report_generator/test_report_generator.py +++ b/tools/ci/dynamic_pipelines/tests/test_report_generator/test_report_generator.py @@ -46,6 +46,17 @@ def setup_patches(self) -> None: self.addCleanup(self.gitlab_patcher.stop) self.addCleanup(self.env_patcher.stop) self.addCleanup(self.failure_rate_patcher.stop) + self.addCleanup(self.cleanup_files) + + def cleanup_files(self) -> None: + files_to_delete = [ + self.target_test_report_generator.skipped_test_cases_report_file, + self.target_test_report_generator.succeeded_cases_report_file, + self.target_test_report_generator.failed_cases_report_file, + ] + for file_path in files_to_delete: + if os.path.exists(file_path): + os.remove(file_path) def load_test_and_job_reports(self) -> None: self.expected_target_test_report_html = load_file( @@ -62,9 +73,23 @@ def create_report_generators(self) -> None: jobs = [GitlabJob.from_json_data(job_json, failure_rates.get(job_json['name'], {})) for job_json in json.loads(jobs_response_raw)['jobs']] test_cases = parse_testcases_from_filepattern(os.path.join(self.reports_sample_data_path, 'XUNIT_*.xml')) self.target_test_report_generator = TargetTestReportGenerator( - project_id=123, mr_iid=1, pipeline_id=456, title='Test Report', test_cases=test_cases) + project_id=123, + mr_iid=1, + pipeline_id=456, + job_id=0, + commit_id='cccc', + title='Test Report', + test_cases=test_cases + ) self.job_report_generator = JobReportGenerator( - project_id=123, mr_iid=1, pipeline_id=456, title='Job Report', jobs=jobs) + project_id=123, + mr_iid=1, + pipeline_id=456, + job_id=0, + commit_id='cccc', + title='Job Report', + jobs=jobs + ) self.target_test_report_generator._known_failure_cases_set = { '*.test_wpa_supplicant_ut', 'esp32c3.release.test_esp_timer', @@ -72,7 +97,7 @@ def create_report_generators(self) -> None: } test_cases_failed = [tc for tc in test_cases if tc.is_failure] for index, tc in enumerate(test_cases_failed): - tc.latest_total_count = 20 + tc.latest_total_count = 40 if index % 3 == 0: tc.latest_failed_count = 0 else: diff --git a/tools/ci/dynamic_pipelines/utils.py b/tools/ci/dynamic_pipelines/utils.py index c8252f58ad0..79cd3f44d71 100644 --- a/tools/ci/dynamic_pipelines/utils.py +++ b/tools/ci/dynamic_pipelines/utils.py @@ -66,10 +66,14 @@ def load_known_failure_cases() -> t.Optional[t.Set[str]]: if not known_failures_file: return None try: - with open(known_failures_file) as f: + with open(known_failures_file, 'r') as f: file_content = f.read() - known_cases_list = re.sub(re.compile('#.*\n'), '', file_content).split() - return {case.strip() for case in known_cases_list} + + pattern = re.compile(r'^(.*?)\s+#\s+([A-Z]+)-\d+', re.MULTILINE) + matches = pattern.findall(file_content) + + known_cases_list = [match[0].strip() for match in matches] + return set(known_cases_list) except FileNotFoundError: return None @@ -111,7 +115,7 @@ def fetch_failed_jobs(commit_id: str) -> t.List[GitlabJob]: response = requests.post( f'{ci_dash_api_backend_host}/jobs/failure_ratio', headers={'Authorization': f'Bearer {token}'}, - json={'job_names': failed_job_names, 'exclude_branches': [os.getenv('CI_COMMIT_BRANCH', '')]}, + json={'job_names': failed_job_names, 'exclude_branches': [os.getenv('CI_MERGE_REQUEST_SOURCE_BRANCH_NAME', '')]}, ) if response.status_code != 200: print(f'Failed to fetch jobs failure rate data: {response.status_code} with error: {response.text}') @@ -128,20 +132,20 @@ def fetch_failed_jobs(commit_id: str) -> t.List[GitlabJob]: return combined_jobs -def fetch_failed_testcases_failure_ratio(failed_testcases: t.List[TestCase]) -> t.List[TestCase]: +def fetch_failed_testcases_failure_ratio(failed_testcases: t.List[TestCase], branches_filter: dict) -> t.List[TestCase]: """ Fetches info about failure rates of testcases using an API request to ci-dashboard-api. :param failed_testcases: The list of failed testcases models. + :param branches_filter: The filter to filter testcases by branch names. :return: A list of testcases with enriched with failure rates data. """ token = os.getenv('ESPCI_TOKEN', '') ci_dash_api_backend_host = os.getenv('CI_DASHBOARD_API', '') + req_json = {'testcase_names': list(set([testcase.name for testcase in failed_testcases])), **branches_filter} response = requests.post( f'{ci_dash_api_backend_host}/testcases/failure_ratio', headers={'Authorization': f'Bearer {token}'}, - json={'testcase_names': [testcase.name for testcase in failed_testcases], - 'exclude_branches': [os.getenv('CI_COMMIT_BRANCH', '')], - }, + json=req_json, ) if response.status_code != 200: print(f'Failed to fetch testcases failure rate data: {response.status_code} with error: {response.text}') @@ -166,3 +170,34 @@ def load_file(file_path: str) -> str: """ with open(file_path, 'r') as file: return file.read() + + +def format_permalink(s: str) -> str: + """ + Formats a given string into a permalink. + + :param s: The string to be formatted into a permalink. + :return: The formatted permalink as a string. + """ + end_index = s.find('(') + + if end_index != -1: + trimmed_string = s[:end_index].strip() + else: + trimmed_string = s.strip() + + formatted_string = trimmed_string.lower().replace(' ', '-') + + return formatted_string + + +def get_report_url(job_id: int, output_filepath: str) -> str: + """ + Generates the url of the path where the report will be stored in the job's artifacts . + + :param job_id: The job identifier used to construct the URL. + :param output_filepath: The path to the output file. + :return: The modified URL pointing to the job's artifacts. + """ + url = os.getenv('CI_PAGES_URL', '').replace('esp-idf', '-/esp-idf') + return f'{url}/-/jobs/{job_id}/artifacts/{output_filepath}' From 9b94afdd389b57bf9a335cfba9e955b6bc4dcdff Mon Sep 17 00:00:00 2001 From: Chen Jichang Date: Thu, 11 Jul 2024 14:56:10 +0800 Subject: [PATCH 072/113] feat(dedic_gpio): add support for esp32c5 --- components/esp_driver_gpio/src/dedic_gpio.c | 21 ++++--- .../test_apps/gpio_extensions/README.md | 4 +- .../main/test_dedicated_gpio.c | 14 +++-- .../gpio_extensions/pytest_gpio_extensions.py | 1 + .../esp32c5/include/hal/dedic_gpio_cpu_ll.h | 55 +++++++++++++++++++ components/soc/esp32c2/dedic_gpio_periph.c | 1 - components/soc/esp32c3/dedic_gpio_periph.c | 1 - components/soc/esp32c5/dedic_gpio_periph.c | 36 ++++++++++++ .../esp32c5/include/soc/Kconfig.soc_caps.in | 16 ++++++ components/soc/esp32c5/include/soc/soc_caps.h | 8 +-- components/soc/esp32c6/dedic_gpio_periph.c | 1 - components/soc/esp32h2/dedic_gpio_periph.c | 1 - components/soc/esp32s2/dedic_gpio_periph.c | 19 ++----- components/soc/esp32s3/dedic_gpio_periph.c | 19 ++----- .../soc/include/soc/dedic_gpio_periph.h | 19 ++----- .../dedicated_gpio/soft_i2c/README.md | 4 +- .../dedicated_gpio/soft_spi/README.md | 4 +- .../dedicated_gpio/soft_uart/README.md | 4 +- .../components/soft_uart/riscv/soft_uart.S | 6 ++ .../parlio_tx/simple_rgb_led_matrix/README.md | 4 +- tools/ci/check_copyright_ignore.txt | 3 - 21 files changed, 161 insertions(+), 80 deletions(-) create mode 100644 components/hal/esp32c5/include/hal/dedic_gpio_cpu_ll.h create mode 100644 components/soc/esp32c5/dedic_gpio_periph.c diff --git a/components/esp_driver_gpio/src/dedic_gpio.c b/components/esp_driver_gpio/src/dedic_gpio.c index 9c60cfe7e21..bbc66995b2c 100644 --- a/components/esp_driver_gpio/src/dedic_gpio.c +++ b/components/esp_driver_gpio/src/dedic_gpio.c @@ -10,22 +10,21 @@ #include #include #include "sdkconfig.h" -#include "esp_compiler.h" #include "esp_heap_caps.h" #include "esp_intr_alloc.h" #include "esp_log.h" #include "esp_check.h" #include "esp_cpu.h" #include "soc/soc_caps.h" -#include "soc/gpio_periph.h" #include "soc/io_mux_reg.h" #include "hal/dedic_gpio_cpu_ll.h" -#include "hal/gpio_hal.h" +#include "esp_private/gpio.h" #include "esp_private/periph_ctrl.h" #include "esp_rom_gpio.h" #include "freertos/FreeRTOS.h" #include "driver/dedic_gpio.h" #include "soc/dedic_gpio_periph.h" + #if SOC_DEDIC_GPIO_ALLOW_REG_ACCESS #include "soc/dedic_gpio_struct.h" #endif @@ -59,7 +58,7 @@ struct dedic_gpio_platform_t { }; struct dedic_gpio_bundle_t { - uint32_t core_id; // CPU core ID, a GPIO bundle must be installed to a specific CPU core + int core_id; // CPU core ID, a GPIO bundle must be installed to a specific CPU core uint32_t out_mask; // mask of output channels in the bank uint32_t in_mask; // mask of input channels in the bank uint32_t out_offset; // offset in the bank (seen from output channel) @@ -104,7 +103,7 @@ static esp_err_t dedic_gpio_build_platform(int core_id) return ret; } -static void dedic_gpio_break_platform(uint32_t core_id) +static void dedic_gpio_break_platform(int core_id) { if (s_platform[core_id]) { // prevent breaking platform concurrently @@ -151,7 +150,7 @@ static void dedic_gpio_default_isr(void *arg) } } -static esp_err_t dedic_gpio_install_interrupt(uint32_t core_id) +static esp_err_t dedic_gpio_install_interrupt(int core_id) { esp_err_t ret = ESP_OK; if (!s_platform[core_id]->intr_hdl) { @@ -172,7 +171,7 @@ static esp_err_t dedic_gpio_install_interrupt(uint32_t core_id) return ret; } -static void dedic_gpio_uninstall_interrupt(uint32_t core_id) +static void dedic_gpio_uninstall_interrupt(int core_id) { if (s_platform[core_id]->intr_hdl) { // prevent uninstall interrupt concurrently @@ -187,7 +186,7 @@ static void dedic_gpio_uninstall_interrupt(uint32_t core_id) } } -static void dedic_gpio_set_interrupt(uint32_t core_id, uint32_t channel, dedic_gpio_intr_type_t type) +static void dedic_gpio_set_interrupt(int core_id, uint32_t channel, dedic_gpio_intr_type_t type) { dedic_gpio_ll_set_interrupt_type(s_platform[core_id]->dev, channel, type); if (type != DEDIC_GPIO_INTR_NONE) { @@ -269,13 +268,13 @@ esp_err_t dedic_gpio_new_bundle(const dedic_gpio_bundle_config_t *config, dedic_ // route dedicated GPIO channel signals to GPIO matrix if (config->flags.in_en) { for (size_t i = 0; i < config->array_size; i++) { - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[config->gpio_array[i]], PIN_FUNC_GPIO); + gpio_func_sel(config->gpio_array[i], PIN_FUNC_GPIO); esp_rom_gpio_connect_in_signal(config->gpio_array[i], dedic_gpio_periph_signals.cores[core_id].in_sig_per_channel[in_offset + i], config->flags.in_invert); } } if (config->flags.out_en) { for (size_t i = 0; i < config->array_size; i++) { - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[config->gpio_array[i]], PIN_FUNC_GPIO); + gpio_func_sel(config->gpio_array[i], PIN_FUNC_GPIO); esp_rom_gpio_connect_out_signal(config->gpio_array[i], dedic_gpio_periph_signals.cores[core_id].out_sig_per_channel[out_offset + i], config->flags.out_invert, false); } #if !SOC_DEDIC_GPIO_OUT_AUTO_ENABLE @@ -314,7 +313,7 @@ esp_err_t dedic_gpio_del_bundle(dedic_gpio_bundle_handle_t bundle) bool recycle_all = false; ESP_GOTO_ON_FALSE(bundle, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument"); - uint32_t core_id = esp_cpu_get_core_id(); + int core_id = esp_cpu_get_core_id(); ESP_GOTO_ON_FALSE(core_id == bundle->core_id, ESP_FAIL, err, TAG, "del bundle on wrong CPU"); portENTER_CRITICAL(&s_platform[core_id]->spinlock); diff --git a/components/esp_driver_gpio/test_apps/gpio_extensions/README.md b/components/esp_driver_gpio/test_apps/gpio_extensions/README.md index 4fc69c16b6a..3a9c73a780a 100644 --- a/components/esp_driver_gpio/test_apps/gpio_extensions/README.md +++ b/components/esp_driver_gpio/test_apps/gpio_extensions/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_dedicated_gpio.c b/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_dedicated_gpio.c index f0a4ba65763..fb306b523ee 100644 --- a/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_dedicated_gpio.c +++ b/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_dedicated_gpio.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "freertos/semphr.h" @@ -60,7 +61,7 @@ TEST_CASE("Dedicated_GPIO_bundle_install/uninstall", "[dedic_gpio]") typedef struct { SemaphoreHandle_t sem; - const int gpios[TEST_GPIO_GROUP_SIZE]; + int gpios[TEST_GPIO_GROUP_SIZE]; } test_dedic_task_context_t; static void test_dedic_gpio_on_specific_core(void *args) @@ -144,6 +145,7 @@ TEST_CASE("Dedicated_GPIO_run_on_multiple_CPU_cores", "[dedic_gpio]") { SemaphoreHandle_t sem = xSemaphoreCreateCounting(SOC_CPU_CORES_NUM, 0); TaskHandle_t task_handle[SOC_CPU_CORES_NUM]; + test_dedic_task_context_t isr_ctx[SOC_CPU_CORES_NUM]; for (int i = 0; i < SOC_CPU_CORES_NUM; i++) { #if CONFIG_IDF_TARGET_ESP32P4 @@ -151,11 +153,11 @@ TEST_CASE("Dedicated_GPIO_run_on_multiple_CPU_cores", "[dedic_gpio]") #else int start_gpio = i * TEST_GPIO_GROUP_SIZE; #endif - test_dedic_task_context_t isr_ctx = { - .sem = sem, - .gpios = {start_gpio, start_gpio + 1, start_gpio + 2, start_gpio + 3} - }; - xTaskCreatePinnedToCore(test_dedic_gpio_on_specific_core, "dedic_gpio_test_tsk", 4096, &isr_ctx, 1, + isr_ctx[i].sem = sem; + const int gpios[TEST_GPIO_GROUP_SIZE] = {start_gpio, start_gpio + 1, start_gpio + 2, start_gpio + 3}; + memcpy(isr_ctx[i].gpios, gpios, sizeof(gpios)); + + xTaskCreatePinnedToCore(test_dedic_gpio_on_specific_core, "dedic_gpio_test_tsk", 4096, &isr_ctx[i], 1, &task_handle[i], i); } diff --git a/components/esp_driver_gpio/test_apps/gpio_extensions/pytest_gpio_extensions.py b/components/esp_driver_gpio/test_apps/gpio_extensions/pytest_gpio_extensions.py index fa4bf41babd..58c95c8f3a6 100644 --- a/components/esp_driver_gpio/test_apps/gpio_extensions/pytest_gpio_extensions.py +++ b/components/esp_driver_gpio/test_apps/gpio_extensions/pytest_gpio_extensions.py @@ -24,6 +24,7 @@ def test_gpio_filter(dut: IdfDut) -> None: @pytest.mark.esp32c2 @pytest.mark.esp32c3 +@pytest.mark.esp32c5 @pytest.mark.esp32c6 @pytest.mark.esp32h2 @pytest.mark.esp32s2 diff --git a/components/hal/esp32c5/include/hal/dedic_gpio_cpu_ll.h b/components/hal/esp32c5/include/hal/dedic_gpio_cpu_ll.h new file mode 100644 index 00000000000..00ee9296a37 --- /dev/null +++ b/components/hal/esp32c5/include/hal/dedic_gpio_cpu_ll.h @@ -0,0 +1,55 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include +#include "riscv/csr.h" + +/*fast gpio*/ +#define CSR_GPIO_OEN_USER 0x803 +#define CSR_GPIO_IN_USER 0x804 +#define CSR_GPIO_OUT_USER 0x805 + +#ifdef __cplusplus +extern "C" { +#endif + +__attribute__((always_inline)) +static inline void dedic_gpio_cpu_ll_enable_output(uint32_t mask) +{ + RV_WRITE_CSR(CSR_GPIO_OEN_USER, mask); +} + +static inline void dedic_gpio_cpu_ll_write_all(uint32_t value) +{ + RV_WRITE_CSR(CSR_GPIO_OUT_USER, value); +} + +__attribute__((always_inline)) +static inline uint32_t dedic_gpio_cpu_ll_read_in(void) +{ + uint32_t value = RV_READ_CSR(CSR_GPIO_IN_USER); + return value; +} + +__attribute__((always_inline)) +static inline uint32_t dedic_gpio_cpu_ll_read_out(void) +{ + uint32_t value = RV_READ_CSR(CSR_GPIO_OUT_USER); + return value; +} + +__attribute__((always_inline)) +static inline void dedic_gpio_cpu_ll_write_mask(uint32_t mask, uint32_t value) +{ + RV_SET_CSR(CSR_GPIO_OUT_USER, mask & value); + RV_CLEAR_CSR(CSR_GPIO_OUT_USER, mask & ~(value)); +} + +#ifdef __cplusplus +} +#endif diff --git a/components/soc/esp32c2/dedic_gpio_periph.c b/components/soc/esp32c2/dedic_gpio_periph.c index 84070ee47b8..4c3f6b93e0e 100644 --- a/components/soc/esp32c2/dedic_gpio_periph.c +++ b/components/soc/esp32c2/dedic_gpio_periph.c @@ -8,7 +8,6 @@ #include "soc/dedic_gpio_periph.h" const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { - .module = -1, .irq = -1, .cores = { [0] = { diff --git a/components/soc/esp32c3/dedic_gpio_periph.c b/components/soc/esp32c3/dedic_gpio_periph.c index 711274f8930..45e0fd7a23e 100644 --- a/components/soc/esp32c3/dedic_gpio_periph.c +++ b/components/soc/esp32c3/dedic_gpio_periph.c @@ -8,7 +8,6 @@ #include "soc/dedic_gpio_periph.h" const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { - .module = -1, .irq = -1, .cores = { [0] = { diff --git a/components/soc/esp32c5/dedic_gpio_periph.c b/components/soc/esp32c5/dedic_gpio_periph.c new file mode 100644 index 00000000000..ef5fc640824 --- /dev/null +++ b/components/soc/esp32c5/dedic_gpio_periph.c @@ -0,0 +1,36 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "soc/gpio_sig_map.h" +#include "soc/dedic_gpio_periph.h" + +const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { + .irq = -1, + .cores = { + [0] = { + .in_sig_per_channel = { + [0] = CPU_GPIO_IN0_IDX, + [1] = CPU_GPIO_IN1_IDX, + [2] = CPU_GPIO_IN2_IDX, + [3] = CPU_GPIO_IN3_IDX, + [4] = CPU_GPIO_IN4_IDX, + [5] = CPU_GPIO_IN5_IDX, + [6] = CPU_GPIO_IN6_IDX, + [7] = CPU_GPIO_IN7_IDX, + }, + .out_sig_per_channel = { + [0] = CPU_GPIO_OUT0_IDX, + [1] = CPU_GPIO_OUT1_IDX, + [2] = CPU_GPIO_OUT2_IDX, + [3] = CPU_GPIO_OUT3_IDX, + [4] = CPU_GPIO_OUT4_IDX, + [5] = CPU_GPIO_OUT5_IDX, + [6] = CPU_GPIO_OUT6_IDX, + [7] = CPU_GPIO_OUT7_IDX, + } + }, + }, +}; diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index 181dc73c473..466607e158b 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -7,6 +7,10 @@ config SOC_ADC_SUPPORTED bool default y +config SOC_DEDICATED_GPIO_SUPPORTED + bool + default y + config SOC_UART_SUPPORTED bool default y @@ -463,6 +467,18 @@ config SOC_RTCIO_WAKE_SUPPORTED bool default y +config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM + int + default 8 + +config SOC_DEDIC_GPIO_IN_CHANNELS_NUM + int + default 8 + +config SOC_DEDIC_PERIPH_ALWAYS_ENABLE + bool + default y + config SOC_I2C_NUM int default 1 diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index c608de7ac8f..6e02acdff00 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -18,7 +18,7 @@ /*-------------------------- COMMON CAPS ---------------------------------------*/ #define SOC_ADC_SUPPORTED 1 -// #define SOC_DEDICATED_GPIO_SUPPORTED 1 // TODO: [ESP32C5] IDF-8725 +#define SOC_DEDICATED_GPIO_SUPPORTED 1 #define SOC_UART_SUPPORTED 1 #define SOC_GDMA_SUPPORTED 1 #define SOC_AHB_GDMA_SUPPORTED 1 @@ -234,9 +234,9 @@ #define SOC_RTCIO_WAKE_SUPPORTED 1 /*-------------------------- Dedicated GPIO CAPS -----------------------------*/ -// #define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */ -// #define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */ -// #define SOC_DEDIC_PERIPH_ALWAYS_ENABLE (1) /*!< The dedicated GPIO (a.k.a. fast GPIO) is featured by some customized CPU instructions, which is always enabled */ +#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */ +#define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */ +#define SOC_DEDIC_PERIPH_ALWAYS_ENABLE (1) /*!< The dedicated GPIO (a.k.a. fast GPIO) is featured by some customized CPU instructions, which is always enabled */ /*-------------------------- I2C CAPS ----------------------------------------*/ // ESP32-C5 has 1 I2C diff --git a/components/soc/esp32c6/dedic_gpio_periph.c b/components/soc/esp32c6/dedic_gpio_periph.c index 1321608a3eb..58fc3671a71 100644 --- a/components/soc/esp32c6/dedic_gpio_periph.c +++ b/components/soc/esp32c6/dedic_gpio_periph.c @@ -8,7 +8,6 @@ #include "soc/dedic_gpio_periph.h" const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { - .module = -1, .irq = -1, .cores = { [0] = { diff --git a/components/soc/esp32h2/dedic_gpio_periph.c b/components/soc/esp32h2/dedic_gpio_periph.c index 711274f8930..45e0fd7a23e 100644 --- a/components/soc/esp32h2/dedic_gpio_periph.c +++ b/components/soc/esp32h2/dedic_gpio_periph.c @@ -8,7 +8,6 @@ #include "soc/dedic_gpio_periph.h" const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { - .module = -1, .irq = -1, .cores = { [0] = { diff --git a/components/soc/esp32s2/dedic_gpio_periph.c b/components/soc/esp32s2/dedic_gpio_periph.c index d953ca659e9..8ebcb4cfd53 100644 --- a/components/soc/esp32s2/dedic_gpio_periph.c +++ b/components/soc/esp32s2/dedic_gpio_periph.c @@ -1,22 +1,13 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "soc/dedic_gpio_periph.h" #include "soc/gpio_sig_map.h" const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { - .module = PERIPH_DEDIC_GPIO_MODULE, .irq = ETS_DEDICATED_GPIO_INTR_SOURCE, .cores = { [0] = { diff --git a/components/soc/esp32s3/dedic_gpio_periph.c b/components/soc/esp32s3/dedic_gpio_periph.c index 929cc7000e5..e4f4166785c 100644 --- a/components/soc/esp32s3/dedic_gpio_periph.c +++ b/components/soc/esp32s3/dedic_gpio_periph.c @@ -1,22 +1,13 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "soc/dedic_gpio_periph.h" #include "soc/gpio_sig_map.h" const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { - .module = PERIPH_DEDIC_GPIO_MODULE, .irq = -1, .cores = { [0] = { diff --git a/components/soc/include/soc/dedic_gpio_periph.h b/components/soc/include/soc/dedic_gpio_periph.h index f6eeeeb5e7e..c0b6720b704 100644 --- a/components/soc/include/soc/dedic_gpio_periph.h +++ b/components/soc/include/soc/dedic_gpio_periph.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once @@ -25,7 +17,6 @@ extern "C" { #if SOC_DEDICATED_GPIO_SUPPORTED typedef struct { - const periph_module_t module; // Peripheral module const int irq; // Interrupt resource (-1 means no interrupt supported) struct { const int in_sig_per_channel[SOC_DEDIC_GPIO_IN_CHANNELS_NUM]; diff --git a/examples/peripherals/dedicated_gpio/soft_i2c/README.md b/examples/peripherals/dedicated_gpio/soft_i2c/README.md index d9b5a6697d4..48c2226b77f 100644 --- a/examples/peripherals/dedicated_gpio/soft_i2c/README.md +++ b/examples/peripherals/dedicated_gpio/soft_i2c/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | # Example: Software I2C Master via Dedicated/Fast GPIOs diff --git a/examples/peripherals/dedicated_gpio/soft_spi/README.md b/examples/peripherals/dedicated_gpio/soft_spi/README.md index beb35c91423..7bfae455bb4 100644 --- a/examples/peripherals/dedicated_gpio/soft_spi/README.md +++ b/examples/peripherals/dedicated_gpio/soft_spi/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | -| ----------------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | +| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | # Example: SPI software emulation using dedicated/fast GPIOs diff --git a/examples/peripherals/dedicated_gpio/soft_uart/README.md b/examples/peripherals/dedicated_gpio/soft_uart/README.md index 9d4481ff64c..7236a047b88 100644 --- a/examples/peripherals/dedicated_gpio/soft_uart/README.md +++ b/examples/peripherals/dedicated_gpio/soft_uart/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | # Example: UART software emulation using dedicated/fast GPIOs diff --git a/examples/peripherals/dedicated_gpio/soft_uart/components/soft_uart/riscv/soft_uart.S b/examples/peripherals/dedicated_gpio/soft_uart/components/soft_uart/riscv/soft_uart.S index afb0f56be86..afde13ed698 100644 --- a/examples/peripherals/dedicated_gpio/soft_uart/components/soft_uart/riscv/soft_uart.S +++ b/examples/peripherals/dedicated_gpio/soft_uart/components/soft_uart/riscv/soft_uart.S @@ -4,12 +4,18 @@ * SPDX-License-Identifier: CC0-1.0 */ #include "sdkconfig.h" + #include "soc/soc_caps.h" /* RISC-V fast GPIO special registers, taken from "hal/dedic_gpio_cpu_ll.h" */ #define CSR_GPIO_IN_USER 0x804 #define CSR_GPIO_OUT_USER 0x805 /* Special register for machine cycle count */ + +#if SOC_CPU_HAS_CSR_PC #define CSR_PCCR_MACHINE 0x7e2 +#else + #define CSR_PCCR_MACHINE mcycle +#endif .section .text diff --git a/examples/peripherals/parlio/parlio_tx/simple_rgb_led_matrix/README.md b/examples/peripherals/parlio/parlio_tx/simple_rgb_led_matrix/README.md index db62a41730d..35ee2e30d49 100644 --- a/examples/peripherals/parlio/parlio_tx/simple_rgb_led_matrix/README.md +++ b/examples/peripherals/parlio/parlio_tx/simple_rgb_led_matrix/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32-C6 | ESP32-H2 | ESP32-P4 | -| ----------------- | -------- | -------- | -------- | +| Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | +| ----------------- | -------- | -------- | -------- | -------- | # Parallel IO TX Example: Simple RGB LED Matrix diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt index b45b0680a9c..5a94cf6adba 100644 --- a/tools/ci/check_copyright_ignore.txt +++ b/tools/ci/check_copyright_ignore.txt @@ -590,7 +590,6 @@ components/soc/esp32c3/include/soc/wdev_reg.h components/soc/esp32c3/interrupts.c components/soc/esp32c3/ledc_periph.c components/soc/esp32s2/adc_periph.c -components/soc/esp32s2/dedic_gpio_periph.c components/soc/esp32s2/i2c_periph.c components/soc/esp32s2/include/soc/apb_saradc_reg.h components/soc/esp32s2/include/soc/assist_debug_reg.h @@ -626,7 +625,6 @@ components/soc/esp32s2/include/soc/usb_wrap_reg.h components/soc/esp32s2/include/soc/usb_wrap_struct.h components/soc/esp32s2/include/soc/wdev_reg.h components/soc/esp32s2/ledc_periph.c -components/soc/esp32s3/dedic_gpio_periph.c components/soc/esp32s3/i2c_periph.c components/soc/esp32s3/include/soc/apb_saradc_reg.h components/soc/esp32s3/include/soc/assist_debug_reg.h @@ -684,7 +682,6 @@ components/soc/esp32s3/include/soc/usb_wrap_reg.h components/soc/esp32s3/include/soc/usb_wrap_struct.h components/soc/esp32s3/include/soc/wdev_reg.h components/soc/esp32s3/ledc_periph.c -components/soc/include/soc/dedic_gpio_periph.h components/soc/include/soc/gpio_periph.h components/soc/include/soc/ledc_periph.h components/soc/lldesc.c From 38b1fe9b11c5fd6889afe78eeb2d59499539649d Mon Sep 17 00:00:00 2001 From: Chen Jichang Date: Thu, 11 Jul 2024 17:35:50 +0800 Subject: [PATCH 073/113] feat(glitch_filter): add support for esp32c5 --- .../gpio_extensions/main/test_gpio_filter.c | 2 + .../gpio_extensions/pytest_gpio_extensions.py | 1 + .../include/hal/gpio_glitch_filter_ll.h | 66 +++++++++++++++++++ .../esp32c5/include/soc/Kconfig.soc_caps.in | 8 +++ .../soc/esp32c5/include/soc/clk_tree_defs.h | 2 +- .../soc/esp32c5/include/soc/gpio_ext_struct.h | 23 ++++--- components/soc/esp32c5/include/soc/soc_caps.h | 6 +- .../soc/esp32c5/ld/esp32c5.peripherals.ld | 1 + 8 files changed, 96 insertions(+), 13 deletions(-) create mode 100644 components/hal/esp32c5/include/hal/gpio_glitch_filter_ll.h diff --git a/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_gpio_filter.c b/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_gpio_filter.c index 6826cd15db9..081d9ab2ec6 100644 --- a/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_gpio_filter.c +++ b/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_gpio_filter.c @@ -16,6 +16,8 @@ #if CONFIG_IDF_TARGET_ESP32P4 #define TEST_FILTER_GPIO 20 +#elif CONFIG_IDF_TARGET_ESP32C5 +#define TEST_FILTER_GPIO 0 #else #define TEST_FILTER_GPIO 2 #endif diff --git a/components/esp_driver_gpio/test_apps/gpio_extensions/pytest_gpio_extensions.py b/components/esp_driver_gpio/test_apps/gpio_extensions/pytest_gpio_extensions.py index 58c95c8f3a6..6988a925959 100644 --- a/components/esp_driver_gpio/test_apps/gpio_extensions/pytest_gpio_extensions.py +++ b/components/esp_driver_gpio/test_apps/gpio_extensions/pytest_gpio_extensions.py @@ -11,6 +11,7 @@ @pytest.mark.esp32c2 @pytest.mark.esp32c3 +@pytest.mark.esp32c5 @pytest.mark.esp32c6 @pytest.mark.esp32h2 @pytest.mark.esp32s2 diff --git a/components/hal/esp32c5/include/hal/gpio_glitch_filter_ll.h b/components/hal/esp32c5/include/hal/gpio_glitch_filter_ll.h new file mode 100644 index 00000000000..f1f5622dfce --- /dev/null +++ b/components/hal/esp32c5/include/hal/gpio_glitch_filter_ll.h @@ -0,0 +1,66 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/******************************************************************************* + * NOTICE + * The hal is not public api, don't use in application code. + * See readme.md in hal/include/hal/readme.md + ******************************************************************************/ + +#pragma once + +#include +#include "hal/assert.h" +#include "soc/gpio_ext_struct.h" + +#define GPIO_LL_GLITCH_FILTER_MAX_WINDOW 64 + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Enable GPIO glitch filter + * + * @param hw Glitch filter register base address + * @param filter_idx Glitch filter index + * @param enable True to enable, false to disable + */ +static inline void gpio_ll_glitch_filter_enable(gpio_glitch_filter_dev_t *hw, uint32_t filter_idx, bool enable) +{ + hw->glitch_filter_chn[filter_idx].filter_chn_en = enable; +} + +/** + * @brief Set the input GPIO for the glitch filter + * + * @param hw Glitch filter register base address + * @param filter_idx Glitch filter index + * @param gpio_num GPIO number + */ +static inline void gpio_ll_glitch_filter_set_gpio(gpio_glitch_filter_dev_t *hw, uint32_t filter_idx, uint32_t gpio_num) +{ + hw->glitch_filter_chn[filter_idx].filter_chn_input_io_num = gpio_num; +} + +/** + * @brief Set the coefficient of the glitch filter window + * + * @param hw Glitch filter register base address + * @param filter_idx Glitch filter index + * @param window_width Window width, in IOMUX clock ticks + * @param window_threshold Window threshold, in IOMUX clock ticks + */ +static inline void gpio_ll_glitch_filter_set_window_coeff(gpio_glitch_filter_dev_t *hw, uint32_t filter_idx, uint32_t window_width, uint32_t window_thres) +{ + HAL_ASSERT(window_thres <= window_width); + hw->glitch_filter_chn[filter_idx].filter_chn_window_width = window_width - 1; + hw->glitch_filter_chn[filter_idx].filter_chn_window_thres = window_thres - 1; +} + +#ifdef __cplusplus +} +#endif diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index 466607e158b..91e6ffe6ed1 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -399,6 +399,14 @@ config SOC_GPIO_PIN_COUNT int default 29 +config SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER + bool + default y + +config SOC_GPIO_FLEX_GLITCH_FILTER_NUM + int + default 8 + config SOC_GPIO_SUPPORT_PIN_HYS_FILTER bool default y diff --git a/components/soc/esp32c5/include/soc/clk_tree_defs.h b/components/soc/esp32c5/include/soc/clk_tree_defs.h index 083b4c69a85..6c50e48480d 100644 --- a/components/soc/esp32c5/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c5/include/soc/clk_tree_defs.h @@ -402,7 +402,7 @@ typedef enum { * @brief Glitch filter clock source */ -typedef enum { // TODO: [ESP32C5] IDF-8718 (inherit from C6) +typedef enum { GLITCH_FILTER_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL clock as the source clock */ GLITCH_FILTER_CLK_SRC_PLL_F80M = SOC_MOD_CLK_PLL_F80M, /*!< Select PLL_F80M clock as the source clock */ GLITCH_FILTER_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F80M, /*!< Select PLL_F80M clock as the default clock choice */ diff --git a/components/soc/esp32c5/include/soc/gpio_ext_struct.h b/components/soc/esp32c5/include/soc/gpio_ext_struct.h index 56aa2ecdd9d..adf51ea44af 100644 --- a/components/soc/esp32c5/include/soc/gpio_ext_struct.h +++ b/components/soc/esp32c5/include/soc/gpio_ext_struct.h @@ -142,13 +142,13 @@ typedef union { */ typedef union { struct { - /** filter_ch0_en : R/W; bitpos: [0]; default: 0; + /** filter_chn_en : R/W; bitpos: [0]; default: 0; * Configures whether or not to enable channel n of Glitch Filter.\\ * 0: Not enable\\ * 1: Enable\\ */ - uint32_t filter_ch0_en:1; - /** filter_ch0_input_io_num : R/W; bitpos: [6:1]; default: 0; + uint32_t filter_chn_en:1; + /** filter_chn_input_io_num : R/W; bitpos: [6:1]; default: 0; * Configures to select the input GPIO for Glitch Filter. \\ * 0: Select GPIO0\\ * 1: Select GPIO1\\ @@ -157,20 +157,20 @@ typedef union { * 28: Select GPIO28\\ * 29 ~ 63: Reserved\\ */ - uint32_t filter_ch0_input_io_num:6; + uint32_t filter_chn_input_io_num:6; uint32_t reserved_7:1; - /** filter_ch0_window_thres : R/W; bitpos: [13:8]; default: 0; + /** filter_chn_window_thres : R/W; bitpos: [13:8]; default: 0; * Configures the window threshold for Glitch Filter. The window threshold should be * less than or equal to GPIOSD_FILTER_CHn_WINDOW_WIDTH.\\ %see DOC-4768\\ * Measurement unit: IO MUX operating clock cycle\\ */ - uint32_t filter_ch0_window_thres:6; - /** filter_ch0_window_width : R/W; bitpos: [19:14]; default: 0; + uint32_t filter_chn_window_thres:6; + /** filter_chn_window_width : R/W; bitpos: [19:14]; default: 0; * Configures the window width for Glitch Filter. The effective value of window width * is 0 ~ 63. \\ * Measurement unit: IO MUX operating clock cycle\\ */ - uint32_t filter_ch0_window_width:6; + uint32_t filter_chn_window_width:6; uint32_t reserved_20:12; }; uint32_t val; @@ -454,13 +454,17 @@ typedef struct gpio_etm_dev_t { volatile gpio_ext_etm_task_pn_cfg_reg_t etm_task_pn_cfg[6]; } gpio_etm_dev_t; +typedef struct { + volatile gpio_ext_glitch_filter_chn_reg_t glitch_filter_chn[8]; +} gpio_glitch_filter_dev_t; + typedef struct { volatile gpio_sd_dev_t sigma_delta; uint32_t reserved_018[16]; volatile gpio_ext_pad_comp_config_0_reg_t pad_comp_config_0; volatile gpio_ext_pad_comp_filter_0_reg_t pad_comp_filter_0; uint32_t reserved_060[30]; - volatile gpio_ext_glitch_filter_chn_reg_t glitch_filter_chn[8]; + volatile gpio_glitch_filter_dev_t glitch_filter; uint32_t reserved_0f8[8]; volatile gpio_etm_dev_t etm; uint32_t reserved_170[24]; @@ -474,6 +478,7 @@ typedef struct { } gpio_ext_dev_t; extern gpio_sd_dev_t SDM; +extern gpio_glitch_filter_dev_t GLITCH_FILTER; extern gpio_etm_dev_t GPIO_ETM; extern gpio_ext_dev_t GPIO_EXT; diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index 6e02acdff00..56cadf63a72 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -188,9 +188,9 @@ // ESP32-C5 has 1 GPIO peripheral #define SOC_GPIO_PORT 1U #define SOC_GPIO_PIN_COUNT 29 -// #define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1 -// #define SOC_GPIO_FLEX_GLITCH_FILTER_NUM 8 -#define SOC_GPIO_SUPPORT_PIN_HYS_FILTER 1 +#define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1 +#define SOC_GPIO_FLEX_GLITCH_FILTER_NUM 8 +#define SOC_GPIO_SUPPORT_PIN_HYS_FILTER 1 // GPIO peripheral has the ETM extension #define SOC_GPIO_SUPPORT_ETM 1 diff --git a/components/soc/esp32c5/ld/esp32c5.peripherals.ld b/components/soc/esp32c5/ld/esp32c5.peripherals.ld index 31097118a3f..e1f8c4a005e 100644 --- a/components/soc/esp32c5/ld/esp32c5.peripherals.ld +++ b/components/soc/esp32c5/ld/esp32c5.peripherals.ld @@ -44,6 +44,7 @@ PROVIDE ( IO_MUX = 0x60090000 ); PROVIDE ( GPIO = 0x60091000 ); PROVIDE ( GPIO_EXT = 0x60091e00 ); PROVIDE ( SDM = 0x60091e00 ); +PROVIDE ( GLITCH_FILTER = 0x60091ed8 ); PROVIDE ( GPIO_ETM = 0x60091f18 ); PROVIDE ( MEM_MONITOR = 0x60092000 ); PROVIDE ( PAU = 0x60093000 ); From 3fbd7eb80b77059ee3ae79ee5c36356ce87608c1 Mon Sep 17 00:00:00 2001 From: Sarvesh Bodakhe Date: Wed, 17 Jul 2024 17:33:58 +0530 Subject: [PATCH 074/113] fix(wifi): Free scan configuration after use when channel bitmap is used --- examples/wifi/scan/main/scan.c | 1 + 1 file changed, 1 insertion(+) diff --git a/examples/wifi/scan/main/scan.c b/examples/wifi/scan/main/scan.c index 2876fb95a50..243b4a7a98f 100644 --- a/examples/wifi/scan/main/scan.c +++ b/examples/wifi/scan/main/scan.c @@ -179,6 +179,7 @@ static void wifi_scan(void) } array_2_channel_bitmap(channel_list, CHANNEL_LIST_SIZE, scan_config); esp_wifi_scan_start(scan_config, true); + free(scan_config); #else esp_wifi_scan_start(NULL, true); From 07da0f627c8ad2e6f27e2382870b7fa2ff17f763 Mon Sep 17 00:00:00 2001 From: Erhan Kurubas Date: Wed, 17 Jul 2024 14:45:17 +0200 Subject: [PATCH 075/113] docs(jtag): update esp32c5 jtag debugging guide --- docs/docs_not_updated/esp32c5.txt | 10 ------ .../jtag-debugging/configure-other-jtag.rst | 2 +- docs/en/api-guides/jtag-debugging/esp32c5.inc | 31 ++++++++++--------- docs/en/api-guides/jtag-debugging/index.rst | 2 +- .../jtag-debugging/configure-other-jtag.rst | 2 +- .../api-guides/jtag-debugging/esp32c5.inc | 31 ++++++++++--------- .../zh_CN/api-guides/jtag-debugging/index.rst | 2 +- 7 files changed, 36 insertions(+), 44 deletions(-) diff --git a/docs/docs_not_updated/esp32c5.txt b/docs/docs_not_updated/esp32c5.txt index f4ad140ff4d..89df0f3002f 100644 --- a/docs/docs_not_updated/esp32c5.txt +++ b/docs/docs_not_updated/esp32c5.txt @@ -6,16 +6,6 @@ contribute/style-guide.rst contribute/copyright-guide.rst contribute/install-pre-commit-hook.rst contribute/index.rst -api-guides/jtag-debugging/debugging-examples.rst -api-guides/jtag-debugging/configure-ft2232h-jtag.rst -api-guides/jtag-debugging/tips-and-quirks.rst -api-guides/jtag-debugging/using-debugger.rst -api-guides/jtag-debugging/building-openocd-macos.rst -api-guides/jtag-debugging/building-openocd-linux.rst -api-guides/jtag-debugging/configure-other-jtag.rst -api-guides/jtag-debugging/building-openocd-windows.rst -api-guides/jtag-debugging/index.rst -api-guides/jtag-debugging/configure-builtin-jtag.rst api-guides/tools/idf-tools.rst api-guides/tools/idf-clang-tidy.rst api-guides/tools/idf-component-manager.rst diff --git a/docs/en/api-guides/jtag-debugging/configure-other-jtag.rst b/docs/en/api-guides/jtag-debugging/configure-other-jtag.rst index e3c95d1be58..471bfcbace2 100644 --- a/docs/en/api-guides/jtag-debugging/configure-other-jtag.rst +++ b/docs/en/api-guides/jtag-debugging/configure-other-jtag.rst @@ -3,7 +3,7 @@ Configure Other JTAG Interfaces :link_to_translation:`zh_CN:[中文]` -{IDF_TARGET_JTAG_SEL_EFUSE:default="Not Updated!", esp32s3="STRAP_JTAG_SEL", esp32c6="JTAG_SEL_ENABLE", esp32h2="JTAG_SEL_ENABLE", esp32p4="JTAG_SEL_ENABLE"} +{IDF_TARGET_JTAG_SEL_EFUSE:default="Not Updated!", esp32s3="STRAP_JTAG_SEL", esp32c6="JTAG_SEL_ENABLE", esp32h2="JTAG_SEL_ENABLE", esp32p4="JTAG_SEL_ENABLE", esp32c5="JTAG_SEL_ENABLE"} For guidance about which JTAG interface to select when using OpenOCD with {IDF_TARGET_NAME}, refer to the section :ref:`jtag-debugging-selecting-jtag-adapter`. Then follow the configuration steps below to get it working. diff --git a/docs/en/api-guides/jtag-debugging/esp32c5.inc b/docs/en/api-guides/jtag-debugging/esp32c5.inc index 65ccf72bad8..d4f87e35b61 100644 --- a/docs/en/api-guides/jtag-debugging/esp32c5.inc +++ b/docs/en/api-guides/jtag-debugging/esp32c5.inc @@ -22,26 +22,27 @@ :: user-name@computer-name:~/esp/esp-idf$ openocd -f board/esp32c5-builtin.cfg - Open On-Chip Debugger v0.11.0-esp32-20221026-85-g0718fffd (2023-01-12-07:28) + Open On-Chip Debugger v0.12.0-esp32-20240318-139-g35ddcf93-dirty (2024-07-16-15:00) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html - Info : only one transport option; autoselect 'jtag' + Info : only one transport option; autoselecting 'jtag' Info : esp_usb_jtag: VID set to 0x303a and PID to 0x1001 Info : esp_usb_jtag: capabilities descriptor set to 0x2000 - Warn : Transport "jtag" was already selected WARNING: ESP flash support is disabled! force hard breakpoints Info : Listening on port 6666 for tcl connections Info : Listening on port 4444 for telnet connections - Info : esp_usb_jtag: serial (60:55:F9:F6:03:3C) + Info : esp_usb_jtag: serial (60:55:F9:FF:FE:F9:54:A4) Info : esp_usb_jtag: Device found. Base speed 24000KHz, div range 1 to 255 Info : clock speed 24000 kHz - Info : JTAG tap: esp32c5.cpu tap/device found: 0x0000dc25 (mfg: 0x612 (Espressif Systems), part: 0x000d, ver: 0x0) - Info : datacount=2 progbufsize=16 - Info : Examined RISC-V core; found 2 harts - Info : hart 0: XLEN=32, misa=0x40903105 - Info : starting gdb server for esp32c5 on 3333 + Info : JTAG tap: esp32c5.cpu0 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0) + Info : JTAG tap: esp32c5.cpu1 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0) + Info : [esp32c5.cpu1] datacount=1 progbufsize=2 + Info : [esp32c5.cpu1] Examined RISC-V core; found 1 harts + Info : [esp32c5.cpu1] XLEN=32, misa=0x40101105 + Info : [esp32c5.cpu1] Examination succeed + Info : [esp32c5.cpu1] starting gdb server on 3333 Info : Listening on port 3333 for gdb connections .. |run-openocd-cfg-file-err| replace:: ``Can't find board/esp32c5-builtin.cfg`` @@ -121,17 +122,17 @@ * - ESP32-C5 Pin - JTAG Signal - * - MTDO / GPIO7 + * - MTDO / GPIO5 - TDO - * - MTDI / GPIO5 + * - MTDI / GPIO3 - TDI - * - MTCK / GPIO6 + * - MTCK / GPIO4 - TCK - * - MTMS / GPIO4 + * - MTMS / GPIO2 - TMS -.. |jtag-sel-gpio| replace:: GPIO15 -.. |jtag-gpio-list| replace:: GPIO4-GPIO7 +.. |jtag-sel-gpio| replace:: GPIO7 +.. |jtag-gpio-list| replace:: GPIO2-GPIO5 --- diff --git a/docs/en/api-guides/jtag-debugging/index.rst b/docs/en/api-guides/jtag-debugging/index.rst index d6e967dc4ef..66a2b3c97fe 100644 --- a/docs/en/api-guides/jtag-debugging/index.rst +++ b/docs/en/api-guides/jtag-debugging/index.rst @@ -180,7 +180,7 @@ Open a terminal and set it up for using the ESP-IDF as described in the :ref:`se :start-after: run-openocd :end-before: --- -{IDF_TARGET_FTDI_CONFIG:default="Not Updated!", esp32s3="board/esp32s3-ftdi.cfg", esp32c3="board/esp32c3-ftdi.cfg", esp32c6="board/esp32c6-ftdi.cfg", esp32h2="board/esp32h2-ftdi.cfg"} +{IDF_TARGET_FTDI_CONFIG:default="Not Updated!", esp32s3="board/esp32s3-ftdi.cfg", esp32c3="board/esp32c3-ftdi.cfg", esp32c6="board/esp32c6-ftdi.cfg", esp32h2="board/esp32h2-ftdi.cfg", esp32p4="board/esp32p4-ftdi.cfg", esp32c5="board/esp32c5-ftdi.cfg"} .. note:: diff --git a/docs/zh_CN/api-guides/jtag-debugging/configure-other-jtag.rst b/docs/zh_CN/api-guides/jtag-debugging/configure-other-jtag.rst index d176f3d6930..8396f435b79 100644 --- a/docs/zh_CN/api-guides/jtag-debugging/configure-other-jtag.rst +++ b/docs/zh_CN/api-guides/jtag-debugging/configure-other-jtag.rst @@ -3,7 +3,7 @@ :link_to_translation:`en:[English]` -{IDF_TARGET_JTAG_SEL_EFUSE:default="Not Updated!", esp32s3="STRAP_JTAG_SEL", esp32c6="JTAG_SEL_ENABLE", esp32h2="JTAG_SEL_ENABLE", esp32p4="JTAG_SEL_ENABLE"} +{IDF_TARGET_JTAG_SEL_EFUSE:default="Not Updated!", esp32s3="STRAP_JTAG_SEL", esp32c6="JTAG_SEL_ENABLE", esp32h2="JTAG_SEL_ENABLE", esp32p4="JTAG_SEL_ENABLE", esp32c5="JTAG_SEL_ENABLE"} 关于适配 OpenOCD 和 {IDF_TARGET_NAME} 的 JTAG 接口选择问题，请参考 :ref:`jtag-debugging-selecting-jtag-adapter` 章节。然后按照以下步骤进行设置，使其正常工作。 diff --git a/docs/zh_CN/api-guides/jtag-debugging/esp32c5.inc b/docs/zh_CN/api-guides/jtag-debugging/esp32c5.inc index 65ccf72bad8..d4f87e35b61 100644 --- a/docs/zh_CN/api-guides/jtag-debugging/esp32c5.inc +++ b/docs/zh_CN/api-guides/jtag-debugging/esp32c5.inc @@ -22,26 +22,27 @@ :: user-name@computer-name:~/esp/esp-idf$ openocd -f board/esp32c5-builtin.cfg - Open On-Chip Debugger v0.11.0-esp32-20221026-85-g0718fffd (2023-01-12-07:28) + Open On-Chip Debugger v0.12.0-esp32-20240318-139-g35ddcf93-dirty (2024-07-16-15:00) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html - Info : only one transport option; autoselect 'jtag' + Info : only one transport option; autoselecting 'jtag' Info : esp_usb_jtag: VID set to 0x303a and PID to 0x1001 Info : esp_usb_jtag: capabilities descriptor set to 0x2000 - Warn : Transport "jtag" was already selected WARNING: ESP flash support is disabled! force hard breakpoints Info : Listening on port 6666 for tcl connections Info : Listening on port 4444 for telnet connections - Info : esp_usb_jtag: serial (60:55:F9:F6:03:3C) + Info : esp_usb_jtag: serial (60:55:F9:FF:FE:F9:54:A4) Info : esp_usb_jtag: Device found. Base speed 24000KHz, div range 1 to 255 Info : clock speed 24000 kHz - Info : JTAG tap: esp32c5.cpu tap/device found: 0x0000dc25 (mfg: 0x612 (Espressif Systems), part: 0x000d, ver: 0x0) - Info : datacount=2 progbufsize=16 - Info : Examined RISC-V core; found 2 harts - Info : hart 0: XLEN=32, misa=0x40903105 - Info : starting gdb server for esp32c5 on 3333 + Info : JTAG tap: esp32c5.cpu0 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0) + Info : JTAG tap: esp32c5.cpu1 tap/device found: 0x00017c25 (mfg: 0x612 (Espressif Systems), part: 0x0017, ver: 0x0) + Info : [esp32c5.cpu1] datacount=1 progbufsize=2 + Info : [esp32c5.cpu1] Examined RISC-V core; found 1 harts + Info : [esp32c5.cpu1] XLEN=32, misa=0x40101105 + Info : [esp32c5.cpu1] Examination succeed + Info : [esp32c5.cpu1] starting gdb server on 3333 Info : Listening on port 3333 for gdb connections .. |run-openocd-cfg-file-err| replace:: ``Can't find board/esp32c5-builtin.cfg`` @@ -121,17 +122,17 @@ * - ESP32-C5 Pin - JTAG Signal - * - MTDO / GPIO7 + * - MTDO / GPIO5 - TDO - * - MTDI / GPIO5 + * - MTDI / GPIO3 - TDI - * - MTCK / GPIO6 + * - MTCK / GPIO4 - TCK - * - MTMS / GPIO4 + * - MTMS / GPIO2 - TMS -.. |jtag-sel-gpio| replace:: GPIO15 -.. |jtag-gpio-list| replace:: GPIO4-GPIO7 +.. |jtag-sel-gpio| replace:: GPIO7 +.. |jtag-gpio-list| replace:: GPIO2-GPIO5 --- diff --git a/docs/zh_CN/api-guides/jtag-debugging/index.rst b/docs/zh_CN/api-guides/jtag-debugging/index.rst index f92bb4238f6..7d4dbc4e177 100644 --- a/docs/zh_CN/api-guides/jtag-debugging/index.rst +++ b/docs/zh_CN/api-guides/jtag-debugging/index.rst @@ -180,7 +180,7 @@ OpenOCD 安装完成后就可以配置 {IDF_TARGET_NAME} 目标（即带 JTAG :start-after: run-openocd :end-before: --- -{IDF_TARGET_FTDI_CONFIG:default="Not Updated!", esp32s3="board/esp32s3-ftdi.cfg", esp32c3="board/esp32c3-ftdi.cfg", esp32c6="board/esp32c6-ftdi.cfg", esp32h2="board/esp32h2-ftdi.cfg"} +{IDF_TARGET_FTDI_CONFIG:default="Not Updated!", esp32s3="board/esp32s3-ftdi.cfg", esp32c3="board/esp32c3-ftdi.cfg", esp32c6="board/esp32c6-ftdi.cfg", esp32h2="board/esp32h2-ftdi.cfg", esp32p4="board/esp32p4-ftdi.cfg", esp32c5="board/esp32c5-ftdi.cfg"} .. note:: From 48b3e4f76f9aa2141fcbcf8c265c0d6208a2111d Mon Sep 17 00:00:00 2001 From: David Cermak Date: Fri, 7 Jun 2024 16:23:41 +0200 Subject: [PATCH 076/113] feat(lwip): Add support for disabling IPv4 in PPP networks --- .../esp_netif/lwip/esp_netif_lwip_ppp.c | 2 + components/lwip/Kconfig | 40 +++++++++++-------- components/lwip/port/include/lwipopts.h | 5 +++ 3 files changed, 31 insertions(+), 16 deletions(-) diff --git a/components/esp_netif/lwip/esp_netif_lwip_ppp.c b/components/esp_netif/lwip/esp_netif_lwip_ppp.c index 259ec9f4b75..442f249a881 100644 --- a/components/esp_netif/lwip/esp_netif_lwip_ppp.c +++ b/components/esp_netif/lwip/esp_netif_lwip_ppp.c @@ -231,7 +231,9 @@ netif_related_data_t * esp_netif_new_ppp(esp_netif_t *esp_netif, const esp_netif #if PPP_NOTIFY_PHASE ppp_set_notify_phase_callback(ppp_obj->ppp, on_ppp_notify_phase); #endif +#if PPP_IPV4_SUPPORT ppp_set_usepeerdns(ppp_obj->ppp, 1); +#endif return (netif_related_data_t *)ppp_obj; } diff --git a/components/lwip/Kconfig b/components/lwip/Kconfig index 90ee1262013..4af717287b4 100644 --- a/components/lwip/Kconfig +++ b/components/lwip/Kconfig @@ -882,6 +882,21 @@ menu "LWIP" default 0x0 if LWIP_TCPIP_TASK_AFFINITY_CPU0 default 0x1 if LWIP_TCPIP_TASK_AFFINITY_CPU1 + config LWIP_IPV6_MEMP_NUM_ND6_QUEUE + int "Max number of IPv6 packets to queue during MAC resolution" + depends on LWIP_IPV6 + range 3 20 + default 3 + help + Config max number of IPv6 packets to queue during MAC resolution. + + config LWIP_IPV6_ND6_NUM_NEIGHBORS + int "Max number of entries in IPv6 neighbor cache" + depends on LWIP_IPV6 + range 3 10 + default 5 + help + Config max number of entries in IPv6 neighbor cache menuconfig LWIP_PPP_SUPPORT bool "Enable PPP support" @@ -889,6 +904,15 @@ menu "LWIP" help Enable PPP stack. Now only PPP over serial is possible. + config LWIP_PPP_ENABLE_IPV4 + bool "Enable IPV4 support for PPP connections (IPCP)" + depends on LWIP_PPP_SUPPORT && LWIP_IPV4 + default y + help + Enable IPCP protocol in PPP negotiations, which assigns IPv4 addresses to the PPP client, + as well as IPv4 DNS servers. + You can disable this if your modem supports IPv6 only. + config LWIP_PPP_ENABLE_IPV6 bool "Enable IPV6 support for PPP connections (IPV6CP)" depends on LWIP_PPP_SUPPORT && LWIP_IPV6 @@ -900,22 +924,6 @@ menu "LWIP" This would in turn fail the configuration for the whole link. If your modem is not responding correctly to PPP Phase Network, try to disable IPV6 support. - config LWIP_IPV6_MEMP_NUM_ND6_QUEUE - int "Max number of IPv6 packets to queue during MAC resolution" - depends on LWIP_IPV6 - range 3 20 - default 3 - help - Config max number of IPv6 packets to queue during MAC resolution. - - config LWIP_IPV6_ND6_NUM_NEIGHBORS - int "Max number of entries in IPv6 neighbor cache" - depends on LWIP_IPV6 - range 3 10 - default 5 - help - Config max number of entries in IPv6 neighbor cache - config LWIP_PPP_NOTIFY_PHASE_SUPPORT bool "Enable Notify Phase Callback" depends on LWIP_PPP_SUPPORT diff --git a/components/lwip/port/include/lwipopts.h b/components/lwip/port/include/lwipopts.h index c9a6d570229..d150106f814 100644 --- a/components/lwip/port/include/lwipopts.h +++ b/components/lwip/port/include/lwipopts.h @@ -1080,6 +1080,11 @@ static inline uint32_t timeout_from_offered(uint32_t lease, uint32_t min) */ #define PPP_IPV6_SUPPORT CONFIG_LWIP_PPP_ENABLE_IPV6 +/** + * PPP_IPV4_SUPPORT==1: Enable PPP IPv4 support + */ +#define PPP_IPV4_SUPPORT CONFIG_LWIP_PPP_ENABLE_IPV4 + /** * PPP_NOTIFY_PHASE==1: Support PPP notify phase. */ From 95169eb929cb598e58a644493a6eaa834065c496 Mon Sep 17 00:00:00 2001 From: David Cermak Date: Fri, 7 Jun 2024 16:52:32 +0200 Subject: [PATCH 077/113] feat(esp_netif): Add support for IPv6 autoconfig flag per netif --- components/esp_netif/include/esp_netif_defaults.h | 14 ++++++++++---- components/esp_netif/include/esp_netif_types.h | 1 + components/esp_netif/lwip/esp_netif_lwip.c | 2 +- components/esp_netif/lwip/esp_netif_lwip_ppp.c | 2 +- 4 files changed, 13 insertions(+), 6 deletions(-) diff --git a/components/esp_netif/include/esp_netif_defaults.h b/components/esp_netif/include/esp_netif_defaults.h index 414b6c389ba..b215aca1dca 100644 --- a/components/esp_netif/include/esp_netif_defaults.h +++ b/components/esp_netif/include/esp_netif_defaults.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -36,9 +36,15 @@ extern "C" { #define ESP_NETIF_DEFAULT_MLDV6_REPORT_FLAGS (0) #endif +#ifdef CONFIG_LWIP_IPV6_AUTOCONFIG +#define ESP_NETIF_DEFAULT_IPV6_AUTOCONFIG_FLAGS (ESP_NETIF_FLAG_IPV6_AUTOCONFIG_ENABLED) +#else +#define ESP_NETIF_DEFAULT_IPV6_AUTOCONFIG_FLAGS (0) +#endif + #define ESP_NETIF_INHERENT_DEFAULT_WIFI_STA() \ { \ - .flags = (esp_netif_flags_t)(ESP_NETIF_IPV4_ONLY_FLAGS(ESP_NETIF_DHCP_CLIENT) | ESP_NETIF_DEFAULT_ARP_FLAGS | ESP_NETIF_DEFAULT_MLDV6_REPORT_FLAGS | ESP_NETIF_FLAG_EVENT_IP_MODIFIED), \ + .flags = (esp_netif_flags_t)(ESP_NETIF_IPV4_ONLY_FLAGS(ESP_NETIF_DHCP_CLIENT) | ESP_NETIF_DEFAULT_ARP_FLAGS | ESP_NETIF_DEFAULT_MLDV6_REPORT_FLAGS | ESP_NETIF_FLAG_EVENT_IP_MODIFIED | ESP_NETIF_DEFAULT_IPV6_AUTOCONFIG_FLAGS), \ ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(mac) \ ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(ip_info) \ .get_ip_event = IP_EVENT_STA_GOT_IP, \ @@ -78,7 +84,7 @@ extern "C" { #define ESP_NETIF_INHERENT_DEFAULT_ETH() \ { \ - .flags = (esp_netif_flags_t)(ESP_NETIF_IPV4_ONLY_FLAGS(ESP_NETIF_DHCP_CLIENT) | ESP_NETIF_DEFAULT_ARP_FLAGS | ESP_NETIF_FLAG_EVENT_IP_MODIFIED), \ + .flags = (esp_netif_flags_t)(ESP_NETIF_IPV4_ONLY_FLAGS(ESP_NETIF_DHCP_CLIENT) | ESP_NETIF_DEFAULT_ARP_FLAGS | ESP_NETIF_FLAG_EVENT_IP_MODIFIED | ESP_NETIF_DEFAULT_IPV6_AUTOCONFIG_FLAGS), \ ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(mac) \ ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(ip_info) \ .get_ip_event = IP_EVENT_ETH_GOT_IP, \ @@ -92,7 +98,7 @@ extern "C" { #ifdef CONFIG_PPP_SUPPORT #define ESP_NETIF_INHERENT_DEFAULT_PPP() \ { \ - .flags = ESP_NETIF_FLAG_IS_PPP, \ + .flags = (esp_netif_flags_t)(ESP_NETIF_FLAG_IS_PPP | ESP_NETIF_DEFAULT_IPV6_AUTOCONFIG_FLAGS), \ ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(mac) \ ESP_COMPILER_DESIGNATED_INIT_AGGREGATE_TYPE_EMPTY(ip_info) \ .get_ip_event = IP_EVENT_PPP_GOT_IP, \ diff --git a/components/esp_netif/include/esp_netif_types.h b/components/esp_netif/include/esp_netif_types.h index c9874c5673b..84a06281773 100644 --- a/components/esp_netif/include/esp_netif_types.h +++ b/components/esp_netif/include/esp_netif_types.h @@ -178,6 +178,7 @@ typedef enum esp_netif_flags { ESP_NETIF_FLAG_IS_PPP = 1 << 5, ESP_NETIF_FLAG_IS_BRIDGE = 1 << 6, ESP_NETIF_FLAG_MLDV6_REPORT = 1 << 7, + ESP_NETIF_FLAG_IPV6_AUTOCONFIG_ENABLED = 1 << 8, } esp_netif_flags_t; typedef enum esp_netif_ip_event_type { diff --git a/components/esp_netif/lwip/esp_netif_lwip.c b/components/esp_netif/lwip/esp_netif_lwip.c index 20ce5f5d7f3..b63577dd711 100644 --- a/components/esp_netif/lwip/esp_netif_lwip.c +++ b/components/esp_netif/lwip/esp_netif_lwip.c @@ -1105,7 +1105,7 @@ static esp_err_t esp_netif_start_api(esp_netif_api_msg_t *msg) ESP_ERROR_CHECK(esp_netif_lwip_add(esp_netif)); #if ESP_IPV6_AUTOCONFIG - esp_netif->lwip_netif->ip6_autoconfig_enabled = 1; + esp_netif->lwip_netif->ip6_autoconfig_enabled = (esp_netif->flags & ESP_NETIF_FLAG_IPV6_AUTOCONFIG_ENABLED) ? 1 : 0; #endif if (esp_netif->flags&ESP_NETIF_FLAG_GARP) { #if ESP_GRATUITOUS_ARP diff --git a/components/esp_netif/lwip/esp_netif_lwip_ppp.c b/components/esp_netif/lwip/esp_netif_lwip_ppp.c index 442f249a881..26e90560e4d 100644 --- a/components/esp_netif/lwip/esp_netif_lwip_ppp.c +++ b/components/esp_netif/lwip/esp_netif_lwip_ppp.c @@ -271,7 +271,7 @@ esp_err_t esp_netif_start_ppp(esp_netif_t *esp_netif) #endif // CONFIG_LWIP_PPP_SERVER_SUPPORT #if ESP_IPV6_AUTOCONFIG - ppp_ctx->ppp->netif->ip6_autoconfig_enabled = 1; + ppp_ctx->ppp->netif->ip6_autoconfig_enabled = (esp_netif->flags & ESP_NETIF_FLAG_IPV6_AUTOCONFIG_ENABLED) ? 1 : 0; #endif ESP_LOGD(TAG, "%s: Starting PPP connection: %p", __func__, ppp_ctx->ppp); From 3f535886a4b294a3e0ad9b6b1a1ee6752d4c1161 Mon Sep 17 00:00:00 2001 From: Zhang Shuxian Date: Fri, 12 Jul 2024 11:33:47 +0800 Subject: [PATCH 078/113] docs: Update cn trans for bootloader and host-apps in api-guides --- docs/en/api-guides/bootloader.rst | 4 ++-- docs/en/api-guides/host-apps.rst | 1 + docs/zh_CN/api-guides/bootloader.rst | 36 ++++++++++++++++------------ docs/zh_CN/api-guides/host-apps.rst | 15 +++++++++++- 4 files changed, 38 insertions(+), 18 deletions(-) diff --git a/docs/en/api-guides/bootloader.rst b/docs/en/api-guides/bootloader.rst index f2b4d6277c9..e12660ce4ba 100644 --- a/docs/en/api-guides/bootloader.rst +++ b/docs/en/api-guides/bootloader.rst @@ -25,7 +25,7 @@ The bootloader does not support booting apps from older versions of ESP-IDF. Whe .. note:: - If testing an OTA update for an existing product in production, always test it using the same ESP-IDF bootloader binary that is deployed in production. + If testing an OTA update for an existing product in production, always test it using the same ESP-IDF bootloader binary that is deployed in production. .. only:: esp32 @@ -54,7 +54,7 @@ The :ref:`first-stage-bootloader` in ROM reads the :ref:`second-stage-bootloader .. only:: esp32 - Bootloaders prior to ESP-IDF V4.0 used the bootloader's own header to configure the SPI flash, meaning these values could not be changed in an update. To maintain compatibility with older bootloaders, the app re-initializes the flash settings during app startup using the configuration found in the app header. + Bootloaders prior to ESP-IDF V4.0 used the bootloader's own header to configure the SPI flash, meaning these values could not be changed in an update. To maintain compatibility with older bootloaders, the app re-initializes the flash settings during app startup using the configuration found in the app header. Log Level --------- diff --git a/docs/en/api-guides/host-apps.rst b/docs/en/api-guides/host-apps.rst index adfc33905b8..c846486353a 100644 --- a/docs/en/api-guides/host-apps.rst +++ b/docs/en/api-guides/host-apps.rst @@ -109,6 +109,7 @@ On Linux, applications prints an error message and a rudimentary backtrace once /lib/x86_64-linux-gnu/libc.so.6(+0x1097dc)[0x7f49f0ecd7dc] Note that the addresses (``+0x...``) are relative binary addresses, which still need to be converted to the source code line numbers (see below). + Note furthermore that the backtrace is created from the signal handler, which means that the two uppermost stack frames are not of interest. Instead, the third line is the uppermost stack frame where the issue occurred: .. code-block:: diff --git a/docs/zh_CN/api-guides/bootloader.rst b/docs/zh_CN/api-guides/bootloader.rst index 2565a2ea843..6412fe3d861 100644 --- a/docs/zh_CN/api-guides/bootloader.rst +++ b/docs/zh_CN/api-guides/bootloader.rst @@ -25,24 +25,24 @@ ESP-IDF 软件引导加载程序 (Bootloader) 主要执行以下任务： .. note:: - 如果在生产中测试现有产品的 OTA 更新，请确保测试中使用的 ESP-IDF 引导加载程序二进制文件与生产中部署的相同。 + 如果在生产中测试现有产品的 OTA 更新，请确保测试中使用的 ESP-IDF 引导加载程序二进制文件与生产中部署的相同。 .. only:: esp32 - ESP-IDF V2.1 之前的版本 - ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + ESP-IDF V2.1 之前的版本 + ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - 与新版本相比，ESP-IDF V2.1 之前的版本构建的引导加载程序对硬件的配置更少。使用这些早期 ESP-IDF 版本的引导加载程序并构建新应用程序时，请启用配置选项 :ref:`CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS`。 + 与新版本相比，ESP-IDF V2.1 之前的版本构建的引导加载程序对硬件的配置更少。使用这些早期 ESP-IDF 版本的引导加载程序并构建新应用程序时，请启用配置选项 :ref:`CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS`。 - ESP-IDF V3.1 之前的版本 - ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + ESP-IDF V3.1 之前的版本 + ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - ESP-IDF V3.1 之前的版本构建的引导加载程序不支持分区表二进制文件中的 MD5 校验。使用这些 ESP-IDF 版本的引导加载程序并构建新应用程序时，请启用配置选项 :ref:`CONFIG_APP_COMPATIBLE_PRE_V3_1_BOOTLOADERS`。 + ESP-IDF V3.1 之前的版本构建的引导加载程序不支持分区表二进制文件中的 MD5 校验。使用这些 ESP-IDF 版本的引导加载程序并构建新应用程序时，请启用配置选项 :ref:`CONFIG_APP_COMPATIBLE_PRE_V3_1_BOOTLOADERS`。 - ESP-IDF V5.1 之前的版本 - ^^^^^^^^^^^^^^^^^^^^^^^^^^ + ESP-IDF V5.1 之前的版本 + ^^^^^^^^^^^^^^^^^^^^^^^^^^ - ESP-IDF V5.1 之前的版本构建的引导加载程序不支持 :ref:`CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM`。使用这些 ESP-IDF 版本的引导加载程序并构建新应用程序时，不应使用该选项。 + ESP-IDF V5.1 之前的版本构建的引导加载程序不支持 :ref:`CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM`。使用这些 ESP-IDF 版本的引导加载程序并构建新应用程序时，不应使用该选项。 配置 SPI flash @@ -54,7 +54,7 @@ ROM 中的 :ref:`first-stage-bootloader` 从 flash 中读取 :ref:`second-stage- .. only:: esp32 - ESP-IDF V4.0 版本之前的引导加载程序使用其自身的文件头来配置 SPI flash，这意味着无法在 OTA 更新时更改 SPI flash 配置。为了与旧引导加载程序兼容，应用程序在其启动期间使用应用程序文件头中的配置信息重新初始化 flash 配置。 + ESP-IDF V4.0 版本之前的引导加载程序使用其自身的文件头来配置 SPI flash，这意味着无法在 OTA 更新时更改 SPI flash 配置。为了与旧引导加载程序兼容，应用程序在其启动期间使用应用程序文件头中的配置信息重新初始化 flash 配置。 日志级别 --------- @@ -116,7 +116,7 @@ ROM 中的 :ref:`first-stage-bootloader` 从 flash 中读取 :ref:`second-stage- - :ref:`CONFIG_BOOTLOADER_NUM_PIN_APP_TEST` - 设置启动 TEST 分区的管脚编号，该管脚将被配置为输入并启用内部上拉。要触发测试应用，必须在重置时将此管脚拉低或拉高（可配置）。 - 释放管脚输入并重启设备后，将重新启用默认的启动顺序，即启动工厂分区或任意 OTA 应用分区槽。 + 释放管脚输入并重启设备后，将重新启用默认的启动顺序，即启动工厂分区或任意 OTA 应用分区槽。 - :ref:`CONFIG_BOOTLOADER_HOLD_TIME_GPIO` - 设置 GPIO 电平保持的时间，默认为 5 秒。设备重置后，管脚电平必须保持该设定的时间，才能执行恢复出厂设置或引导测试分区（如适用）。 @@ -163,12 +163,18 @@ ROM 中的 :ref:`first-stage-bootloader` 从 flash 中读取 :ref:`second-stage- 当启用 Secure Boot V2 时，由于引导加载程序最先加载到固定大小的缓冲区中进行验证，对二进制文件大小的绝对限制为 {IDF_TARGET_MAX_BOOTLOADER_SIZE}（不包括 4 KB 签名）。 +从深度睡眠中快速启动 +---------------------- + +引导加载程序有 :ref:`CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP` 选项，可以减少从深度睡眠中唤醒的时间（有利于降低功耗）。当 :ref:`CONFIG_SECURE_BOOT` 选项禁用时，该选项可用。由于无需镜像校验，唤醒时间减少。 + .. only:: SOC_RTC_FAST_MEM_SUPPORTED - 从深度睡眠中快速启动 - ---------------------- + 在第一次启动时，引导加载程序将启动的应用程序的地址存储在 RTC FAST 存储器中。而在唤醒过程中，这个地址用于启动而无需任何检查，从而实现了快速加载。 + +.. only:: not SOC_RTC_FAST_MEM_SUPPORTED - 引导加载程序有 :ref:`CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP` 选项，可以减少从深度睡眠中唤醒的时间（有利于降低功耗）。当 :ref:`CONFIG_SECURE_BOOT` 选项禁用时，该选项可用。由于无需镜像校验，唤醒时间减少。在第一次启动时，引导加载程序将启动的应用程序的地址存储在 RTC FAST 存储器中。而在唤醒过程中，这个地址用于启动而无需任何检查，从而实现了快速加载。 + {IDF_TARGET_NAME} 没有 RTC 存储器，因此无法存储正在运行的分区状态。每次唤醒会读取整个分区表，并加载正确的应用程序，而不进行额外的检查，因而使得加载速度更快。 自定义引导加载程序 ---------------------- diff --git a/docs/zh_CN/api-guides/host-apps.rst b/docs/zh_CN/api-guides/host-apps.rst index 917495235b7..546180d76dd 100644 --- a/docs/zh_CN/api-guides/host-apps.rst +++ b/docs/zh_CN/api-guides/host-apps.rst @@ -27,7 +27,7 @@ ESP-IDF 应用程序通常在主机上进行构建（交叉编译），然后上 1. 使用 `FreeRTOS POSIX/Linux 模拟器 `_ 可以模拟 FreeRTOS 调度。在此模拟的基础上，在主机上运行应用程序时也会模拟或使用其他 API。 2. 使用 `CMock `_ 可以模拟所有依赖文件，并在完全独立的情况下运行代码。 -原则上，这两种方法（POSIX/Linux 模拟器和使用 CMock 模拟）可以混用，但此功能在 ESP-IDF 中尚未实现。注意，尽管名称中包含 POSIX/Linux，但目前的 FreeRTOS POSIX/Linux 模拟器也支持在 macOS 系统中运行。在主机上运行 ESP-IDF 应用程序通常用于测试，但模拟环境和模拟依赖文件并不能完全代表目标设备。因此，仍然需要在目标设备上测试，此时测试的侧重点通常在集成和系统测试上。 +注意，尽管名称中包含 POSIX/Linux，但目前的 FreeRTOS POSIX/Linux 模拟器也支持在 macOS 系统中运行。在主机上运行 ESP-IDF 应用程序通常用于测试，但模拟环境和模拟依赖文件并不能完全代表目标设备。因此，仍然需要在目标设备上测试，此时测试的侧重点通常在集成和系统测试上。 .. note:: @@ -44,6 +44,18 @@ POSIX/Linux 模拟器的模拟 ESP-IDF 已支持使用 `FreeRTOS POSIX/Linux 模拟器 `_ 预览应用程序在目标芯片上的运行效果。使用该模拟器可以在主机上运行 ESP-IDF 组件，并使这类组件可用于在主机上运行的 ESP-IDF 应用程序。目前，只有一部分组件可以在 Linux 上构建。此外，各组件移植到 Linux 上后，其功能可能也会受到限制，或与在芯片目标上构建该组件的功能有所不同。有关所需组件在 Linux 上是否受支持的更多信息，请参阅 :ref:`component-linux-mock-support`。 +注意，该模拟器在控制和中断线程时大量依赖于 POSIX 信号和信号处理程序。因此，它具有以下 *限制*： + +.. list:: + - 避免使用不是 *async-signal-safe* 的函数，例如 ``printf()``。特别是，在多个优先级不同的任务中调用这些函数可能会导致崩溃和死锁。 + - 不是由 FreeRTOS API 函数创建的线程，禁止从中调用任何 FreeRTOS 原语。 + - 在 FreeRTOS 模拟器中，如果一个任务使用了像 ``select()`` 这样的原生阻塞或等待机制，模拟器可能会错误地将这些任务视为处于 *就绪状态*，然后尝试调度它们执行。实际上，这些任务可能仍然处于阻塞状态。FreeRTOS 对于那些使用了 FreeRTOS API 而被阻塞的任务，调度器只能识别出 *等待状态*。 + - 当一个模拟的 FreeRTOS 任务调用可能被信号中断的 API 时，这些 API 将持续接收模拟的 FreeRTOS 时钟中断。因此，调用这些 API 的代码应设计为能够处理潜在的中断信号，或者通过链接器进行 API 的包装处理。 + +由于测试和开发过程会受到这些限制影响，我们期望寻找到更好的解决方案用于在主机上运行 ESP-IDF 应用程序。 + +此外，请注意，如果您使用的是 ESP-IDF 中的 FreeRTOS 模拟组件（``tools/mocks/freertos``），这些限制不会影响程序运行。但是，该模拟组件也无法执行任何调度。 + .. only:: not esp32p4 .. note:: @@ -97,6 +109,7 @@ ESP-IDF 已支持使用 `FreeRTOS POSIX/Linux 模拟器 Date: Thu, 18 Jul 2024 10:30:11 +0800 Subject: [PATCH 079/113] fix(ble_mesh): fixed BLEMESH24-76 --- components/bt/esp_ble_mesh/core/net.c | 35 ++++++++++++++++++--------- 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/components/bt/esp_ble_mesh/core/net.c b/components/bt/esp_ble_mesh/core/net.c index 2f9889669be..d5b768c7d22 100644 --- a/components/bt/esp_ble_mesh/core/net.c +++ b/components/bt/esp_ble_mesh/core/net.c @@ -2,7 +2,7 @@ /* * SPDX-FileCopyrightText: 2017 Intel Corporation - * SPDX-FileContributor: 2018-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileContributor: 2018-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -1129,23 +1129,34 @@ int bt_mesh_net_send(struct bt_mesh_net_tx *tx, struct net_buf *buf, if (((IS_ENABLED(CONFIG_BLE_MESH_NODE) && bt_mesh_is_provisioned()) || (IS_ENABLED(CONFIG_BLE_MESH_PROVISIONER) && bt_mesh_is_provisioner_en())) && (bt_mesh_fixed_group_match(tx->ctx->addr) || bt_mesh_elem_find(tx->ctx->addr))) { - if (cb && cb->start) { - cb->start(0, 0, cb_data); - } + /** + * If the target address isn't a unicast address, then the callback function + * will be called by `adv task` in place of here, to avoid the callback function + * being called twice. + * See BLEMESH24-76 for more details. + */ + if (BLE_MESH_ADDR_IS_UNICAST(tx->ctx->addr)) { + if (cb && cb->start) { + cb->start(0, 0, cb_data); + } - net_buf_slist_put(&bt_mesh.local_queue, net_buf_ref(buf)); + net_buf_slist_put(&bt_mesh.local_queue, net_buf_ref(buf)); - if (cb && cb->end) { - cb->end(0, cb_data); - } + if (cb && cb->end) { + cb->end(0, cb_data); + } - bt_mesh_net_local(); + bt_mesh_net_local(); + + err = 0; - err = 0; - /* If it is a group address, it still needs to be relayed */ - if (BLE_MESH_ADDR_IS_UNICAST(tx->ctx->addr)) { goto done; + } else { + net_buf_slist_put(&bt_mesh.local_queue, net_buf_ref(buf)); + bt_mesh_net_local(); } + + err = 0; } if ((bearer & BLE_MESH_ADV_BEARER) && From 08a698515202dc5582e1373f777544fae3c0d296 Mon Sep 17 00:00:00 2001 From: "igor.udot" Date: Thu, 18 Jul 2024 13:52:27 +0800 Subject: [PATCH 080/113] fix: temporal solution for host build and test --- .gitlab/ci/host-test.yml | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/.gitlab/ci/host-test.yml b/.gitlab/ci/host-test.yml index 3d93a205106..62fa8feeefc 100644 --- a/.gitlab/ci/host-test.yml +++ b/.gitlab/ci/host-test.yml @@ -314,8 +314,8 @@ test_pytest_qemu: --pytest-apps -m qemu --collect-app-info "list_job_${CI_JOB_NAME_SLUG}.txt" - --modified-components ${MR_MODIFIED_COMPONENTS} - --modified-files ${MR_MODIFIED_FILES} +# --modified-components ${MR_MODIFIED_COMPONENTS} will be fixed with IDFCI-2270 +# --modified-files ${MR_MODIFIED_FILES} - python tools/ci/get_known_failure_cases_file.py - run_cmd pytest --target $IDF_TARGET @@ -344,8 +344,8 @@ test_pytest_linux: --pytest-apps -m host_test --collect-app-info "list_job_${CI_JOB_NAME_SLUG}.txt" - --modified-components ${MR_MODIFIED_COMPONENTS} - --modified-files ${MR_MODIFIED_FILES} +# --modified-components ${MR_MODIFIED_COMPONENTS} will be fixed with IDFCI-2270 +# --modified-files ${MR_MODIFIED_FILES} - python tools/ci/get_known_failure_cases_file.py - run_cmd pytest --target linux @@ -376,8 +376,8 @@ test_pytest_macos: --pytest-apps -m \"host_test and macos_shell\" --collect-app-info "list_job_${CI_JOB_NAME_SLUG}.txt" - --modified-components ${MR_MODIFIED_COMPONENTS} - --modified-files ${MR_MODIFIED_FILES} +# --modified-components ${MR_MODIFIED_COMPONENTS} will be fixed with IDFCI-2270 +# --modified-files ${MR_MODIFIED_FILES} - python tools/ci/get_known_failure_cases_file.py - run_cmd pytest --target linux From 95bd043bda86e2d48eda1daf6f6df7839b91e399 Mon Sep 17 00:00:00 2001 From: zhiweijian Date: Thu, 18 Jul 2024 14:52:49 +0800 Subject: [PATCH 081/113] feat(bt/controller): support mesh duplicate with extend scan --- components/bt/controller/lib_esp32c3_family | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/bt/controller/lib_esp32c3_family b/components/bt/controller/lib_esp32c3_family index 55485554203..bfdfe8f851c 160000 --- a/components/bt/controller/lib_esp32c3_family +++ b/components/bt/controller/lib_esp32c3_family @@ -1 +1 @@ -Subproject commit 55485554203a225ff09a8dfcf5284c46b70aa0bd +Subproject commit bfdfe8f851c99ced8316b133b0b15521917ea049 From 5b91022b1ed0e7d6a280a012eb0fa79c2e0cb14f Mon Sep 17 00:00:00 2001 From: renpeiying Date: Thu, 11 Jul 2024 10:49:39 +0800 Subject: [PATCH 082/113] docs: Update CN translation for api-guides/jtag-debugging/confugure-ft2232h-jtag.rst --- .../jtag-debugging/configure-ft2232h-jtag.rst | 10 ++--- .../jtag-debugging/configure-ft2232h-jtag.rst | 40 +++++++++++-------- 2 files changed, 29 insertions(+), 21 deletions(-) diff --git a/docs/en/api-guides/jtag-debugging/configure-ft2232h-jtag.rst b/docs/en/api-guides/jtag-debugging/configure-ft2232h-jtag.rst index 52e3e47f4ed..812df6d4e30 100644 --- a/docs/en/api-guides/jtag-debugging/configure-ft2232h-jtag.rst +++ b/docs/en/api-guides/jtag-debugging/configure-ft2232h-jtag.rst @@ -49,9 +49,9 @@ Windows - manual driver change 1. Download Zadig tool (Zadig_X.X.exe) from https://zadig.akeo.ie/ and run it. -2. In Zadig tool go to "Options" and check "List All Devices". +2. In Zadig tool go to `Options` and check `List All Devices`. -3. Check the list of devices that should contain two |devkit-name| specific USB entries: "Dual RS232-HS (Interface 0)" and "Dual RS232-HS (Interface 1)". The driver name would be "FTDIBUS (vxxxx)" and USB ID: 0403 6010. +3. Check the list of devices that should contain two |devkit-name| specific USB entries: `Dual RS232-HS (Interface 0)` and `Dual RS232-HS (Interface 1)`. The driver name would be `FTDIBUS (vxxxx)` and USB ID: 0403 6010. .. figure:: ../../../_static/jtag-usb-configuration-zadig.jpg :align: center @@ -60,11 +60,11 @@ Windows - manual driver change Configuration of JTAG USB driver in Zadig tool -4. The first device (Dual RS232-HS (Interface 0)) is connected to the JTAG port of the {IDF_TARGET_NAME}. Original "FTDIBUS (vxxxx)" driver of this device should be replaced with "WinUSB (v6xxxxx)". To do so, select "Dual RS232-HS (Interface 0) and reinstall attached driver to the "WinUSB (v6xxxxx)", see picture above. +4. The first device (Dual RS232-HS (Interface 0)) is connected to the JTAG port of the {IDF_TARGET_NAME}. Original `FTDIBUS (vxxxx)` driver of this device should be replaced with `WinUSB (v6xxxxx)`. To do so, select "Dual RS232-HS (Interface 0) and reinstall attached driver to the "WinUSB (v6xxxxx)", see picture above. .. note:: - Do not change the second device "Dual RS232-HS (Interface 1)". It is routed to {IDF_TARGET_NAME}'s serial port (UART) used for upload of application to {IDF_TARGET_NAME}'s flash. + Do not change the second device `Dual RS232-HS (Interface 1)`. It is routed to {IDF_TARGET_NAME}'s serial port (UART) used for upload of application to {IDF_TARGET_NAME}'s flash. Linux @@ -112,7 +112,7 @@ On macOS, using FT2232 for JTAG and serial port at the same time needs some addi Manually unloading the driver ............................. -1. Install FTDI driver from https://ftdichip.com/drivers/vcp-drivers/ +1. Install FTDI driver from `FTDI official website `_. 2. Connect USB cable to the |devkit-name|. diff --git a/docs/zh_CN/api-guides/jtag-debugging/configure-ft2232h-jtag.rst b/docs/zh_CN/api-guides/jtag-debugging/configure-ft2232h-jtag.rst index 023cb389772..b70d7fc168c 100644 --- a/docs/zh_CN/api-guides/jtag-debugging/configure-ft2232h-jtag.rst +++ b/docs/zh_CN/api-guides/jtag-debugging/configure-ft2232h-jtag.rst @@ -7,7 +7,7 @@ :link_to_translation:`en:[English]` -所有版本的 |devkit-name| 板子都内置了 JTAG 调试功能，要使其正常工作，还需要设置相关跳帽来启用 JTAG 功能，设置 SPI 闪存电压和配置 USB 驱动程序。具体步骤请参考以下说明。 +所有版本的 |devkit-name| 开发板都内置了 JTAG 调试功能，要使其正常工作，还需要设置相关跳帽或 DIP 开关来启用 JTAG 功能，并配置 USB 驱动程序。具体步骤请参考以下说明。 配置硬件 ^^^^^^^^ @@ -33,15 +33,25 @@ Windows """"""" -1. 使用标准 USB A/micro USB B 线将 |devkit-name| 与计算机相连接，并打开板子的电源。 +1. 使用标准 USB A/micro USB B 线将 |devkit-name| 与计算机相连接，并打开开发板的电源。 2. 等待 Windows 识别出 |devkit-name| 并且为其安装驱动。如果驱动没有被自动安装，请前往 `官网 `_ 下载并手动安装。 -3. 从 `Zadig 官网 `_ 下载 Zadig 工具（Zadig_X.X.exe）并运行。 +3. 访问 https://github.com/espressif/esp-win-usb-drivers/releases 下载 |devkit-name| 驱动程序。解压驱动程序文件并 `安装驱动程序 `_。这会更改 Dual RS232-HS (Interface 0) 的驱动程序。 -4. 在 Zadig 工具中，进入 “Options” 菜单中选中 “List All Devices”。 +4. 现在，|devkit-name| 的 JTAG 接口应该可以被 OpenOCD 使用了，想要进一步设置调试环境，请前往 :ref:`jtag-debugging-run-openocd` 章节。 -5. 检查设备列表，其中应该包含两条与 |devkit-name| 相关的条目：“Dual RS232-HS (Interface 0)” 和 “Dual RS232-HS (Interface 1)”。驱动的名字应该是 “FTDIBUS (vxxxx)” 并且 USB ID 为：0403 6010。 +.. note:: + 如果驱动程序安装失败或 OpenOCD 无法运行，尝试以下步骤手动更改驱动程序。否则，可以跳过以下步骤。 + +Windows - 手动更改驱动程序 +"""""""""""""""""""""""""""""""""""" + +1. 从 https://zadig.akeo.ie/ 下载 Zadig 工具 (Zadig_X.X.exe) 并运行。 + +2. 在 Zadig 工具中进入 `Options`，选中 `List All Devices`。 + +3. 检查设备列表，其中应该包含两条与 |devkit-name| 相关的条目： `Dual RS232-HS (Interface 0)` 和 `Dual RS232-HS (Interface 1)`。驱动的名字应为 `FTDIBUS (vxxxx)` 并且 USB ID 为：0403 6010。 .. figure:: ../../../_static/jtag-usb-configuration-zadig.jpg :align: center @@ -50,23 +60,21 @@ Windows 在 Zadig 工具中配置 JTAG USB 驱动 -6. 第一个设备 “Dual RS232-HS (Interface 0)” 连接到了 {IDF_TARGET_NAME} 的 JTAG 端口，此设备原来的 “FTDIBUS (vxxxx)” 驱动需要替换成 "WinUSB (v6xxxxx)"。为此，请选择 “Dual RS232-HS (Interface 0)” 并将驱动重新安装为 “WinUSB (v6xxxxx)”，具体可以参考上图。 +4. 第一个设备 (Dual RS232-HS (Interface 0)) 连接到了 {IDF_TARGET_NAME} 的 JTAG 端口，此设备原来的 `FTDIBUS (vxxxx)` 驱动程序需替换为 `WinUSB (v6xxxxx)`。为此，请选择 `Dual RS232-HS(Interface 0)` 并将驱动程序重新安装为 `WinUSB (v6xxxxx)`，见上图。 .. note:: - 请勿更改第二个设备 “Dual RS232-HS (Interface 1)” 的驱动，它被连接到 {IDF_TARGET_NAME} 的串口 (UART)，用于上传应用程序映像给 {IDF_TARGET_NAME} 进行烧写。 - -现在，|devkit-name| 的 JTAG 接口应该可以被 OpenOCD 使用了，想要进一步设置调试环境，请前往 :ref:`jtag-debugging-run-openocd` 章节。 + 请勿更改第二个设备 `Dual RS232-HS (Interface 1)` 的驱动，它被连接到 {IDF_TARGET_NAME} 的串口 (UART)，用于上传应用程序映像给 {IDF_TARGET_NAME} 进行烧写。 Linux """"" -1. 使用标准 USB A/micro USB B 线将 |devkit-name| 与计算机相连接，并打开板子的电源。 +1. 使用标准 USB A/micro USB B 线将 |devkit-name| 与计算机相连接，并打开开发板电源。 .. highlight:: none -2. 打开终端，输入 ``ls -l /dev/ttyUSB*`` 命令检查操作系统是否能够识别板子的 USB 端口。类似识别结果如下： +2. 打开终端，输入 ``ls -l /dev/ttyUSB*`` 命令检查操作系统是否能够识别开发板的 USB 端口。类似识别结果如下： :: @@ -77,7 +85,7 @@ Linux 3. 设置 OpenOCD 所支持 USB 设备的访问权限，请将 `udev 规则文件 `_ 复制到 ``/etc/udev/rules.d`` 目录中。 -4. 注销并重新登录 Linux 系统，然后重新插拔板子的电源使之前的改动生效。在终端再次输入 ``ls -l /dev/ttyUSB*`` 命令进行验证，查看这两个设备的组所有者是否已经从 ``dialout`` 更改为 ``plugdev``: +4. 注销并重新登录 Linux 系统，然后重新插拔开发板电源使之前的改动生效。在终端再次输入 ``ls -l /dev/ttyUSB*`` 命令进行验证，查看这两个设备的组所有者是否已经从 ``dialout`` 更改为 ``plugdev``: :: @@ -149,7 +157,7 @@ MacOS .. note:: - 其他板子可能将通道 A 用于 JTAG，因此请谨慎使用此选项。 + 其他开发板可能将通道 A 用于 JTAG，因此请谨慎使用此选项。 .. warning:: @@ -182,7 +190,7 @@ MacOS 1027 -3. 保存并关闭文件 +3. 保存并关闭文件。 4. 禁用驱动的签名认证： @@ -196,8 +204,8 @@ MacOS csrutil enable --without kext - 5. 再一次重启系统 + 5. 再一次重启系统。 -完成这些步骤后，可以同时使用串口和 JTAG 接口了。 +完成这些步骤后，就可以同时使用串口和 JTAG 接口了。 想要进一步设置调试环境，请前往 :ref:`jtag-debugging-run-openocd` 章节。 From 999de9c864b28e6e0e7b62406d1fe9669d5b5dc5 Mon Sep 17 00:00:00 2001 From: Jacky6 Date: Wed, 10 Jul 2024 17:53:10 +0800 Subject: [PATCH 083/113] fix(tools/mfg_gen): Allow encoding u64 and i64 --- tools/mass_mfg/mfg_gen.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/mass_mfg/mfg_gen.py b/tools/mass_mfg/mfg_gen.py index b3a9e0b1884..33850026c80 100644 --- a/tools/mass_mfg/mfg_gen.py +++ b/tools/mass_mfg/mfg_gen.py @@ -72,7 +72,7 @@ def verify_keys_exist(values_file_keys, input_config_file): def verify_datatype_encoding(input_config_file): """ Verify datatype and encodings from config file is valid """ - valid_encodings = {'string', 'binary', 'hex2bin','u8', 'i8', 'u16', 'u32', 'i32','base64'} + valid_encodings = {'string', 'binary', 'hex2bin','u8', 'i8', 'u16', 'u32', 'i32', 'u64', 'i64','base64'} valid_datatypes = {'file','data','namespace'} with open(input_config_file,'r') as config_file: From 5f1916f8e7788a3db9a927e4fd0e232efed44f0d Mon Sep 17 00:00:00 2001 From: "hrushikesh.bhosale" Date: Wed, 17 Jul 2024 16:13:16 +0530 Subject: [PATCH 084/113] test(nvs_flash): Added test for u64 and i64 encoding methods in mfg_gen.py --- tools/mass_mfg/mfg_gen.py | 3 +-- tools/mass_mfg/samples/sample_config.csv | 2 ++ tools/mass_mfg/samples/sample_values_multipage_blob.csv | 8 ++++---- tools/mass_mfg/samples/sample_values_singlepage_blob.csv | 8 ++++---- 4 files changed, 11 insertions(+), 10 deletions(-) diff --git a/tools/mass_mfg/mfg_gen.py b/tools/mass_mfg/mfg_gen.py index 33850026c80..63e21a9ec88 100644 --- a/tools/mass_mfg/mfg_gen.py +++ b/tools/mass_mfg/mfg_gen.py @@ -3,13 +3,12 @@ # SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD # SPDX-License-Identifier: Apache-2.0 # - import argparse import csv -import distutils.dir_util import os from itertools import zip_longest +import distutils.dir_util import esp_idf_nvs_partition_gen.nvs_partition_gen as nvs_partition_gen diff --git a/tools/mass_mfg/samples/sample_config.csv b/tools/mass_mfg/samples/sample_config.csv index dc516715914..ce4f363312e 100644 --- a/tools/mass_mfg/samples/sample_config.csv +++ b/tools/mass_mfg/samples/sample_config.csv @@ -4,6 +4,8 @@ dummyI8Key,data,i8 dummyU16Key,data,u16 dummyU32Key,data,u32 dummyI32Key,data,i32,REPEAT +dummyU64Key,data,u64 +dummyI64Key,data,i64 dummyStringKey,data,string dummyHex2BinKey,data,hex2bin dummyBase64Key,data,base64 diff --git a/tools/mass_mfg/samples/sample_values_multipage_blob.csv b/tools/mass_mfg/samples/sample_values_multipage_blob.csv index 0fb8e7d2302..660a2da233a 100644 --- a/tools/mass_mfg/samples/sample_values_multipage_blob.csv +++ b/tools/mass_mfg/samples/sample_values_multipage_blob.csv @@ -1,4 +1,4 @@ -id,dummyU8Key,dummyI8Key,dummyU16Key,dummyU32Key,dummyI32Key,dummyStringKey,dummyHex2BinKey,dummyBase64Key,hexFileKey,base64FileKey,stringFileKey,blobFileAKey,blobFileBKey,binFileKey -1,127,-128,32768,4294967295,-2147483648,0A:0B:0C:0D:0E:0F,010203abcdef,MTIzYWJj,testdata/sample.hex,testdata/sample.base64,testdata/sample.txt,testdata/sample_blob.bin,testdata/sample_blob.bin,testdata/sample_multipage_blob.bin -2,126,-127,32767,4294967294,,A0:B0:C0:D0:E0:F0,102030abcdef,MTIzYWFh,testdata/sample.hex,testdata/sample.base64,testdata/sample.txt,testdata/sample_blob.bin,testdata/sample_blob.bin,testdata/sample_multipage_blob.bin -3,125,-126,32766,4294967293,,00:B3:C4:BD:E2:0F,010203efcdab,MTIzYmJi,testdata/sample.hex,testdata/sample.base64,testdata/sample.txt,testdata/sample_blob.bin,testdata/sample_blob.bin,testdata/sample_multipage_blob.bin +id,dummyU8Key,dummyI8Key,dummyU16Key,dummyU32Key,dummyI32Key,dummyU64Key,dummyI64Key,dummyStringKey,dummyHex2BinKey,dummyBase64Key,hexFileKey,base64FileKey,stringFileKey,blobFileAKey,blobFileBKey,binFileKey +1,127,-128,32768,4294967295,-2147483648,1125899906842624,1125899906842624,0A:0B:0C:0D:0E:0F,010203abcdef,MTIzYWJj,testdata/sample.hex,testdata/sample.base64,testdata/sample.txt,testdata/sample_blob.bin,testdata/sample_blob.bin,testdata/sample_multipage_blob.bin +2,126,-127,32767,4294967294,,1125899906842624,-1125899906842624,A0:B0:C0:D0:E0:F0,102030abcdef,MTIzYWFh,testdata/sample.hex,testdata/sample.base64,testdata/sample.txt,testdata/sample_blob.bin,testdata/sample_blob.bin,testdata/sample_multipage_blob.bin +3,125,-126,32766,4294967293,,1125899906842624,-1125899906842624,00:B3:C4:BD:E2:0F,010203efcdab,MTIzYmJi,testdata/sample.hex,testdata/sample.base64,testdata/sample.txt,testdata/sample_blob.bin,testdata/sample_blob.bin,testdata/sample_multipage_blob.bin diff --git a/tools/mass_mfg/samples/sample_values_singlepage_blob.csv b/tools/mass_mfg/samples/sample_values_singlepage_blob.csv index 1e3508df829..df59949d331 100644 --- a/tools/mass_mfg/samples/sample_values_singlepage_blob.csv +++ b/tools/mass_mfg/samples/sample_values_singlepage_blob.csv @@ -1,4 +1,4 @@ -id,dummyU8Key,dummyI8Key,dummyU16Key,dummyU32Key,dummyI32Key,dummyStringKey,dummyHex2BinKey,dummyBase64Key,hexFileKey,base64FileKey,stringFileKey,blobFileAKey,blobFileBKey,binFileKey -1,127,-128,32768,4294967295,-2147483648,0A:0B:0C:0D:0E:0F,010203abcdef,MTIzYWJj,testdata/sample.hex,testdata/sample.base64,testdata/sample.txt,testdata/sample_blob.bin,testdata/sample_blob.bin,testdata/sample_singlepage_blob.bin -2,126,-127,32767,4294967294,,A0:B0:C0:D0:E0:F0,102030abcdef,MTIzYWFh,testdata/sample.hex,testdata/sample.base64,testdata/sample.txt,testdata/sample_blob.bin,testdata/sample_blob.bin,testdata/sample_singlepage_blob.bin -3,125,-126,32766,4294967293,,00:B3:C4:BD:E2:0F,010203efcdab,MTIzYmJi,testdata/sample.hex,testdata/sample.base64,testdata/sample.txt,testdata/sample_blob.bin,testdata/sample_blob.bin,testdata/sample_singlepage_blob.bin +id,dummyU8Key,dummyI8Key,dummyU16Key,dummyU32Key,dummyI32Key,dummyU64Key,dummyI64Key,dummyStringKey,dummyHex2BinKey,dummyBase64Key,hexFileKey,base64FileKey,stringFileKey,blobFileAKey,blobFileBKey,binFileKey +1,127,-128,32768,4294967295,-2147483648,1125899905842624,-1125899906742624,0A:0B:0C:0D:0E:0F,010203abcdef,MTIzYWJj,testdata/sample.hex,testdata/sample.base64,testdata/sample.txt,testdata/sample_blob.bin,testdata/sample_blob.bin,testdata/sample_singlepage_blob.bin +2,126,-127,32767,4294967294,,1125899906842600,-1125899906842614,A0:B0:C0:D0:E0:F0,102030abcdef,MTIzYWFh,testdata/sample.hex,testdata/sample.base64,testdata/sample.txt,testdata/sample_blob.bin,testdata/sample_blob.bin,testdata/sample_singlepage_blob.bin +3,125,-126,32766,4294967293,,1125899906842624,-1125899906843524,00:B3:C4:BD:E2:0F,010203efcdab,MTIzYmJi,testdata/sample.hex,testdata/sample.base64,testdata/sample.txt,testdata/sample_blob.bin,testdata/sample_blob.bin,testdata/sample_singlepage_blob.bin From 1b8c8d5fd46e646fb1d156594487bcf74d135e7b Mon Sep 17 00:00:00 2001 From: Armando Date: Thu, 18 Jul 2024 08:58:57 +0800 Subject: [PATCH 085/113] fix(psram): fixed p4 psram 20M wrong clk div --- components/esp_psram/device/esp_psram_impl_ap_hex.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/components/esp_psram/device/esp_psram_impl_ap_hex.c b/components/esp_psram/device/esp_psram_impl_ap_hex.c index 82a1b4e0b83..7832460eb38 100644 --- a/components/esp_psram/device/esp_psram_impl_ap_hex.c +++ b/components/esp_psram/device/esp_psram_impl_ap_hex.c @@ -384,8 +384,8 @@ esp_err_t esp_psram_impl_enable(void) s_configure_psram_ecc(); #endif //enter MSPI slow mode to init PSRAM device registers - psram_ctrlr_ll_set_bus_clock(PSRAM_CTRLR_LL_MSPI_ID_2, 40); - psram_ctrlr_ll_set_bus_clock(PSRAM_CTRLR_LL_MSPI_ID_3, 40); + psram_ctrlr_ll_set_bus_clock(PSRAM_CTRLR_LL_MSPI_ID_2, AP_HEX_PSRAM_MPLL_DEFAULT_FREQ_MHZ / CONFIG_SPIRAM_SPEED); + psram_ctrlr_ll_set_bus_clock(PSRAM_CTRLR_LL_MSPI_ID_3, AP_HEX_PSRAM_MPLL_DEFAULT_FREQ_MHZ / CONFIG_SPIRAM_SPEED); psram_ctrlr_ll_enable_dll(PSRAM_CTRLR_LL_MSPI_ID_2, true); psram_ctrlr_ll_enable_dll(PSRAM_CTRLR_LL_MSPI_ID_3, true); From 4e3951a587cc544690d23a01460588d2da736ab8 Mon Sep 17 00:00:00 2001 From: Shyamal Khachane Date: Tue, 16 Jul 2024 11:09:44 +0530 Subject: [PATCH 086/113] fix(esp_wifi): Recompute keys in OWE if AP does not include PMKID in assoc response --- components/wpa_supplicant/src/rsn_supp/wpa.c | 181 ++++++++++--------- 1 file changed, 95 insertions(+), 86 deletions(-) diff --git a/components/wpa_supplicant/src/rsn_supp/wpa.c b/components/wpa_supplicant/src/rsn_supp/wpa.c index 4e4e1893638..aef17fc9c0d 100644 --- a/components/wpa_supplicant/src/rsn_supp/wpa.c +++ b/components/wpa_supplicant/src/rsn_supp/wpa.c @@ -2868,7 +2868,8 @@ int owe_process_assoc_resp(const u8 *rsn_ie, size_t rsn_len, const uint8_t *dh_i struct wpa_sm *sm; sm = get_wpa_sm(); - wpabuf_free(sm->owe_ie); //free the dh ie constructed in owe_build_assoc_req + /* Deallocate the dh ie buffer constructed in owe_build_assoc_req */ + wpabuf_free(sm->owe_ie); sm->owe_ie = NULL; struct wpa_ie_data *parsed_rsn_data; @@ -2882,121 +2883,129 @@ int owe_process_assoc_resp(const u8 *rsn_ie, size_t rsn_len, const uint8_t *dh_i goto fail; } + if (!dh_ie && parsed_rsn_data->num_pmkid == 0) { + wpa_printf(MSG_ERROR, "OWE: Assoc response should either have pmkid or DH IE"); + goto fail; + } + + /* Check for PMK caching */ + if (sm->cur_pmksa && parsed_rsn_data && parsed_rsn_data->num_pmkid == 1 && parsed_rsn_data->pmkid) { + if (os_memcmp(parsed_rsn_data->pmkid, sm->cur_pmksa->pmkid, OWE_PMKID_LEN) == 0) { + wpa_printf(MSG_DEBUG, "OWE: Using PMK caching"); + wpa_sm_set_pmk_from_pmksa(sm); + goto done; + } else { + /* If PMKID mismatches, derive keys again */ + wpa_printf(MSG_DEBUG, "OWE : Invalid PMKID in response"); + } + } + + if (dh_ie == NULL) { + wpa_printf(MSG_ERROR, "OWE: No Diffie Hellman IE in association response"); + goto fail; + } if (dh_ie && MIN_DH_LEN(dh_len)) { wpa_printf(MSG_ERROR, "OWE: Invalid Diffie Hellman IE"); goto fail; } - if (!dh_ie && parsed_rsn_data->num_pmkid == 0) { - wpa_printf(MSG_ERROR, "OWE: Assoc response should either have pmkid or DH IE"); + + /* If STA or AP does not have PMKID, or PMKID mismatches, proceed with normal association */ + dh_len += 2; + + dh_ie += 3; + dh_len -=3; + group = WPA_GET_LE16(dh_ie); + + /* Only group 19 is supported */ + if ((group != sm->owe_group) || (group != OWE_DH_GRP19)) { + wpa_printf(MSG_ERROR, "OWE: Unexpected Diffie-Hellman group in response"); goto fail; } - if (!sm->cur_pmksa) { /* No PMK caching */ - if (dh_ie == NULL) { - goto fail; - } - dh_len += 2; + prime_len = OWE_PRIME_LEN; - dh_ie += 3; - dh_len -=3; - group = WPA_GET_LE16(dh_ie); + /* Set peer's public key point and calculate shared secret */ + sh_secret = crypto_ecdh_set_peerkey(sm->owe_ecdh, 0, dh_ie+2, dh_len-2); + sh_secret = wpabuf_zeropad(sh_secret, prime_len); + if (!sh_secret) { + wpa_printf(MSG_ERROR, "OWE: Invalid peer DH public key"); + goto fail; + } - /* Only group 19 is supported */ - if ((group != sm->owe_group) || (group != OWE_DH_GRP19)) { - wpa_printf(MSG_ERROR, "OWE: Unexpected Diffie-Hellman group in response"); - goto fail; - } + wpa_hexdump_buf_key(MSG_DEBUG, "OWE: DH shared secret", sh_secret); + pub = crypto_ecdh_get_pubkey(sm->owe_ecdh, 0); + if (!pub) { + wpa_printf(MSG_ERROR, "No own public key"); + goto fail; + } - prime_len = OWE_PRIME_LEN; + /* PMKID = Truncate-128(Hash(C | A)) */ + addr[0] = wpabuf_head(pub); + len[0] = wpabuf_len(pub); + addr[1] = dh_ie + 2; + len[1] = dh_len - 2; - /* Set peer's public key point and calculate shared secret */ - sh_secret = crypto_ecdh_set_peerkey(sm->owe_ecdh, 0, dh_ie+2, dh_len-2); - sh_secret = wpabuf_zeropad(sh_secret, prime_len); - if (!sh_secret) { - wpa_printf(MSG_ERROR, "OWE: Invalid peer DH public key"); - goto fail; - } + int res = sha256_vector(2, addr, len, pmkid); + if (res < 0 ) { + goto fail; + } - wpa_hexdump_buf_key(MSG_DEBUG, "OWE: DH shared secret", sh_secret); - pub = crypto_ecdh_get_pubkey(sm->owe_ecdh, 0); - if (!pub) { - wpa_printf(MSG_ERROR, "No own public key"); - wpabuf_free(sh_secret); - goto fail; - } + hash_len = SHA256_MAC_LEN; - /* PMKID = Truncate-128(Hash(C | A)) */ - addr[0] = wpabuf_head(pub); - len[0] = wpabuf_len(pub); - addr[1] = dh_ie + 2; - len[1] = dh_len - 2; + pub = wpabuf_zeropad(pub, prime_len); + if (!pub) { + goto fail; + } - int res = sha256_vector(2, addr, len, pmkid); - if (res < 0 ) { - goto fail; - } + /* prk = HKDF-extract(C | A | group, z) */ + hkey = wpabuf_alloc(wpabuf_len(pub) + dh_len - 2 + 2); + if (!hkey) { + goto fail; + } - hash_len = SHA256_MAC_LEN; + wpabuf_put_buf(hkey, pub); /* C */ + wpabuf_free(pub); - pub = wpabuf_zeropad(pub, prime_len); + wpabuf_put_data(hkey, dh_ie + 2, dh_len - 2); /* A */ + wpabuf_put_le16(hkey, sm->owe_group); /* group */ - /* prk = HKDF-extract(C | A | group, z) */ - hkey = wpabuf_alloc(wpabuf_len(pub) + dh_len - 2 + 2); + res = hmac_sha256(wpabuf_head(hkey), wpabuf_len(hkey), wpabuf_head(sh_secret), wpabuf_len(sh_secret), prk); + if (res < 0 ) { + goto fail; + } - wpabuf_put_buf(hkey, pub); /* C */ - wpabuf_free(pub); + hash_len = SHA256_MAC_LEN; - wpabuf_put_data(hkey, dh_ie + 2, dh_len - 2); /* A */ - wpabuf_put_le16(hkey, sm->owe_group); /* group */ + wpabuf_free(hkey); + wpabuf_clear_free(sh_secret); - res = hmac_sha256(wpabuf_head(hkey), wpabuf_len(hkey), wpabuf_head(sh_secret), wpabuf_len(sh_secret), prk); - if (res < 0 ) { - goto fail; - } + wpa_hexdump_key(MSG_DEBUG, "OWE: prk", prk, hash_len); - hash_len = SHA256_MAC_LEN; + /* PMK = HKDF-expand(prk, "OWE Key Generation", n) */ + res = hmac_sha256_kdf(prk, hash_len, NULL, (const u8 *)info, + os_strlen(info), pmk, hash_len); + if (res < 0 ) { + goto fail; + } - wpabuf_free(hkey); - wpabuf_free(sh_secret); + forced_memzero(prk, SHA256_MAC_LEN); + wpa_hexdump(MSG_DEBUG, "OWE: PMKID", pmkid, OWE_PMKID_LEN); - wpa_hexdump_key(MSG_DEBUG, "OWE: prk", prk, hash_len); + os_memcpy(sm->pmk,pmk,hash_len); + sm->pmk_len = hash_len; + wpa_hexdump_key(MSG_DEBUG, "OWE: PMK", sm->pmk, sm->pmk_len); - /* PMK = HKDF-expand(prk, "OWE Key Generation", n) */ - res = hmac_sha256_kdf(prk, hash_len, NULL, (const u8 *)info, - os_strlen(info), pmk, hash_len); - if (res < 0 ) { - goto fail; - } + pmksa_cache_add(sm->pmksa, sm->pmk, sm->pmk_len, pmkid, NULL, 0, + sm->bssid, sm->own_addr, sm->network_ctx, sm->key_mgmt); - forced_memzero(prk, SHA256_MAC_LEN); - wpa_hexdump(MSG_DEBUG, "OWE: PMKID", pmkid, OWE_PMKID_LEN); - - os_memcpy(sm->pmk,pmk,hash_len); - sm->pmk_len = hash_len; - wpa_hexdump_key(MSG_DEBUG, "OWE: PMK", sm->pmk, sm->pmk_len); - - pmksa_cache_add(sm->pmksa, sm->pmk, sm->pmk_len, pmkid, NULL, 0, - sm->bssid, sm->own_addr, sm->network_ctx, sm->key_mgmt); - goto done; - } else { /* PMK caching */ - if (parsed_rsn_data && sm->cur_pmksa) { - if (parsed_rsn_data->num_pmkid == 1 && parsed_rsn_data->pmkid) { - if (os_memcmp(parsed_rsn_data->pmkid, sm->cur_pmksa->pmkid, OWE_PMKID_LEN) == 0) { - wpa_printf(MSG_DEBUG, "OWE: Using PMK caching"); - wpa_sm_set_pmk_from_pmksa(sm); - goto done; - } else { - wpa_printf(MSG_DEBUG, "OWE : Invalid PMKID in response"); - goto fail; - } - } - } - } done: os_free(parsed_rsn_data); return 0; fail: os_free(parsed_rsn_data); + wpabuf_free(pub); + wpabuf_free(hkey); + wpabuf_clear_free(sh_secret); return -1; } #endif // CONFIG_OWE_STA From cd0e0a683f294b9754b6b5ca96ff1779af372d55 Mon Sep 17 00:00:00 2001 From: gongyantao Date: Thu, 18 Jul 2024 11:09:30 +0800 Subject: [PATCH 087/113] fix(bt): fix uTask stack overflow in bt example spp_initiator --- .../bt_spp_initiator/main/console_uart.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/examples/bluetooth/bluedroid/classic_bt/bt_spp_initiator/main/console_uart.c b/examples/bluetooth/bluedroid/classic_bt/bt_spp_initiator/main/console_uart.c index 7e10c2ea106..4bd1b2a0e19 100644 --- a/examples/bluetooth/bluedroid/classic_bt/bt_spp_initiator/main/console_uart.c +++ b/examples/bluetooth/bluedroid/classic_bt/bt_spp_initiator/main/console_uart.c @@ -1,9 +1,10 @@ /* - * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Unlicense OR CC0-1.0 */ +#include "stdlib.h" #include "driver/uart.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" @@ -31,7 +32,7 @@ extern void spp_msg_args_parser(char *buf, int len); void spp_msg_handler(char *buf, int len) { - ESP_LOGE(TAG_CNSL, "Command [%s]", buf); + ESP_LOGI(TAG_CNSL, "Command [%s]", buf); spp_msg_args_parser(buf, len); } @@ -44,13 +45,18 @@ static void console_uart_task(void *pvParameters) spp_msg_parser_register_callback(parser, spp_msg_handler); spp_msg_show_usage(); #define TMP_BUF_LEN 128 - uint8_t tmp_buf[128] = {0}; + uint8_t *tmp_buf = NULL; + + if ((tmp_buf = (uint8_t *)calloc(TMP_BUF_LEN, sizeof(uint8_t))) == NULL) { + ESP_LOGE(TAG_CNSL,"temp buf malloc fail"); + return; + } for (;;) { //Waiting for UART event. if (xQueueReceive(uart_queue, (void * )&event, (TickType_t)portMAX_DELAY)) { switch (event.type) { - //Event of UART receving data + //Event of UART receiving data case UART_DATA: { len = uart_read_bytes(CONSOLE_UART_NUM, tmp_buf, TMP_BUF_LEN, 0); @@ -95,6 +101,8 @@ static void console_uart_task(void *pvParameters) } } } + + free(tmp_buf); vTaskDelete(NULL); } From a14dc38023195bf38d79e09f3a060e2e356df6f6 Mon Sep 17 00:00:00 2001 From: gongyantao Date: Thu, 18 Jul 2024 12:06:02 +0800 Subject: [PATCH 088/113] feat(bt): add bt address printing for all bt examples --- .../classic_bt/a2dp_sink/main/main.c | 15 ++++++++++- .../classic_bt/a2dp_source/main/main.c | 2 ++ .../classic_bt/bt_discovery/main/main.c | 2 ++ .../bt_hid_mouse_device/main/main.c | 27 ++++++++++--------- .../bluedroid/classic_bt/hfp_ag/main/main.c | 16 ++++++++++- .../bluedroid/classic_bt/hfp_hf/main/main.c | 16 ++++++++++- .../esp_hid_host/main/esp_hid_host_main.c | 16 ++++++++++- 7 files changed, 78 insertions(+), 16 deletions(-) diff --git a/examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/main.c b/examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/main.c index 9ceb01d0cc5..8f23f4bcd15 100644 --- a/examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/main.c +++ b/examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/main.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Unlicense OR CC0-1.0 */ @@ -47,6 +47,17 @@ static void bt_av_hdl_stack_evt(uint16_t event, void *p_param); /******************************* * STATIC FUNCTION DEFINITIONS ******************************/ +static char *bda2str(uint8_t * bda, char *str, size_t size) +{ + if (bda == NULL || str == NULL || size < 18) { + return NULL; + } + + uint8_t *p = bda; + sprintf(str, "%02x:%02x:%02x:%02x:%02x:%02x", + p[0], p[1], p[2], p[3], p[4], p[5]); + return str; +} static void bt_app_dev_cb(esp_bt_dev_cb_event_t event, esp_bt_dev_cb_param_t *param) { @@ -176,6 +187,7 @@ static void bt_av_hdl_stack_evt(uint16_t event, void *p_param) void app_main(void) { + char bda_str[18] = {0}; /* initialize NVS — it is used to store PHY calibration data */ esp_err_t err = nvs_flash_init(); if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) { @@ -230,6 +242,7 @@ void app_main(void) pin_code[3] = '4'; esp_bt_gap_set_pin(pin_type, 4, pin_code); + ESP_LOGI(BT_AV_TAG, "Own address:[%s]", bda2str((uint8_t *)esp_bt_dev_get_address(), bda_str, sizeof(bda_str))); bt_app_task_start_up(); /* bluetooth device name, connection mode and profile set up */ bt_app_work_dispatch(bt_av_hdl_stack_evt, BT_APP_EVT_STACK_UP, NULL, 0, NULL); diff --git a/examples/bluetooth/bluedroid/classic_bt/a2dp_source/main/main.c b/examples/bluetooth/bluedroid/classic_bt/a2dp_source/main/main.c index 66efa2b10f6..b47e2399876 100644 --- a/examples/bluetooth/bluedroid/classic_bt/a2dp_source/main/main.c +++ b/examples/bluetooth/bluedroid/classic_bt/a2dp_source/main/main.c @@ -735,6 +735,7 @@ static void bt_av_hdl_avrc_ct_evt(uint16_t event, void *p_param) void app_main(void) { + char bda_str[18] = {0}; /* initialize NVS — it is used to store PHY calibration data */ esp_err_t ret = nvs_flash_init(); if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) { @@ -788,6 +789,7 @@ void app_main(void) esp_bt_pin_code_t pin_code; esp_bt_gap_set_pin(pin_type, 0, pin_code); + ESP_LOGI(BT_AV_TAG, "Own address:[%s]", bda2str((uint8_t *)esp_bt_dev_get_address(), bda_str, sizeof(bda_str))); bt_app_task_start_up(); /* Bluetooth device name, connection mode and profile set up */ bt_app_work_dispatch(bt_av_hdl_stack_evt, BT_APP_STACK_UP_EVT, NULL, 0, NULL); diff --git a/examples/bluetooth/bluedroid/classic_bt/bt_discovery/main/main.c b/examples/bluetooth/bluedroid/classic_bt/bt_discovery/main/main.c index 5b4123c45e2..0c7669fadce 100644 --- a/examples/bluetooth/bluedroid/classic_bt/bt_discovery/main/main.c +++ b/examples/bluetooth/bluedroid/classic_bt/bt_discovery/main/main.c @@ -272,6 +272,7 @@ static void bt_app_gap_start_up(void) void app_main(void) { + char bda_str[18] = {0}; /* Initialize NVS — it is used to store PHY calibration data and save key-value pairs in flash memory*/ esp_err_t ret = nvs_flash_init(); if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) { @@ -304,5 +305,6 @@ void app_main(void) return; } + ESP_LOGI(GAP_TAG, "Own address:[%s]", bda2str((uint8_t *)esp_bt_dev_get_address(), bda_str, sizeof(bda_str))); bt_app_gap_start_up(); } diff --git a/examples/bluetooth/bluedroid/classic_bt/bt_hid_mouse_device/main/main.c b/examples/bluetooth/bluedroid/classic_bt/bt_hid_mouse_device/main/main.c index 0cf207b1c18..9ad5e21f6d3 100644 --- a/examples/bluetooth/bluedroid/classic_bt/bt_hid_mouse_device/main/main.c +++ b/examples/bluetooth/bluedroid/classic_bt/bt_hid_mouse_device/main/main.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Unlicense OR CC0-1.0 */ @@ -71,6 +71,18 @@ uint8_t hid_mouse_descriptor[] = { 0xc0 // END_COLLECTION }; +static char *bda2str(esp_bd_addr_t bda, char *str, size_t size) +{ + if (bda == NULL || str == NULL || size < 18) { + return NULL; + } + + uint8_t *p = bda; + sprintf(str, "%02x:%02x:%02x:%02x:%02x:%02x", + p[0], p[1], p[2], p[3], p[4], p[5]); + return str; +} + const int hid_mouse_descriptor_len = sizeof(hid_mouse_descriptor); /** @@ -158,16 +170,6 @@ void mouse_move_task(void *pvParameters) } } -static void print_bt_address(void) -{ - const char *TAG = "bt_address"; - const uint8_t *bd_addr; - - bd_addr = esp_bt_dev_get_address(); - ESP_LOGI(TAG, "my bluetooth address is %02X:%02X:%02X:%02X:%02X:%02X", - bd_addr[0], bd_addr[1], bd_addr[2], bd_addr[3], bd_addr[4], bd_addr[5]); -} - void esp_bt_gap_cb(esp_bt_gap_cb_event_t event, esp_bt_gap_cb_param_t *param) { const char *TAG = "esp_bt_gap_cb"; @@ -390,6 +392,7 @@ void app_main(void) { const char *TAG = "app_main"; esp_err_t ret; + char bda_str[18] = {0}; ret = nvs_flash_init(); if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) { @@ -477,6 +480,6 @@ void app_main(void) esp_bt_pin_code_t pin_code; esp_bt_gap_set_pin(pin_type, 0, pin_code); - print_bt_address(); + ESP_LOGI(TAG, "Own address:[%s]", bda2str((uint8_t *)esp_bt_dev_get_address(), bda_str, sizeof(bda_str))); ESP_LOGI(TAG, "exiting"); } diff --git a/examples/bluetooth/bluedroid/classic_bt/hfp_ag/main/main.c b/examples/bluetooth/bluedroid/classic_bt/hfp_ag/main/main.c index d5e6f3d30e7..c93aac3da22 100644 --- a/examples/bluetooth/bluedroid/classic_bt/hfp_ag/main/main.c +++ b/examples/bluetooth/bluedroid/classic_bt/hfp_ag/main/main.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Unlicense OR CC0-1.0 */ @@ -32,6 +32,18 @@ enum { BT_APP_EVT_STACK_UP = 0, }; +static char *bda2str(esp_bd_addr_t bda, char *str, size_t size) +{ + if (bda == NULL || str == NULL || size < 18) { + return NULL; + } + + uint8_t *p = bda; + sprintf(str, "%02x:%02x:%02x:%02x:%02x:%02x", + p[0], p[1], p[2], p[3], p[4], p[5]); + return str; +} + /* handler for bluetooth stack enabled events */ static void bt_hf_hdl_stack_evt(uint16_t event, void *p_param) { @@ -73,6 +85,7 @@ static void bt_hf_hdl_stack_evt(uint16_t event, void *p_param) void app_main(void) { + char bda_str[18] = {0}; /* Initialize NVS — it is used to store PHY calibration data */ esp_err_t ret = nvs_flash_init(); if (ret == ESP_ERR_NVS_NO_FREE_PAGES) { @@ -101,6 +114,7 @@ void app_main(void) return; } + ESP_LOGI(BT_HF_TAG, "Own address:[%s]", bda2str((uint8_t *)esp_bt_dev_get_address(), bda_str, sizeof(bda_str))); /* create application task */ bt_app_task_start_up(); diff --git a/examples/bluetooth/bluedroid/classic_bt/hfp_hf/main/main.c b/examples/bluetooth/bluedroid/classic_bt/hfp_hf/main/main.c index 66d73c58111..958f0193190 100644 --- a/examples/bluetooth/bluedroid/classic_bt/hfp_hf/main/main.c +++ b/examples/bluetooth/bluedroid/classic_bt/hfp_hf/main/main.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Unlicense OR CC0-1.0 */ @@ -32,6 +32,18 @@ static uint8_t peer_bdname_len; static const char remote_device_name[] = "ESP_HFP_AG"; +static char *bda2str(esp_bd_addr_t bda, char *str, size_t size) +{ + if (bda == NULL || str == NULL || size < 18) { + return NULL; + } + + uint8_t *p = bda; + sprintf(str, "%02x:%02x:%02x:%02x:%02x:%02x", + p[0], p[1], p[2], p[3], p[4], p[5]); + return str; +} + static bool get_name_from_eir(uint8_t *eir, char *bdname, uint8_t *bdname_len) { uint8_t *rmt_bdname = NULL; @@ -151,6 +163,7 @@ static void bt_hf_client_hdl_stack_evt(uint16_t event, void *p_param); void app_main(void) { + char bda_str[18] = {0}; /* Initialize NVS — it is used to store PHY calibration data */ esp_err_t ret = nvs_flash_init(); if (ret == ESP_ERR_NVS_NO_FREE_PAGES) { @@ -186,6 +199,7 @@ void app_main(void) return; } + ESP_LOGI(BT_HF_TAG, "Own address:[%s]", bda2str((uint8_t *)esp_bt_dev_get_address(), bda_str, sizeof(bda_str))); /* create application task */ bt_app_task_start_up(); diff --git a/examples/bluetooth/esp_hid_host/main/esp_hid_host_main.c b/examples/bluetooth/esp_hid_host/main/esp_hid_host_main.c index 420ff9d72bf..1643b8a33ea 100644 --- a/examples/bluetooth/esp_hid_host/main/esp_hid_host_main.c +++ b/examples/bluetooth/esp_hid_host/main/esp_hid_host_main.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Unlicense OR CC0-1.0 */ @@ -51,6 +51,18 @@ static const char *TAG = "ESP_HIDH_DEMO"; +static char *bda2str(esp_bd_addr_t bda, char *str, size_t size) +{ + if (bda == NULL || str == NULL || size < 18) { + return NULL; + } + + uint8_t *p = bda; + sprintf(str, "%02x:%02x:%02x:%02x:%02x:%02x", + p[0], p[1], p[2], p[3], p[4], p[5]); + return str; +} + void hidh_callback(void *handler_args, esp_event_base_t base, int32_t id, void *event_data) { esp_hidh_event_t event = (esp_hidh_event_t)id; @@ -165,6 +177,7 @@ void ble_store_config_init(void); #endif void app_main(void) { + char bda_str[18] = {0}; esp_err_t ret; #if HID_HOST_MODE == HIDH_IDLE_MODE ESP_LOGE(TAG, "Please turn on BT HID host or BLE!"); @@ -188,6 +201,7 @@ void app_main(void) }; ESP_ERROR_CHECK( esp_hidh_init(&config) ); + ESP_LOGI(TAG, "Own address:[%s]", bda2str((uint8_t *)esp_bt_dev_get_address(), bda_str, sizeof(bda_str))); #if CONFIG_BT_NIMBLE_ENABLED /* XXX Need to have template for store */ ble_store_config_init(); From 5e0c5e0ba560a005225e3aca0cb451788c3fbb35 Mon Sep 17 00:00:00 2001 From: Chen Jichang Date: Mon, 15 Jul 2024 20:24:55 +0800 Subject: [PATCH 089/113] change(mcpwm): remove mcpwm on esp32c61 mcpwm is not supported on esp32c61 --- .../soc/esp32c61/include/soc/clk_tree_defs.h | 44 ------------------- .../esp32c61/include/soc/pmu_icg_mapping.h | 2 - .../soc/esp32c61/include/soc/soc_caps.h | 16 ------- docs/docs_not_updated/esp32c61.txt | 1 - 4 files changed, 63 deletions(-) diff --git a/components/soc/esp32c61/include/soc/clk_tree_defs.h b/components/soc/esp32c61/include/soc/clk_tree_defs.h index 300547aa65a..c3cc167dc9e 100644 --- a/components/soc/esp32c61/include/soc/clk_tree_defs.h +++ b/components/soc/esp32c61/include/soc/clk_tree_defs.h @@ -231,50 +231,6 @@ typedef enum { LP_UART_SCLK_DEFAULT = SOC_MOD_CLK_RTC_FAST, /*!< LP_UART source clock default choice is LP(RTC)_FAST */ } soc_periph_lp_uart_clk_src_t; -//////////////////////////////////////////////////MCPWM///////////////////////////////////////////////////////////////// - -/** - * @brief Array initializer for all supported clock sources of MCPWM Timer - */ -#define SOC_MCPWM_TIMER_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL} - -/** - * @brief Type of MCPWM timer clock source - */ -typedef enum { - MCPWM_TIMER_CLK_SRC_PLL160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the source clock */ - MCPWM_TIMER_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */ - MCPWM_TIMER_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the default clock choice */ -} soc_periph_mcpwm_timer_clk_src_t; - -/** - * @brief Array initializer for all supported clock sources of MCPWM Capture Timer - */ -#define SOC_MCPWM_CAPTURE_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL} - -/** - * @brief Type of MCPWM capture clock source - */ -typedef enum { - MCPWM_CAPTURE_CLK_SRC_PLL160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the source clock */ - MCPWM_CAPTURE_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */ - MCPWM_CAPTURE_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the default clock choice */ -} soc_periph_mcpwm_capture_clk_src_t; - -/** - * @brief Array initializer for all supported clock sources of MCPWM Carrier - */ -#define SOC_MCPWM_CARRIER_CLKS {SOC_MOD_CLK_PLL_F160M, SOC_MOD_CLK_XTAL} - -/** - * @brief Type of MCPWM carrier clock source - */ -typedef enum { - MCPWM_CARRIER_CLK_SRC_PLL160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the source clock */ - MCPWM_CARRIER_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */ - MCPWM_CARRIER_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the default clock choice */ -} soc_periph_mcpwm_carrier_clk_src_t; - ///////////////////////////////////////////////////// I2S ////////////////////////////////////////////////////////////// /** diff --git a/components/soc/esp32c61/include/soc/pmu_icg_mapping.h b/components/soc/esp32c61/include/soc/pmu_icg_mapping.h index 4f4ca84f1e3..eae01baf4f9 100644 --- a/components/soc/esp32c61/include/soc/pmu_icg_mapping.h +++ b/components/soc/esp32c61/include/soc/pmu_icg_mapping.h @@ -19,7 +19,6 @@ #define PMU_ICG_APB_ENA_PARL 23 #define PMU_ICG_APB_ENA_PCNT 20 #define PMU_ICG_APB_ENA_PVT_MONITOR 27 -#define PMU_ICG_APB_ENA_PWM 21 #define PMU_ICG_APB_ENA_REGDMA 24 #define PMU_ICG_APB_ENA_SARADC 9 #define PMU_ICG_APB_ENA_SEC 0 @@ -44,7 +43,6 @@ #define PMU_ICG_FUNC_ENA_PARL_RX 25 #define PMU_ICG_FUNC_ENA_PARL_TX 24 #define PMU_ICG_FUNC_ENA_PVT_MONITOR 23 -#define PMU_ICG_FUNC_ENA_PWM 22 #define PMU_ICG_FUNC_ENA_SARADC 20 #define PMU_ICG_FUNC_ENA_SEC 19 #define PMU_ICG_FUNC_ENA_SPI2 1 diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index 7c4b1e2610c..d704741723c 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -64,7 +64,6 @@ // \#define SOC_REG_I2C_SUPPORTED 1 //TODO: [ESP32C61] IDF-9276 // \#define SOC_PCNT_SUPPORTED 0 //TODO: [ESP32C61] IDF-9332 -// \#define SOC_MCPWM_SUPPORTED 0 //TODO: [ESP32C61] IDF-9338 // \#define SOC_TWAI_SUPPORTED 0 //TODO: [ESP32C61] IDF-9336 // \#define SOC_ETM_SUPPORTED 0 // \#define SOC_LP_CORE_SUPPORTED 0 //TODO: [ESP32C61] IDF-9331 @@ -298,21 +297,6 @@ // #define SOC_PCNT_THRES_POINT_PER_UNIT 2 // #define SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE 1 -/*-------------------------- MCPWM CAPS --------------------------------------*/ -// #define SOC_MCPWM_GROUPS (1U) ///< 1 MCPWM groups on the chip (i.e., the number of independent MCPWM peripherals) -// #define SOC_MCPWM_TIMERS_PER_GROUP (3) ///< The number of timers that each group has -// #define SOC_MCPWM_OPERATORS_PER_GROUP (3) ///< The number of operators that each group has -// #define SOC_MCPWM_COMPARATORS_PER_OPERATOR (2) ///< The number of comparators that each operator has -// #define SOC_MCPWM_GENERATORS_PER_OPERATOR (2) ///< The number of generators that each operator has -// #define SOC_MCPWM_TRIGGERS_PER_OPERATOR (2) ///< The number of triggers that each operator has -// #define SOC_MCPWM_GPIO_FAULTS_PER_GROUP (3) ///< The number of fault signal detectors that each group has -// #define SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP (1) ///< The number of capture timers that each group has -// #define SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER (3) ///< The number of capture channels that each capture timer has -// #define SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP (3) ///< The number of GPIO synchros that each group has -// #define SOC_MCPWM_SWSYNC_CAN_PROPAGATE (1) ///< Software sync event can be routed to its output -// #define SOC_MCPWM_SUPPORT_ETM (1) ///< Support ETM (Event Task Matrix) -// #define SOC_MCPWM_CAPTURE_CLK_FROM_GROUP (1) ///< Capture timer shares clock with other PWM timers - /*------------------------ USB SERIAL JTAG CAPS ------------------------------*/ // \#define SOC_USB_SERIAL_JTAG_SUPPORT_LIGHT_SLEEP (1) /*!< Support to maintain minimum usb communication during light sleep */ // TODO: IDF-6395 diff --git a/docs/docs_not_updated/esp32c61.txt b/docs/docs_not_updated/esp32c61.txt index 2e4419a458d..0f9e537a42d 100644 --- a/docs/docs_not_updated/esp32c61.txt +++ b/docs/docs_not_updated/esp32c61.txt @@ -99,7 +99,6 @@ api-reference/peripherals/gptimer.rst api-reference/peripherals/pcnt.rst api-reference/peripherals/touch_element.rst api-reference/peripherals/ppa.rst -api-reference/peripherals/mcpwm.rst api-reference/peripherals/ana_cmpr.rst api-reference/peripherals/camera_driver.rst api-reference/peripherals/ledc.rst From 6b7da2901e9217a0d257f0086db7e43e444ead92 Mon Sep 17 00:00:00 2001 From: Chen Jichang Date: Mon, 15 Jul 2024 20:33:48 +0800 Subject: [PATCH 090/113] change(pcnt): remove pcnt on esp32c61 pcnt is not supported on esp32c61 --- components/soc/esp32c61/include/soc/pmu_icg_mapping.h | 1 - components/soc/esp32c61/include/soc/soc_caps.h | 8 -------- docs/docs_not_updated/esp32c61.txt | 1 - 3 files changed, 10 deletions(-) diff --git a/components/soc/esp32c61/include/soc/pmu_icg_mapping.h b/components/soc/esp32c61/include/soc/pmu_icg_mapping.h index eae01baf4f9..08ac435ee71 100644 --- a/components/soc/esp32c61/include/soc/pmu_icg_mapping.h +++ b/components/soc/esp32c61/include/soc/pmu_icg_mapping.h @@ -17,7 +17,6 @@ #define PMU_ICG_APB_ENA_MEM_MONITOR 25 #define PMU_ICG_APB_ENA_MSPI 5 #define PMU_ICG_APB_ENA_PARL 23 -#define PMU_ICG_APB_ENA_PCNT 20 #define PMU_ICG_APB_ENA_PVT_MONITOR 27 #define PMU_ICG_APB_ENA_REGDMA 24 #define PMU_ICG_APB_ENA_SARADC 9 diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index d704741723c..812cb484c4d 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -63,7 +63,6 @@ // \#define SOC_MODEM_CLOCK_SUPPORTED 1 // \#define SOC_REG_I2C_SUPPORTED 1 //TODO: [ESP32C61] IDF-9276 -// \#define SOC_PCNT_SUPPORTED 0 //TODO: [ESP32C61] IDF-9332 // \#define SOC_TWAI_SUPPORTED 0 //TODO: [ESP32C61] IDF-9336 // \#define SOC_ETM_SUPPORTED 0 // \#define SOC_LP_CORE_SUPPORTED 0 //TODO: [ESP32C61] IDF-9331 @@ -290,13 +289,6 @@ #define SOC_MPU_REGION_RO_SUPPORTED 0 #define SOC_MPU_REGION_WO_SUPPORTED 0 -/*-------------------------- PCNT CAPS ---------------------------------------*/ -// #define SOC_PCNT_GROUPS 1U -// #define SOC_PCNT_UNITS_PER_GROUP 4 -// #define SOC_PCNT_CHANNELS_PER_UNIT 2 -// #define SOC_PCNT_THRES_POINT_PER_UNIT 2 -// #define SOC_PCNT_SUPPORT_RUNTIME_THRES_UPDATE 1 - /*------------------------ USB SERIAL JTAG CAPS ------------------------------*/ // \#define SOC_USB_SERIAL_JTAG_SUPPORT_LIGHT_SLEEP (1) /*!< Support to maintain minimum usb communication during light sleep */ // TODO: IDF-6395 diff --git a/docs/docs_not_updated/esp32c61.txt b/docs/docs_not_updated/esp32c61.txt index 0f9e537a42d..18628f28dfc 100644 --- a/docs/docs_not_updated/esp32c61.txt +++ b/docs/docs_not_updated/esp32c61.txt @@ -96,7 +96,6 @@ api-reference/peripherals/spi_slave.rst api-reference/peripherals/etm.rst api-reference/peripherals/i2s.rst api-reference/peripherals/gptimer.rst -api-reference/peripherals/pcnt.rst api-reference/peripherals/touch_element.rst api-reference/peripherals/ppa.rst api-reference/peripherals/ana_cmpr.rst From cde7750f0ab0bdbe1b7a6bb4edf0edded6aaa7a2 Mon Sep 17 00:00:00 2001 From: Chen Jichang Date: Thu, 11 Jul 2024 18:31:42 +0800 Subject: [PATCH 091/113] ci(legacy_pcnt): re_enable legacy_pcnt test on c5 --- components/driver/test_apps/.build-test-rules.yml | 4 ---- .../test_apps/legacy_pcnt_driver/main/test_legacy_pcnt.c | 7 ++----- .../test_apps/legacy_pcnt_driver/pytest_legacy_pcnt.py | 2 +- docs/en/api-reference/peripherals/pcnt.rst | 2 ++ docs/zh_CN/api-reference/peripherals/pcnt.rst | 2 ++ 5 files changed, 7 insertions(+), 10 deletions(-) diff --git a/components/driver/test_apps/.build-test-rules.yml b/components/driver/test_apps/.build-test-rules.yml index cea2987e205..f9d3c10bb14 100644 --- a/components/driver/test_apps/.build-test-rules.yml +++ b/components/driver/test_apps/.build-test-rules.yml @@ -54,10 +54,6 @@ components/driver/test_apps/legacy_mcpwm_driver: components/driver/test_apps/legacy_pcnt_driver: disable: - if: SOC_PCNT_SUPPORTED != 1 - disable_test: - - if: IDF_TARGET == "esp32c5" - temporary: true - reason: target test failed # TODO [ESP32C5] IDF-10341 depends_filepatterns: - components/driver/deprecated/**/*pcnt* diff --git a/components/driver/test_apps/legacy_pcnt_driver/main/test_legacy_pcnt.c b/components/driver/test_apps/legacy_pcnt_driver/main/test_legacy_pcnt.c index 9c2c4a9287c..80bd8657f37 100644 --- a/components/driver/test_apps/legacy_pcnt_driver/main/test_legacy_pcnt.c +++ b/components/driver/test_apps/legacy_pcnt_driver/main/test_legacy_pcnt.c @@ -30,16 +30,12 @@ #define PCNT_CTRL_VCC_IO 1 #define PCNT_CTRL_GND_IO 0 #else -#define PULSE_IO 12 +#define PULSE_IO 0 #define PCNT_INPUT_IO 4 #define PCNT_CTRL_VCC_IO 5 #define PCNT_CTRL_GND_IO 2 #endif -#define HIGHEST_LIMIT 10 -#define LOWEST_LIMIT 0 -#define MAX_THRESHOLD 5 -#define MIN_THRESHOLD 0 #define PCNT_CTRL_HIGH_LEVEL 1 #define PCNT_CTRL_LOW_LEVEL 0 @@ -407,6 +403,7 @@ TEST_CASE("PCNT_basic_function_test", "[pcnt]") // use LEDC to produce the pulse, then the PCNT to count it produce_pulse(); + vTaskDelay(10 / portTICK_PERIOD_MS); // ensure LEDC is working pcnt_test_io_config(PCNT_CTRL_HIGH_LEVEL); // initialize first, the initial value should be 0 diff --git a/components/driver/test_apps/legacy_pcnt_driver/pytest_legacy_pcnt.py b/components/driver/test_apps/legacy_pcnt_driver/pytest_legacy_pcnt.py index 68f8593a260..46eddeb18ed 100644 --- a/components/driver/test_apps/legacy_pcnt_driver/pytest_legacy_pcnt.py +++ b/components/driver/test_apps/legacy_pcnt_driver/pytest_legacy_pcnt.py @@ -7,7 +7,7 @@ @pytest.mark.esp32 @pytest.mark.esp32s2 @pytest.mark.esp32s3 -# @pytest.mark.esp32c5 # TODO [ESP32C5] IDF-10341 +@pytest.mark.esp32c5 @pytest.mark.esp32c6 @pytest.mark.esp32h2 @pytest.mark.esp32p4 diff --git a/docs/en/api-reference/peripherals/pcnt.rst b/docs/en/api-reference/peripherals/pcnt.rst index d3998235c0e..365d6c9f6f3 100644 --- a/docs/en/api-reference/peripherals/pcnt.rst +++ b/docs/en/api-reference/peripherals/pcnt.rst @@ -163,6 +163,8 @@ It is recommended to remove the unused watch point by :cpp:func:`pcnt_unit_remov When a watch step and a watch point are triggered at the same time (i.e. at the same absolute point), the callback function only gets called by once. + The step increment will be reset to 0 when the count reaches the high/low limit value. Please do not rely too much on the exact step interval. + .. code:: c // add positive direction watch step with 100 step intervals diff --git a/docs/zh_CN/api-reference/peripherals/pcnt.rst b/docs/zh_CN/api-reference/peripherals/pcnt.rst index 565a8ddeea5..8f47f0b9b86 100644 --- a/docs/zh_CN/api-reference/peripherals/pcnt.rst +++ b/docs/zh_CN/api-reference/peripherals/pcnt.rst @@ -163,6 +163,8 @@ PCNT 单元可被设置为观察几个特定的数值，这些被观察的数值 当观察步进和观察点同时被触发时，回调函数只会被调用一次。 + 当计数达到上/下限值时，步进增量会被重置为 0，请勿过分依赖于精确的步进间隔。 + .. code:: c // add positive direction step notify with 100 step intervals From 6f445a52df99f919b1a3a1e31eb745a3e5553831 Mon Sep 17 00:00:00 2001 From: Rahul Tank Date: Thu, 18 Jul 2024 16:46:29 +0530 Subject: [PATCH 092/113] fix(nimble): Add host callback to provide security key --- components/bt/host/nimble/nimble | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/bt/host/nimble/nimble b/components/bt/host/nimble/nimble index 46ae5865554..9372de75dee 160000 --- a/components/bt/host/nimble/nimble +++ b/components/bt/host/nimble/nimble @@ -1 +1 @@ -Subproject commit 46ae5865554f2fd7df829b6b9b5ca24522b9ad76 +Subproject commit 9372de75deea015234e6b1d51dd63356a3c88683 From cbf59b4c763e86e12ecdc4cb35e0a0e05d18dbfc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Adam=20M=C3=BAdry?= Date: Thu, 18 Jul 2024 12:53:29 +0200 Subject: [PATCH 093/113] fix(sdmmc): Fix logically dead code in sdmmc_io_rw_extended --- components/sdmmc/sdmmc_io.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/components/sdmmc/sdmmc_io.c b/components/sdmmc/sdmmc_io.c index 8334f3a22f6..970657dfe19 100644 --- a/components/sdmmc/sdmmc_io.c +++ b/components/sdmmc/sdmmc_io.c @@ -364,7 +364,9 @@ esp_err_t sdmmc_io_rw_extended(sdmmc_card_t* card, int func, err = sdmmc_send_cmd(card, &cmd); - if (arg & SD_ARG_CMD53_READ && + // Cannot do a normal bitmask check (arg & SD_ARG_CMD53_READ) + // since SD_ARG_CMD53_READ (0<<31) is 0 + if (!(arg & SD_ARG_CMD53_WRITE) && datalen > 0 && cmd.data == card->host.dma_aligned_buffer) { assert(datalen <= SDMMC_IO_BLOCK_SIZE); memcpy(datap, card->host.dma_aligned_buffer, datalen); @@ -672,7 +674,7 @@ static bool check_tuples_in_buffer(uint8_t* buf, int buffer_size, int* inout_cis esp_err_t sdmmc_io_get_cis_data(sdmmc_card_t* card, uint8_t* out_buffer, size_t buffer_size, size_t* inout_cis_size) { esp_err_t ret = ESP_OK; - WORD_ALIGNED_ATTR uint8_t buf[CIS_GET_MINIMAL_SIZE]; + WORD_ALIGNED_ATTR uint8_t buf[CIS_GET_MINIMAL_SIZE] = {0}; /* Pointer to size is a mandatory parameter */ assert(inout_cis_size); From d70383422be0d59fbbfb6e46ddc4d598e2b876c3 Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Wed, 17 Jul 2024 09:20:35 +0800 Subject: [PATCH 094/113] feat(lp-core): add reduced footprint print functions --- .../lp_core/include/ulp_lp_core_print.h | 23 ++++++++++++ .../ulp/lp_core/lp_core/lp_core_panic.c | 24 ++++++++---- .../ulp/lp_core/lp_core/lp_core_print.c | 37 +++++++++++++++++++ .../lp_core_hp_uart/main/CMakeLists.txt | 4 +- .../main/lp_core/test_hello_main.c | 9 +++++ .../main/lp_core/test_panic_main.c | 15 ++++++++ .../lp_core_hp_uart/main/test_lp_core.c | 17 +++++++++ .../lp_core_hp_uart/pytest_lp_core_hp_uart.py | 15 ++++++++ 8 files changed, 135 insertions(+), 9 deletions(-) create mode 100644 components/ulp/test_apps/lp_core/lp_core_hp_uart/main/lp_core/test_panic_main.c diff --git a/components/ulp/lp_core/lp_core/include/ulp_lp_core_print.h b/components/ulp/lp_core/lp_core/include/ulp_lp_core_print.h index 27a080581df..eeb15208dd4 100644 --- a/components/ulp/lp_core/lp_core/include/ulp_lp_core_print.h +++ b/components/ulp/lp_core/lp_core/include/ulp_lp_core_print.h @@ -44,3 +44,26 @@ extern void ets_install_uart_printf(void); * @param c character to be printed */ void lp_core_print_char(char c); + +/** + * @brief Print a null-terminated string from the LP core + * + * @param str null-terminated string to be printed + */ +void lp_core_print_str(const char *str); + +/** + * @brief Print a hex value from the LP core + * + * @param h hex value to be printed + * + * @note Does not print '0x', only the digits (will always print 8 digits) + */ +void lp_core_print_hex(int h); + +/** + * @brief Print a two digit integer from the LP-Core + * + * @param d integer to be printed + */ +void lp_core_print_dec_two_digits(int d); diff --git a/components/ulp/lp_core/lp_core/lp_core_panic.c b/components/ulp/lp_core/lp_core/lp_core_panic.c index 70fac05483f..f85f6f30889 100644 --- a/components/ulp/lp_core/lp_core/lp_core_panic.c +++ b/components/ulp/lp_core/lp_core/lp_core_panic.c @@ -16,16 +16,19 @@ static void dump_stack(RvExcFrame *frame, int exccause) { uint32_t i = 0; uint32_t sp = frame->sp; - lp_core_printf("\n\nStack memory:\n"); + lp_core_print_str("\n\nStack memory:\n"); const int per_line = 8; for (i = 0; i < 1024; i += per_line * sizeof(uint32_t)) { uint32_t *spp = (uint32_t *)(sp + i); - lp_core_printf("%08x: ", sp + i); + lp_core_print_hex(sp + i); + lp_core_print_str(": "); for (int y = 0; y < per_line; y++) { - lp_core_printf("0x%08x%c", spp[y], y == per_line - 1 ? '\n' : ' '); + lp_core_print_str("0x"); + lp_core_print_hex(spp[y]); + lp_core_print_char(y == per_line - 1 ? '\n' : ' '); } } - lp_core_printf("\n"); + lp_core_print_str("\n"); } static const char *desc[] = { @@ -57,21 +60,26 @@ void ulp_lp_core_panic_handler(RvExcFrame *frame, int exccause) exccause_str = reason[exccause]; } - lp_core_printf("Guru Meditation Error: LP Core panic'ed (%s)\n", exccause_str); - lp_core_printf("Core 0 register dump:\n"); + lp_core_print_str("Guru Meditation Error: LP Core panic'ed "); + lp_core_print_str(exccause_str); + lp_core_print_str("\n"); + lp_core_print_str("Core 0 register dump:\n"); uint32_t* frame_ints = (uint32_t*) frame; for (int x = 0; x < DIM(desc); x++) { if (desc[x][0] != 0) { const int not_last = (x + 1) % 4; - lp_core_printf("%-8s: 0x%08x %c", desc[x], frame_ints[x], not_last ? ' ' : '\n'); + lp_core_print_str(desc[x]); + lp_core_print_str(": 0x"); + lp_core_print_hex(frame_ints[x]); + lp_core_print_char(not_last ? ' ' : '\n'); } } dump_stack(frame, exccause); /* idf-monitor uses this string to mark the end of a panic dump */ - lp_core_printf("ELF file SHA256: No SHA256 Embedded\n"); + lp_core_print_str("ELF file SHA256: No SHA256 Embedded\n"); while (1) { } diff --git a/components/ulp/lp_core/lp_core/lp_core_print.c b/components/ulp/lp_core/lp_core/lp_core_print.c index 0a704c28a32..64d07b783f3 100644 --- a/components/ulp/lp_core/lp_core/lp_core_print.c +++ b/components/ulp/lp_core/lp_core/lp_core_print.c @@ -298,3 +298,40 @@ int lp_core_printf(const char* format, ...) } #endif /* !CONFIG_ULP_ROM_PRINT_ENABLE */ + +void lp_core_print_str(const char *str) +{ + for (int i = 0; str[i] != 0; i++) { + lp_core_print_char(str[i]); + } +} + +void lp_core_print_hex(int h) +{ + int x; + int c; + // Does not print '0x', only the digits (8 digits to print) + for (x = 0; x < 8; x++) { + c = (h >> 28) & 0xf; // extract the leftmost byte + if (c < 10) { + lp_core_print_char('0' + c); + } else { + lp_core_print_char('a' + c - 10); + } + h <<= 4; // move the 2nd leftmost byte to the left, to be extracted next + } +} + +void lp_core_print_dec_two_digits(int d) +{ + // can print at most 2 digits! + int n1, n2; + n1 = d % 10; // extract ones digit + n2 = d / 10; // extract tens digit + if (n2 == 0) { + lp_core_print_char(' '); + } else { + lp_core_print_char(n2 + '0'); + } + lp_core_print_char(n1 + '0'); +} diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/CMakeLists.txt b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/CMakeLists.txt index 6fce89dfdde..87918dae185 100644 --- a/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/CMakeLists.txt +++ b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/CMakeLists.txt @@ -1,5 +1,6 @@ set(app_sources "test_app_main.c" "test_lp_core.c") -set(lp_core_sources "lp_core/test_hello_main.c") +set(lp_core_sources "lp_core/test_hello_main.c") +set(lp_core_sources_panic "lp_core/test_panic_main.c") idf_component_register(SRCS ${app_sources} INCLUDE_DIRS "lp_core" @@ -9,3 +10,4 @@ idf_component_register(SRCS ${app_sources} set(lp_core_exp_dep_srcs ${app_sources}) ulp_embed_binary(lp_core_test_app "${lp_core_sources}" "${lp_core_exp_dep_srcs}") +ulp_embed_binary(lp_core_test_app_panic "${lp_core_sources_panic}" "${lp_core_exp_dep_srcs}") diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/lp_core/test_hello_main.c b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/lp_core/test_hello_main.c index 3c844cec7df..504aedd026e 100644 --- a/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/lp_core/test_hello_main.c +++ b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/lp_core/test_hello_main.c @@ -8,9 +8,18 @@ #include #include "ulp_lp_core_print.h" +volatile int hex_value = 0x1234ABCD; +volatile int dec_value = 56; + int main(void) { lp_core_printf("Hello, World!\n"); + lp_core_print_hex(hex_value); + lp_core_print_char('\n'); + + lp_core_print_dec_two_digits(dec_value); + lp_core_print_char('\n'); + return 0; } diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/lp_core/test_panic_main.c b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/lp_core/test_panic_main.c new file mode 100644 index 00000000000..4985426bebd --- /dev/null +++ b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/lp_core/test_panic_main.c @@ -0,0 +1,15 @@ +/* + * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +int main(void) +{ + asm volatile("ebreak"); + + return 0; +} diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/test_lp_core.c b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/test_lp_core.c index 0d3949cd59a..bdd1e863c76 100644 --- a/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/test_lp_core.c +++ b/components/ulp/test_apps/lp_core/lp_core_hp_uart/main/test_lp_core.c @@ -19,6 +19,9 @@ extern const uint8_t lp_core_main_bin_start[] asm("_binary_lp_core_test_app_bin_start"); extern const uint8_t lp_core_main_bin_end[] asm("_binary_lp_core_test_app_bin_end"); +extern const uint8_t lp_core_panic_bin_start[] asm("_binary_lp_core_test_app_panic_bin_start"); +extern const uint8_t lp_core_panic_bin_end[] asm("_binary_lp_core_test_app_panic_bin_end"); + static void load_and_start_lp_core_firmware(ulp_lp_core_cfg_t* cfg, const uint8_t* firmware_start, const uint8_t* firmware_end) { TEST_ASSERT(ulp_lp_core_load_binary(firmware_start, @@ -41,3 +44,17 @@ TEST_CASE("lp-print can output to hp-uart", "[lp_core]") // We simply wait to allow the lp-core to run once vTaskDelay(1000 / portTICK_PERIOD_MS); } + +TEST_CASE("LP-Core panic", "[lp_core]") +{ + /* Load ULP firmware and start the coprocessor */ + ulp_lp_core_cfg_t cfg = { + .wakeup_source = ULP_LP_CORE_WAKEUP_SOURCE_HP_CPU, + }; + + load_and_start_lp_core_firmware(&cfg, lp_core_panic_bin_start, lp_core_panic_bin_end); + + // Actual test output on UART is checked by pytest, not unity test-case + // We simply wait to allow the lp-core to run once + vTaskDelay(1000 / portTICK_PERIOD_MS); +} diff --git a/components/ulp/test_apps/lp_core/lp_core_hp_uart/pytest_lp_core_hp_uart.py b/components/ulp/test_apps/lp_core/lp_core_hp_uart/pytest_lp_core_hp_uart.py index df0edfec741..974a9d108a9 100644 --- a/components/ulp/test_apps/lp_core/lp_core_hp_uart/pytest_lp_core_hp_uart.py +++ b/components/ulp/test_apps/lp_core/lp_core_hp_uart/pytest_lp_core_hp_uart.py @@ -12,3 +12,18 @@ def test_lp_core_hp_uart_print(dut: Dut) -> None: dut.expect_exact('Press ENTER to see the list of tests') dut.write('"lp-print can output to hp-uart"') dut.expect_exact('Hello, World!') + dut.expect_exact('1234abcd') + dut.expect_exact('56') + + +@pytest.mark.esp32c5 +@pytest.mark.esp32c6 +@pytest.mark.esp32p4 +@pytest.mark.generic +def test_lp_core_panic(dut: Dut) -> None: + dut.expect_exact('Press ENTER to see the list of tests') + dut.write('"LP-Core panic"') + + dut.expect_exact("Guru Meditation Error: LP Core panic'ed Breakpoint") + dut.expect_exact('Core 0 register dump:') + dut.expect_exact('ELF file SHA256:') From a616782218e6286c716cdb73948736f6ceb6b887 Mon Sep 17 00:00:00 2001 From: laokaiyao Date: Fri, 12 Jul 2024 16:07:16 +0800 Subject: [PATCH 095/113] fix(parlio): fix cache sync issue on P4 --- components/esp_driver_parlio/src/parlio_tx.c | 12 +++++------ .../test_apps/parlio/main/test_parlio_tx.c | 20 ++++++++++--------- 2 files changed, 17 insertions(+), 15 deletions(-) diff --git a/components/esp_driver_parlio/src/parlio_tx.c b/components/esp_driver_parlio/src/parlio_tx.c index 3dfeb9f9d0f..e27e2de320d 100644 --- a/components/esp_driver_parlio/src/parlio_tx.c +++ b/components/esp_driver_parlio/src/parlio_tx.c @@ -394,7 +394,7 @@ static void IRAM_ATTR parlio_tx_mount_dma_data(parlio_tx_unit_t *tx_unit, const while (len) { assert(desc_nc); - mount_bytes = len > DMA_DESCRIPTOR_BUFFER_MAX_SIZE ? DMA_DESCRIPTOR_BUFFER_MAX_SIZE : len; + mount_bytes = len > PARLIO_MAX_ALIGNED_DMA_BUF_SIZE ? PARLIO_MAX_ALIGNED_DMA_BUF_SIZE : len; len -= mount_bytes; desc_nc->dw0.suc_eof = (len == 0); // whether the last frame desc_nc->dw0.size = mount_bytes; @@ -404,11 +404,6 @@ static void IRAM_ATTR parlio_tx_mount_dma_data(parlio_tx_unit_t *tx_unit, const desc_nc = PARLIO_GET_NON_CACHED_DESC_ADDR(desc_nc->next); prepared_length += mount_bytes; } - -#if CONFIG_IDF_TARGET_ESP32P4 - // Write back to cache to synchronize the cache before DMA start - esp_cache_msync((void *)buffer, len, ESP_CACHE_MSYNC_FLAG_DIR_C2M); -#endif // CONFIG_IDF_TARGET_ESP32P4 } esp_err_t parlio_tx_unit_wait_all_done(parlio_tx_unit_handle_t tx_unit, int timeout_ms) @@ -572,6 +567,11 @@ esp_err_t parlio_tx_unit_transmit(parlio_tx_unit_handle_t tx_unit, const void *p t->payload = payload; t->payload_bits = payload_bits; t->idle_value = config->idle_value & tx_unit->idle_value_mask; +#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE + // Write back to cache to synchronize the cache before DMA start + ESP_RETURN_ON_ERROR(esp_cache_msync((void *)payload, (payload_bits + 7) / 8, + ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED), TAG, "cache sync failed"); +#endif // SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE // send the transaction descriptor to progress queue ESP_RETURN_ON_FALSE(xQueueSend(tx_unit->trans_queues[PARLIO_TX_QUEUE_PROGRESS], &t, 0) == pdTRUE, diff --git a/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_tx.c b/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_tx.c index 061fefae122..a1fd71d8883 100644 --- a/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_tx.c +++ b/components/esp_driver_parlio/test_apps/parlio/main/test_parlio_tx.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -109,7 +109,7 @@ TEST_CASE("parallel_tx_unit_trans_done_event", "[parlio_tx]") parlio_transmit_config_t transmit_config = { .idle_value = 0x00, }; - uint8_t payload[64] = {0}; + __attribute__((aligned(64))) uint8_t payload[64] = {0}; for (int i = 0; i < 64; i++) { payload[i] = i; } @@ -155,7 +155,7 @@ TEST_CASE("parallel_tx_unit_enable_disable", "[parlio_tx]") parlio_transmit_config_t transmit_config = { .idle_value = 0x00, }; - uint8_t payload[128] = {0}; + __attribute__((aligned(64))) uint8_t payload[128] = {0}; for (int i = 0; i < 128; i++) { payload[i] = i; } @@ -210,8 +210,9 @@ TEST_CASE("parallel_tx_unit_idle_value", "[parlio_tx]") parlio_transmit_config_t transmit_config = { .idle_value = 0x00, }; - uint8_t payload[8] = {0}; - for (int i = 0; i < 8; i++) { + uint32_t size = 64; + __attribute__((aligned(64))) uint8_t payload[size]; + for (int i = 0; i < size; i++) { payload[i] = i; } for (int j = 0; j < 16; j++) { @@ -255,15 +256,16 @@ TEST_CASE("parallel_tx_clock_gating", "[paralio_tx]") parlio_transmit_config_t transmit_config = { .idle_value = 0x00, }; - uint8_t payload[8] = {0}; - for (int i = 0; i < 8; i++) { + uint32_t size = 64; + __attribute__((aligned(64))) uint8_t payload[size]; + for (int i = 0; i < size; i++) { payload[i] = 0x1B; // 8'b00011011, in PARLIO_BIT_PACK_ORDER_MSB, you should see 2'b00, 2'b01, 2'b10, 2'b11 on the data line } - TEST_ESP_OK(parlio_tx_unit_transmit(tx_unit, payload, 8 * sizeof(uint8_t) * 8, &transmit_config)); + TEST_ESP_OK(parlio_tx_unit_transmit(tx_unit, payload, size * sizeof(uint8_t) * 8, &transmit_config)); TEST_ESP_OK(parlio_tx_unit_wait_all_done(tx_unit, -1)); // check if the level on the clock line is low TEST_ASSERT_EQUAL(0, gpio_get_level(TEST_CLK_GPIO)); - TEST_ESP_OK(parlio_tx_unit_transmit(tx_unit, payload, 8 * sizeof(uint8_t) * 8, &transmit_config)); + TEST_ESP_OK(parlio_tx_unit_transmit(tx_unit, payload, size * sizeof(uint8_t) * 8, &transmit_config)); TEST_ESP_OK(parlio_tx_unit_wait_all_done(tx_unit, -1)); TEST_ASSERT_EQUAL(0, gpio_get_level(TEST_CLK_GPIO)); TEST_ASSERT_EQUAL(0, gpio_get_level(TEST_CLK_GPIO)); From 5c23314da19449f88191a34b40c121c459ceb4a3 Mon Sep 17 00:00:00 2001 From: "igor.udot" Date: Fri, 19 Jul 2024 12:28:32 +0800 Subject: [PATCH 096/113] fix: apps empty list is not None --- .gitlab/ci/host-test.yml | 12 ++++++------ tools/ci/idf_pytest/plugin.py | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/.gitlab/ci/host-test.yml b/.gitlab/ci/host-test.yml index 62fa8feeefc..3d93a205106 100644 --- a/.gitlab/ci/host-test.yml +++ b/.gitlab/ci/host-test.yml @@ -314,8 +314,8 @@ test_pytest_qemu: --pytest-apps -m qemu --collect-app-info "list_job_${CI_JOB_NAME_SLUG}.txt" -# --modified-components ${MR_MODIFIED_COMPONENTS} will be fixed with IDFCI-2270 -# --modified-files ${MR_MODIFIED_FILES} + --modified-components ${MR_MODIFIED_COMPONENTS} + --modified-files ${MR_MODIFIED_FILES} - python tools/ci/get_known_failure_cases_file.py - run_cmd pytest --target $IDF_TARGET @@ -344,8 +344,8 @@ test_pytest_linux: --pytest-apps -m host_test --collect-app-info "list_job_${CI_JOB_NAME_SLUG}.txt" -# --modified-components ${MR_MODIFIED_COMPONENTS} will be fixed with IDFCI-2270 -# --modified-files ${MR_MODIFIED_FILES} + --modified-components ${MR_MODIFIED_COMPONENTS} + --modified-files ${MR_MODIFIED_FILES} - python tools/ci/get_known_failure_cases_file.py - run_cmd pytest --target linux @@ -376,8 +376,8 @@ test_pytest_macos: --pytest-apps -m \"host_test and macos_shell\" --collect-app-info "list_job_${CI_JOB_NAME_SLUG}.txt" -# --modified-components ${MR_MODIFIED_COMPONENTS} will be fixed with IDFCI-2270 -# --modified-files ${MR_MODIFIED_FILES} + --modified-components ${MR_MODIFIED_COMPONENTS} + --modified-files ${MR_MODIFIED_FILES} - python tools/ci/get_known_failure_cases_file.py - run_cmd pytest --target linux diff --git a/tools/ci/idf_pytest/plugin.py b/tools/ci/idf_pytest/plugin.py index d88370792b7..10e48614984 100644 --- a/tools/ci/idf_pytest/plugin.py +++ b/tools/ci/idf_pytest/plugin.py @@ -82,7 +82,7 @@ def __init__( self.apps_list = ( [os.path.join(idf_relpath(app.app_dir), app.build_dir) for app in apps if app.build_status == BuildStatus.SUCCESS] - if apps + if apps is not None else None ) From df42da4c7d3b23ea7f9f7342a66fc41476ec6252 Mon Sep 17 00:00:00 2001 From: zwx Date: Wed, 22 May 2024 11:28:24 +0800 Subject: [PATCH 097/113] feat(openthread): add task switching lock holder check --- components/openthread/include/esp_openthread_lock.h | 13 ++++++++----- components/openthread/src/esp_openthread_lock.c | 7 ++++++- 2 files changed, 14 insertions(+), 6 deletions(-) diff --git a/components/openthread/include/esp_openthread_lock.h b/components/openthread/include/esp_openthread_lock.h index 19f504541a6..c2ad28fad99 100644 --- a/components/openthread/include/esp_openthread_lock.h +++ b/components/openthread/include/esp_openthread_lock.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -35,10 +35,10 @@ void esp_openthread_lock_deinit(void); /** * @brief This function acquires the OpenThread API lock. * - * @note Every OT APIs that takes an otInstance argument MUST be protected with this API lock - * except that the call site is in OT callbacks. + * @note Every Openthread APIs that takes an otInstance argument MUST be protected with this API lock + * except that the call site is in Openthread callbacks. * - * @param[in] block_ticks The maxinum number of RTOS ticks to wait for the lock. + * @param[in] block_ticks The maximum number of RTOS ticks to wait for the lock. * * @return * - True on lock acquired @@ -63,7 +63,7 @@ void esp_openthread_lock_release(void); * * @note Please use esp_openthread_lock_acquire() for normal cases. * - * @param[in] block_ticks The maxinum number of RTOS ticks to wait for the lock. + * @param[in] block_ticks The maximum number of RTOS ticks to wait for the lock. * * @return * - True on lock acquired @@ -75,6 +75,9 @@ bool esp_openthread_task_switching_lock_acquire(TickType_t block_ticks); /** * @brief This function releases the OpenThread API task switching lock. * + * @note This API must be called after `esp_openthread_task_switching_lock_acquire` or + * `esp_openthread_lock_acquire` and will cause a crash if the current task is not the task switching lock holder. + * This error could be caused by calling OpenThread APIs without locking OpenThread stack. */ void esp_openthread_task_switching_lock_release(void); diff --git a/components/openthread/src/esp_openthread_lock.c b/components/openthread/src/esp_openthread_lock.c index ba7c63d4115..7e35da6c21b 100644 --- a/components/openthread/src/esp_openthread_lock.c +++ b/components/openthread/src/esp_openthread_lock.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -45,6 +45,11 @@ void esp_openthread_task_switching_lock_release(void) { ESP_RETURN_ON_FALSE(s_openthread_task_mutex, , OT_PLAT_LOG_TAG, "Failed to release the lock because the mutex is not ready"); + if (xSemaphoreGetMutexHolder(s_openthread_task_mutex) != xTaskGetCurrentTaskHandle()) { + ESP_LOGE(OT_PLAT_LOG_TAG, "Task %s is attempting to release the OpenThread task switching lock but never acquired it.", + pcTaskGetName(xTaskGetCurrentTaskHandle())); + assert(false); + } xSemaphoreGiveRecursive(s_openthread_task_mutex); } From e86c7570814c33291ff6d022161ef54f093f1b5d Mon Sep 17 00:00:00 2001 From: shenmengjing Date: Thu, 18 Jul 2024 16:00:38 +0800 Subject: [PATCH 098/113] docs: Update the pin layout for esp32-pico-kit-1 --- docs/_static/esp32-pico-kit-1-pin-layout.png | Bin 0 -> 465545 bytes docs/_static/esp32-pico-kit-1-pinout.png | Bin 661057 -> 0 bytes .../esp32/get-started-pico-kit-1.rst | 4 ++-- .../esp32/get-started-pico-kit-1.rst | 4 ++-- 4 files changed, 4 insertions(+), 4 deletions(-) create mode 100644 docs/_static/esp32-pico-kit-1-pin-layout.png delete mode 100644 docs/_static/esp32-pico-kit-1-pinout.png diff --git a/docs/_static/esp32-pico-kit-1-pin-layout.png b/docs/_static/esp32-pico-kit-1-pin-layout.png new file mode 100644 index 0000000000000000000000000000000000000000..a523768b3e86bb46ecc2bf54204ab7755e6aafbc GIT binary patch literal 465545 zcmeFZ^;?u}*9JN$0)j|LH;4#GDkUx5Ez&97Asq@zhlmOYf^>sOw}^xa0@B^x-LTjA zyx;e{d;bIbmv0W9ICO@&=enV?SequH9-D@($%CD1%F8DDyikF?qKffZtQG^aCdiSv$D5wF*SBHV{>q} zNZb%4Lm+4nvJ#IpJd)PNJ@xvYU7&9bCf(p@zQfBHOotifG3A?*o2i*aL}g`HS=jF| z>XtuVxHeQ_nqOGhXI)>z72O9930Xx|JO@G1x8nBk#z6_k=a2CDCfRRva9nL(J@z>A zXg}ON_Y3Ws z6aDweA?@=V2r-F&A8f%Wxc~KH=Z80*gF5 zwdcz%db%_;&VP^LdeFsSAfxZ9Y$Ro7Zj9AJN{so{5e z=SH@Y4)1G;EB#fW-DlgR?eSFMA?-~6bp+#7s_n7oQjJw^l05A(XJ(cd_I7x5+RPw2 z49owvtz6zTRvwz9y^~n)tRO;yd?VrLvIIRW0G&^NyrcpX)!>2fXiD+WD*2$qJ zB>q>WuuHaY;~{9=Vxf0_=wslGW#25_UqSjOI(=zal7nzgcQ8TkX5}OCY2oFYIZ_d5 zb2}&N{rx$5r`$i|{BEermOR$alZpr$3}+W#nYUZ7gk|M1`M0u+aGl3AGwK}ScA#CQ zPqsetJtHM38An0XP*dG&X7Ud8E2pq5B`zUvk1-;pqwu2_b9! zx4f1sGTaIy5(>)eBS1VqoFr;KKgccb9ATYIpQH9KUw!@MlTi+}FaE|YhvFx_%^DgZ zZ=PHP<@tJ(t&6YBVm03RMH?MbwmSA9FD>m#b#--)^}Xpn?lwDnv7&HSa&q!gU#@y=5fcl`_egSH6@7iX-XTs-&exM4E;e|Fhld$i zS+0?<{q$*uqHopxfA@EeV&2&X`P+tVOvG2; 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z;s4RZOY%a(iq>=n!L}2opArdN@UrSVTR>Gc0?=RzC1OY+!bE8I5v*D+=Aix1c5Xg@ zW%P&W2Xb_Ta_ijiMT$MO;+nZHu$o4qPEjUo`*A@343UJttZ|Mr;QJXbnh#v$720u2 z1L7&k+W6~-KYa=12?w;*$Q3;jeM=`##Y40b^N^TPvTnB2PuJyq&sFM&Vp9=f&vGQ1#!_$=UnHa2S}>H1W4#R)tT6?P1p z?J;YrxG?RUy;t`CUirz654wm#0nlkmxf9H(`vy4pb?jO$A?&w||7As< z+FLt{r%fsM$)BiR9rM~Z;ZzIunuDYXSAh>dwLM0h`~L0L`x*@6i*Ca_IA*~hrI#%9OKLrm zwnAZCV_3ii*6Vu31G)FNK6E^M%UnrbJ`wbe^IyQ_Mb`q4aL=t{jghf#>2})B%%h_7R2kjFt_I zy34`x^3B8lM;Ct0dF6$l8%k{@MsD6ep`QLyd3nhlTW`L5{9s7D3$Ry zS78bruwI`VzyW4M!a9>&NwW0URnVF|MQEmkJ4U4*S)v;^uGWPRC%BP diff --git a/docs/en/hw-reference/esp32/get-started-pico-kit-1.rst b/docs/en/hw-reference/esp32/get-started-pico-kit-1.rst index c0fa06dc31b..f3b00a5ed05 100644 --- a/docs/en/hw-reference/esp32/get-started-pico-kit-1.rst +++ b/docs/en/hw-reference/esp32/get-started-pico-kit-1.rst @@ -353,9 +353,9 @@ Header J3 Pin Layout """""""""" -.. figure:: ../../../_static/esp32-pico-kit-1-pinout.png +.. figure:: ../../../_static/esp32-pico-kit-1-pin-layout.png :align: center - :scale: 50% + :width: 95% :alt: ESP32-PICO-KIT-1 (click to enlarge) :figclass: align-center diff --git a/docs/zh_CN/hw-reference/esp32/get-started-pico-kit-1.rst b/docs/zh_CN/hw-reference/esp32/get-started-pico-kit-1.rst index e9681d7aef4..2015aec869c 100644 --- a/docs/zh_CN/hw-reference/esp32/get-started-pico-kit-1.rst +++ b/docs/zh_CN/hw-reference/esp32/get-started-pico-kit-1.rst @@ -353,9 +353,9 @@ Header J3 管脚布局 """""""""""" -.. figure:: ../../../_static/esp32-pico-kit-1-pinout.png +.. figure:: ../../../_static/esp32-pico-kit-1-pin-layout.png :align: center - :scale: 50% + :width: 95% :alt: ESP32-PICO-KIT-1 (click to enlarge) :figclass: align-center From 4607cff1f9770be34311584da7f5567bd506e5f4 Mon Sep 17 00:00:00 2001 From: Ondrej Kosta Date: Mon, 15 Jul 2024 09:35:51 +0200 Subject: [PATCH 099/113] fix(esptool): make 80MHZ Flash SPI speed not supported by v0.0 of P4 --- components/esptool_py/Kconfig.projbuild | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esptool_py/Kconfig.projbuild b/components/esptool_py/Kconfig.projbuild index ec7e12ee2aa..5877ada398e 100644 --- a/components/esptool_py/Kconfig.projbuild +++ b/components/esptool_py/Kconfig.projbuild @@ -114,7 +114,7 @@ menu "Serial flasher config" config ESPTOOLPY_FLASHFREQ_80M bool "80 MHz" - depends on SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED + depends on SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED && !ESP32P4_REV_MIN_0 # TODO IDF-10488 config ESPTOOLPY_FLASHFREQ_64M bool "64 MHz" depends on SOC_MEMSPI_SRC_FREQ_64M_SUPPORTED From 3a6b665b908f439ee2eeb43ae34c89e01c5ec754 Mon Sep 17 00:00:00 2001 From: laokaiyao Date: Fri, 19 Jul 2024 16:06:53 +0800 Subject: [PATCH 100/113] ci(ana_cmpr): enable the ana_cmpr target tests on P4 --- .../test_apps/.build-test-rules.yml | 4 ---- .../analog_comparator/main/test_ana_cmpr.c | 10 +++++----- .../analog_comparator/main/test_ana_cmpr.h | 13 +++++++++++-- .../analog_comparator/main/test_ana_cmpr_common.c | 4 ++-- .../analog_comparator/main/test_ana_cmpr_iram.c | 4 ++-- .../test_apps/analog_comparator/pytest_ana_cmpr.py | 2 +- 6 files changed, 21 insertions(+), 16 deletions(-) diff --git a/components/esp_driver_ana_cmpr/test_apps/.build-test-rules.yml b/components/esp_driver_ana_cmpr/test_apps/.build-test-rules.yml index cbcb9d16bc0..39fb87a34c0 100644 --- a/components/esp_driver_ana_cmpr/test_apps/.build-test-rules.yml +++ b/components/esp_driver_ana_cmpr/test_apps/.build-test-rules.yml @@ -3,10 +3,6 @@ components/esp_driver_ana_cmpr/test_apps/analog_comparator: disable: - if: SOC_ANA_CMPR_SUPPORTED != 1 - disable_test: - - if: IDF_TARGET == "esp32p4" - temporary: true - reason: not supported yet depends_components: - esp_driver_gpio - esp_driver_ana_cmpr diff --git a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr.c b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr.c index b24776e455e..21154fed14e 100644 --- a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr.c +++ b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -50,12 +50,12 @@ TEST_CASE("ana_cmpr_unit_install_uninstall", "[ana_cmpr]") TEST_CASE("ana_cmpr_internal_reference", "[ana_cmpr]") { - int src_chan = test_init_src_chan_gpio(); + int src_chan = test_init_src_chan_gpio(TEST_ANA_CMPR_UNIT_ID); uint32_t cnt = 0; ana_cmpr_handle_t cmpr = NULL; ana_cmpr_config_t config = { - .unit = 0, + .unit = TEST_ANA_CMPR_UNIT_ID, .clk_src = ANA_CMPR_CLK_SRC_DEFAULT, .ref_src = ANA_CMPR_REF_SRC_INTERNAL, .cross_type = ANA_CMPR_CROSS_ANY, @@ -77,10 +77,10 @@ TEST_CASE("ana_cmpr_internal_reference", "[ana_cmpr]") TEST_ESP_OK(ana_cmpr_register_event_callbacks(cmpr, &cbs, &cnt)); TEST_ESP_OK(ana_cmpr_enable(cmpr)); cnt = 0; - for (int i = 1; i <= 10; i++) { + for (uint32_t i = 1; i <= 10; i++) { test_simulate_src_signal(src_chan, i % 2); esp_rom_delay_us(100); - TEST_ASSERT(cnt == i); + TEST_ASSERT_EQUAL_UINT32(i, cnt); } TEST_ESP_OK(ana_cmpr_disable(cmpr)); TEST_ESP_OK(ana_cmpr_del_unit(cmpr)); diff --git a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr.h b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr.h index 13566bfc84c..16ace493581 100644 --- a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr.h +++ b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr.h @@ -1,9 +1,11 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ +#pragma once + #include #include "sdkconfig.h" #include "esp_attr.h" @@ -14,6 +16,13 @@ #include "soc/soc_caps.h" #include "driver/ana_cmpr.h" +#if CONFIG_IDF_TARGET_ESP32P4 +// The pin of unit 0 is used for other purpose on P4 runner, use unit 1 instead +#define TEST_ANA_CMPR_UNIT_ID 1 +#else +#define TEST_ANA_CMPR_UNIT_ID 0 +#endif + /** * @brief Test default on cross callback * @@ -32,7 +41,7 @@ bool test_ana_cmpr_on_cross_callback(ana_cmpr_handle_t cmpr, const ana_cmpr_cros * @return * - int Source channel GPIO number */ -int test_init_src_chan_gpio(void); +int test_init_src_chan_gpio(int unit_id); /** * @brief Simulate source channel signal diff --git a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr_common.c b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr_common.c index 0feb218ea66..7f5c3e0889c 100644 --- a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr_common.c +++ b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr_common.c @@ -16,10 +16,10 @@ bool IRAM_ATTR test_ana_cmpr_on_cross_callback(ana_cmpr_handle_t cmpr, const ana return false; } -int test_init_src_chan_gpio(void) +int test_init_src_chan_gpio(int unit_id) { int src_chan_num = -1; - TEST_ESP_OK(ana_cmpr_get_gpio(0, ANA_CMPR_SOURCE_CHAN, &src_chan_num)); + TEST_ESP_OK(ana_cmpr_get_gpio(unit_id, ANA_CMPR_SOURCE_CHAN, &src_chan_num)); TEST_ASSERT(src_chan_num > 0); gpio_config_t io_conf = { .intr_type = GPIO_INTR_DISABLE, diff --git a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr_iram.c b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr_iram.c index 44da8afacd6..957bd39980c 100644 --- a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr_iram.c +++ b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/main/test_ana_cmpr_iram.c @@ -40,11 +40,11 @@ TEST_CASE("ana_cmpr_internal_reference_iram_safe", "[ana_cmpr]") .count = 0, .src_chan = -1, }; - test_data.src_chan = test_init_src_chan_gpio(); + test_data.src_chan = test_init_src_chan_gpio(TEST_ANA_CMPR_UNIT_ID); ana_cmpr_handle_t cmpr = NULL; ana_cmpr_config_t config = { - .unit = 0, + .unit = TEST_ANA_CMPR_UNIT_ID, .clk_src = ANA_CMPR_CLK_SRC_DEFAULT, .ref_src = ANA_CMPR_REF_SRC_INTERNAL, .cross_type = ANA_CMPR_CROSS_ANY, diff --git a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/pytest_ana_cmpr.py b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/pytest_ana_cmpr.py index 1cc5cf49718..020ff3713ee 100644 --- a/components/esp_driver_ana_cmpr/test_apps/analog_comparator/pytest_ana_cmpr.py +++ b/components/esp_driver_ana_cmpr/test_apps/analog_comparator/pytest_ana_cmpr.py @@ -1,11 +1,11 @@ # SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD # SPDX-License-Identifier: CC0-1.0 - import pytest from pytest_embedded import Dut @pytest.mark.esp32h2 +@pytest.mark.esp32p4 @pytest.mark.generic @pytest.mark.parametrize( 'config', From 6da89cc8b9856664a432c193d1d6404a356b953f Mon Sep 17 00:00:00 2001 From: laokaiyao Date: Fri, 19 Jul 2024 16:10:45 +0800 Subject: [PATCH 101/113] ci(touch_sensor): enable the touch sensor target tests on P4 --- .../esp_driver_touch_sens/test_apps/.build-test-rules.yml | 4 ---- 1 file changed, 4 deletions(-) diff --git a/components/esp_driver_touch_sens/test_apps/.build-test-rules.yml b/components/esp_driver_touch_sens/test_apps/.build-test-rules.yml index ff1dc3e64ca..16e6ca03696 100644 --- a/components/esp_driver_touch_sens/test_apps/.build-test-rules.yml +++ b/components/esp_driver_touch_sens/test_apps/.build-test-rules.yml @@ -2,9 +2,5 @@ components/esp_driver_touch_sens/test_apps/touch_sens: disable: - if: SOC_TOUCH_SENSOR_VERSION != 3 temporary: currently driver ng only support version 3 - disable_test: - - if: IDF_TARGET == "esp32p4" - temporary: true - reason: the runners do not support the pins for touch sensor depends_components: - esp_driver_touch_sens From 6960c747b5d6c0e93b544aef0262c72284c7295a Mon Sep 17 00:00:00 2001 From: morris Date: Sun, 16 Jun 2024 14:09:04 +0800 Subject: [PATCH 102/113] feat(rmt): set DMA transfer burst size default burst size was set to 32 bytes --- components/driver/deprecated/rmt_legacy.c | 4 +- components/esp_driver_rmt/src/rmt_private.h | 4 +- components/esp_driver_rmt/src/rmt_rx.c | 84 ++++++++++------- components/esp_driver_rmt/src/rmt_tx.c | 93 ++++++++++--------- .../test_apps/rmt/main/test_rmt_rx.c | 4 + 5 files changed, 104 insertions(+), 85 deletions(-) diff --git a/components/driver/deprecated/rmt_legacy.c b/components/driver/deprecated/rmt_legacy.c index 36f757a2f2c..6d28bb11938 100644 --- a/components/driver/deprecated/rmt_legacy.c +++ b/components/driver/deprecated/rmt_legacy.c @@ -139,11 +139,11 @@ static void rmt_module_enable(void) { RMT_ENTER_CRITICAL(); if (rmt_contex.rmt_module_enabled == false) { - rmt_ll_mem_power_by_pmu(rmt_contex.hal.regs); RMT_RCC_ATOMIC() { rmt_ll_enable_bus_clock(0, true); rmt_ll_reset_register(0); } + rmt_ll_mem_power_by_pmu(rmt_contex.hal.regs); rmt_contex.rmt_module_enabled = true; } RMT_EXIT_CRITICAL(); @@ -154,10 +154,10 @@ static void rmt_module_disable(void) { RMT_ENTER_CRITICAL(); if (rmt_contex.rmt_module_enabled == true) { + rmt_ll_mem_force_power_off(rmt_contex.hal.regs); RMT_RCC_ATOMIC() { rmt_ll_enable_bus_clock(0, false); } - rmt_ll_mem_force_power_off(rmt_contex.hal.regs); rmt_contex.rmt_module_enabled = false; } RMT_EXIT_CRITICAL(); diff --git a/components/esp_driver_rmt/src/rmt_private.h b/components/esp_driver_rmt/src/rmt_private.h index f61082ee8ee..017ed9d9ab6 100644 --- a/components/esp_driver_rmt/src/rmt_private.h +++ b/components/esp_driver_rmt/src/rmt_private.h @@ -53,9 +53,6 @@ extern "C" { #define RMT_ALLOW_INTR_PRIORITY_MASK ESP_INTR_FLAG_LOWMED -// DMA buffer size must align to `rmt_symbol_word_t` -#define RMT_DMA_DESC_BUF_MAX_SIZE (DMA_DESCRIPTOR_BUFFER_MAX_SIZE & ~(sizeof(rmt_symbol_word_t) - 1)) - #define RMT_DMA_NODES_PING_PONG 2 // two nodes ping-pong #define RMT_PM_LOCK_NAME_LEN_MAX 16 #define RMT_GROUP_INTR_PRIORITY_UNINITIALIZED (-1) @@ -205,6 +202,7 @@ struct rmt_rx_channel_t { void *user_data; // user context rmt_rx_trans_desc_t trans_desc; // transaction description size_t num_dma_nodes; // number of DMA nodes, determined by how big the memory block that user configures + size_t dma_int_mem_alignment; // DMA buffer alignment (both in size and address) for internal RX memory rmt_dma_descriptor_t *dma_nodes; // DMA link nodes rmt_dma_descriptor_t *dma_nodes_nc; // DMA descriptor nodes accessed in non-cached way }; diff --git a/components/esp_driver_rmt/src/rmt_rx.c b/components/esp_driver_rmt/src/rmt_rx.c index a7da1a288f2..8c1cdb087ba 100644 --- a/components/esp_driver_rmt/src/rmt_rx.c +++ b/components/esp_driver_rmt/src/rmt_rx.c @@ -59,12 +59,13 @@ static esp_err_t rmt_rx_init_dma_link(rmt_rx_channel_t *rx_channel, const rmt_rx .direction = GDMA_CHANNEL_DIRECTION_RX, }; ESP_RETURN_ON_ERROR(gdma_new_ahb_channel(&dma_chan_config, &rx_channel->base.dma_chan), TAG, "allocate RX DMA channel failed"); - - // circular DMA descriptor - for (int i = 0; i < rx_channel->num_dma_nodes; i++) { - rx_channel->dma_nodes_nc[i].next = &rx_channel->dma_nodes[i + 1]; - } - rx_channel->dma_nodes_nc[rx_channel->num_dma_nodes - 1].next = &rx_channel->dma_nodes[0]; + gdma_transfer_config_t transfer_cfg = { + .access_ext_mem = false, // [IDF-8997]: PSRAM is not supported yet + .max_data_burst_size = 32, + }; + ESP_RETURN_ON_ERROR(gdma_config_transfer(rx_channel->base.dma_chan, &transfer_cfg), TAG, "config DMA transfer failed"); + // get the alignment requirement from DMA + gdma_get_alignment_constraints(rx_channel->base.dma_chan, &rx_channel->dma_int_mem_alignment, NULL); // register event callbacks gdma_rx_event_callbacks_t cbs = { @@ -72,6 +73,12 @@ static esp_err_t rmt_rx_init_dma_link(rmt_rx_channel_t *rx_channel, const rmt_rx }; // register the DMA callbacks may fail if the interrupt service can not be installed successfully ESP_RETURN_ON_ERROR(gdma_register_rx_event_callbacks(rx_channel->base.dma_chan, &cbs, rx_channel), TAG, "register DMA callbacks failed"); + + // circular DMA descriptor + for (int i = 0; i < rx_channel->num_dma_nodes - 1; i++) { + rx_channel->dma_nodes_nc[i].next = &rx_channel->dma_nodes[i + 1]; + } + rx_channel->dma_nodes_nc[rx_channel->num_dma_nodes - 1].next = &rx_channel->dma_nodes[0]; return ESP_OK; } #endif // SOC_RMT_SUPPORT_DMA @@ -199,32 +206,32 @@ esp_err_t rmt_new_rx_channel(const rmt_rx_channel_config_t *config, rmt_channel_ ESP_GOTO_ON_FALSE(rx_channel, ESP_ERR_NO_MEM, err, TAG, "no mem for rx channel"); // gpio is not configured yet rx_channel->base.gpio_num = -1; + +#if SOC_RMT_SUPPORT_DMA // create DMA descriptor size_t num_dma_nodes = 0; if (config->flags.with_dma) { + // DMA descriptors must be placed in internal SRAM mem_caps |= MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA; - num_dma_nodes = config->mem_block_symbols * sizeof(rmt_symbol_word_t) / RMT_DMA_DESC_BUF_MAX_SIZE + 1; + num_dma_nodes = config->mem_block_symbols * sizeof(rmt_symbol_word_t) / DMA_DESCRIPTOR_BUFFER_MAX_SIZE + 1; num_dma_nodes = MAX(2, num_dma_nodes); // at least 2 DMA nodes for ping-pong - // DMA descriptors must be placed in internal SRAM - uint32_t data_cache_line_size = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA); - // the alignment should meet both the DMA and cache requirement - size_t alignment = MAX(data_cache_line_size, RMT_DMA_DESC_ALIGN); - size_t dma_nodes_size = ALIGN_UP(num_dma_nodes * sizeof(rmt_dma_descriptor_t), alignment); - rmt_dma_descriptor_t *dma_nodes = heap_caps_aligned_calloc(alignment, 1, dma_nodes_size, mem_caps); + rmt_dma_descriptor_t *dma_nodes = heap_caps_aligned_calloc(RMT_DMA_DESC_ALIGN, num_dma_nodes, sizeof(rmt_dma_descriptor_t), mem_caps); ESP_GOTO_ON_FALSE(dma_nodes, ESP_ERR_NO_MEM, err, TAG, "no mem for rx channel DMA nodes"); rx_channel->dma_nodes = dma_nodes; // do memory sync only when the data cache exists + uint32_t data_cache_line_size = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA); if (data_cache_line_size) { - // write back and then invalidate the cached dma_nodes, we will skip the cache (by non-cacheable address) when access the dma_nodes - // even the cache auto-write back happens, there's no risk the dma_nodes will be overwritten - ESP_GOTO_ON_ERROR(esp_cache_msync(dma_nodes, dma_nodes_size, - ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE), + // write back and then invalidate the cached dma_nodes, because later the DMA nodes are accessed by non-cacheable address + ESP_GOTO_ON_ERROR(esp_cache_msync(dma_nodes, num_dma_nodes * sizeof(rmt_dma_descriptor_t), + ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE | ESP_CACHE_MSYNC_FLAG_UNALIGNED), err, TAG, "cache sync failed"); } // we will use the non-cached address to manipulate the DMA descriptor, for simplicity rx_channel->dma_nodes_nc = (rmt_dma_descriptor_t *)RMT_GET_NON_CACHE_ADDR(dma_nodes); } rx_channel->num_dma_nodes = num_dma_nodes; +#endif // SOC_RMT_SUPPORT_DMA + // register the channel to group ESP_GOTO_ON_ERROR(rmt_rx_register_to_group(rx_channel, config), err, TAG, "register channel failed"); rmt_group_t *group = rx_channel->base.group; @@ -377,25 +384,24 @@ esp_err_t rmt_receive(rmt_channel_handle_t channel, void *buffer, size_t buffer_ ESP_RETURN_ON_FALSE_ISR(!config->flags.en_partial_rx, ESP_ERR_NOT_SUPPORTED, TAG, "partial receive not supported"); #endif rmt_rx_channel_t *rx_chan = __containerof(channel, rmt_rx_channel_t, base); - size_t per_dma_block_size = 0; - size_t last_dma_block_size = 0; - uint32_t data_cache_line_size = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA); + size_t mem_alignment = sizeof(rmt_symbol_word_t); +#if SOC_RMT_SUPPORT_DMA if (channel->dma_chan) { - // Currently we assume the user buffer is allocated from internal RAM, PSRAM is not supported yet. - ESP_RETURN_ON_FALSE_ISR(esp_ptr_internal(buffer), ESP_ERR_INVALID_ARG, TAG, "user buffer not allocated from internal RAM"); - // DMA doesn't have alignment requirement for SRAM buffer if the burst mode is not enabled, - // but we need to make sure the buffer is aligned to cache line size - uint32_t align_mask = data_cache_line_size ? (data_cache_line_size - 1) : 0; - ESP_RETURN_ON_FALSE_ISR(((uintptr_t)buffer & align_mask) == 0, ESP_ERR_INVALID_ARG, TAG, "buffer address not aligned"); - ESP_RETURN_ON_FALSE_ISR((buffer_size & align_mask) == 0, ESP_ERR_INVALID_ARG, TAG, "buffer size not aligned"); - ESP_RETURN_ON_FALSE_ISR(buffer_size <= rx_chan->num_dma_nodes * RMT_DMA_DESC_BUF_MAX_SIZE, - ESP_ERR_INVALID_ARG, TAG, "buffer size exceeds DMA capacity"); - per_dma_block_size = buffer_size / rx_chan->num_dma_nodes; - per_dma_block_size = ALIGN_DOWN(per_dma_block_size, sizeof(rmt_symbol_word_t)); - last_dma_block_size = buffer_size - per_dma_block_size * (rx_chan->num_dma_nodes - 1); - ESP_RETURN_ON_FALSE_ISR(last_dma_block_size <= RMT_DMA_DESC_BUF_MAX_SIZE, ESP_ERR_INVALID_ARG, TAG, "buffer size exceeds DMA capacity"); + // append the alignment requirement from the DMA + mem_alignment = MAX(mem_alignment, rx_chan->dma_int_mem_alignment); + // [IDF-8997]: Currently we assume the user buffer is allocated from internal RAM, PSRAM is not supported yet. + ESP_RETURN_ON_FALSE_ISR(esp_ptr_internal(buffer), ESP_ERR_INVALID_ARG, TAG, "user buffer not in the internal RAM"); + size_t max_buf_sz_per_dma_node = ALIGN_DOWN(DMA_DESCRIPTOR_BUFFER_MAX_SIZE, mem_alignment); + ESP_RETURN_ON_FALSE_ISR(buffer_size <= rx_chan->num_dma_nodes * max_buf_sz_per_dma_node, + ESP_ERR_INVALID_ARG, TAG, "buffer size exceeds DMA capacity: %zu", rx_chan->num_dma_nodes * max_buf_sz_per_dma_node); } +#endif // SOC_RMT_SUPPORT_DMA + + // check buffer alignment + uint32_t align_check_mask = mem_alignment - 1; + ESP_RETURN_ON_FALSE_ISR((((uintptr_t)buffer & align_check_mask) == 0) && ((buffer_size & align_check_mask) == 0), ESP_ERR_INVALID_ARG, + TAG, "buffer address or size are not %zu bytes aligned", mem_alignment); rmt_group_t *group = channel->group; rmt_hal_context_t *hal = &group->hal; @@ -421,17 +427,23 @@ esp_err_t rmt_receive(rmt_channel_handle_t channel, void *buffer, size_t buffer_ t->dma_desc_index = 0; t->flags.en_partial_rx = config->flags.en_partial_rx; - if (channel->dma_chan) { #if SOC_RMT_SUPPORT_DMA + if (channel->dma_chan) { // invalidate the user buffer, in case cache auto-write back happens and breaks the data just written by the DMA - if (data_cache_line_size) { + uint32_t int_mem_cache_line_size = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA); + if (int_mem_cache_line_size) { + // this function will also check the alignment of the buffer and size, against the cache line size ESP_RETURN_ON_ERROR_ISR(esp_cache_msync(buffer, buffer_size, ESP_CACHE_MSYNC_FLAG_DIR_M2C), TAG, "cache sync failed"); } + // we will mount the buffer to multiple DMA nodes, in a balanced way + size_t per_dma_block_size = buffer_size / rx_chan->num_dma_nodes; + per_dma_block_size = ALIGN_DOWN(per_dma_block_size, mem_alignment); + size_t last_dma_block_size = buffer_size - per_dma_block_size * (rx_chan->num_dma_nodes - 1); rmt_rx_mount_dma_buffer(rx_chan, buffer, buffer_size, per_dma_block_size, last_dma_block_size); gdma_reset(channel->dma_chan); gdma_start(channel->dma_chan, (intptr_t)rx_chan->dma_nodes); // note, we must use the cached descriptor address to start the DMA -#endif } +#endif rx_chan->mem_off = 0; portENTER_CRITICAL_SAFE(&channel->spinlock); diff --git a/components/esp_driver_rmt/src/rmt_tx.c b/components/esp_driver_rmt/src/rmt_tx.c index ae61213dceb..44efad957bd 100644 --- a/components/esp_driver_rmt/src/rmt_tx.c +++ b/components/esp_driver_rmt/src/rmt_tx.c @@ -50,26 +50,55 @@ static bool rmt_dma_tx_eof_cb(gdma_channel_handle_t dma_chan, gdma_event_data_t static esp_err_t rmt_tx_init_dma_link(rmt_tx_channel_t *tx_channel, const rmt_tx_channel_config_t *config) { - // For simplicity, the encoder will access the dma_mem_base in a non-cached way - // and we allocate the dma_mem_base from the internal SRAM for performance - uint32_t data_cache_line_size = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA); - // the alignment should meet both the DMA and cache requirement - size_t alignment = MAX(data_cache_line_size, sizeof(rmt_symbol_word_t)); - size_t dma_mem_base_size = ALIGN_UP(config->mem_block_symbols * sizeof(rmt_symbol_word_t), alignment); - rmt_symbol_word_t *dma_mem_base = heap_caps_aligned_calloc(alignment, 1, dma_mem_base_size, + gdma_channel_alloc_config_t dma_chan_config = { + .direction = GDMA_CHANNEL_DIRECTION_TX, + }; + ESP_RETURN_ON_ERROR(gdma_new_ahb_channel(&dma_chan_config, &tx_channel->base.dma_chan), TAG, "allocate TX DMA channel failed"); + gdma_strategy_config_t gdma_strategy_conf = { + .auto_update_desc = true, + .owner_check = true, + }; + gdma_apply_strategy(tx_channel->base.dma_chan, &gdma_strategy_conf); + gdma_transfer_config_t transfer_cfg = { + .access_ext_mem = false, // for performance, we don't use external memory as the DMA buffer + .max_data_burst_size = 32, + }; + ESP_RETURN_ON_ERROR(gdma_config_transfer(tx_channel->base.dma_chan, &transfer_cfg), TAG, "config DMA transfer failed"); + gdma_tx_event_callbacks_t cbs = { + .on_trans_eof = rmt_dma_tx_eof_cb, + }; + // register the DMA callbacks may fail if the interrupt service can not be installed successfully + ESP_RETURN_ON_ERROR(gdma_register_tx_event_callbacks(tx_channel->base.dma_chan, &cbs, tx_channel), TAG, "register DMA callbacks failed"); + + size_t int_alignment = 0; + // get the alignment requirement from DMA + gdma_get_alignment_constraints(tx_channel->base.dma_chan, &int_alignment, NULL); + // apply RMT hardware alignment requirement + int_alignment = MAX(int_alignment, sizeof(rmt_symbol_word_t)); + // the memory returned by `heap_caps_aligned_calloc` also meets the cache alignment requirement (both address and size) + rmt_symbol_word_t *dma_mem_base = heap_caps_aligned_calloc(int_alignment, sizeof(rmt_symbol_word_t), config->mem_block_symbols, RMT_MEM_ALLOC_CAPS | MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL); ESP_RETURN_ON_FALSE(dma_mem_base, ESP_ERR_NO_MEM, TAG, "no mem for tx DMA buffer"); tx_channel->dma_mem_base = dma_mem_base; - // do memory sync only when the data cache exists + uint32_t data_cache_line_size = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA); + // do memory sync if the dma buffer is cached if (data_cache_line_size) { - // write back and then invalidate the cache, we will skip the cache (by non-cacheable address) when access the dma_mem_base - // even the cache auto-write back happens, there's no risk the dma_mem_base will be overwritten - ESP_RETURN_ON_ERROR(esp_cache_msync(dma_mem_base, dma_mem_base_size, - ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE), + // write back and then invalidate the cache, because later RMT encoder accesses the dma_mem_base by non-cacheable address + ESP_RETURN_ON_ERROR(esp_cache_msync(dma_mem_base, sizeof(rmt_symbol_word_t) * config->mem_block_symbols, + ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED | ESP_CACHE_MSYNC_FLAG_INVALIDATE), TAG, "cache sync failed"); } - // we use the non-cached address to manipulate this DMA buffer + // For simplicity, encoder will use the non-cached address to read/write the DMA buffer tx_channel->dma_mem_base_nc = (rmt_symbol_word_t *)RMT_GET_NON_CACHE_ADDR(dma_mem_base); + // the DMA buffer size should be aligned to the DMA requirement + size_t mount_size_per_node = ALIGN_DOWN(config->mem_block_symbols * sizeof(rmt_symbol_word_t) / RMT_DMA_NODES_PING_PONG, int_alignment); + // check the upper and lower bound of mount_size_per_node + ESP_RETURN_ON_FALSE(mount_size_per_node >= sizeof(rmt_symbol_word_t), ESP_ERR_INVALID_ARG, + TAG, "mem_block_symbols is too small"); + ESP_RETURN_ON_FALSE(mount_size_per_node <= DMA_DESCRIPTOR_BUFFER_MAX_SIZE, ESP_ERR_INVALID_ARG, + TAG, "mem_block_symbols can't exceed %zu", DMA_DESCRIPTOR_BUFFER_MAX_SIZE * RMT_DMA_NODES_PING_PONG / sizeof(rmt_symbol_word_t)); + + tx_channel->ping_pong_symbols = mount_size_per_node / sizeof(rmt_symbol_word_t); for (int i = 0; i < RMT_DMA_NODES_PING_PONG; i++) { // each descriptor shares half of the DMA buffer tx_channel->dma_nodes_nc[i].buffer = dma_mem_base + tx_channel->ping_pong_symbols * i; @@ -80,20 +109,6 @@ static esp_err_t rmt_tx_init_dma_link(rmt_tx_channel_t *tx_channel, const rmt_tx tx_channel->dma_nodes_nc[i].dw0.suc_eof = 1; } - gdma_channel_alloc_config_t dma_chan_config = { - .direction = GDMA_CHANNEL_DIRECTION_TX, - }; - ESP_RETURN_ON_ERROR(gdma_new_ahb_channel(&dma_chan_config, &tx_channel->base.dma_chan), TAG, "allocate TX DMA channel failed"); - gdma_strategy_config_t gdma_strategy_conf = { - .auto_update_desc = true, - .owner_check = true, - }; - gdma_apply_strategy(tx_channel->base.dma_chan, &gdma_strategy_conf); - gdma_tx_event_callbacks_t cbs = { - .on_trans_eof = rmt_dma_tx_eof_cb, - }; - // register the DMA callbacks may fail if the interrupt service can not be installed successfully - ESP_RETURN_ON_ERROR(gdma_register_tx_event_callbacks(tx_channel->base.dma_chan, &cbs, tx_channel), TAG, "register DMA callbacks failed"); return ESP_OK; } #endif // SOC_RMT_SUPPORT_DMA @@ -110,7 +125,6 @@ static esp_err_t rmt_tx_register_to_group(rmt_tx_channel_t *tx_channel, const rm mem_block_num = 1; // Only the last channel has the DMA capability channel_scan_start = RMT_TX_CHANNEL_OFFSET_IN_GROUP + SOC_RMT_TX_CANDIDATES_PER_GROUP - 1; - tx_channel->ping_pong_symbols = config->mem_block_symbols / 2; } else { // one channel can occupy multiple memory blocks mem_block_num = config->mem_block_symbols / SOC_RMT_MEM_WORDS_PER_CHANNEL; @@ -247,13 +261,7 @@ esp_err_t rmt_new_tx_channel(const rmt_tx_channel_config_t *config, rmt_channel_ ESP_RETURN_ON_FALSE(GPIO_IS_VALID_OUTPUT_GPIO(config->gpio_num), ESP_ERR_INVALID_ARG, TAG, "invalid GPIO number %d", config->gpio_num); ESP_RETURN_ON_FALSE((config->mem_block_symbols & 0x01) == 0 && config->mem_block_symbols >= SOC_RMT_MEM_WORDS_PER_CHANNEL, ESP_ERR_INVALID_ARG, TAG, "mem_block_symbols must be even and at least %d", SOC_RMT_MEM_WORDS_PER_CHANNEL); - -#if SOC_RMT_SUPPORT_DMA - // we only support 2 nodes ping-pong, if the configured memory block size needs more than two DMA descriptors, should treat it as invalid - ESP_RETURN_ON_FALSE(config->mem_block_symbols <= RMT_DMA_DESC_BUF_MAX_SIZE * RMT_DMA_NODES_PING_PONG / sizeof(rmt_symbol_word_t), - ESP_ERR_INVALID_ARG, TAG, "mem_block_symbols can't exceed %d", - RMT_DMA_DESC_BUF_MAX_SIZE * RMT_DMA_NODES_PING_PONG / sizeof(rmt_symbol_word_t)); -#else +#if !SOC_RMT_SUPPORT_DMA ESP_RETURN_ON_FALSE(config->flags.with_dma == 0, ESP_ERR_NOT_SUPPORTED, TAG, "DMA not supported"); #endif @@ -269,19 +277,16 @@ esp_err_t rmt_new_tx_channel(const rmt_tx_channel_config_t *config, rmt_channel_ tx_channel->base.gpio_num = -1; // create DMA descriptors if (config->flags.with_dma) { - mem_caps |= MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA; // DMA descriptors must be placed in internal SRAM - uint32_t data_cache_line_size = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA); - // the alignment should meet both the DMA and cache requirement - size_t alignment = MAX(data_cache_line_size, RMT_DMA_DESC_ALIGN); - size_t dma_nodes_mem_size = ALIGN_UP(RMT_DMA_NODES_PING_PONG * sizeof(rmt_dma_descriptor_t), alignment); - rmt_dma_descriptor_t *dma_nodes = heap_caps_aligned_calloc(alignment, 1, dma_nodes_mem_size, mem_caps); + mem_caps |= MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA; + rmt_dma_descriptor_t *dma_nodes = heap_caps_aligned_calloc(RMT_DMA_DESC_ALIGN, RMT_DMA_NODES_PING_PONG, sizeof(rmt_dma_descriptor_t), mem_caps); ESP_GOTO_ON_FALSE(dma_nodes, ESP_ERR_NO_MEM, err, TAG, "no mem for tx DMA nodes"); tx_channel->dma_nodes = dma_nodes; - // write back and then invalidate the cached dma_nodes, we will skip the cache (by non-cacheable address) when access the dma_nodes + // write back and then invalidate the cached dma_nodes, because later the DMA nodes are accessed by non-cacheable address + uint32_t data_cache_line_size = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA); if (data_cache_line_size) { - ESP_GOTO_ON_ERROR(esp_cache_msync(dma_nodes, dma_nodes_mem_size, - ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE), + ESP_GOTO_ON_ERROR(esp_cache_msync(dma_nodes, RMT_DMA_NODES_PING_PONG * sizeof(rmt_dma_descriptor_t), + ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_INVALIDATE | ESP_CACHE_MSYNC_FLAG_UNALIGNED), err, TAG, "cache sync failed"); } // we will use the non-cached address to manipulate the DMA descriptor, for simplicity diff --git a/components/esp_driver_rmt/test_apps/rmt/main/test_rmt_rx.c b/components/esp_driver_rmt/test_apps/rmt/main/test_rmt_rx.c index b418b39ca18..c88c6a24b69 100644 --- a/components/esp_driver_rmt/test_apps/rmt/main/test_rmt_rx.c +++ b/components/esp_driver_rmt/test_apps/rmt/main/test_rmt_rx.c @@ -181,6 +181,10 @@ static void test_rmt_rx_nec_carrier(size_t mem_block_symbols, bool with_dma, rmt TEST_ASSERT_EQUAL(34, test_user_data.received_symbol_num); TEST_ESP_OK(rmt_tx_wait_all_done(tx_channel, -1)); + + // test rmt receive with unaligned buffer + TEST_ESP_ERR(ESP_ERR_INVALID_ARG, rmt_receive(rx_channel, remote_codes, 13, &receive_config)); + printf("disable tx and rx channels\r\n"); TEST_ESP_OK(rmt_disable(tx_channel)); TEST_ESP_OK(rmt_disable(rx_channel)); From 002c10d97b516a930e43e819ac3005e457014e93 Mon Sep 17 00:00:00 2001 From: zhangshuxian Date: Wed, 8 May 2024 16:52:50 +0800 Subject: [PATCH 103/113] docs: Provide translationfor low power --- docs/conf_common.py | 3 +- docs/en/api-guides/index.rst | 2 +- docs/en/api-guides/low-power-mode.rst | 7 - docs/en/api-guides/low-power-mode/index.rst | 15 + .../low-power-mode/low-power-mode-soc.rst | 495 ++++++++ .../low-power-mode/low-power-mode-wifi.rst | 417 +++++++ .../sleep-current/esp32_light_sleep.inc | 28 +- .../sleep-current/esp32_modem_sleep.inc | 53 +- .../sleep-current/esp32_summary.inc | 70 +- .../sleep-current/esp32c2_light_sleep.inc | 28 +- .../sleep-current/esp32c2_modem_sleep.inc | 53 +- .../sleep-current/esp32c2_summary.inc | 70 +- .../sleep-current/esp32c3_light_sleep.inc | 28 +- .../sleep-current/esp32c3_modem_sleep.inc | 53 +- .../sleep-current/esp32c3_summary.inc | 70 +- .../sleep-current/esp32c6_light_sleep.inc | 28 +- .../sleep-current/esp32c6_modem_sleep.inc | 53 +- .../sleep-current/esp32c6_summary.inc | 70 +- .../sleep-current/esp32s2_light_sleep.inc | 28 +- .../sleep-current/esp32s2_modem_sleep.inc | 53 +- .../sleep-current/esp32s2_summary.inc | 70 +- .../sleep-current/esp32s3_light_sleep.inc | 28 +- .../sleep-current/esp32s3_modem_sleep.inc | 53 +- .../sleep-current/esp32s3_summary.inc | 70 +- docs/en/api-guides/wifi.rst | 2 +- docs/zh_CN/api-guides/index.rst | 2 +- docs/zh_CN/api-guides/low-power-mode.rst | 1035 ----------------- .../zh_CN/api-guides/low-power-mode/index.rst | 15 + .../low-power-mode/low-power-mode-soc.rst | 495 ++++++++ .../low-power-mode/low-power-mode-wifi.rst | 417 +++++++ .../sleep-current/esp32_light_sleep.inc | 8 +- .../sleep-current/esp32_modem_sleep.inc | 8 +- .../sleep-current/esp32_summary.inc | 8 +- .../sleep-current/esp32c2_light_sleep.inc | 8 +- .../sleep-current/esp32c2_modem_sleep.inc | 8 +- .../sleep-current/esp32c2_summary.inc | 8 +- .../sleep-current/esp32c3_light_sleep.inc | 8 +- .../sleep-current/esp32c3_modem_sleep.inc | 8 +- .../sleep-current/esp32c3_summary.inc | 8 +- .../sleep-current/esp32c6_light_sleep.inc | 8 +- .../sleep-current/esp32c6_modem_sleep.inc | 8 +- .../sleep-current/esp32c6_summary.inc | 8 +- .../sleep-current/esp32s2_light_sleep.inc | 8 +- .../sleep-current/esp32s2_modem_sleep.inc | 8 +- .../sleep-current/esp32s2_summary.inc | 8 +- .../sleep-current/esp32s3_light_sleep.inc | 8 +- .../sleep-current/esp32s3_modem_sleep.inc | 8 +- .../sleep-current/esp32s3_summary.inc | 8 +- docs/zh_CN/api-guides/wifi.rst | 2 +- 49 files changed, 2820 insertions(+), 1137 deletions(-) delete mode 100644 docs/en/api-guides/low-power-mode.rst create mode 100644 docs/en/api-guides/low-power-mode/index.rst create mode 100644 docs/en/api-guides/low-power-mode/low-power-mode-soc.rst create mode 100644 docs/en/api-guides/low-power-mode/low-power-mode-wifi.rst delete mode 100644 docs/zh_CN/api-guides/low-power-mode.rst create mode 100644 docs/zh_CN/api-guides/low-power-mode/index.rst create mode 100644 docs/zh_CN/api-guides/low-power-mode/low-power-mode-soc.rst create mode 100644 docs/zh_CN/api-guides/low-power-mode/low-power-mode-wifi.rst diff --git a/docs/conf_common.py b/docs/conf_common.py index fc29c450289..0b1d0f80af4 100644 --- a/docs/conf_common.py +++ b/docs/conf_common.py @@ -56,7 +56,8 @@ BLUFI_DOCS = ['api-guides/blufi.rst', 'api-reference/bluetooth/esp_blufi.rst'] -WIFI_DOCS = ['api-guides/wifi.rst', +WIFI_DOCS = ['api-guides/low-power-mode/low-power-mode-wifi.rst', + 'api-guides/wifi.rst', 'api-guides/wifi-security.rst', 'api-guides/wireshark-user-guide.rst', 'api-reference/network/esp_now.rst', diff --git a/docs/en/api-guides/index.rst b/docs/en/api-guides/index.rst index ffc491c00d9..9e11d6e4f9b 100644 --- a/docs/en/api-guides/index.rst +++ b/docs/en/api-guides/index.rst @@ -29,6 +29,7 @@ API Guides :CONFIG_IDF_TARGET_ARCH_XTENSA: hlinterrupts jtag-debugging/index linker-script-generation + low-power-mode/index lwip memory-types openthread @@ -45,5 +46,4 @@ API Guides :SOC_USB_SERIAL_JTAG_SUPPORTED: usb-serial-jtag-console :SOC_WIFI_SUPPORTED: wifi :SOC_WIFI_SUPPORTED: wifi-security - low-power-mode :SOC_WIFI_SUPPORTED or SOC_BT_SUPPORTED or SOC_IEEE802154_SUPPORTED: phy diff --git a/docs/en/api-guides/low-power-mode.rst b/docs/en/api-guides/low-power-mode.rst deleted file mode 100644 index 607055ea82d..00000000000 --- a/docs/en/api-guides/low-power-mode.rst +++ /dev/null @@ -1,7 +0,0 @@ -Low Power Mode User Guide -========================== - - -:link_to_translation:`zh_CN:[中文]` - -The document has not been translated into English yet. In the meantime, please refer to the Chinese version. diff --git a/docs/en/api-guides/low-power-mode/index.rst b/docs/en/api-guides/low-power-mode/index.rst new file mode 100644 index 00000000000..c8d4734efb1 --- /dev/null +++ b/docs/en/api-guides/low-power-mode/index.rst @@ -0,0 +1,15 @@ +Low Power Modes +=================== + +:link_to_translation:`zh_CN:[中文]` + +Overview +---------- + +The standby power consumption plays an important role in embedded IoT application scenarios. This guide aims to introduce the basic principles of low power consumption of the {IDF_TARGET_NAME} and the low power modes supported by the {IDF_TARGET_NAME}. Besides, it also covers recommended configurations, configuration steps, and power consumption performance of each mode to help users quickly configure the appropriate low power mode according to the needs at hand. + +.. toctree:: + :maxdepth: 2 + + low-power-mode-soc + :SOC_WIFI_SUPPORTED: low-power-mode-wifi diff --git a/docs/en/api-guides/low-power-mode/low-power-mode-soc.rst b/docs/en/api-guides/low-power-mode/low-power-mode-soc.rst new file mode 100644 index 00000000000..460a5c7bf5c --- /dev/null +++ b/docs/en/api-guides/low-power-mode/low-power-mode-soc.rst @@ -0,0 +1,495 @@ +Introduction to Low Power Mode for Systemic Power Management +============================================================== + +:link_to_translation:`zh_CN:[中文]` + +The {IDF_TARGET_NAME} supports various low power modes. From a systemic perspective on power management, the typical modes include DFS, Light-sleep mode, and Deep-sleep mode. These modes reduce power consumption by lowering clock frequencies (DFS) or entering sleep states without affecting system functionality. During sleep, unnecessary power domains are shut down, or clock gating is applied to peripherals not in use. Sleep modes are further classified into Light-sleep mode and Deep-sleep mode based on whether powering down domains would disrupt program execution context. + +.. only:: SOC_WIFI_SUPPORTED or SOC_BLE_SUPPORTED + + Furthermore, for common use cases of the {IDF_TARGET_NAME} such as Wi-Fi/Bluetooth operation, ESP-IDF segment the modes above and optimize them specifically, which will be introduced in subsequent sections. + +This section will first introduce low power modes from a systemic perspective, without considering specific use cases. + +DFS +------ + +Dynamic Frequency Scaling (DFS) is a fundamental feature of the power management mechanism integrated into ESP-IDF. DFS adjusts the Advanced Peripheral Bus (APB) frequency and CPU frequency based on the application's holding of power locks. When holding a high-performance lock, it utilizes high frequency, while in idle states without holding power locks, it switches to low frequency to reduce power consumption, thereby minimizing the power consumption of running applications as much as possible. + +The frequency adjustment mechanism of DFS operates based on the maximum frequency demand dictated by held power locks. Additionally, the values of :ref:`CONFIG_FREERTOS_HZ` also influence the frequency adjustments of DFS. Higher values lead to a higher frequency of task scheduling, then the system can also more quickly re-adjust the clock frequencies according to the system requirements. For further details regarding the frequency adjustment mechanism, please refer to :doc:`Power Management <../../api-reference/system/power_management>`. + +The following graph illustrates the ideal current situation during the operation of the DFS mechanism. + +.. code-block:: text + + Hold CPU and APB MAX lock + │ + │ Release CPU MAX lock + ▲ │ / + Current  │ ▼ / + │ ──────────┐ Release APB MAX lock + │ │ / + │ │ / + │ └─────────┐ + │ ▲ │ + │ │ │ + │ m-th tick │ └─────────── + │ ▲ + │ │ + │ n-th tick │ + └──────────────────────────────────────► + Time + Ideal DFS Mechanism Frequency Adjustment Current Graph + +DFS is suitable for scenarios where the CPU must remain active but low power consumption is required. Therefore, DFS is often activated with other low power modes, as will be detailed in the following sections. + +.. _Light-sleep Mode: + +Light-sleep Mode +--------------------- + +Light-sleep mode is a low power mode preset in the {IDF_TARGET_NAME}. Users can switch to Light-sleep mode by calling :cpp:func:`esp_light_sleep_start` interface. Upon entering sleep, the chip will shut down unnecessary power domains and apply clock gating to modules not in use, based on the current operational states of peripherals. The {IDF_TARGET_NAME} supports various wake-up sources. Please refer to :doc:`Sleep Modes <../../api-reference/system/sleep_modes>` for more information. When the chip wakes up from Light-sleep mode, the CPU continues running from the context it was in before entering sleep, and the operational states of peripherals remain unaffected. To effectively reduce chip power consumption under Light-sleep mode, it is highly recommended that users utilize Auto Light-sleep mode described below. + +Auto Light-sleep mode is a low power mode provided by ESP-IDF :doc:`Power Management <../../api-reference/system/power_management>` component that leverages FreeRTOS's Tickless IDLE feature. When the application releases all power locks and all FreeRTOS tasks are in a blocked or suspended state, the system automatically calculates the next time point when an event will wake the operating system. If this calculated time point exceeds a set duration (:ref:`CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP`), the ``esp_pm`` component automatically configures the timer wake-up source and enters light sleep to reduce power consumption. To enable this mode, users need to set the ``light_sleep_enable`` field to true in :cpp:type:`esp_pm_config_t` when configuring DFS. For more details, please refer to `DFS Configuration`_. + +.. code-block:: text + + ┌────────┐ + │ │ + │ DFS │ + │ │ + └───┬────┘ + │ + ▼ + ┌──────────┐ when idle ┌──────────┐ exceed set time ┌──────────┐ + │ │ ─────────────► │ │ ────────────► │ │ + │ │ │ │ │ auto │ + │ active │ │ IDLE │ │ light │ + │ │ │ │ │ sleep │ + │ │ ◄───────────── │ │ │ │ + └──────────┘ not idle └──────────┘ └──────┬───┘ + ▲ │ + │ configure wake-up source │ + └───────────────────────────────────────────────────────────────┘ + + Auto Light-sleep Mode Workflow + +Based on the workflow of Auto Light-sleep mode, its ideal current graph can be obtained, with key nodes marked on the chart. + +.. code-block:: text + + ▲ DFS frequency reduced + Current | │ exceed set idle time + | ▼ / light sleep + | ┌──┐ / ┌──┐ + | │ └──┐ │ └──┐ + | | | | | + | │ │ │ │ + | ───┘ └────────┘ └──── + │ \ + │ wake-up source wakes up + └───────────────────────────────► + Time + Ideal Current Graph of Auto Light-sleep Mode + +.. note:: + + - To better illustrate the main changes of Auto Light-sleep mode, the DFS frequency reduction process is omitted from the graph above. + + - Auto Light-sleep mode is suitable for scenarios where real-time response to external demands is not required. + + - Auto Light-sleep mode operates based on timer wake-up sources. Therefore, users should not manually configure timer wake-up sources in their application. + + +.. _Deep-sleep Mode: + +Deep-sleep Mode +----------------- + +Deep-sleep mode is designed to achieve better power performance by retaining only RTC/LP memory and peripherals during sleep, while all other modules are shut down. Similar to Light-sleep mode, Deep-sleep mode is entered through API calls and requires configuration of wake-up sources for awakening. Users can switch to Deep-sleep mode by calling :cpp:func:`esp_deep_sleep_start` interface. + +Deep-sleep mode requires the configuration of wake-up sources. The {IDF_TARGET_NAME} supports multiple wake-up sources. For a complete list of wake-up sources, please refer to :doc:`Sleep Modes <../../api-reference/system/sleep_modes>`. These wake-up sources can also be combined so that any wake-up source can trigger the awakening. If no wake-up source is configured when entering deep sleep, the chip will remain in sleep state until an external reset occurs. Unlike Light-sleep mode, Deep-sleep mode upon awakening will lose the CPU's running context before, so the bootloader needs to be run again to enter the user program. + +The workflow of Deep-sleep mode is shown as below: + +.. code-block:: text + + ┌───────┐ call API ┌───────┐ + │ ├───────────►│ deep │ + │active │ │ sleep │ + │ │ │ │ + └───────┘ └───┬───┘ + ▲ │ + └────────────────────┘ + wake-up source wakes up + Deep-sleep Mode Workflow + +The primary application scenario of Deep-sleep mode determines that the system will awaken only after a long period and will return to deep sleep state after completing its task. The ideal current graph is as follows. + +.. code-block:: text + + ▲ + Current | + | call API + | │ + | ▼ + | ┌────┐ + | │ │ + | wake-up source| | + | wakes up \ | | + | \ │ │ + │ ──────────┘ └──────────────── + │ + └──────────────────────────────────────────► + Time + Ideal Current Graph of Deep-sleep Mode + +Deep-sleep mode can be utilized in low power sensor applications or situations where data transmission is not required for most of the time, commonly referred to as standby mode. + + +.. only:: ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB + + Devices can wake up periodically from deep sleep to measure and upload data, and then return to deep sleep. Alternatively, it can store multiple data sets in RTC memory and transmit them all at once upon the next wake-up. This feature can be implemented using the deep-sleep-stub functionality. For details, please refer to :doc:`Deep-sleep Wake Stubs <../../api-guides/deep-sleep-stub>`. + +Low Power Mode Configuration on Pure System +---------------------------------------------- + +After introducing low power modes from a systemic perspective, this section will present common configuration options, recommended configuration options for each mode, and configurations steps. + +Common Configuration Options +------------------------------------ + +.. note:: + + The configuration options below are briefly introduced. For more detailed information, please click the link behind each option. + +.. only:: esp32 or esp32s3 + + - single/dual core operation mode (:ref:`CONFIG_FREERTOS_UNICORE`) + For multi-core chips, the single core operation mode can be selected. + + + - RTOS Tick rate (Hz) (:ref:`CONFIG_FREERTOS_HZ`) + This parameter denotes the frequency of the system's periodic task scheduling. + + +DFS Configuration +------------------------ + +DFS offers the following configurable options: + +- ``max_freq_mhz`` + This parameter denotes the maximum CPU frequency (MHz), i.e., the frequency at which the CPU operates at its highest performance level. It is typically set to the maximum value specified by the chip parameters. + +- ``min_freq_mhz`` + This parameter denotes the minimum CPU frequency (MHz), i.e., the CPU's operating frequency when the system is in an idle state. This field can be set to the crystal oscillator (XTAL) frequency value or the XTAL frequency value divided by an integer. + +- ``light_sleep_enable`` + Enabling this option allows the system to automatically enter the light sleep during idle periods, i.e., enabling Auto Light-sleep mode, as detailed earlier. + +Specific configuration steps are as follows: + +1. Enable :ref:`CONFIG_PM_ENABLE` +2. Configure ``max_freq_mhz`` and ``min_freq_mhz`` as follows: + + :: + + esp_pm_config_t pm_config = { + .max_freq_mhz = CONFIG_EXAMPLE_MAX_CPU_FREQ_MHZ, + .min_freq_mhz = CONFIG_EXAMPLE_MIN_CPU_FREQ_MHZ, + .light_sleep_enable = false + }; + ESP_ERROR_CHECK(esp_pm_configure(&pm_config)); + +Recommended Configuration +++++++++++++++++++++++++++++ + +.. list-table:: + :header-rows: 1 + :widths: 40 20 + + * - Configuration Name + - Configuration Status + + * - Enable power management component (:ref:`CONFIG_PM_ENABLE`) + - ON + + * - RTOS Tick rate (Hz) (:ref:`CONFIG_FREERTOS_HZ`) + - 1000 + + * - ``max_freq_mhz`` + - 160 + + * - ``min_freq_mhz`` + - 40 + + * - ``light_sleep_enable`` + - false + +.. note:: + Configurations not mentioned in the above table are set to default. + + +Light-sleep Mode Configuration +--------------------------------- + +This section introduces the recommended configuration and configuration steps for Auto Light-sleep mode. + +.. note:: + + The configuration options below are briefly introduced. For more detailed information, please click the link behind each option. + +- Minimum IDLE Tick count before entering sleep state (:ref:`CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP`) +- Put light sleep related codes in IRAM (:ref:`CONFIG_PM_SLP_IRAM_OPT`) +- Put RTOS IDLE related codes in IRAM (:ref:`CONFIG_PM_RTOS_IDLE_OPT`) +- RTC slow clock source (:ref:`CONFIG_RTC_CLK_SRC`) + + .. list-table:: + :header-rows: 1 + :widths: 40 40 20 + + * - Clock Source + - Timer Accuracy + - Frequency Offset + + * - RTC_CLK_SRC_INT_RC + - High + - Large + + * - RTC_CLK_SRC_EXT_CRYS + - Low + - Small + +- Disable all GPIO when chip at sleep (:ref:`CONFIG_PM_SLP_DISABLE_GPIO`) + +.. only:: SOC_PM_SUPPORT_MAC_BB_PD + + - Power down MAC and baseband (:ref:`CONFIG_ESP_PHY_MAC_BB_PD`) + + +.. only:: SOC_PM_SUPPORT_CPU_PD + + - Power down CPU (:ref:`CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP`) + + +.. only:: SOC_PM_SUPPORT_TAGMEM_PD + + - Power down I/D-cache tag memory (:ref:`CONFIG_PM_RESTORE_CACHE_TAGMEM_AFTER_LIGHT_SLEEP`) + + +.. only:: SOC_PM_SUPPORT_VDDSDIO_PD + + - Power down flash in light sleep (:ref:`CONFIG_ESP_SLEEP_POWER_DOWN_FLASH`) + + .. only:: SOC_SPIRAM_SUPPORTED + + Due to the shared power pins between flash and PSRAM, cutting power to PSRAM would result in data loss. Therefore, to ensure light sleep does not disrupt program execution, enabling this option requires that the system does not utilize PSRAM. + + +Configuration Steps: + +1. Configure wake-up sources (refer to :doc:`Sleep Modes <../../api-reference/system/sleep_modes>` for details) +2. Enable :ref:`CONFIG_PM_ENABLE` +3. Enable :ref:`CONFIG_FREERTOS_USE_TICKLESS_IDLE` +4. Configure DFS parameters +5. ``light_sleep_enable`` = true, detailed as follows: + + :: + + esp_pm_config_t pm_config = { + .max_freq_mhz = CONFIG_EXAMPLE_MAX_CPU_FREQ_MHZ, + .min_freq_mhz = CONFIG_EXAMPLE_MIN_CPU_FREQ_MHZ, + #if CONFIG_FREERTOS_USE_TICKLESS_IDLE + .light_sleep_enable = true + #endif + }; + ESP_ERROR_CHECK(esp_pm_configure(&pm_config)); + +6. Additional relevant parameters for configuration introduction + +Recommended Configuration ++++++++++++++++++++++++++++++ + +.. only:: esp32c3 or esp32s3 + + .. list-table:: + :header-rows: 1 + :widths: 30 15 + + * - Configuration Name + - Configuration Status + + * - Enable power management component (:ref:`CONFIG_PM_ENABLE`) + - ON + + * - Enable RTOS Tickless IDLE mode (:ref:`CONFIG_FREERTOS_USE_TICKLESS_IDLE`) + - ON + + * - RTOS Tick rate (Hz) (:ref:`CONFIG_FREERTOS_HZ`) + - 1000 + + * - Minimum IDLE Tick count before entering sleep mode (:ref:`CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP`) + - 3 + + * - Put light sleep related codes in IRAM (:ref:`CONFIG_PM_SLP_IRAM_OPT`) + - OFF + + * - Put RTOS IDLE related codes in IRAM (:ref:`CONFIG_PM_RTOS_IDLE_OPT`) + - OFF + + * - RTC slow clock source (:ref:`CONFIG_RTC_CLK_SRC`) + - Internal 150 kHz OSC + + * - Disable all GPIO when chip at sleep (:ref:`CONFIG_PM_SLP_DISABLE_GPIO`) + - ON + + * - Power down MAC and baseband (:ref:`CONFIG_ESP_PHY_MAC_BB_PD`) + - ON + + * - Power down CPU (:ref:`CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP`) + - ON + +.. only:: SOC_PM_SUPPORT_TAGMEM_PD + + * - Power down I/D-cache tag memory (:ref:`CONFIG_PM_RESTORE_CACHE_TAGMEM_AFTER_LIGHT_SLEEP`) + - ON + + + * - Power down flash in light sleep (:ref:`CONFIG_ESP_SLEEP_POWER_DOWN_FLASH`) + - OFF + + * - ``max_freq_mhz`` + - 160 + + * - ``min_freq_mhz`` + - 40 + + * - ``light_sleep_enable`` + - true + + .. note:: + Configurations not mentioned in the above table are set to default. + +.. only:: esp32 or esp32s2 + + .. list-table:: + :header-rows: 1 + :widths: 30 15 + + * - Configuration Name + - Configuration Status + + * - Enable power management component (:ref:`CONFIG_PM_ENABLE`) + - ON + + * - Enable RTOS Tickless IDLE mode (:ref:`CONFIG_FREERTOS_USE_TICKLESS_IDLE`) + - ON + + * - RTOS Tick rate (Hz) (:ref:`CONFIG_FREERTOS_HZ`) + - 1000 + + * - Minimum IDLE Tick count before entering sleep mode (:ref:`CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP`) + - 3 + + * - Put light sleep related codes in IRAM (:ref:`CONFIG_PM_SLP_IRAM_OPT`) + - OFF + + * - Put RTOS IDLE related codes in IRAM (:ref:`CONFIG_PM_RTOS_IDLE_OPT`) + - OFF + + * - RTC slow clock source (:ref:`CONFIG_RTC_CLK_SRC`) + - Internal 150 kHz OSC + + * - Disable all GPIO when chip at sleep (:ref:`CONFIG_PM_SLP_DISABLE_GPIO`) + - ON + + * - ``max_freq_mhz`` + - 160 + + * - ``min_freq_mhz`` + - 40 + + * - ``light_sleep_enable`` + - true + + .. note:: + Configurations not mentioned in the above table are set to default. + +.. only:: esp32c2 + + .. list-table:: + :header-rows: 1 + :widths: 30 15 + + * - Configuration Name + - Configuration Status + + * - Enable power management component (:ref:`CONFIG_PM_ENABLE`) + - ON + + * - Enable RTOS Tickless IDLE mode (:ref:`CONFIG_FREERTOS_USE_TICKLESS_IDLE`) + - ON + + * - RTOS Tick rate (Hz) (:ref:`CONFIG_FREERTOS_HZ`) + - 1000 + + * - Minimum IDLE Tick count before entering sleep mode (:ref:`CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP`) + - 3 + + * - Put light sleep related codes in IRAM (:ref:`CONFIG_PM_SLP_IRAM_OPT`) + - OFF + + * - Put RTOS IDLE related codes in IRAM (:ref:`CONFIG_PM_RTOS_IDLE_OPT`) + - OFF + + * - RTC slow clock source (:ref:`CONFIG_RTC_CLK_SRC`) + - Internal 150 kHz OSC + + * - Disable all GPIO when chip at sleep (:ref:`CONFIG_PM_SLP_DISABLE_GPIO`) + - ON + + * - Power down flash in light sleep (:ref:`CONFIG_ESP_SLEEP_POWER_DOWN_FLASH`) + - OFF + + * - ``max_freq_mhz`` + - 120 + + * - ``min_freq_mhz`` + - 40 + + * - ``light_sleep_enable`` + - true + + .. note:: + Configurations not mentioned in the above table are set to default. + +Deep-sleep Mode Configuration +--------------------------------- + +For Deep-sleep mode, other configurations are of minimal significance except wake-up source-related configurations. + +Configuration Steps: + +1. Configure wake-up sources (refer to :doc:`Sleep Modes <../../api-reference/system/sleep_modes>` for details) +2. Call the API, as follows + +.. code-block:: none + + /* Enter deep sleep */ + esp_deep_sleep_start(); + +Users can keep specific modules powered on during sleep using the following configuration options: + +- Power up External 40 MHz XTAL + In some special applications, certain modules require high clock accuracy and stability during sleep (e.g., BT). In such cases, it is recommended to enable the External 40 MHz XTAL during sleep. + Code to enable and disable, as follows:: + + ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON)); + ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_OFF)); + +- Power up Internal 8 MHz OSC + In some special applications, certain modules (e.g., LEDC) use the Internal 8 MHz OSC as a clock source and need to function normally during light sleep. In such cases, it is recommended to enable the Internal 8 MHz OSC during sleep. + Code to enable and disable, as follows:: + + ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_RTC8M, ESP_PD_OPTION_ON)); + ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_RTC8M, ESP_PD_OPTION_OFF)); diff --git a/docs/en/api-guides/low-power-mode/low-power-mode-wifi.rst b/docs/en/api-guides/low-power-mode/low-power-mode-wifi.rst new file mode 100644 index 00000000000..9f2d4fefb1d --- /dev/null +++ b/docs/en/api-guides/low-power-mode/low-power-mode-wifi.rst @@ -0,0 +1,417 @@ +Introduction to Low Power Mode in Wi-Fi Scenarios +================================================== + +:link_to_translation:`zh_CN:[中文]` + +After the previous introduction to low power mode from a systemic perspective, this section delves into low power mode in Wi-Fi scenarios. Due to the complexity of Wi-Fi scenarios, basic principles of Wi-Fi power saving will be introduced before specific low power mode. This section is focused on station mode. + +Choosing Low Power Mode in Wi-Fi Scenarios +--------------------------------------------- + +To help users select appropriate low power mode, a summary table of low power modes in Wi-Fi scenarios is provided before detailed introduction. + +.. todo - add sleep-current/esp32c5_summary.inc + +.. only:: not esp32c5 + + .. include:: ../sleep-current/{IDF_TARGET_PATH_NAME}_summary.inc + +.. note:: + + All currents in the table are average currents, and the terms in the table are explained in the following text. Users can refer to them as needed. + +.. _Basic Principles of Wi-Fi Power Saving: + +Basic Principles of Wi-Fi Power Saving +---------------------------------------- + +Firstly, during the operation of a station, prolonged channel monitoring is required to avoid conflicts during transmission and reception. It leads to significant energy consumption as the RF module remains active, thus wasting power. Therefore, Wi-Fi protocols introduce power-saving modes. + +The basic principle of power-saving mode is to reduce energy consumption by minimizing unnecessary monitoring time. Access points (APs) will cache packets for a station that has entered power-saving mode. At the same time, it will periodically send beacon frames containing Traffic Indication Map (TIM) information. TIM indicates the unicast packets cached by the AP. Within TIM, the Delivery Traffic Indication Message (DTIM) is special as it caches broadcast packets and sends them out periodically every n TIM intervals (determined by the AP). For stations, TIM is optional listening, while DTIM is mandatory listening. Therefore, station can choose to wake up only before each DTIM frame to power up Wi-Fi-related modules (RF modules) instead of constantly being in listening state. This effectively reduces power consumption. + +.. code-block:: text + + DTIM DTIM + TIM │ │ + │ │ │ │ │ │ │ │ │ │ │ + │ │ │ │ │ │ │ │ │ │ │ + AP ───┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴──── + + + ┌────┐ ┌────┐ + │ │ │ │ + │ │ │ │ + │ │ │ │ + Sta ────────────────┴────┴─────────────┴────┴───────────────── + + DTIM4 Power Saving Mode Diagram + +Second, the time from powering up to powering down Wi-Fi related modules in a station also affects power consumption. Apart from the necessary time for data transmission processing, there are four configurations mainly affecting the duration: + + - Time offset caused by clock accuracy. The main reason is that clocks may deviate from ideal time to some extent, and the deviation can be positive or negative. + - Time spent processing missed beacon frames, such as the duration of continuous listening after a missed beacon, the maximum allowable number of missed beacons, etc. The existence and duration of this period are uncertain but can be configured within a range. + - Active time added to ensure the reception of burst data packets, which can be determined by configuration. + - ILDE time is required for specific power-saving modes to meet entry conditions. Therefore, reducing the working time can improve power performance while meeting communication requirements. + +.. code-block:: text + + ┌────────────┬────────────┬────────────┬────────────┬────────────┐ + │ │ │ time spent │ │ │ + │time offset │ necessary │ processing │ active time│ IDLE time │ + │ │ processing │ missed │ │ │ + │ │ time │ beacon │ │ │ + └────────────┴────────────┴────────────┴────────────┴────────────┘ + Chip Operation Time Overview + +Furthermore, when the station is not in a Wi-Fi transmission or reception state, other modules begin to affect the chip's power consumption. Different power-saving modes will configure different clock sources or dynamically adjust the operating frequencies of certain modules such as the CPU, while also shutting down varying numbers of functional modules, which effectively reduces the power consumption. Users can select suitable configurations according to their needs. + +If time is plotted on the horizontal axis and current on the vertical axis, then the ideal current consumption graph of the chip under low power mode can be simplified as shown below: + +.. code-block:: text + + ▲ + Current | + | + | interval period + | │ ◄──────────► │ │ ◄─► │ + | ┌─────┐ ┌─────┐ ┌─────┐ + | │ │ │ │ │ │ + | | | | | | | base current + | | | | | | | | + | | | | | | | ▼ + | ───┘ └────────┘ └────────┘ └────── + | + └───────────────────────────────────────────────► + Time + Ideal Current Graph of the Chip Under Low Power Mode + +When the station needs to engage in Wi-Fi communication, the Wi-Fi-related modules (PHY) are activated, causing a significant increase in current. The current remains at a relatively high level until the task is completed. After that, the chip will deactivate the Wi-Fi-related modules, causing the current to decrease to a lower level. + +Three main factors affect power consumption performance: interval, period, and base current. + + - **Interval** refers to the interval at which the station's Wi-Fi-related modules operate. It can be customized by low power mode or determined by the DTIM interval according to Wi-Fi protocol power-saving mechanisms (see first part in :ref:`Basic Principles of Wi-Fi Power Saving`). Generally, a larger interval leads to better power performance under the same conditions. But it also results in slower response times, affecting communication timeliness. + + - **Period** can be seen as the duration of each time the station's Wi-Fi operates, which also affects power performance. The period is not fixed (see second part in :ref:`Basic Principles of Wi-Fi Power Saving`). In ensuring normal Wi-Fi communication, a shorter period leads to better power performance. However, reducing the period will inevitably affect communication reliability. + + - **Base current** refers to the current of the chip when the Wi-Fi-related modules are not active. It is influenced by various factors. Different power-saving modes have different sleep strategies. Therefore, optimizing the configuration to reduce the base current can improve power performance. But closing other modules will affect related functions and the wake-up time of the chip. + +Therefore, power consumption can be reduced by considering the three aspects. Next, Modem-sleep mode and Auto Light-sleep mode will be introduced. The main difference between the two modes lies in the optimization of these three factors. + + +Modem-sleep Mode +---------------- + +The main principle of Modem-sleep mode is based on the DTIM mechanism. In this mode, the chip periodically wakes up for Wi-Fi-related tasks, and enters sleep state between intervals to power down PHY (RF module) to reduce power consumption. Besides, through the DTIM mechanism, the station can maintain Wi-Fi connection and data transmission with the AP. + +Modem-sleep mode automatically enters sleep after the Wi-Fi task ends without the need to call an API. During sleep, only the Wi-Fi-related modules (PHY) are closed, while other modules remain in power-up state. + +Modem-sleep mode will wake up according to the DTIM interval or listen interval (as introduced below in :ref:`Modem-sleep Mode Configuration`), acting as if the system has automatically set a Wi-Fi wake-up source. Therefore, users do not need to configure a wake-up source. The system can also wake up when actively sending packets. + +Modem-sleep mode is a toggle mode that automatically runs after calling the API to activate it. Its workflow is very clear, as shown in the diagram below. + +.. code-block:: text + + ┌───────────┐ Wi-Fi task finished ┌───────────┐ + │ ├─────────────────────────────►│ modem │ + │ active │ │ sleep │ + │ │◄─────────────────────────────┤ │ + └───────────┘ DTIM interval activated └───────────┘ + / sending packets + + Modem-sleep Mode Workflow + +Based on the base current graph provided above and combined with the operating principle of Modem-sleep mode, an ideal current graph can be derived, taking Min Modem-sleep mode (as introduced below in :ref:`Modem-sleep Mode Configuration`) as an example. + +.. code-block:: text + + ▲ + Current| + | DTIM interval + | │ ◄──────────► │ + | ┌─────┐ ┌─────┐ ┌─────┐ + | before │ │ │ │ │ │ + | DTIM | | | | | | Wi-Fi task + | interval| | | | | | finished + |activated | | | | | | / + | \ │ │ │ │ │ │/ + | ────────┘ └────────┘ └────────┘ └────── + | + └─────────────────────────────────────────────────────► + Time + Ideal Current Graph of Min Modem-sleep Mode + +Modem-sleep mode is generally used in scenarios where the CPU needs to remain active and maintain a Wi-Fi connection. For example, it is utilized to realize local voice wake-up by the {IDF_TARGET_NAME}, where the CPU continuously collects and processes audio data. + +DFS + Modem-sleep Mode +------------------------ + +In Modem-sleep mode, the CPU remains active while the DFS mechanism primarily adjusts the CPU and APB operating frequencies to reduce power consumption. Therefore, combining DFS with Modem sleep mode can further optimize power performance. Additionally, as the Wi-Fi task requests the :cpp:enumerator:`ESP_PM_CPU_FREQ_MAX` power lock to ensure the rapid execution of Wi-Fi tasks, frequency adjustment by DFS and Modem-sleep mode only occurs during the base current phase, which is after the Wi-Fi task ends. + +In Wi-Fi scenarios, to help users understand main changes, the state of DFS can be simplified. Specifically, although DFS primarily adjusts frequencies based on the maximum demands of the CPU and APB locks, in Wi-Fi scenarios, the CPU frequency needs to be maximized for operation. Besides, after the Wi-Fi task ends, it can be ideally assumed that no other tasks need to be completed, and that after some time, both locks are released to enter IDLE state. This simplified situation also ignores any current variations caused by changes in the locks during this time. + +In Wi-Fi scenarios, the flowchart of DFS csn be simplified as follows: + +.. code-block:: text + + ┌────────┐ + │ │ + │ DFS │ + │ │ + └───┬────┘ + │ + ▼ + ┌──────────┐ when IDLE ┌──────────┐ + │ │ ─────────────► │ │ + │ │ │ │ + │ active │ │ IDLE │ + │ │ │ │ + │ │ ◄───────────── │ │ + └──────────┘ not IDLE └──────────┘ + + Simplified Flowchart of DFS in the Wi-Fi Scenario + +The system transitions between active state and IDLE state in Wi-Fi scenarios. After the Wi-Fi task is completed, the system releases all locks after a period of time and enters the IDLE state. At this point, the DFS mechanism reduces the frequency to the set minimum value, ignoring the frequency adjustment actions during the state transition, which facilitates understanding. + +The DFS + Modem-sleep mode's ideal current graph is simplified as below: + +.. code-block:: text + + ▲ Wi-Fi task finished + Current | / modem sleep + | / + | ┌─────┐ ┌─────┐ + | │ │ │ │ + | | | | | lock released + | | | | | DFS frequency + | | | | | reduced + | | | | | / IDLE + | | | | | / + | | │ | │ / + | │ └─┐ │ └─┐ + | ────────┘ └───────────────┘ └───────── + | + └─────────────────────────────────────────────────────► + Time + DFS + Modem-sleep Mode's Ideal Current Graph + +Auto Light-sleep Mode + Wi-Fi Scenario +---------------------------------------- + +Auto Light-sleep mode combines the ESP-IDF power management mechanism, the DTIM mechanism, and Light-sleep mode in Wi-Fi scenarios. Enabling power management is a prerequisite of this mode, and its auto aspect is demonstrated by the system automatically entering Light-sleep after being in the IDLE state for a set duration. Additionally, auto Auto Light-sleep mode adheres to the DTIM mechanism. The system will automatically wake up to maintain Wi-Fi connection with AP. + +In the Wi-Fi environment, the sleep mechanism of Auto Light-sleep mode remains consistent with that of the pure system. It still relies on the power management mechanism, where the condition for entering sleep is when the system has been IDLE for a duration exceeding the set time. The system will assess if the IDLE time meets the conditions, and if so, it will directly enter sleep. This process is automatic. During sleep, RF, the 8 MHz oscillator, the 40 MHz high-speed crystal oscillator, PLL, and gated digital core clock are automatically turned off, and CPU operation is suspended. + +In the Wi-Fi environment, the Auto Light-sleep mode follows the DTIM mechanism. The system will automatically wake up before the arrival of DTIM frames, as if a Wi-Fi wake-up source has been set. Therefore, there is no need for configuration. Additionally, the system can be awakened when actively sending packets. + +The operation workflow of Auto Light-sleep mode in the Wi-Fi environment is relatively complex, but it is entirely automated throughout. Specific details are illustrated in the diagram. + +.. code-block:: text + + ┌────────┐ + │ │ + │ DFS │ + │ │ + └───┬────┘ + │ + ▼ + ┌──────────┐ when IDLE ┌──────────┐ exceed set time ┌──────────┐ + │ │ ─────────────► │ │ ────────────► │ │ + │ │ │ │ │ auto │ + │ active │ │ IDLE │ │ light │ + │ │ │ │ │ sleep │ + │ │ ◄───────────── │ │ │ │ + └──────────┘ not IDLE └──────────┘ └──────┬───┘ + ▲ │ + │ DTIM interval activated / sending packets │ + └───────────────────────────────────────────────────────────────┘ + + Auto Light-sleep Mode Workflow + +In Wi-Fi scenarios, Auto Light-sleep mode is often enabled simultaneously with Modem-sleep mode. Here, an ideal current graph of Modem + Auto Light-sleep mode is provided, with key nodes marked on the graph. + +.. code-block:: text + + DTIM interval + ▲ │ ◄───────────────────► │ + Current | ┌─────┐ ┌─────┐ + | │ │ \ │ │ + | | | \ | | + | | | Wi-Fi task | | + | | | finished | | + | | | modem sleep | | + | before | | | | IDLE time + | DTIM | | IDLE | | exceeds set time + | activated| │ DFS frequency | │ light sleep + | \ | └─┐ / reduced | └─┐ / + | \ │ └─┐ / │ └─┐ / + | ────────┘ └─────────────┘ └───────── + | + └─────────────────────────────────────────────────────► + Time + Ideal Current Graph of Modem + Auto Light-sleep Mode + +In the Wi-Fi environment, Auto Light-sleep mode can be utilized to maintain Wi-Fi connection and respond promptly to data sent by AP. Additionally, the CPU can remain IDLE when no commands are received. For example, in applications such as Wi-Fi switches, the CPU is mostly IDLE until it receives a control command to operate on GPIO. + + +Deep-sleep Mode + Wi-Fi Scenario +----------------------------------- + +The Deep-sleep mode in Wi-Fi scenarios is essentially the same as in a pure system. For details, please refer to :ref:`Deep-sleep Mode`. Here, it will not be further discussed. + + +Low Power Mode Configuration in Wi-Fi Scenarios +----------------------------------------------------- + +After introducing the low power mode in Wi-Fi scenarios, this section will cover common configuration options, unique configuration options for each mode, and instructions for using the corresponding low power mode APIs. Additionally, recommendations for the respective modes' configurations (including recommended configurations for pure systems) will be provided, along with specific performance details. + +.. note:: + + The configuration options below are briefly introduced. For more detailed information, please click the link behind each option. + +Common Configuration Options +++++++++++++++++++++++++++++++++ + +- Power consumption related: + + - Max Wi-Fi TX power (dBm) (:ref:`CONFIG_ESP_PHY_MAX_WIFI_TX_POWER`) + +- Speed optimization related: + + - Wi-Fi IRAM speed optimization (:ref:`CONFIG_ESP_WIFI_IRAM_OPT`) + - Wi-Fi RX IRAM speed optimization (:ref:`CONFIG_ESP_WIFI_RX_IRAM_OPT`) + - Wi-Fi Sleep IRAM speed optimization (:ref:`CONFIG_ESP_WIFI_SLP_IRAM_OPT`) + + +- Wi-Fi Protocol related: + + - Minimum active time (:ref:`CONFIG_ESP_WIFI_SLP_DEFAULT_MIN_ACTIVE_TIME`) + + - Maximum keep alive time (:ref:`CONFIG_ESP_WIFI_SLP_DEFAULT_MAX_ACTIVE_TIME`) + + - Send gratuitous ARP periodically (:ref:`CONFIG_LWIP_ESP_GRATUITOUS_ARP`) + + - Wi-Fi sleep optimize when beacon lost (:ref:`CONFIG_ESP_WIFI_SLP_BEACON_LOST_OPT`) + + +.. _Modem-sleep Mode Configuration: + +Modem-sleep Mode Configuration +++++++++++++++++++++++++++++++++ + +- Configurable Options + + - Min Modem + This parameter indicates that the station operates according to the DTIM cycle. It wakes up before each DTIM to receive beacon frames, which ensures that broadcast information is not missed. However, the DTIM cycle is determined by the AP. If the DTIM cycle is short, the power saving effect will be reduced. + + - Max Modem + This parameter indicates that the station customizes a listen interval and wakes up to receive beacon frames at intervals defined by the listen interval. This approach saves power when the listen interval is large but may lead to missed DTIMs and broadcast data. + + +- Configuration Steps + + - Call the API and select the mode parameters + + .. code-block:: none + + typedef enum { + WIFI_PS_NONE, + WIFI_PS_MIN_MODEM, + WIFI_PS_MAX_MODEM, + } wifi_ps_type_t; + esp_err_t esp_wifi_set_ps(wifi_ps_type_t type); + + If WIFI_PS_MAX_MODEM is selected, the listen interval also needs to be configured. An example is provided below:: + + #define LISTEN_INTERVAL 3 + wifi_config_t wifi_config = { + .sta = { + .ssid = "SSID", + .password = "Password", + .listen_interval = LISTEN_INTERVAL, + }, + }; + ESP_ERROR_CHECK(esp_wifi_set_mode(WIFI_MODE_STA)); + ESP_ERROR_CHECK(esp_wifi_set_config(ESP_IF_WIFI_STA, &wifi_config)); + ESP_ERROR_CHECK(esp_wifi_start()); + +- Recommended Configuration + + The recommended configuration provided here is for Min Modem-sleep mode + DFS. + + .. list-table:: + :header-rows: 1 + :widths: 20 15 + + * - Configuration Name + - Configuration Status + + * - WIFI_PS_MIN_MODEM + - ON + + * - CONFIG_PM_ENABLE + - ON + + * - RTOS Tick rate (Hz) + - 1000 + + * - ``max_freq_mhz`` + - 160 + + * - ``min_freq_mhz`` + - 40 + + * - ``light_sleep_enable`` + - false + +- Configuration Performance + + .. todo - add sleep-current/esp32c5_modem_sleep.inc + + .. only:: not esp32c5 + + .. include:: ../sleep-current/{IDF_TARGET_PATH_NAME}_modem_sleep.inc + + +Auto Light-sleep Mode + Wi-Fi Scenario Configuration ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + +Auto Light-sleep mode in Wi-Fi scenarios does not require wake-up source configuration compared with a pure system. But the remaining part of configuration is basically the same in the two operation scenarios. Therefore, detailed introduction of configurable options, configuration steps, and recommended configurations can be found in the previous section :ref:`Deep-sleep Mode`, with the Wi-Fi-related configurations set to default. + +- Configuration Performance + + The configuration performance mirrors that of the recommended Auto Light-sleep mode configuration in a pure system, combined with the default Wi-Fi-related configurations in the Wi-Fi environment. + + .. todo - add sleep-current/esp32c5_light_sleep.inc + + .. only:: not esp32c5 + + .. include:: ../sleep-current/{IDF_TARGET_PATH_NAME}_light_sleep.inc + +Deep-sleep Mode + Wi-Fi Scenario Configuration +++++++++++++++++++++++++++++++++++++++++++++++++ + +Deep-sleep mode configuration in Wi-Fi scenarios is essentially the same as in a pure system. Therefore, detailed introduction of configurable options, configuration steps, and recommended configurations can be found in the previous section :ref:`Deep-sleep Mode`, with the Wi-Fi-related configurations set to default. + +- Configuration Performance + + The performance of this configuration mirrors that of the recommended Deep-sleep mode configuration in a pure system, combined with the default Wi-Fi-related configurations in the Wi-Fi environment. + + .. only:: esp32 + + Average current approximately 5.0 μA + + .. only:: esp32s2 + + Average current approximately 5.0 μA + + .. only:: esp32s3 + + Average current approximately 6.9 μA + + .. only:: esp32c3 + + Average current approximately 4.8 μA + + .. only:: esp32c2 + + Average current approximately 4.9 μA diff --git a/docs/en/api-guides/sleep-current/esp32_light_sleep.inc b/docs/en/api-guides/sleep-current/esp32_light_sleep.inc index 6ab92a2d773..83885a187ec 100644 --- a/docs/en/api-guides/sleep-current/esp32_light_sleep.inc +++ b/docs/en/api-guides/sleep-current/esp32_light_sleep.inc @@ -1 +1,27 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32_light_sleep.inc +.. list-table:: + :header-rows: 1 + :widths: 20 10 20 20 20 + + * - CPU frequency + - DTIM + - Average current (mA) + - Max current (mA) + - Min current (mA) + + * - 160 MHz + - 1 + - 3.34 + - 129.36 + - 1.35 + + * - 160 MHz + - 3 + - 2.33 + - 130.17 + - 1.33 + + * - 160 MHz + - 10 + - 2.19 + - 129.87 + - 1.32 diff --git a/docs/en/api-guides/sleep-current/esp32_modem_sleep.inc b/docs/en/api-guides/sleep-current/esp32_modem_sleep.inc index b5f2fc45d0a..28f0b8cd2cf 100644 --- a/docs/en/api-guides/sleep-current/esp32_modem_sleep.inc +++ b/docs/en/api-guides/sleep-current/esp32_modem_sleep.inc @@ -1 +1,52 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32_modem_sleep.inc +.. list-table:: + :header-rows: 1 + :widths: 20 10 10 20 20 20 + + * - CPU frequency + - DFS + - DTIM + - Average current (mA) + - Max current (mA) + - Min current (mA) + + * - 160 MHz + - ON + - 1 + - 22.65 + - 133.03 + - 5.48 + + * - 160 MHz + - OFF + - 1 + - 31.12 + - 253.74 + - 27.18 + + * - 160 MHz + - ON + - 3 + - 21.89 + - 247.68 + - 5.25 + + * - 160 MHz + - OFF + - 3 + - 28.81 + - 209.42 + - 27.77 + + * - 160 MHz + - ON + - 10 + - 20.01 + - 216.51 + - 6.02 + + * - 160 MHz + - OFF + - 10 + - 29.66 + - 114.17 + - 27.77 diff --git a/docs/en/api-guides/sleep-current/esp32_summary.inc b/docs/en/api-guides/sleep-current/esp32_summary.inc index 4fe70a27105..b355d04a528 100644 --- a/docs/en/api-guides/sleep-current/esp32_summary.inc +++ b/docs/en/api-guides/sleep-current/esp32_summary.inc @@ -1 +1,69 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32_summary.inc +.. list-table:: + :header-rows: 1 + :widths: 20 20 30 20 20 + + * - Item + - Modem-sleep + - Modem-sleep+DFS + - Auto Light-sleep + - Deep-sleep + + * - Sleep + - Automatic + - Automatic + - Automatic + - Manual + + * - Wake-up + - Automatic + - Automatic + - Automatic + - Configure Wake-up Source + + * - Wi-Fi Connection + - Maintain + - Maintain + - Maintain + - Disconnect + + * - CPU + - On + - On/Throttled + - Paused + - Off + + * - System Clock + - On + - On + - Off + - Off + + * - Peripherals + - On + - On + - On + - Off + + * - DTIM1 + - 31.12 mA + - 22.65 mA + - 3.34 mA + - / + + * - DTIM3 + - 28.81 mA + - 21.89 mA + - 2.33 mA + - / + + * - DTIM10 + - 29.66 mA + - 20.01 mA + - 2.19 mA + - / + + * - Average Current + - / + - / + - / + - 5 μA diff --git a/docs/en/api-guides/sleep-current/esp32c2_light_sleep.inc b/docs/en/api-guides/sleep-current/esp32c2_light_sleep.inc index eb64d575141..baeb860a5b2 100644 --- a/docs/en/api-guides/sleep-current/esp32c2_light_sleep.inc +++ b/docs/en/api-guides/sleep-current/esp32c2_light_sleep.inc @@ -1 +1,27 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32c2_light_sleep.inc +.. list-table:: + :header-rows: 1 + :widths: 20 10 20 20 20 + + * - CPU frequency + - DTIM + - Average current (mA) + - Max current (mA) + - Min current (mA) + + * - 120 MHz + - 1 + - 1.6 + - 67.8 + - 0.12 + + * - 120 MHz + - 3 + - 0.71 + - 66.5 + - 0.12 + + * - 120 MHz + - 10 + - 0.39 + - 64.8 + - 0.12 diff --git a/docs/en/api-guides/sleep-current/esp32c2_modem_sleep.inc b/docs/en/api-guides/sleep-current/esp32c2_modem_sleep.inc index 4df53ed0b4a..2756825ce1c 100644 --- a/docs/en/api-guides/sleep-current/esp32c2_modem_sleep.inc +++ b/docs/en/api-guides/sleep-current/esp32c2_modem_sleep.inc @@ -1 +1,52 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32c2_modem_sleep.inc +.. list-table:: + :header-rows: 1 + :widths: 20 10 10 20 20 20 + + * - CPU frequency + - DFS + - DTIM + - Average current (mA) + - Max current (mA) + - Min current (mA) + + * - 120 MHz + - ON + - 1 + - 7.5 + - 65.9 + - 6.0 + + * - 120 MHz + - OFF + - 1 + - 13.6 + - 221.5 + - 12.6 + + * - 120 MHz + - ON + - 3 + - 6.9 + - 65.4 + - 6.0 + + * - 120 MHz + - OFF + - 3 + - 13.0 + - 220.2 + - 12.6 + + * - 120 MHz + - ON + - 10 + - 6.6 + - 64.9 + - 6.0 + + * - 120 MHz + - OFF + - 10 + - 12.9 + - 216.8 + - 12.6 diff --git a/docs/en/api-guides/sleep-current/esp32c2_summary.inc b/docs/en/api-guides/sleep-current/esp32c2_summary.inc index c7c272ab737..1b7b9054595 100644 --- a/docs/en/api-guides/sleep-current/esp32c2_summary.inc +++ b/docs/en/api-guides/sleep-current/esp32c2_summary.inc @@ -1 +1,69 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32c2_summary.inc +.. list-table:: + :header-rows: 1 + :widths: 20 20 30 20 20 + + * - Item + - Modem-sleep + - Modem-sleep+DFS + - Auto Light-sleep + - Deep-sleep + + * - Sleep + - Automatic + - Automatic + - Automatic + - Manual + + * - Wake-up + - Automatic + - Automatic + - Automatic + - Configure Wake-up Source + + * - Wi-Fi Connection + - Maintain + - Maintain + - Maintain + - Disconnect + + * - CPU + - On + - On/Throttled + - Paused + - Off + + * - System Clock + - On + - On + - Off + - Off + + * - Peripherals + - On + - On + - On + - Off + + * - DTIM1 + - 13.6 + - 7.5 + - 1.6 + - / + + * - DTIM3 + - 13.0 + - 6.9 + - 0.71 + - / + + * - DTIM10 + - 12.9 + - 6.6 + - 0.39 + - / + + * - Average Current + - / + - / + - / + - 4.9 μA diff --git a/docs/en/api-guides/sleep-current/esp32c3_light_sleep.inc b/docs/en/api-guides/sleep-current/esp32c3_light_sleep.inc index 40bdf50d444..483ff33d389 100644 --- a/docs/en/api-guides/sleep-current/esp32c3_light_sleep.inc +++ b/docs/en/api-guides/sleep-current/esp32c3_light_sleep.inc @@ -1 +1,27 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32c3_light_sleep.inc +.. list-table:: + :header-rows: 1 + :widths: 20 10 20 20 20 + + * - CPU frequency + - DTIM + - Average current (mA) + - Max current (mA) + - Min current (mA) + + * - 160 MHz + - 1 + - 1.4 + - 87.26 + - 0.14 + + * - 160 MHz + - 3 + - 0.62 + - 86.33 + - 0.14 + + * - 160 MHz + - 10 + - 0.31 + - 86.11 + - 0.14 diff --git a/docs/en/api-guides/sleep-current/esp32c3_modem_sleep.inc b/docs/en/api-guides/sleep-current/esp32c3_modem_sleep.inc index 89ee0eca2f0..276d7493932 100644 --- a/docs/en/api-guides/sleep-current/esp32c3_modem_sleep.inc +++ b/docs/en/api-guides/sleep-current/esp32c3_modem_sleep.inc @@ -1 +1,52 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32c3_modem_sleep.inc +.. list-table:: + :header-rows: 1 + :widths: 20 10 10 20 20 20 + + * - CPU frequency + - DFS + - DTIM + - Average current (mA) + - Max current (mA) + - Min current (mA) + + * - 160 MHz + - ON + - 1 + - 11.35 + - 83.31 + - 5.03 + + * - 160 MHz + - OFF + - 1 + - 21.47 + - 191.53 + - 20.58 + + * - 160 MHz + - ON + - 3 + - 10.71 + - 82.82 + - 5.09 + + * - 160 MHz + - OFF + - 3 + - 20.82 + - 82.98 + - 20.48 + + * - 160 MHz + - ON + - 10 + - 10.32 + - 81.05 + - 5.74 + + * - 160 MHz + - OFF + - 10 + - 20.67 + - 229.83 + - 20.48 diff --git a/docs/en/api-guides/sleep-current/esp32c3_summary.inc b/docs/en/api-guides/sleep-current/esp32c3_summary.inc index b0d5b07fe78..d53be086c4a 100644 --- a/docs/en/api-guides/sleep-current/esp32c3_summary.inc +++ b/docs/en/api-guides/sleep-current/esp32c3_summary.inc @@ -1 +1,69 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32c3_summary.inc +.. list-table:: + :header-rows: 1 + :widths: 20 20 30 20 20 + + * - Item + - Modem-sleep + - Modem-sleep+DFS + - Auto Ligh-sleep + - Deep-sleep + + * - Sleep + - Automatic + - Automatic + - Automatic + - Manual + + * - Wake-up + - Automatic + - Automatic + - Automatic + - Configure Wake-up Source + + * - Wi-Fi Connection + - Maintain + - Maintain + - Maintain + - Disconnect + + * - CPU + - On + - On/Throttled + - Paused + - Off + + * - System Clock + - On + - On + - Off + - Off + + * - Peripherals + - On + - On + - On + - Off + + * - DTIM1 + - 21.47 mA + - 11.35 mA + - 1.4 mA + - / + + * - DTIM3 + - 20.82 mA + - 10.71 mA + - 0.62 mA + - / + + * - DTIM10 + - 20.67 mA + - 10.32 mA + - 0.31 mA + - / + + * - Average Current + - / + - / + - / + - 4.8 μA diff --git a/docs/en/api-guides/sleep-current/esp32c6_light_sleep.inc b/docs/en/api-guides/sleep-current/esp32c6_light_sleep.inc index d24f1d2a054..7164ca9083f 100644 --- a/docs/en/api-guides/sleep-current/esp32c6_light_sleep.inc +++ b/docs/en/api-guides/sleep-current/esp32c6_light_sleep.inc @@ -1 +1,27 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32c6_light_sleep.inc +.. list-table:: + :header-rows: 1 + :widths: 20 10 20 20 20 + + * - CPU frequency + - DTIM + - Average current (mA) + - Max current (mA) + - Min current (mA) + + * - 160 MHz + - 1 + - 0.919 + - 103.149 + - 0.053 + + * - 160 MHz + - 3 + - 0.368 + - 102.428 + - 0.052 + + * - 160 MHz + - 10 + - 0.172 + - 102.087 + - 0.052 diff --git a/docs/en/api-guides/sleep-current/esp32c6_modem_sleep.inc b/docs/en/api-guides/sleep-current/esp32c6_modem_sleep.inc index d60b3c02b28..a615c029a45 100644 --- a/docs/en/api-guides/sleep-current/esp32c6_modem_sleep.inc +++ b/docs/en/api-guides/sleep-current/esp32c6_modem_sleep.inc @@ -1 +1,52 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32c6_modem_sleep.inc +.. list-table:: + :header-rows: 1 + :widths: 20 10 10 20 20 20 + + * - CPU frequency + - DFS + - DTIM + - Average current (mA) + - Max current (mA) + - Min current (mA) + + * - 160 MHz + - ON + - 1 + - 14.37 + - 84.40 + - 10.02 + + * - 160 MHz + - OFF + - 1 + - 27.48 + - 87.55 + - 26.92 + + * - 160 MHz + - ON + - 3 + - 13.9 + - 83.9 + - 10.13 + + * - 160 MHz + - OFF + - 3 + - 27.08 + - 87.74 + - 26.91 + + * - 160 MHz + - ON + - 10 + - 13.71 + - 82.77 + - 10.04 + + * - 160 MHz + - OFF + - 10 + - 26.85 + - 88.07 + - 26.7 diff --git a/docs/en/api-guides/sleep-current/esp32c6_summary.inc b/docs/en/api-guides/sleep-current/esp32c6_summary.inc index 647ed8401c9..690d2d8fa0f 100644 --- a/docs/en/api-guides/sleep-current/esp32c6_summary.inc +++ b/docs/en/api-guides/sleep-current/esp32c6_summary.inc @@ -1 +1,69 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32c6_summary.inc +.. list-table:: + :header-rows: 1 + :widths: 20 20 30 20 20 + + * - Item + - Modem-sleep + - Modem-sleep+DFS + - Auto Light-sleep + - Deep-sleep + + * - Sleep + - Automatic + - Automatic + - Automatic + - Manual + + * - Wake-up + - Automatic + - Automatic + - Automatic + - Configure Wake-up Source + + * - Wi-Fi Connection + - Maintain + - Maintain + - Maintain + - Disconnect + + * - CPU + - On + - On/Throttled + - Paused + - Off + + * - System Clock + - On + - On + - Off + - Off + + * - Peripherals + - On + - On + - On + - Off + + * - DTIM1 + - 27.48 mA + - 14.37 mA + - 0.919 mA + - / + + * - DTIM3 + - 27.08 mA + - 13.9 mA + - 0.368 mA + - / + + * - DTIM10 + - 26.85 mA + - 13.71 mA + - 0.172 mA + - / + + * - Average Current + - / + - / + - / + - 6.7 μA diff --git a/docs/en/api-guides/sleep-current/esp32s2_light_sleep.inc b/docs/en/api-guides/sleep-current/esp32s2_light_sleep.inc index 8d2da161f55..1a9de382eb4 100644 --- a/docs/en/api-guides/sleep-current/esp32s2_light_sleep.inc +++ b/docs/en/api-guides/sleep-current/esp32s2_light_sleep.inc @@ -1 +1,27 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32s2_light_sleep.inc +.. list-table:: + :header-rows: 1 + :widths: 20 10 20 20 20 + + * - CPU frequency + - DTIM + - Average current (mA) + - Max current (mA) + - Min current (mA) + + * - 160 MHz + - 1 + - 2.48 + - 94.88 + - 0.96 + + * - 160 MHz + - 3 + - 2.96 + - 97.15 + - 2.25 + + * - 160 MHz + - 10 + - 2.69 + - 98.66 + - 2.25 diff --git a/docs/en/api-guides/sleep-current/esp32s2_modem_sleep.inc b/docs/en/api-guides/sleep-current/esp32s2_modem_sleep.inc index d0377f0ffa7..ce2d7ce4d2d 100644 --- a/docs/en/api-guides/sleep-current/esp32s2_modem_sleep.inc +++ b/docs/en/api-guides/sleep-current/esp32s2_modem_sleep.inc @@ -1 +1,52 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32s2_modem_sleep.inc +.. list-table:: + :header-rows: 1 + :widths: 20 10 10 20 20 20 + + * - CPU frequency + - DFS + - DTIM + - Average current (mA) + - Max current (mA) + - Min current (mA) + + * - 160 MHz + - ON + - 1 + - 11.71 + - 83.87 + - 5.04 + + * - 160 MHz + - OFF + - 1 + - 31.14 + - 160.26 + - 29.04 + + * - 160 MHz + - ON + - 3 + - 12.4 + - 84.85 + - 10.0 + + * - 160 MHz + - OFF + - 3 + - 29.06 + - 178.67 + - 28.25 + + * - 160 MHz + - ON + - 10 + - 12.15 + - 84.18 + - 10.01 + + * - 160 MHz + - OFF + - 10 + - 28.5 + - 176.69 + - 28.21 diff --git a/docs/en/api-guides/sleep-current/esp32s2_summary.inc b/docs/en/api-guides/sleep-current/esp32s2_summary.inc index 8cc02219cc0..85f3049df53 100644 --- a/docs/en/api-guides/sleep-current/esp32s2_summary.inc +++ b/docs/en/api-guides/sleep-current/esp32s2_summary.inc @@ -1 +1,69 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32s2_summary.inc +.. list-table:: + :header-rows: 1 + :widths: 20 20 30 20 20 + + * - Item + - Modem-sleep + - Modem-sleep+DFS + - Auto Light-sleep + - Deep-sleep + + * - Sleep + - Automatic + - Automatic + - Automatic + - Manual + + * - Wake-up + - Automatic + - Automatic + - Automatic + - Configure Wake-up Source + + * - Wi-Fi Connection + - Maintain + - Maintain + - Maintain + - Disconnect + + * - CPU + - On + - On/Throttled + - Paused + - Off + + * - System Clock + - On + - On + - Off + - Off + + * - Peripherals + - On + - On + - On + - Off + + * - DTIM1 + - 31.14 mA + - 11.71 mA + - 2.48 mA + - / + + * - DTIM3 + - 29.06 mA + - 12.4 mA + - 2.96 mA + - / + + * - DTIM10 + - 28.5 mA + - 12.15 mA + - 2.69 mA + - / + + * - Average Current + - / + - / + - / + - 5 μA diff --git a/docs/en/api-guides/sleep-current/esp32s3_light_sleep.inc b/docs/en/api-guides/sleep-current/esp32s3_light_sleep.inc index 2f26974c402..167e2fe9208 100644 --- a/docs/en/api-guides/sleep-current/esp32s3_light_sleep.inc +++ b/docs/en/api-guides/sleep-current/esp32s3_light_sleep.inc @@ -1 +1,27 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32s3_light_sleep.inc +.. list-table:: + :header-rows: 1 + :widths: 20 10 20 20 20 + + * - CPU frequency + - DTIM + - Average current (mA) + - Max current (mA) + - Min current (mA) + + * - 160 MHz + - 1 + - 2.45 + - 120.21 + - 0.28 + + * - 160 MHz + - 3 + - 1.33 + - 120.25 + - 0.28 + + * - 160 MHz + - 10 + - 0.93 + - 120.04 + - 0.28 diff --git a/docs/en/api-guides/sleep-current/esp32s3_modem_sleep.inc b/docs/en/api-guides/sleep-current/esp32s3_modem_sleep.inc index 3360edd5c9c..4050018da5d 100644 --- a/docs/en/api-guides/sleep-current/esp32s3_modem_sleep.inc +++ b/docs/en/api-guides/sleep-current/esp32s3_modem_sleep.inc @@ -1 +1,52 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32s3_modem_sleep.inc +.. list-table:: + :header-rows: 1 + :widths: 20 10 10 20 20 20 + + * - CPU frequency + - DFS + - DTIM + - Average current (mA) + - Max current (mA) + - Min current (mA) + + * - 160 MHz + - ON + - 1 + - 20.7 + - 113.5 + - 15.0 + + * - 160 MHz + - OFF + - 1 + - 40.1 + - 235.8 + - 37.8 + + * - 160 MHz + - ON + - 3 + - 19.9 + - 113.4 + - 15.0 + + * - 160 MHz + - OFF + - 3 + - 38.7 + - 267.2 + - 37.9 + + * - 160 MHz + - ON + - 10 + - 19.5 + - 113.4 + - 15.0 + + * - 160 MHz + - OFF + - 10 + - 38.2 + - 259.7 + - 37.9 diff --git a/docs/en/api-guides/sleep-current/esp32s3_summary.inc b/docs/en/api-guides/sleep-current/esp32s3_summary.inc index 2dc1dc6a525..54e417b7ad2 100644 --- a/docs/en/api-guides/sleep-current/esp32s3_summary.inc +++ b/docs/en/api-guides/sleep-current/esp32s3_summary.inc @@ -1 +1,69 @@ -.. include:: ../../../zh_CN/api-guides/sleep-current/esp32s3_summary.inc +.. list-table:: + :header-rows: 1 + :widths: 20 20 30 20 20 + + * - Item + - Modem-sleep + - Modem-sleep+DFS + - Auto Light-sleep + - Deep-sleep + + * - Sleep + - Automatic + - Automatic + - Automatic + - Manual + + * - Wake-up + - Automatic + - Automatic + - Automatic + - Configure Wake-up Source + + * - Wi-Fi Connection + - Maintain + - Maintain + - Maintain + - Disconnect + + * - CPU + - On + - On/Throttled + - Paused + - Off + + * - System Clock + - On + - On + - Off + - Off + + * - Peripherals + - On + - On + - On + - Off + + * - DTIM1 + - 40.1 + - 20.7 + - 2.45 + - / + + * - DTIM3 + - 38.7 + - 19.9 + - 1.33 + - / + + * - DTIM10 + - 38.2 + - 19.5 + - 0.93 + - / + + * - Average Current + - / + - / + - / + - 6.8 μA diff --git a/docs/en/api-guides/wifi.rst b/docs/en/api-guides/wifi.rst index 345fe090538..17219ccb7c5 100644 --- a/docs/en/api-guides/wifi.rst +++ b/docs/en/api-guides/wifi.rst @@ -1759,7 +1759,7 @@ A config option :ref:`CONFIG_ESP_WIFI_11R_SUPPORT` and configuration parameter : {IDF_TARGET_NAME} Wi-Fi Power-saving Mode ----------------------------------------- -This subsection will briefly introduce the concepts and usage related to Wi-Fi Power Saving Mode, for a more detailed introduction please refer to the :doc:`Low Power Mode User Guide <../api-guides/low-power-mode>` +This subsection will briefly introduce the concepts and usage related to Wi-Fi Power Saving Mode, for a more detailed introduction please refer to the :doc:`Low Power Mode User Guide <../api-guides/low-power-mode/index>` Station Sleep ++++++++++++++++++++++ diff --git a/docs/zh_CN/api-guides/index.rst b/docs/zh_CN/api-guides/index.rst index 74f41e5ae66..c99ad1d9f3f 100644 --- a/docs/zh_CN/api-guides/index.rst +++ b/docs/zh_CN/api-guides/index.rst @@ -29,6 +29,7 @@ API 指南 :CONFIG_IDF_TARGET_ARCH_XTENSA: hlinterrupts jtag-debugging/index linker-script-generation + low-power-mode/index lwip memory-types openthread @@ -45,5 +46,4 @@ API 指南 :SOC_USB_SERIAL_JTAG_SUPPORTED: usb-serial-jtag-console :SOC_WIFI_SUPPORTED: wifi :SOC_WIFI_SUPPORTED: wifi-security - low-power-mode :SOC_WIFI_SUPPORTED or SOC_BT_SUPPORTED or SOC_IEEE802154_SUPPORTED: phy diff --git a/docs/zh_CN/api-guides/low-power-mode.rst b/docs/zh_CN/api-guides/low-power-mode.rst deleted file mode 100644 index a1fd881f0fe..00000000000 --- a/docs/zh_CN/api-guides/low-power-mode.rst +++ /dev/null @@ -1,1035 +0,0 @@ -低功耗模式使用指南 -================== - -:link_to_translation:`en:[English]` - -对于物联网应用场景，终端的待机性能表现十分重要，本文档旨在介绍 {IDF_TARGET_NAME} 低功耗的基本原理，同时介绍 {IDF_TARGET_NAME} 支持的低功耗模式，需注意本文档主要针对 station mode。文档还会具体给出每种模式的配置步骤、推荐配置和功耗表现，以帮助用户根据实际需求快速配置适合的低功耗模式。 - -系统低功耗模式介绍 ----------------------------------- - -低功耗模式不仅涉及到系统相关问题，还涉及到芯片具体的工作场景，如处在 Wi-Fi 工作场景就会与处在蓝牙工作场景时产生不同。为此本节将首先介绍纯系统角度，即不涉及具体场景的低功耗模式，主要有 DFS、Light-sleep、Deep-sleep。纯系统下的低功耗模式主要思想就是在休眠时关闭或门控一些功能模块来降低功耗。 - -DFS -++++++++++++++++++++++++++++++++++ - -DFS (Dynamic frequency scaling) 即动态频率切换，是 ESP-IDF 中集成的电源管理机制的基础功能。DFS 可以根据应用程序持有电源锁的情况，调整外围总线 (APB) 频率和 CPU 频率。持有高性能锁就使用高频，空闲状态不持有电源锁时则使用低频来降低功耗，以此来尽可能减少运行应用程序的功耗。 - -DFS 的调频机制即根据持有电源锁的最大频率需求来调整频率，同时，freertos tick rates 的数值也会对 DFS 调频产生影响。系统任务调度的灵敏度越大，则意味着系统能更及时的根据需求调整频率。有关调频机制的详细信息，请参见 :doc:`电源管理 <../api-reference/system/power_management>`。 - -下图为 DFS 调频机制运行的理想电流情况。 - -.. figure:: ../../_static/Low-power-DFS-current.png - :align: center - - 理想 DFS 机制调频电流图 - -DFS 适用于 CPU 必须处于工作状态但是对低功耗有需求的场景，因此 DFS 经常与其他低功耗模式共同开启，下文会详细介绍。 - -Light-sleep -++++++++++++++++++++++++++++++++++ - -Light-sleep 模式是 {IDF_TARGET_NAME} 预设的一种低功耗模式，其核心思想就是在休眠时关闭或门控一些功能模块来降低功耗。从纯系统方面来说，Light-sleep 模式有两种进入方式，一种是通过 API 调用进入休眠，一种是自动进入的 auto 模式。两种模式都需要配置唤醒源进行唤醒，同时在进入休眠后会门控或关闭一些模块。这里主要介绍 Auto Light-sleep 模式。 - -Auto Light-sleep 模式是 ESP-IDF 电源管理机制和 Light-sleep 模式的结合。开启电源管理机制是其前置条件，auto 体现在系统进入空闲状态 (IDLE) 超过设定时间后，自动进入 Light-sleep。空闲状态下，应用程序释放所有电源锁，此时，DFS 将降频以减小功耗。 - -Auto Light-sleep 依赖于电源管理机制，系统经过提前判断，发现空闲时间超过设定时间时，则直接进入休眠。该过程为自动进行。休眠时会自动关闭 RF、8 MHz 振荡器、40 MHz 高速晶振、PLL、门控数字内核时钟，暂停 CPU 工作。 - -Auto Light-sleep 模式需配置唤醒源。该模式拥有多种唤醒源，支持相互组合，此时任何一个唤醒源都可以触发唤醒。唤醒后，会从进入休眠的位置继续执行程序。若不配置唤醒源，进入 Light-sleep 休眠后，芯片将一直处在睡眠状态，直到外部复位。具体唤醒源有 RTC 定时器、触摸传感器、外部唤醒 (ext0)、外部唤醒 (ext1)、ULP 协处理器、SDIO、GPIO、UART、Wi-Fi、BT 唤醒等。 - -Auto Light-sleep 模式工作流程相对复杂，但是进入休眠状态是自动进行，同时需注意在进入前配置好唤醒源，防止芯片一直处在休眠状态。 - -.. figure:: ../../_static/Low-power-auto-light-sleep-process.png - :align: center - - Auto Light-sleep 模式工作流程图 - -根据 Auto Light-sleep 的工作流程可得其理想电流图，关键节点均在图上标出。 - -.. figure:: ../../_static/Low-power-auto-light-sleep-current.png - :align: center - - Auto Light-sleep 模式模式理想电流图 - -.. note:: - 为更加清晰地展现出 Auto Light-sleep 的主要变化，图中省略了 DFS 降频过程。 - -Auto Light-sleep 模式适用于不需要实时响应外界需求的场景。 - -Deep-sleep -++++++++++++++++++++++++++++++++++ - -Deep-sleep 模式是为了追求更好的功耗表现所设计，休眠时仅保留 RTC 控制器、RTC 外设（可配置）、ULP 协处理器、RTC 高速内存、RTC 低速内存，其余模块全部关闭。与 Light-sleep 类似，Deep-sleep 同样通过 API 进入，且需要配置唤醒源进行唤醒。 - -Deep-sleep 通过调用 API 进入，休眠时会关闭除 RTC 控制器、RTC 外设、ULP 协处理器、RTC 高速内存、RTC 低速内存外的所有模块。 - -Deep-sleep 模式需配置唤醒源，其拥有多种唤醒源，这些唤醒源也可以组合在一起，此时任何一个唤醒源都可以触发唤醒。若不配置唤醒源进入 Deep-sleep 模式，芯片将一直处在睡眠状态，直到外部复位。具体唤醒源有 RTC 定时器、触摸传感器、外部唤醒 (ext0)、外部唤醒 (ext1)、ULP 协处理器、GPIO 唤醒等。 - -Deep-sleep 模式工作流程如下图所示： - -.. figure:: ../../_static/Low-power-deep-sleep-process.png - :align: center - - Deep-sleep 模式工作流程图 - -Deep-sleep 模式主要应用场景决定了系统很长时间才会苏醒一次，完成工作后又会继续进入 Deep-sleep，所以其理想电流图如下。 - -.. figure:: ../../_static/Low-power-deep-sleep-current.png - :align: center - - Deep-sleep 模式理想电流图 - -Deep-sleep 可以用于低功耗的传感器应用，或是大部分时间都不需要进行数据传输的情况，也就是通常所说的待机模式。设备可以每隔一段时间从 Deep-sleep 状态醒来测量数据并上传，之后重新进入 Deep-sleep；也可以将多个数据存储于 RTC memory，然后一次性发送出去。 - -如何配置纯系统下低功耗模式 -+++++++++++++++++++++++++++++++++++++ - -介绍完纯系统下的低功耗模式后，本节将介绍公共配置选项、每种模式独有的配置选项，以及相应低功耗模式 API 的使用说明，同时给出相应模式推荐的配置。 - -公共配置选项 -+++++++++++++ - -.. only:: esp32 or esp32s3 - - - 单双核工作模式 - 对于多核心芯片，可以选择单核工作模式。 - - - - RTOS Tick rate (Hz) - 该参数表示系统周期任务调度的频率。例如，当 RTOS Tick rate 配置为 1000 时，系统每毫秒都会进行一次任务调度；空闲时，系统也能够更敏锐的感知到空闲状态。 - - -DFS 配置 -+++++++++++++++++++++++ - -DFS 有如下可配置选项： - -- max_freq_mhz - 该参数表示最大 CPU 频率 (MHz)，即 CPU 最高性能工作时候的频率，一般设置为芯片参数的最大值。 - -- min_freq_mhz - 该参数表示最小 CPU 频率 (MHz)，即系统处在空闲状态时 CPU 的工作频率。该字段可设置为晶振 (XTAL) 频率值，或者 XTAL 频率值除以整数。 - -- light_sleep_enable - 使能该选项，系统将在空闲状态下自动进入 Light-sleep 状态，即 Auto Light-sleep 使能，上文已经具体介绍。 - -具体配置方法如下： - -- 1. 使能 CONFIG_PM_ENABLE -- 2. 配置 max_freq_mhz 和 min_freq_mhz，方式如下: - - :: - - esp_pm_config_t pm_config = { - .max_freq_mhz = CONFIG_EXAMPLE_MAX_CPU_FREQ_MHZ, - .min_freq_mhz = CONFIG_EXAMPLE_MIN_CPU_FREQ_MHZ, - .light_sleep_enable = false - }; - ESP_ERROR_CHECK(esp_pm_configure(&pm_config)); - -推荐配置： - -.. list-table:: - :header-rows: 1 - :widths: 20 20 - - * - 配置名称 - - 设置情况 - - * - CONFIG_PM_ENABLE - - ON - - * - RTOS Tick rate (Hz) - - 1000 - - * - max_freq_mhz - - 160 - - * - min_freq_mhz - - 40 - - * - light_sleep_enable - - false - -.. note:: - 上表中不涉及的配置均是默认。 - - -Light-sleep 配置 -+++++++++++++++++++ - -本节介绍 Auto Light-sleep 的推荐配置和配置步骤。 - -Auto Light-sleep 有如下可配置选项： - -- Minimum step to enter sleep mode - 该参数表示系统自动进入休眠的阈值。该参数单位为 RTOS Tick，故其表示的时间与 RTOS Tick rate 相关，例该参数值为 3，RTOS Tick rate 配置为 1000 Hz 时，即当系统空闲时间大于等于 3 ms 时进入 休眠。 - -- Put light sleep related codes in internal RAM - 如果使能该选项，一些 light-sleep 功能将被移至 IRAM，减少代码运行时间，降低系统功耗，IRAM 使用量将增加 1.8 kB。 - -- Put RTOS IDLE related codes in internal RAM - 如果使能该选项，一些 RTOS IDLE 功能将被移至 IRAM，减少代码运行时间，降低系统功耗，IRAM 使用量将增加 260 B。 - -- RTC slow clock source - 该参数表表示 RTC 慢速时钟源。系统休眠时计时器模块的时钟被门控，此时使用 RTC Timer 进行计时，唤醒后使用 RTC Timer 的计数值对系统时间进行补偿。 - -.. list-table:: - :header-rows: 1 - :widths: 20 20 20 - - * - 时钟源 - - 精度 - - 频偏 - - * - Internal 150 kHz OSC - - 约 6.7 us/cycle - - 大 - - * - External 32 kHz XTAL - - 约 30.5 us/cycle - - 小 - -- Disable all GPIO when chip at sleep - 如果使能该选项，系统将在休眠过程中禁用所有 GPIO 管脚，消除 GPIO 漏电，降低功耗，但是休眠过程中 GPIO 无法进行信号输入和输出。 - -.. only:: esp32c3 or esp32s3 - - - Power down MAC and baseband - 如果使能该选项，系统将在休眠时关闭 Wi-Fi 和蓝牙的 MAC 和 baseband 来降低功耗，休眠电流约降低 100 uA， 但是为保存上下文信息，将额外消耗 5.3 K DRAM。 - - - Power down CPU - 如果使能该选项，系统将在休眠时将关闭 CPU 来降低功耗，对于 ESP32-C3，休眠电流减小 100 uA 左右，对于 ESP32-S3，休眠电流减小 650 uA 左右。但是为保存上下文信息，对于 ESP32-C3，将消耗 1.6 KB 的 DRAM 空间，对于 ESP32-S3，将消耗 8.58 KB 的 DRAM 空间。 - - - Power down I/D-cache tag memory - 如果使能该选项，系统将在休眠时关闭 I/D cache tag memory 来降低功耗， 但是为保存 tag memory 信息，将额外消耗最大约 9 KB DRAM，同时因为 tag memory 信息特殊性，如需打开该选项，建议多进行测试。 - - - Power down flash in Light-sleep - 如果使能该选项，系统将在 Light-sleep 休眠时关闭 flash，降低系统功耗，该选项的前提是系统没有使用 PSRAM。 - -唤醒源： - -- RTC Timer Wakeup -- GPIO Wakeup -- UART Wakeup -- Touchpad Wakeup -- External Wakeup (ext0) -- External Wakeup (ext1) -- ULP Coprocessor Wakeup - -.. note:: - 以上仅列出可配置唤醒源，详细介绍请参考 :doc:`睡眠模式 <../api-reference/system/sleep_modes>`。 - -配置方法： - -- 1. 配置唤醒源 -- 2. 使能 CONFIG_PM_ENABLE -- 3. 使能 CONFIG_FREERTOS_USE_TICKLESS_IDLE -- 4. 配置 DFS 参数 -- 5. light_sleep_enable = true，具体如下: - - :: - - esp_pm_config_t pm_config = { - .max_freq_mhz = CONFIG_EXAMPLE_MAX_CPU_FREQ_MHZ, - .min_freq_mhz = CONFIG_EXAMPLE_MIN_CPU_FREQ_MHZ, - #if CONFIG_FREERTOS_USE_TICKLESS_IDLE - .light_sleep_enable = true - #endif - }; - ESP_ERROR_CHECK(esp_pm_configure(&pm_config)); - -- 6. 配置介绍的其余相关参数 - -推荐配置： - -.. only:: esp32c3 or esp32s3 - - .. list-table:: - :header-rows: 1 - :widths: 30 15 - - * - 配置名称 - - 设置情况 - - * - CONFIG_PM_ENABLE - - ON - - * - CONFIG_FREERTOS_USE_TICKLESS_IDLE - - ON - - * - max_freq_mhz - - 160 - - * - min_freq_mhz - - 40 - - * - RTOS Tick rate (Hz) - - 1000 - - * - light_sleep_enable - - true - - * - Minimum step to enter sleep mode - - 3 - - * - Put light sleep codes in IRAM - - OFF - - * - Put RTOS IDLE codes in IRAM - - OFF - - * - RTC slow clock source - - Internal 150 kHz OSC - - * - Disable all GPIO when chip at sleep - - ON - - * - Power down MAC and baseband - - ON - - * - Power down I/D-cache tag memory - - ON - - * - Power down CPU - - ON - - * - Power down flash in light sleep - - OFF - - .. note:: - 上表中不涉及的配置均是默认 - -.. only:: esp32 or esp32s2 - - .. list-table:: - :header-rows: 1 - :widths: 30 15 - - * - 配置名称 - - 设置情况 - - * - CONFIG_PM_ENABLE - - ON - - * - CONFIG_FREERTOS_USE_TICKLESS_IDLE - - ON - - * - max_freq_mhz - - 160 - - * - min_freq_mhz - - 40 - - * - RTOS Tick rate (Hz) - - 1000 - - * - light_sleep_enable - - true - - * - Minimum step to enter sleep mode - - 3 - - * - Put light sleep codes in IRAM - - OFF - - * - Put RTOS IDLE codes in IRAM - - OFF - - * - RTC slow clock source - - Internal 150 kHz OSC - - * - Disable all GPIO when chip at sleep - - ON - - .. note:: - 上表中不涉及的配置均是默认 - -.. only:: esp32c2 - - .. list-table:: - :header-rows: 1 - :widths: 30 15 - - * - 配置名称 - - 设置情况 - - * - CONFIG_PM_ENABLE - - ON - - * - CONFIG_FREERTOS_USE_TICKLESS_IDLE - - ON - - * - max_freq_mhz - - 120 - - * - min_freq_mhz - - 40 - - * - RTOS Tick rate (Hz) - - 1000 - - * - light_sleep_enable - - true - - * - Minimum step to enter sleep mode - - 3 - - * - Put light sleep codes in IRAM - - OFF - - * - Put RTOS IDLE codes in IRAM - - OFF - - * - RTC slow clock source - - Internal 150 kHz OSC - - * - Disable all GPIO when chip at sleep - - ON - - * - Power down MAC and baseband - - ON - - * - Power down I/D-cache tag memory - - ON - - * - Power down CPU - - ON - - * - Power down flash in light sleep - - OFF - - .. note:: - 上表中不涉及的配置均是默认 - -Deep-sleep 配置 -++++++++++++++++++ - -对 Deep-sleep 模式来说，除了唤醒源相关配置，其余配置意义已经不大。 - -Deep-sleep 有如下可配置选项： - -- RTC Timer wakeup -- EXT0/1 wakeup -- Touchpad wakeup -- ULP wakeup - -.. note:: - 以上仅列出可配置唤醒源，详细介绍请参考 :doc:`睡眠模式 <../api-reference/system/sleep_modes>`。 - -配置步骤： - -- 配置唤醒源 -- 调用 API，具体如下:: - - /* Enter deep sleep */ - esp_deep_sleep_start(); - -用户可以通过下列配置选项，让一些特定模块在休眠时保持开启状态： - -- Power up External 40 MHz XTAL - 在一些特殊应用中，部分模块对休眠时的时钟精度及稳定度有很高要求（例如 BT）。这种情况下，可以考虑在休眠过程中打开 External 40 MHz XTAL。 - 打开和关闭代码如下:: - - ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON)); - ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_OFF)); - -- Power up Internal 8 MHz OSC - 在一些特殊应用中，部分模块（例如 LEDC）将 Internal 8 MHz OSC 作为时钟源，并且希望在 Light-sleep 休眠过程中也可以正常使用。这种情况下，可以考虑在休眠过程中打开 Internal 8 MHz OSC。 - 打开和关闭代码如下:: - - ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_RTC8M, ESP_PD_OPTION_ON)); - ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_RTC8M, ESP_PD_OPTION_OFF)); - -.. only:: SOC_WIFI_SUPPORTED - - Wi-Fi 场景下低功耗模式介绍 - ---------------------------------- - - 上文介绍了纯系统方向下的低功耗模式，但在实际应用中还需结合具体应用场景。本节将结合纯系统下的功耗模式来介绍在 Wi-Fi 场景下的低功耗模式。因为 Wi-Fi 场景的复杂性，本节会会首先介绍 Wi-Fi 省电的基本原理，然后再介绍具体的低功耗模式，同时本节主要针对 station 模式。 - - Wi-Fi 场景如何选择低功耗模式 - ++++++++++++++++++++++++++++++++++ - - 为方便用户选择合适的低功耗模式，在介绍具体内容前先给出 Wi-Fi 场景下低功耗模式总结表，以方便用户根据需求快速选择想要了解的内容。 - - .. todo - add sleep-current/esp32c5_summary.inc - - .. only:: not esp32c5 - - .. include:: sleep-current/{IDF_TARGET_PATH_NAME}_summary.inc - - .. note:: - - 上表中所有电流均为平均电流，表中术语在下文均有介绍，用户可根据需求进行查看 - - - Wi-Fi 省电的基本原理 - +++++++++++++++++++++ - - 首先，在 station 的工作过程中，为在接收发送过程中避免冲突，需要长时间监听信道，能耗较大的 RF 模块会一直处于工作中，浪费电量。为此，Wi-Fi 协议引入省电模式。 - - 省电模式的基本原理是通过减少不必要的监听时间来降低耗能。AP 会缓存进入省电模式的 station 的包，同时周期发送包含 TIM 信息的 Beacon 帧，TIM 会指示 AP 缓存的单播包。TIM 中，DTIM 较为特殊，其会缓存广播包，并以 n 个（由 AP 决定）TIM 为周期发送。对 station 来说，TIM 非必听，而 DTIM 为必听。因此，station 可以选择只在每一个 DTIM 帧前醒来打开 Wi-Fi 相关模块（RF 模块），而不必时刻处于监听状态，这样就能有效降低功耗。 - - .. figure:: ../../_static/Low-power-DTIM4.png - :align: center - - DTIM4 省电模式示意图 - - 其次，station 从打开到再次关闭 Wi-Fi 相关模块的时间也会影响功耗。除必要的数据传输处理时间外，主要有四项配置会影响时间长短： - - - 时钟准确性导致的 time offset，主要原因是时钟或多或少都会与理想的时间存在偏移，同时偏移的正负不定。 - - 处理 Beacon 漏听后的时间，如漏听后持续监听时间、允许最多丢失 Beacon 数目等，这段时间存不存在以及存在多久都不定，但是可以配置范围。 - - 为了确保能够接受突发数据包而添加的 active 时间，可由配置决定。 - - ILDE 时间是具体某些功耗模式进入条件要求。因此在满足通信需求的情况下，降低工作时间可以改善功耗表现。 - - .. figure:: ../../_static/Low-power-time.png - :align: center - - 芯片工作时间组成图 - - 此外，在 station 没有处于 Wi-Fi 接收或发送状态时，影响功耗的因素变成了芯片的其他模块。不同的功耗模式会配置不同的时钟源，或者动态调整一些模块的工作频率如 CPU，同时还会关闭不同数量的功能模块，这将有效降低芯片的功耗。其实也就是纯系统相关的模式，用户可根据需求自己选择合适的配置。 - - 如果以时间为横轴，电流大小为纵轴建立坐标轴，那么处在低功耗模式下芯片的理想工作电流图可以简化成下图： - - .. figure:: ../../_static/Low-power-WiFi-base-current.png - :align: center - - 理想情况下 Wi-Fi 场景低功耗模式电流图 - - 其中 station 要进行 Wi-Fi 通信时，Wi-Fi 相关模块 (PHY) 开启，电流会显著上升，在工作完成前，电流会一直维持在一个较高的水平。工作完成后，芯片会关闭 Wi-Fi 相关模块，这时电流又会降低到一个较低水平。 - - 可以看出影响功耗表现的主要有三点：interval、period 和 base current。 - - - Interval 是 station Wi-Fi 相关模块工作的间隔，既可以由低功耗模式自定义，也可根据 Wi-Fi 协议省电机制（3.1 第一点介绍），由 DTIM 周期决定。可以看出在同等情下，interval 越大，功耗表现会更好，但是响应会更慢，影响通信的及时性。 - - - Period 可以看作每次 station Wi-Fi 工作的时间，这段时间的长度也会影响功耗的表现。period 不是一个固定的时长（3.1 第二点介绍），在保证 Wi-Fi 通信正常的情况下，period 持续时间越短，功耗表现越好。但是减少 period 时间，必然会影响通信的可靠性。 - - - Base current 是 Wi-Fi 相关模块不工作时芯片的电流，影响其大小的因素很多，不同的功耗模式下休眠策略不同。所以，在满足功能的情况下，优化配置降低该电流大小可以提高功耗表现，但同时关闭其余模块会影响相关功能和芯片的唤醒时间。 - - 知道了影响功耗的三点因素之后，要想降低功耗应从这三点入手，接下来介绍两种低功耗模式，Modem sleep、Auto Light-sleep。两种模式主要区别就是对三点因素的优化不同。 - - - Modem-sleep Mode - ++++++++++++++++++ - - Modem-sleep 模式主要工作原理基于 DTIM 机制，周期性的醒来处理 Wi-Fi 相关工作，又在周期间隔之间进入休眠，关闭 PHY（RF 模块）来降低功耗。同时通过 DTIM 机制，station 可以与 AP 保持 Wi-Fi 连接，数据传输。 - - Modem-sleep 模式会在 Wi-Fi task 结束后自动进入休眠无需调用 API，休眠时仅会关闭 Wi-Fi 相关模块 (PHY)，其余模块均处在正常上电状态。 - - Modem-sleep 模式默认会根据 DTIM 周期或 listen interval（下文介绍）醒来，相当于系统自动设置了一个 Wi-Fi 唤醒源，因此用户无需再配置唤醒源，同时系统主动发包时也可以唤醒。 - - Modem-sleep 是一个开关型的模式，调用 API 开启后一直自动运行，其工作流程十分简单，具体如下图。 - - .. figure:: ../../_static/Low-power-modem-process.png - :align: center - - Modem sleep 工作流程图 - - - 根据上文的基本电流图，结合 Modem-sleep 的工作原理，以 Min Modem（下文介绍）为例可得理想情况下电流变化图。 - - .. figure:: ../../_static/Low-power-modem-current.png - :align: center - - Min Modem-sleep 理想电流图 - - Modem-sleep 一般用于 CPU 持续处于工作状态并需要保持 Wi-Fi 连接的应用场景，例如，使用 {IDF_TARGET_NAME} 本地语音唤醒功能，CPU 需要持续采集和处理音频数据。 - - DFS + Modem sleep - ++++++++++++++++++ - - Modem sleep 模式休眠状态中 CPU 仍处在工作状态，而 DFS 机制主要作用于 CPU 和 APB 工作频率来降低功耗，因此 DFS + Modem sleep 可以进一步优化功耗表现，又因为 Wi-Fi task 会申请 ESP_PM_CPU_FREQ_MAX 电源锁来保证 Wi-Fi 任务快速运行，所以 DFS + Modem sleep 产生调频只会发生在 base current 阶段，即 Wi-Fi task 结束后。 - - 在 Wi-Fi 场景下，为了介绍的简化，让用户抓住主要的变化，DFS 可以进行一定的状态简化。具体来说，虽然 DFS 主要根据 CPU 和 APB 两把锁的最高需求来调频，但是 Wi-Fi 场景都需要 CPU 的频率最大化来工作，同时 Wi-Fi task 结束后，也可以理想化的认为，没有其余的工作要完成，这样就可以简单认为经过一段时间会释放两把锁进入空闲状态（IDLE 状态），也同时忽略这段时间锁的变化导致的电流变化，简化状态。 - - 在 Wi-Fi 场景下，DFS 最终简化为如下流程： - - .. figure:: ../../_static/Low-power-DFS-process.png - :align: center - - Wi-Fi 场景 DFS 简化流程图 - - 在 Wi-Fi 工作的 active 状态与系统空闲的 IDLE 状态转换，Wi-Fi task 结束后，系统经过一段时间释放了所有锁进入 IDLE 状态，此时 DFS 机制降低频率到设定最低值，忽略了转换状态期间的调频动作，方便理解。 - - 简化过后的 DFS + Modem sleep 模式理想状态下的电流大小如下图所示： - - .. figure:: ../../_static/Low-power-DFS-modem-current.png - :align: center - - DFS + Modem sleep 模式理想电流图 - - - Auto Light-sleep + Wi-Fi 场景 - +++++++++++++++++++++++++++++++ - - Auto Light-sleep 模式在 Wi-Fi 场景下是 ESP-IDF 电源管理机制、DTIM 机制和 light-sleep 的结合。开启电源管理是其前置条件，auto 体现在系统进入 IDLE 状态超过设定值后自动进入 light-sleep。同时 auto light sleep 模式同样遵循 DTIM 机制，会自动苏醒，可以与 AP 保持 Wi-Fi 连接。 - - Auto Light-sleep 模式在 Wi-Fi 场景下休眠机制与纯系统下一样，仍然依赖于电源管理机制，进入休眠的条件为系统处于 IDLE 状态的时间超过设定时间，并且系统会提前判断空闲时间是否满足条件，若满足直接休眠。该过程为自动进行。休眠时会自动关闭 RF、8 MHz 振荡器、40 MHz 高速晶振、PLL，门控数字内核时钟，暂停 CPU 工作。 - - Auto Light-sleep 模式在 Wi-Fi 场景下遵循 DTIM 机制，自动在 DTIM 帧到来前苏醒，相当于系统自动设置了一个 Wi-Fi 唤醒源，因此用户无需再配置唤醒源。同时系统主动发包时也可以唤醒。 - - Auto Light-sleep 模式在 Wi-Fi 场景下工作流程较为复杂，但全程都是自动进行，具体如下图所示。 - - .. figure:: ../../_static/Low-power-wifi-auto-light-process.png - :align: center - - Auto Light-sleep 工作流程图 - - Auto Light-sleep 模式在 Wi-Fi 场景下经常与 modem sleep 同时开启，这里给出 modem + auto light-sleep 模式的理想电流图，关键节点均在图上标出。 - - .. figure:: ../../_static/Low-power-wifi-auto-light-current.png - :align: center - - modem + auto light-sleep 模式理想电流图 - - Auto Light-sleep 模式在 Wi-Fi 场景下可用于需要保持 Wi-Fi 连接，可以实时响应 AP 发来数据的场景。并且在未接收到命令时，CPU 可以处于空闲状态。比如 Wi-Fi 开关的应用，大部分时间 CPU 都是空闲的，直到收到控制命令，CPU 才需要进行 GPIO 的操作。 - - - Deep-sleep + Wi-Fi 场景 - +++++++++++++++++++++++++++++++++ - - Deep-sleep 模式在 Wi-Fi 场景下与纯系统下基本相同，详情可以参考 `Deep-sleep`_ 这里不再介绍。 - - - 如何配置 Wi-Fi 场景下低功耗模式 - +++++++++++++++++++++++++++++++++++++ - - 介绍完 Wi-Fi 场景下低功耗模式后，本节将介绍公共配置选项、每种模式独有的配置选项，以及相应低功耗模式 API 的使用说明，同时给出相应模式推荐的配置（包含纯系统下的低功耗推荐配置）以及该配置的具体表现。 - - 公共配置选项： - - - 功耗类： - - - Max Wi-Fi TX power (dBm) - 该参数表示最大 TX 功率，降低该参数会减小发包功耗，但会影响 Wi-Fi 性能，默认设置最大 20。 - - - IRAM 类： - - - Wi-Fi IRAM speed optimization - 如果使能该选项，一些 Wi-Fi 功能将被移至 IRAM，减少代码运行时间，降低系统功耗，IRAM 使用量将增加，默认开启。 - - - Wi-Fi RX IRAM speed optimization - 如果使能该选项，一些 Wi-Fi RX 功能将被移至 IRAM，减少代码运行时间，降低系统功耗，IRAM 使用量将增加，默认开启。 - - - Wi-Fi Sleep IRAM speed optimization - 如果使能该选项，一些 Wi-Fi sleep 功能将被移至 IRAM，减少代码运行时间，降低系统功耗，IRAM 使用量将增加，默认关闭。 - - - Wi-Fi 协议类： - - - Minimum active time - 该参数表示 Station 接收完一次数据后需要等待时间。当终端与 AP 进行通信时，AP 发送到终端的数据经常是突发形式的，为确保后续的突发数据能够正常接收到，需要等待一段时间。默认 50。 - - - Maximum keep alive time - 该参数表示周期性的发送 sleep null data 来通告 AP 维持连接的时间。在 DTIM 机制下，若 AP 长时间没有某个 station 的包，可能会断开连接，因此需要 station 需要周期发送 sleep null data 维持连接。默认 10。 - - - Send gratuitous ARP periodically - 如果使能该选项，Station 将周期性的发送 gratuitous ARP 请求更新 AP ARP 缓存表。如无该需求，可以关闭。 - - - Wi-Fi sleep optimize when beacon lost - 如果使能该选项，Station 在检测到已经错过或者丢失 beacon 时，会立即关闭 RF 进入低功耗状态。 - - Modem sleep 配置方法如下: - - - 可配置选项 - - - Min Modem - 该参数表示 station 按照 DTIM 周期工作，在每个 DTIM 前醒来接收 Beacon，这样不会漏掉广播信息，但是 DTIM 周期由 AP 决定，如果 DTIM 周期较短，省电效果会降低。 - - - Max Modem - 该参数表示 station 会自定义一个 listen interval，并以 listen interval 为周期醒来接受 Beacon。这样在 listen interval 较大时会省电，但是容易漏听 DTIM，错过广播数据。 - - - - 配置方法： - - - 调用 API，选择模式参数:: - - typedef enum { - WIFI_PS_NONE, - WIFI_PS_MIN_MODEM, - WIFI_PS_MAX_MODEM, - } wifi_ps_type_t; - esp_err_t esp_wifi_set_ps(wifi_ps_type_t type); - - 若选择 WIFI_PS_MAX_MODEM，还需配置 listen interval，示例如下:: - - #define LISTEN_INTERVAL 3 - wifi_config_t wifi_config = { - .sta = { - .ssid = "SSID", - .password = "Password", - .listen_interval = LISTEN_INTERVAL, - }, - }; - ESP_ERROR_CHECK(esp_wifi_set_mode(WIFI_MODE_STA)); - ESP_ERROR_CHECK(esp_wifi_set_config(ESP_IF_WIFI_STA, &wifi_config)); - ESP_ERROR_CHECK(esp_wifi_start()); - - 配置推荐： - - 这里给出的配置推荐是 Min Modem sleep + DFS 开启的配置 - - .. list-table:: - :header-rows: 1 - :widths: 20 15 - - * - 配置名称 - - 设置情况 - - * - WIFI_PS_MIN_MODEM - - ON - - * - CONFIG_PM_ENABLE - - ON - - * - RTOS Tick rate (Hz) - - 1000 - - * - max_freq_mhz - - 160 - - * - min_freq_mhz - - 40 - - * - light_sleep_enable - - false - - 配置表现： - - .. todo - add sleep-current/esp32c5_modem_sleep.inc - - .. only:: not esp32c5 - - .. include:: sleep-current/{IDF_TARGET_PATH_NAME}_modem_sleep.inc - - Auto Light-sleep + Wi-Fi 场景配置： - - Auto Light-sleep 在 Wi-Fi 场景下的配置比纯系统下少了唤醒源的配置要求，其余几乎与纯系统下配置一致，因此可配置选项、配置步骤、推荐配置的详细介绍可以参考上文 `Light-sleep`_。同时 Wi-Fi 相关配置保持默认。 - - 配置表现： - - 该配置表现为 Auto Light-sleep 纯系统推荐配置 + 默认的 Wi-Fi 相关配置在 Wi-Fi 场景的表现。 - - .. todo - add sleep-current/esp32c5_light_sleep.inc - - .. only:: not esp32c5 - - .. include:: sleep-current/{IDF_TARGET_PATH_NAME}_light_sleep.inc - - Deep-sleep + Wi-Fi 场景配置： - - Deep-sleep 模式在 Wi-Fi 场景下的配置与纯系统下配置基本一致，因此可配置选项、配置步骤、推荐配置的详细介绍可以参考上文 `Deep-sleep`_。同时 Wi-Fi 相关配置保持默认。 - - 配置表现： - - 该配置表现为 Deep-sleep 纯系统推荐配置 + 默认的 Wi-Fi 相关配置在 Wi-Fi 场景的表现。 - - .. only:: esp32 - - 平均电流约 5.0 μA - - .. only:: esp32s2 - - 平均电流约 5.0 μA - - .. only:: esp32s3 - - 平均电流约 6.9 μA - - .. only:: esp32c3 - - 平均电流约 4.8 μA - - .. only:: esp32c2 - - 平均电流约 4.9 μA - -.. only:: esp32c6 - - 目标唤醒时间 (TWT) - ---------------------------------- - - 目标唤醒时间 (Target Wake Time, TWT) 是 Wi-Fi 6 中引入的一项特性，旨在降低设备功耗和提高网络效率。 - - 在以往的 Wi-Fi 节能机制中，设备可能需要在每个 DTIM 周期醒来与 AP 交换数据，而在 TWT 机制中支持 AP 和设备协商得到特定的唤醒时间，设备会在这些时间点醒来与 AP 进行数据交换，而其余时间则处于休眠状态。TWT 协商的唤醒和休眠时间取决于设备具体的应用需求。例如，有些传感器设备需要定时上传数据，在该场景下设备可以与 AP 建立 TWT 协商，相隔多个小时交换一次数据。实际应用中可根据具体需求定制唤醒时间，在不影响设备正常工作的情况下降低功耗。 - - AP 可以与多个设备建立 TWT 协商。利用 Wi-Fi 6 的多用户特性，AP 可以对上行和下行数据传输做出合理协调，从而减少信道竞争，提高传输效率。 - - TWT 类型 - ++++++++++ - - 根据协商类型和工作模式，可以把 TWT 分为： - - - **Individual TWT (iTWT)** - - iTWT 模式下，AP 与终端设备建立的是一对一的 TWT 协商。 - - - **Broadcast TWT (bTWT)** - - 在 bTWT 模式下，AP 通过 Beacon 帧广播 TWT 信息，以组的形式来管理多个终端设备的 TWT 过程。终端设备可以根据 Beacon 中的 TWT 信息选择执行加组操作。 - - .. note:: - 在建立 TWT 协商前，需要确认 AP 是否支持并开启了 TWT 功能。{IDF_TARGET_NAME} 当前只支持 iTWT 模式。 - - TWT 工作流程 - ++++++++++++ - TWT 工作流程一般分为 TWT 协商建立、TWT 协商暂停/恢复、TWT 协商终止。TWT 协商建立后，Station 就可以按照协商的参数进入休眠状态，直到约定好的下一个 TWT 时间点到来时苏醒。 - 对已经建立的 TWT，用户可以根据需求协商暂停/恢复 TWT 或者终止 TWT。 - - - TWT 协商建立 - - - Individual TWT 协商建立 - - 在 iTWT 协商建立过程中，通常由 Station 充当请求发起方发送 TWT 请求，而后 AP 作为接收方对该请求做出回应。AP 也可以主动向 Station 发起 TWT 协商建立过程。 - 在成功建立起 iTWT 协商后，Station 可以进入休眠状态，直到约定好的下一个 TWT 时间点到来时苏醒，该时间点通过和 AP 间的协商得到。Station 醒来后和 AP 进行数据交换，这段时间被称为 TWT 服务时间 (Service Period, SP)。 - TWT SP 的持续时间被称为 TWT Wake Duration，其最小值为 256 微秒。当一次 TWT SP 结束后，Station 进入休眠状态直到下次 TWT SP 醒来进行数据传输。本次 TWT SP 的起始到下次 TWT SP 的起始的时间间隔被称为 TWT Wake Interval。下图为基本的 iTWT 示例： - - .. figure:: ../../_static/itwt_setup.png - :align: center - - Individual TWT 协商建立过程示例 - - Station 在 iTWT 协商建立时可以发送不同类型的请求，AP 会根据请求类型及参数做出对应的回复。用户需要根据 AP 回复中的类型和具体参数决定后续的操作逻辑。Station 所发送的请求类型有 ``Request``、``Suggest`` 和 ``Demand``。 - AP 的回复类型可分为 ``Accept``、``Alternate`` 和 ``Dictate``。下表描述了发送不同请求时 AP 可能的回复以及不同情况下对应的含义： - - .. list-table:: - :header-rows: 1 - :widths: 20 10 40 - - * - 请求类型 - - AP 回复 - - 含义 - * - Request, Suggest or Demand - - No response - - 在该情况下 AP 不会与 Station 建立 iTWT 协商。 - * - Suggest or Request - - Accept - - AP 同意建立 iTWT 协商，其使用的参数以回复中 TWT 参数为准。回复中的 TWT 参数有可能与请求中不一致。 - * - Demand - - Accept - - AP 同意建立 iTWT 协商，且回复中的 TWT 参数与请求中的一致。 - * - Demand or Suggest - - Alternate - - AP 使用该回复类型代表给 Station提供一组备选 TWT 参数，此时不会建立 iTWT 协商。后续 Station 可以发送新的请求，但 AP 仍有可能使用该组参数。 - * - Demand or Suggest - - Dictate - - AP 使用该回复类型代表给 Station 提供一组备选 TWT 参数，此时不会建立 iTWT 协商，同时也表明 AP 不接受除该组参数以外的其他参数。后续 Station 可以发送新的请求，但只有参数与所提供的备选参数一致才会收到 Accept 回复。 - * - Request, Suggest or Demand - - Reject - - 在该情况下 AP 不会与 station 建立 iTWT 协商。后续 Station 可以更改 TWT 参数发送新的请求。 - - 在 TWT SP 中依照数据交互时的操作可以将 TWT 进一步地细分为多种类型，下表描述了这些类型间的差异： - - .. list-table:: - :header-rows: 1 - :widths: 10 20 - - * - Types - - 含义 - * - Trigger-enabled - - AP 会在 SP 中使用 Trigger 帧来协调 Station 的数据传输。 - * - Non trigger-enabled - - 在 SP 中不需要使用 Trigger 帧。 - * - Announced - - Station 会发送 QoS Null 帧告知 AP 其唤醒状态。 - * - Unannounced - - 不需要发送 QoS Null 帧。 - - - Broadcast TWT 协商建立 - - 与 iTWT 不同的是，在 bTWT 模式下 AP 将 TWT 信息放在 Beacon 帧中进行广播宣告。Station 接收到 Beacon 后，可以向 AP 发送请求申请选择加入某个 TWT。 - 当建立起 bTWT 协商后， Station 和 AP 会在协商好的 TWT SP 中进行数据传输。 - - 与 iTWT 类似，可以把 bTWT 进一步分成 Trigger-enabled 和 Non trigger-enabled 类型，以及 Announced 和 Unannounced 类型，具体的行为差异可以参考 iTWT 中的描述。 - - - TWT 协商暂停/恢复 - - 建立起 TWT 协商后， Station 可以通过向 AP 发送 TWT Information 帧暂停或者恢复指定的 TWT 协商。由 flow_id 来标识需要暂停或者恢复的 TWT 协商，具体可以参考 TWT 参数配置。 - - .. figure:: ../../_static/itwt_suspend.png - :align: center - - Individual TWT 协商暂停/恢复过程示例 - - - TWT 协商终止 - - 建立起 TWT 协商后， Station 可以通过向 AP 发送 TWT Teardown 帧终止指定的 TWT 协商。由 flow_id 来标识需要终止的 TWT 协商，具体可以参考 TWT 参数配置。 - - .. figure:: ../../_static/itwt_teardown.png - :align: center - - Individual TWT 协商终止过程示例 - - TWT 参数配置 - ++++++++++++ - - 在使用过程中，需要配置 TWT 和低功耗模式的相关参数，其中低功耗模式相关参数决定了设备在休眠状态下的行为模式。本小节将主要阐述如何配置 TWT，有关低功耗模式下的参数配置，请参考 `如何配置 Wi-Fi 场景下低功耗模式`_。 - - - Individual TWT 参数配置 - - 在建立 Station 和 AP 间的 iTWT 时，使用 :component_file:`esp_wifi/include/esp_wifi_he_types.h` 中定义的结构体 :cpp:type:`wifi_twt_setup_config_t` 来配置 TWT 的相关参数，其定义如下： - - .. code-block:: C - - typedef struct - { - wifi_twt_setup_cmds_t setup_cmd; - uint16_t trigger :1; - uint16_t flow_type :1; - uint16_t flow_id :3; - uint16_t wake_invl_expn :5; - uint16_t wake_duration_unit :1; - uint16_t reserved :5; - uint8_t min_wake_dura; - uint16_t wake_invl_mant; - uint16_t twt_id; - uint16_t timeout_time_ms; - } wifi_twt_setup_config_t; - - :cpp:type:`wifi_twt_setup_config_t` 中各个字段的含义如下： - - .. list-table:: - :header-rows: 1 - :widths: 15 45 - :align: center - - * - 字段 - - 描述 - * - setup_cmd - - 指示了 TWT 建立时请求和回复使用的命令类型，具体类型请参阅 :cpp:type:`wifi_twt_setup_cmds_t` 。 - * - trigger - - 值为 1 时配置 TWT 类型为 Trigger-enabled，值为 0 时配置为 Non trigger-enabled。 - * - flow_type - - 值为 1 时配置 TWT 类型为 Unannounced，值为 0 时配置为 Announced。 - * - flow_id - - 当建立起一个 iTWT 协商后，AP 会为其分配 flow_id。Station 在协商建立请求中可以指定 flow_id，但在 AP 的回复中该字段可能会被改变。 - * - wake_invl_expn - - TWT Wake Interval 指数部分。 - * - wake_duration_unit - - TWT Wake Duration 计数单元。为 0 代表 256 微秒，为 1 代表以 TU (1024 微秒) 为单位。 - * - reserved - - 保留字段。 - * - min_wake_dura - - 该字段代表 Station 期望处于唤醒状态的时间，以 ``wake_duration_unit`` 作为基本单位。 - * - wake_invl_mant - - TWT Wake Interval 尾数部分。 - * - twt_id - - TWT 配置标识。在发起多个 TWT 请求时，该字段用于在 handler 中区分不同的 TWT 参数配置。 - * - timeout_time_ms - - TWT 请求超时时间，单位为毫秒。 - - 需要指出的是，Station 在协商中所期望的 TWT Wake Interval 为 wake_invl_mant * 2\ :sup:`wake_invl_expn`\，单位是微秒。 - 而所期望的 TWT Wake Duration 为 min_wake_dura * wake_duration_unit。 - - .. note:: - 注意， TWT Wake Interval 和 TWT Wake Duration 的差值需要大于 10 毫秒。 - - 配置示例如下： - - .. code-block:: C - - wifi_twt_setup_config_t setup_config = { - .setup_cmd = TWT_REQUEST, - .flow_id = 0, - .twt_id = 0, - .flow_type = 0, - .min_wake_dura = 255, - .wake_duration_unit = 0, - .wake_invl_expn = 10, - .wake_invl_mant = 512, - .trigger = 1, - .timeout_time_ms = 5000, - }; - - 以上配置指定建立 TWT 请求时使用的类型为 Trigger-enabled，Announced，期望的 TWT Wake Interval 为 524288 微秒， TWT Wake Duration 为 65280 微秒。配置好 :cpp:type:`wifi_twt_setup_config_t` 后，调用 API :cpp:func:`esp_wifi_sta_itwt_setup` 向 AP 发起 iTWT 建立请求。 - - .. note:: - {IDF_TARGET_NAME} 支持用户调用 API :cpp:func:`esp_wifi_sta_itwt_set_target_wake_time_offset` 配置相对于目标唤醒时间的偏移时间。 - - TWT 事件 - ++++++++++ - - - WIFI_EVENT_ITWT_SETUP - - 发送请求后，用户可以在 :cpp:enumerator:`WIFI_EVENT_ITWT_SETUP` 事件的对应处理程序中获取请求结果并自定义处理逻辑。事件结果保存在 :cpp:type:`wifi_event_sta_itwt_setup_t` 结构体中，其成员变量 status 指示了此次事件的状态。 - 当 status 为 :c:macro:`ITWT_SETUP_SUCCESS` 时代表请求成功收到了对应回复，为其他值代表请求失败。在得到请求成功的状态后，用户可以从该结构体中的 config 成员变量中得到 AP 回复中的具体参数，并根据具体参数决定后续的处理逻辑。 - 例如，Station 发送了类型为 Demand 的 TWT 请求，收到 AP 的回复类型为 Dictate，用户此时可以考察回复中的 TWT 参数是否可行，若可行便可以发送一个新的 TWT 请求与 AP 继续建立 TWT 协商，并且该请求中的 TWT 参数需要与 AP 回复中一致。 - - 在 Station 未主动发送请求时也有可能触发 :cpp:enumerator:`WIFI_EVENT_ITWT_SETUP` 事件，这种情况下对应的是 AP 主动向 Station 发起 iTWT 协商建立过程，此时 AP 向 Station 发送的帧中会带有 TWT 参数。同样地，用户可以在 :cpp:enumerator:`WIFI_EVENT_ITWT_SETUP` 事件的对应处理程序中获取结果并自定义处理逻辑。 - 用户需要检查 config 成员变量中 AP 发送的 TWT 参数类型，一般有两种情况： - 1. AP 发送的 TWT 参数为 Accept 类型，此时 Station 会与 AP 建立起使用该 TWT 参数的 iTWT 协商。若用户不希望建立此 iTWT 协商，可以向 AP 发送 Teardown 帧。 - 2. AP 发送的 TWT 参数为 Alternate 或 Dictate 类型，此时 Station 不会与 AP 建立起 iTWT 协商，但可以在接下来使用该参数向 AP 发起 iTWT 协商建立请求。 - - - WIFI_EVENT_ITWT_SUSPEND - - 在调用 API :cpp:func:`esp_wifi_sta_itwt_suspend` 请求暂停已经建立的 iTWT 协商时， 用户可以在 :cpp:enumerator:`WIFI_EVENT_ITWT_SUSPEND` 事件的对应处理程序中获取请求结果并自定义处理逻辑。事件结果保存在 :cpp:type:`wifi_event_sta_itwt_suspend_t` 结构体中，其成员变量 status 指示了此次事件的状态。 - 当 status 为 :c:macro:`ESP_OK` 时代表成功暂停了指定的 iTWT 协商，为其他值代表请求暂停失败。 - - .. note:: - 注意，调用 API :cpp:func:`esp_wifi_sta_itwt_suspend` 请求暂停 iTWT 时，用户需要指定对应 iTWT 的 flow_id 以及暂停时间。需要注意的是，当暂停时间大于 0 时，对应 iTWT 会在暂停指定时间后恢复，而当暂停时间为 0 时，对应的 iTWT 会暂停，直到被用户调用 API 手动恢复为止。 - - - WIFI_EVENT_ITWT_TEARDOWN - - 在调用 API :cpp:func:`esp_wifi_sta_itwt_teardown` 请求终止 iTWT 时，用户可以在 :cpp:enumerator:`WIFI_EVENT_ITWT_TEARDOWN` 事件的对应处理程序中获取请求结果并自定义处理逻辑。事件结果保存在 :cpp:type:`wifi_event_sta_itwt_teardown_t` 结构体中，其成员变量 status 指示了此次事件的状态。 - 当 status 为 :cpp:enumerator:`ITWT_TEARDOWN_SUCCESS` 时代表成功终止了指定的 iTWT 协商，为其他值代表终止 iTWT 失败。调用 API 时用户需要指定需要终止的 iTWT 的 flow_id。 - - - WIFI_EVENT_TWT_WAKEUP - - 当 Station 在休眠中醒来时，Wi-Fi 驱动程序将会上报 :cpp:enumerator:`WIFI_EVENT_TWT_WAKEUP` 事件，用户可以在该事件的对应处理程序中自定义处理逻辑。事件结果保存在 :cpp:type:`wifi_event_sta_twt_wakeup_t` 结构体中，成员变量 twt_type 指示了此次事件 TWT 的类型，成员变量 flow_id 指示了此次醒来的具体的 TWT。 - - - WIFI_EVENT_ITWT_PROBE - - 调用 API :cpp:func:`esp_wifi_sta_itwt_send_probe_req` 在 iTWT 期间发送 probe request 时，用户可以在 :cpp:enumerator:`WIFI_EVENT_ITWT_PROBE` 事件的对应处理程序中获取请求结果并自定义处理逻辑。事件结果保存在 :cpp:type:`wifi_event_sta_itwt_probe_t` 结构体中，其成员变量 status 指示了此次事件的状态。 - 当 status 为 :cpp:enumerator:`ITWT_PROBE_SUCCESS` 时代表成功发送 probe request 并且接收到 AP 回复的 probe response，为其他值代表发送或者接收 probe 失败。 - - - 有关 iTWT 使用的更多信息，可以参考示例 :example:`wifi/itwt` 。 - - TWT 功耗分析 - +++++++++++++ - - 为了展现 TWT 在节省设备功耗方面的优势，我们使用功率分析仪追踪了 {IDF_TARGET_NAME} 在不同模式下的电流情况。如下图所示，{IDF_TARGET_NAME} 首先处于 DTIM 模式，接着与 AP 建立起 iTWT 协商，TWT Wake Interval 为 10 s，在 TWT SP 结束后，{IDF_TARGET_NAME} 会进入 Light-sleep 状态直到下个 SP 到来时唤醒。 - 其中 :cpp:type:`wifi_twt_setup_config_t` 配置示例如下： - - .. code-block:: C - - wifi_twt_setup_config_t setup_config = { - .setup_cmd = TWT_REQUEST, - .flow_id = 0, - .twt_id = 0, - .flow_type = 0, - .min_wake_dura = 255, - .wake_duration_unit = 0, - .wake_invl_expn = 10, - .wake_invl_mant = 10000, - .trigger = 1, - .timeout_time_ms = 5000, - }; - - .. figure:: ../../_static/itwt_10s_current.png - :align: center - - DTIM 与 iTWT 模式下的电流图 - - 进一步，将 TWT 协商中的 TWT Wake Interval 参数更改为 30 s，下图展现了参数变化对于电流的影响。 - 其中 :cpp:type:`wifi_twt_setup_config_t` 配置示例如下： - - .. code-block:: C - - wifi_twt_setup_config_t setup_config = { - .setup_cmd = TWT_REQUEST, - .flow_id = 0, - .twt_id = 0, - .flow_type = 0, - .min_wake_dura = 255, - .wake_duration_unit = 0, - .wake_invl_expn = 10, - .wake_invl_mant = 30000, - .trigger = 1, - .timeout_time_ms = 5000, - }; - - .. figure:: ../../_static/itwt_30s_current.png - :align: center - - 更改参数后的 DTIM 与 iTWT 模式下的电流图 diff --git a/docs/zh_CN/api-guides/low-power-mode/index.rst b/docs/zh_CN/api-guides/low-power-mode/index.rst new file mode 100644 index 00000000000..8c1d526cfe4 --- /dev/null +++ b/docs/zh_CN/api-guides/low-power-mode/index.rst @@ -0,0 +1,15 @@ +低功耗模式 +============ + +:link_to_translation:`en:[English]` + +概述 +------ + +在嵌入式物联网应用场中，待机性能表现十分重要。本指南旨在介绍 {IDF_TARGET_NAME} 低功耗的基本原理，同时介绍 {IDF_TARGET_NAME} 支持的低功耗模式。文档还会具体给出推荐配置、配置步骤和每种模式下的功耗表现，以帮助用户根据实际需求快速配置适合的低功耗模式。 + +.. toctree:: + :maxdepth: 2 + + low-power-mode-soc + :SOC_WIFI_SUPPORTED: low-power-mode-wifi diff --git a/docs/zh_CN/api-guides/low-power-mode/low-power-mode-soc.rst b/docs/zh_CN/api-guides/low-power-mode/low-power-mode-soc.rst new file mode 100644 index 00000000000..24c36f23d4c --- /dev/null +++ b/docs/zh_CN/api-guides/low-power-mode/low-power-mode-soc.rst @@ -0,0 +1,495 @@ +系统低功耗模式介绍 +=================== + +:link_to_translation:`en:[English]` + +{IDF_TARGET_NAME} 支持多种低功耗模式，从系统功耗管理角度来看，主要有 DFS、Light-sleep 模式和 Deep-sleep 模式。这些模式降低功耗的主要策略是在不影响系统功能的前提下，尽可能降低时钟频率 (DFS) 或进入睡眠状态，在睡眠状态下关闭不必要的电源域或对不使用的外设进行时钟门控以降低功耗。根据关闭电源域的等级是否会破坏程序运行上下文又细分为 Light-sleep 模式和 Deep-sleep 模式。 + +.. only:: SOC_WIFI_SUPPORTED or SOC_BLE_SUPPORTED + + 其次地，对于 {IDF_TARGET_NAME} 常用的工作场景，如 Wi-Fi/蓝牙工作时，基于上述的几种低功耗模式，ESP-IDF 还提供了进行过针对性优化的细分低功耗模式，将在后续章节介绍。 + +本节将首先从纯系统角度介绍，不涉及具体工作场景的低功耗模式。 + +DFS +------ + +Dynamic Frequency Scaling (DFS) 即动态频率切换，是 ESP-IDF 中集成的电源管理机制的基础功能。DFS 可以根据应用程序持有电源锁的情况，调整外围总线 (APB) 频率和 CPU 频率。持有高性能锁就使用高频，空闲状态不持有电源锁时则使用低频来降低功耗，以此来尽可能减少运行应用程序的功耗。 + +DFS 的调频机制即根据持有电源锁的最大频率需求来调整频率，同时，`CONFIG_FREERTOS_HZ` 的数值也会对 DFS 调频产生影响。:ref:`CONFIG_FREERTOS_HZ` 值越大，即系统任务调度的频率越高，意味着系统能更及时地根据需求调整频率。有关调频机制的详细信息，请参见 :doc:`电源管理 <../../api-reference/system/power_management>`。 + +下图为 DFS 调频机制运行的理想电流情况。 + +.. code-block:: text + + 持有 CPU 和 APB MAX 锁 + │ + │ 释放 CPU MAX 锁 + ▲ │ / + 电流大小 │ ▼ / + │ ──────────┐ 释放 APB MAX 锁 + │ │ / + │ │ / + │ └─────────┐ + │ ▲ │ + │ │ │ + │ 第 m 个 tick │ └─────────── + │ ▲ + │ │ + │ 第 n 个 tick │ + └──────────────────────────────────────► + 时间 + 理想 DFS 机制调频电流图 + +DFS 适用于 CPU 必须处于工作状态但是对低功耗有需求的场景，因此 DFS 通常与其他低功耗模式共同开启，下文会详细介绍。 + +.. _Light-sleep 模式: + +Light-sleep 模式 +------------------- + +Light-sleep 模式是 {IDF_TARGET_NAME} 预设的一种低功耗模式，用户可以通过调用 :cpp:func:`esp_light_sleep_start` 接口主动切换至 Light-sleep 模式，进入睡眠后，芯片将根据当前各外设的工作状态，关闭不必要的电源域和对睡眠期间不使用的模块进行时钟门控。{IDF_TARGET_NAME} 支持多种唤醒源，详见 :doc:`睡眠模式 <../../api-reference/system/sleep_modes>`，当芯片从 Light-sleep 模式唤醒后，CPU 会接着入睡时的上下文继续运行，外设的工作状态也不会被破坏。为充分利用 Light-sleep 模式以降低芯片功耗，更推荐用户使用下述的 Auto Light-sleep 模式。 + +Auto Light-sleep 模式是 ESP-IDF :doc:`电源管理 <../../api-reference/system/power_management>` 组件基于 FreeRTOS 的 Tickless IDLE 功能提供的一种低功耗模式。当应用程序释放所有电源锁，FreeRTOS 的所有任务都进入阻塞态或挂起态时，系统会自动获取下一个有就绪事件需要唤醒操作系统的时间点，当判定此时间点距当前超过设定时间（:ref:`CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP`）后，``esp_pm`` 组件会自动配置定时器唤醒源并进入 light sleep 以降低功耗。用户在配置 DFS 时置真 :cpp:type:`esp_pm_config_t` 中的 ``light_sleep_enable`` 字段即可启用该模式，详见下文中的 `DFS 配置`_。 + +.. code-block:: text + + ┌────────┐ + │ │ + │ DFS │ + │ │ + └───┬────┘ + │ + ▼ + ┌──────────┐ 系统空闲 ┌──────────┐ 超过设定时间 ┌──────────┐ + │ │ ─────────────► │ │ ────────────► │ │ + │ │ │ │ │ auto │ + │ active │ │ IDLE │ │ light │ + │ │ │ │ │ sleep │ + │ │ ◄───────────── │ │ │ │ + └──────────┘ 系统非空闲 └──────────┘ └────┬────┘ + ▲ │ + │ 配置唤醒源唤醒 │ + └──────────────────────────────────────────────────────────────┘ + + Auto Light-sleep 模式工作流程图 + +根据 Auto Light-sleep 模式的工作流程可得其理想电流图，关键节点均在图上标出。 + +.. code-block:: text + + 电流 ▲ 系统 IDLE DFS 降频 + 大小 | │ 系统判断空闲时间超过设定值 + | ▼ / light sleep + | ┌──┐ / ┌──┐ + | │ └──┐ │ └──┐ + | | │ | │ + | │ │ │ │ + | ───┘ └────────┘ └──── + | \ + │ 唤醒源唤醒 + └───────────────────────────────► + 时间 + Auto Light-sleep 模式理想电流图 + +.. note:: + + - 为更加清晰地展现出 Auto Light-sleep 模式的主要变化，上图中省略了 DFS 降频过程。 + + - Auto Light-sleep 模式适用于不需要实时响应外界需求的场景。 + + - Auto Light-sleep 功能基于定时器唤醒源实现，所以用户应用程序中不可以再主动配置定时器唤醒源。 + + +.. _Deep-sleep 模式: + +Deep-sleep 模式 +----------------- + +Deep-sleep 模式是为了追求更好的功耗表现所设计，休眠时仅保留 RTC/LP 相关内存及外设，其余模块全部关闭。与 Light-sleep 模式类似，Deep-sleep 模式同样通过 API 进入，且需要配置唤醒源进行唤醒，用户可以通过调用 :cpp:func:`esp_deep_sleep_start` 接口主动切换至 Deep-sleep 模式。 + +Deep-sleep 模式需配置唤醒源，{IDF_TARGET_NAME} 支持多种唤醒源，完整唤醒源列表详见 :doc:`睡眠模式 <../../api-reference/system/sleep_modes>`。这些唤醒源也可以组合在一起，此时任何一个唤醒源都可以触发唤醒。若不配置唤醒源进入 Deep-sleep 模式，芯片将一直处在睡眠状态，直到外部复位。与 Light-sleep 模式不同，Deep-sleep 模式唤醒后会丢失睡眠前的 CPU 运行上下文，因此，唤醒后需要重新运行引导加载程序才可进入用户程序。 + +Deep-sleep 模式工作流程如下图所示： + +.. code-block:: text + + ┌───────┐ 调用 API ┌───────┐ + │ ├───────────►│ deep │ + │active │ │ sleep │ + │ │ │ │ + └───────┘ └───┬───┘ + ▲ │ + └────────────────────┘ + 配置的唤醒源唤醒 + Deep-sleep 模式工作流程图 + +Deep-sleep 模式主要应用场景决定了系统很长时间才会苏醒一次，完成工作后又会继续进入 deep sleep 状态，所以其理想电流图如下。 + +.. code-block:: text + + 电流 ▲ + 大小 | + | 调用 API + | │ + | ▼ + | ┌────┐ + | │ │ + | 唤醒源唤醒 | | + | \ | | + | \ │ │ + │ ──────────┘ └──────────────── + │ + └──────────────────────────────────────────► + 时间 + Deep-sleep 模式理想电流图 + +Deep-sleep 模式可以用于低功耗的传感器应用，或是大部分时间都不需要进行数据传输的情况，也就是通常所说的待机模式。 + + +.. only:: ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB + + 设备也可以每隔一段时间从 deep sleep 状态醒来测量数据并上传，之后重新进入 deep sleep；也可以将多个数据存储于 RTC 内存，然后在下次唤醒时一次性发送。此特性可借助 deep-sleep-stub 功能实现，详见 :doc:`Deep-sleep 唤醒存根 <../../api-guides/deep-sleep-stub>`。 + +如何配置纯系统下低功耗模式 +------------------------------ + +介绍完纯系统下的低功耗模式后，本节将介绍公共配置选项、每种模式的推荐配置以及配置方法。 + +公共配置选项 +------------ + +.. note:: + + 下文为公共配置选项的简单介绍，点击相应链接获取详细内容。 + +.. only:: esp32 or esp32s3 + + - 单双核工作模式 (:ref:`CONFIG_FREERTOS_UNICORE`) + 对于多核心芯片，可以选择单核工作模式。 + + + - RTOS Tick rate (Hz) (:ref:`CONFIG_FREERTOS_HZ`) + 该参数表示系统周期任务调度的频率。 + + +DFS 配置 +------------ + +DFS 有如下可配置选项： + +- ``max_freq_mhz`` + 该参数表示最大 CPU 频率 (MHz)，即 CPU 最高性能工作时候的频率，一般设置为芯片参数的最大值。 + +- ``min_freq_mhz`` + 该参数表示最小 CPU 频率 (MHz)，即系统处在空闲状态时 CPU 的工作频率。该字段可设置为晶振 (XTAL) 频率值，或者 XTAL 频率值除以整数。 + +- ``light_sleep_enable`` + 使能该选项，系统将在空闲状态下自动进入 light sleep 状态，即 Auto Light-sleep 模式使能，上文已经具体介绍。 + +具体配置方法如下： + +1. 使能 :ref:`CONFIG_PM_ENABLE` +2. 配置 ``max_freq_mhz`` 和 ``min_freq_mhz``，方式如下： + + :: + + esp_pm_config_t pm_config = { + .max_freq_mhz = CONFIG_EXAMPLE_MAX_CPU_FREQ_MHZ, + .min_freq_mhz = CONFIG_EXAMPLE_MIN_CPU_FREQ_MHZ, + .light_sleep_enable = false + }; + ESP_ERROR_CHECK(esp_pm_configure(&pm_config)); + +推荐配置 +++++++++++++++ + +.. list-table:: + :header-rows: 1 + :widths: 40 20 + + * - 配置名称 + - 设置情况 + + * - 启用电源管理组件 (:ref:`CONFIG_PM_ENABLE`) + - ON + + * - RTOS Tick rate (Hz) (:ref:`CONFIG_FREERTOS_HZ`) + - 1000 + + * - ``max_freq_mhz`` + - 160 + + * - ``min_freq_mhz`` + - 40 + + * - ``light_sleep_enable`` + - false + +.. note:: + 上表中不涉及的配置均是默认。 + + +Light-sleep 模式配置 +--------------------- + +本节介绍 Auto Light-sleep 模式的推荐配置和配置步骤。 + +.. note:: + + 下文为 Auto Light-sleep 模式配置选项的简单介绍，点击相应链接获取详细内容。 + +- 进入睡眠模式前最小 IDLE Tick 数 (:ref:`CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP`) +- 将 light sleep 相关代码放置在片内 RAM 中 (:ref:`CONFIG_PM_SLP_IRAM_OPT`) +- 将 RTOS IDLE 相关代码放置在片内 RAM 中 (:ref:`CONFIG_PM_RTOS_IDLE_OPT`) +- RTC 慢速时钟源 (:ref:`CONFIG_RTC_CLK_SRC`) + + .. list-table:: + :header-rows: 1 + :widths: 40 40 20 + + * - 时钟源 + - 定时精度 + - 频偏 + + * - RTC_CLK_SRC_INT_RC + - 高 + - 大 + + * - RTC_CLK_SRC_EXT_CRYS + - 低 + - 小 + +- 芯片休眠时禁用所有 GPIO (:ref:`CONFIG_PM_SLP_DISABLE_GPIO`) + +.. only:: SOC_PM_SUPPORT_MAC_BB_PD + + - 关闭 MAC 和基带 (:ref:`CONFIG_ESP_PHY_MAC_BB_PD`) + + +.. only:: SOC_PM_SUPPORT_CPU_PD + + - 关闭 CPU (:ref:`CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP`) + + +.. only:: SOC_PM_SUPPORT_TAGMEM_PD + + - 关闭指令和数据缓存中的标签存储器 (I/D-cache tag memory) (:ref:`CONFIG_PM_RESTORE_CACHE_TAGMEM_AFTER_LIGHT_SLEEP`) + + +.. only:: SOC_PM_SUPPORT_VDDSDIO_PD + + - 在 light sleep 状态关闭 flash 供电 (:ref:`CONFIG_ESP_SLEEP_POWER_DOWN_FLASH`) + + .. only:: SOC_SPIRAM_SUPPORTED + + 由于 flash 和 PSRAM 共用供电管脚，PSRAM 关闭供电将会导致数据丢失，因此，为保证 light sleep 不破坏程序运行状态，启用该选项的前提是系统没有使用 PSRAM。 + + +配置方法： + +1. 配置唤醒源（详见 :doc:`睡眠模式 <../../api-reference/system/sleep_modes>`） +2. 使能 :ref:`CONFIG_PM_ENABLE` +3. 使能 :ref:`CONFIG_FREERTOS_USE_TICKLESS_IDLE` +4. 配置 DFS 参数 +5. ``light_sleep_enable`` = true，具体如下： + + :: + + esp_pm_config_t pm_config = { + .max_freq_mhz = CONFIG_EXAMPLE_MAX_CPU_FREQ_MHZ, + .min_freq_mhz = CONFIG_EXAMPLE_MIN_CPU_FREQ_MHZ, + #if CONFIG_FREERTOS_USE_TICKLESS_IDLE + .light_sleep_enable = true + #endif + }; + ESP_ERROR_CHECK(esp_pm_configure(&pm_config)); + +6. 配置介绍的其余相关参数 + +推荐配置 ++++++++++ + +.. only:: esp32c3 or esp32s3 + + .. list-table:: + :header-rows: 1 + :widths: 30 15 + + * - 配置名称 + - 设置情况 + + * - 启用电源管理组件 (:ref:`CONFIG_PM_ENABLE`) + - ON + + * - 启用 Tickless IDLE 模式 (:ref:`CONFIG_FREERTOS_USE_TICKLESS_IDLE`) + - ON + + * - RTOS Tick rate (Hz) (:ref:`CONFIG_FREERTOS_HZ`) + - 1000 + + * - 进入睡眠模式前最小 IDLE Tick 数 (:ref:`CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP`) + - 3 + + * - 将 light sleep 相关代码放置在片内 RAM 中 (:ref:`CONFIG_PM_SLP_IRAM_OPT`) + - OFF + + * - 将 RTOS IDLE 相关代码放置在片内 RAM 中 (:ref:`CONFIG_PM_RTOS_IDLE_OPT`) + - OFF + + * - RTC 慢速时钟源 (:ref:`CONFIG_RTC_CLK_SRC`) + - 内部 150 kHz 振荡器 + + * - 芯片休眠时禁用所有 GPIO (:ref:`CONFIG_PM_SLP_DISABLE_GPIO`) + - ON + + * - 关闭 MAC 和基带 (:ref:`CONFIG_ESP_PHY_MAC_BB_PD`) + - ON + + * - 关闭 CPU (:ref:`CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP`) + - ON + +.. only:: SOC_PM_SUPPORT_TAGMEM_PD + + * - 关闭指令和数据缓存中的标签存储器 (I/D-cache tag memory) (:ref:`CONFIG_PM_RESTORE_CACHE_TAGMEM_AFTER_LIGHT_SLEEP`) + - ON + + + * - 在 light sleep 状态关闭 flash 供电 (:ref:`CONFIG_ESP_SLEEP_POWER_DOWN_FLASH`) + - OFF + + * - ``max_freq_mhz`` + - 160 + + * - ``min_freq_mhz`` + - 40 + + * - ``light_sleep_enable`` + - true + + .. note:: + 上表中不涉及的配置均是默认。 + +.. only:: esp32 or esp32s2 + + .. list-table:: + :header-rows: 1 + :widths: 30 15 + + * - 配置名称 + - 设置情况 + + * - 启用电源管理组件 (:ref:`CONFIG_PM_ENABLE`) + - ON + + * - 启用 Tickless IDLE 模式 (:ref:`CONFIG_FREERTOS_USE_TICKLESS_IDLE`) + - ON + + * - RTOS Tick rate (Hz) (:ref:`CONFIG_FREERTOS_HZ`) + - 1000 + + * - 进入睡眠模式前最小 IDLE Tick 数 (:ref:`CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP`) + - 3 + + * - 将 light sleep 相关代码放置在片内 RAM 中 (:ref:`CONFIG_PM_SLP_IRAM_OPT`) + - OFF + + * - 将 RTOS IDLE 相关代码放置在片内 RAM 中 (:ref:`CONFIG_PM_RTOS_IDLE_OPT`) + - OFF + + * - RTC 慢速时钟源 (:ref:`CONFIG_RTC_CLK_SRC`) + - 内部 150 kHz 振荡器 + + * - 芯片休眠时禁用所有 GPIO (:ref:`CONFIG_PM_SLP_DISABLE_GPIO`) + - ON + + * - ``max_freq_mhz`` + - 160 + + * - ``min_freq_mhz`` + - 40 + + * - ``light_sleep_enable`` + - true + + .. note:: + 上表中不涉及的配置均是默认。 + +.. only:: esp32c2 + + .. list-table:: + :header-rows: 1 + :widths: 30 15 + + * - 配置名称 + - 设置情况 + + * - 启用电源管理组件 (:ref:`CONFIG_PM_ENABLE`) + - ON + + * - 启用 Tickless IDLE 模式 (:ref:`CONFIG_FREERTOS_USE_TICKLESS_IDLE`) + - ON + + * - RTOS Tick rate (Hz) (:ref:`CONFIG_FREERTOS_HZ`) + - 1000 + + * - 进入睡眠模式前最小 IDLE Tick 数 (:ref:`CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP`) + - 3 + + * - 将 light sleep 相关代码放置在片内 RAM 中 (:ref:`CONFIG_PM_SLP_IRAM_OPT`) + - OFF + + * - 将 RTOS IDLE 相关代码放置在片内 RAM 中 (:ref:`CONFIG_PM_RTOS_IDLE_OPT`) + - OFF + + * - RTC 慢速时钟源 (:ref:`CONFIG_RTC_CLK_SRC`) + - 内部 150 kHz 振荡器 + + * - 芯片休眠时禁用所有 GPIO (:ref:`CONFIG_PM_SLP_DISABLE_GPIO`) + - ON + + * - 在 light sleep 状态关闭 flash 供电 (:ref:`CONFIG_ESP_SLEEP_POWER_DOWN_FLASH`) + - OFF + + * - ``max_freq_mhz`` + - 120 + + * - ``min_freq_mhz`` + - 40 + + * - ``light_sleep_enable`` + - true + + .. note:: + 上表中不涉及的配置均是默认。 + +Deep-sleep 模式配置 +--------------------- + +对 Deep-sleep 模式来说，除了唤醒源相关配置，其余配置意义已经不大。 + +配置方法： + +1. 配置唤醒源（详见 :doc:`睡眠模式 <../../api-reference/system/sleep_modes>`） +2. 调用 API，具体如下 + +.. code-block:: none + + /* Enter deep sleep */ + esp_deep_sleep_start(); + +用户可以通过下列配置选项，让一些特定模块在休眠时保持开启状态： + +- 打开外部 40 MHz 晶振 (XTAL) + 在一些特殊应用中，部分模块对休眠时的时钟精度及稳定度有很高要求（例如蓝牙模块）。这种情况下，可以考虑在休眠过程中打开 外部 40 MHz 晶振。 + 打开和关闭代码如下:: + + ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON)); + ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_OFF)); + +- 打开内部 8 MHz 振荡器 (OSC) + 在一些特殊应用中，部分模块（例如 LEDC 模块）将 内部 8 MHz 振荡器作为时钟源，并且希望在 light sleep 状态也可以正常使用。这种情况下，可以考虑在休眠过程中打开内部 8 MHz 振荡器。 + 打开和关闭代码如下:: + + ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_RTC8M, ESP_PD_OPTION_ON)); + ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_RTC8M, ESP_PD_OPTION_OFF)); diff --git a/docs/zh_CN/api-guides/low-power-mode/low-power-mode-wifi.rst b/docs/zh_CN/api-guides/low-power-mode/low-power-mode-wifi.rst new file mode 100644 index 00000000000..01681e2b075 --- /dev/null +++ b/docs/zh_CN/api-guides/low-power-mode/low-power-mode-wifi.rst @@ -0,0 +1,417 @@ +Wi-Fi 场景下低功耗模式介绍 +========================== + +:link_to_translation:`en:[English]` + +本节将结合纯系统下的功耗模式来介绍 Wi-Fi 场景下的低功耗模式。因为 Wi-Fi 场景的复杂性，本节会首先介绍 Wi-Fi 省电的基本原理，然后再介绍具体的低功耗模式。本节主要针对 station 模式。 + +Wi-Fi 场景如何选择低功耗模式 +-------------------------------------- + +在介绍具体内容前先给出 Wi-Fi 场景下低功耗模式总结表，以方便用户根据需求快速选择想要了解的内容，选择合适的低功耗模式。 + +.. todo - add sleep-current/esp32c5_summary.inc + +.. only:: not esp32c5 + + .. include:: ../sleep-current/{IDF_TARGET_PATH_NAME}_summary.inc + +.. note:: + + 上表中所有电流均为平均电流，表中术语在下文均有介绍，用户可根据需求进行查看。 + +.. _Wi-Fi 省电的基本原理: + +Wi-Fi 省电的基本原理 +--------------------- + +首先，在 station 的工作过程中，为在接收发送过程中避免冲突，需要长时间监听信道，能耗较大的 RF 模块会一直处于工作中，浪费电量。为此，Wi-Fi 协议引入省电模式。 + +省电模式的基本原理是通过减少不必要的监听时间来降低耗能。AP 会缓存进入省电模式的 station 的包，同时周期发送包含 TIM 信息的 beacon 帧，TIM 会指示 AP 缓存的单播包。TIM 中，DTIM 较为特殊，其会缓存广播包，并以 n 个（由 AP 决定）TIM 为周期发送。对 station 来说，TIM 非必听，而 DTIM 为必听。因此，station 可以选择只在每一个 DTIM 帧前醒来打开 Wi-Fi 相关模块（RF 模块），而不必时刻处于监听状态，这样就能有效降低功耗。 + +.. code-block:: text + + DTIM DTIM + TIM │ │ + │ │ │ │ │ │ │ │ │ │ │ + │ │ │ │ │ │ │ │ │ │ │ + AP ───┴────┴────┴────┴────┴────┴────┴────┴────┴────┴────┴──── + + + ┌────┐ ┌────┐ + │ │ │ │ + │ │ │ │ + │ │ │ │ + Sta ────────────────┴────┴─────────────┴────┴───────────────── + + DTIM4 省电模式示意图 + +其次，station 从打开到再次关闭 Wi-Fi 相关模块的时间也会影响功耗。除必要的数据传输处理时间外，主要有四项配置会影响时间长短： + + - 时钟准确性导致的 time offset，主要原因是时钟或多或少都会与理想的时间存在偏移，同时偏移的正负不定。 + - 处理 beacon 漏听后的时间，如漏听后持续监听时间、允许最多丢失 beacon 数目等，这段时间存不存在以及存在多久都不定，但是可以配置范围。 + - 为了确保能够接受突发数据包而添加的 active 时间，可由配置决定。 + - ILDE 时间是具体某些功耗模式进入条件要求。因此在满足通信需求的情况下，降低工作时间可以改善功耗表现。 + +.. code-block:: text + + ┌────────────┬────────────┬────────────┬────────────┬────────────┐ + │ │ │ │ │ │ + │time offset │ 必要处理时间 │ beacon │ active │ IDLE │ + │ │ │ 漏听处理时间 │ 时间 │ 时间 │ + │ │ │ │ │ │ + └────────────┴────────────┴────────────┴────────────┴────────────┘ + 芯片工作时间组成图 + +此外，在 station 没有处于 Wi-Fi 接收或发送状态时，影响功耗的因素变成了芯片的其他模块。不同的功耗模式会配置不同的时钟源，或者动态调整一些模块的工作频率如 CPU，同时还会关闭不同数量的功能模块，这将有效降低芯片的功耗。用户可根据需求自己选择合适的配置。 + +如果以时间为横轴，电流大小为纵轴建立坐标轴，那么处在低功耗模式下芯片的理想工作电流图可以简化成下图： + +.. code-block:: text + + ▲ + 电流 | + 大小 | + | interval period + | │ ◄──────────► │ │ ◄─► │ + | ┌─────┐ ┌─────┐ ┌─────┐ + | │ │ │ │ │ │ + | | | | | | | base current + | | | | | | | | + | | | | | | | ▼ + | ───┘ └────────┘ └────────┘ └────── + | + └───────────────────────────────────────────────► + 时间 + 理想情况下 Wi-Fi 场景低功耗模式电流图 + +其中 station 要进行 Wi-Fi 通信时，Wi-Fi 相关模块 (PHY) 开启，电流会显著上升，在工作完成前，电流会一直维持在一个较高的水平。工作完成后，芯片会关闭 Wi-Fi 相关模块，这时电流又会降低到一个较低水平。 + +可以看出影响功耗表现的主要有三点：interval、period 和 base current。 + + - **interval** 是 station Wi-Fi 相关模块工作的间隔，既可以由低功耗模式自定义，也可根据 Wi-Fi 协议省电机制（详细内容请见 :ref:`Wi-Fi 省电的基本原理`），由 DTIM 周期决定。可以看出在同等情下，interval 越大，功耗表现会更好，但是响应会更慢，影响通信的及时性。 + + - **period** 可以看作每次 station Wi-Fi 工作的时间，这段时间的长度也会影响功耗的表现。period 不是一个固定的时长（详细内容请见 :ref:`Wi-Fi 省电的基本原理`），在保证 Wi-Fi 通信正常的情况下，period 持续时间越短，功耗表现越好。但是减少 period 时间，必然会影响通信的可靠性。 + + - **base current** 是 Wi-Fi 相关模块不工作时芯片的电流，影响其大小的因素很多，不同的功耗模式下休眠策略不同。所以，在满足功能的情况下，优化配置降低该电流大小可以提高功耗表现，但同时关闭其余模块会影响相关功能和芯片的唤醒时间。 + +知道了影响功耗的三点因素之后，要想降低功耗应从这三点入手，接下来介绍两种低功耗模式，Modem-sleep 模式、Auto Light-sleep 模式。两种模式主要区别就是对三点因素的优化不同。 + + +Modem-sleep 模式 +------------------ + +Modem-sleep 模式主要工作原理基于 DTIM 机制，周期性的醒来处理 Wi-Fi 相关工作，又在周期间隔之间进入休眠，关闭 PHY（RF 模块）来降低功耗。同时通过 DTIM 机制，station 可以与 AP 保持 Wi-Fi 连接，数据传输。 + +Modem-sleep 模式会在 Wi-Fi 任务结束后自动进入休眠无需调用 API，休眠时仅会关闭 Wi-Fi 相关模块 (PHY)，其余模块均处在正常上电状态。 + +Modem-sleep 模式默认会根据 DTIM 周期或 listen interval（于 :ref:`Modem-sleep 模式配置` 中介绍）醒来，相当于系统自动设置了一个 Wi-Fi 唤醒源，因此用户无需再配置唤醒源，同时系统主动发包时也可以唤醒。 + +Modem-sleep 模式是一个开关型的模式，调用 API 开启后一直自动运行，其工作流程十分简单，具体如下图。 + +.. code-block:: text + + ┌───────────┐ Wi-Fi 任务结束 ┌───────────┐ + │ ├────────────────────────►│ modem │ + │ active │ │ sleep │ + │ │◄────────────────────────┤ │ + └───────────┘ DTIM 周期到来 └───────────┘ + / 主动发包 + + Modem-sleep 模式工作流程图 + +根据上文的基本电流图，结合 Modem-sleep 模式的工作原理，以 Min Modem 模式（于 :ref:`Modem-sleep 模式配置` 中介绍）为例可得理想情况下电流变化图。 + +.. code-block:: text + + 电流 ▲ + 大小 | + | DTIM 周期 + | │ ◄──────────► │ + | ┌─────┐ ┌─────┐ ┌─────┐ + | │ │ │ │ │ │ + | DTIM | | | | | | + | 到来前 | | | | | | Wi-Fi 任务结束 + | \ | | | | | | / + | \ │ │ │ │ │ │/ + | ────────┘ └────────┘ └────────┘ └────── + | + └─────────────────────────────────────────────────────► + 时间 + Min Modem-sleep 模式理想电流图 + +Modem-sleep 模式一般用于 CPU 持续处于工作状态并需要保持 Wi-Fi 连接的应用场景，例如，使用 {IDF_TARGET_NAME} 本地语音唤醒功能，CPU 需要持续采集和处理音频数据。 + +DFS + Modem-sleep 模式 +------------------------- + +Modem-sleep 模式休眠状态中 CPU 仍处在工作状态，而 DFS 机制主要作用于 CPU 和 APB 工作频率来降低功耗，因此 DFS + Modem sleep 模式可以进一步优化功耗表现，又因为 Wi-Fi 任务会申请 :cpp:enumerator:`ESP_PM_CPU_FREQ_MAX` 电源锁来保证 Wi-Fi 任务快速运行，所以 DFS + Modem-sleep 模式产生调频只会发生在 base current 阶段，即 Wi-Fi 任务结束后。 + +在 Wi-Fi 场景下，为了让用户抓住主要的变化，DFS 可以进行一定的状态简化。具体来说，虽然 DFS 主要根据 CPU 和 APB 两把锁的最高需求来调频，但是 Wi-Fi 场景都需要 CPU 的频率最大化来工作，同时 Wi-Fi 任务结束后，也可以理想化的认为，没有其余的工作要完成，这样就可以简单认为经过一段时间会释放两把锁进入空闲状态（IDLE 状态），也同时忽略这段时间锁的变化导致的电流变化，简化状态。 + +在 Wi-Fi 场景下，DFS 最终简化为如下流程： + +.. code-block:: text + + ┌────────┐ + │ │ + │ DFS │ + │ │ + └───┬────┘ + │ + ▼ + ┌──────────┐ 系统空闲 ┌──────────┐ + │ │ ─────────────► │ │ + │ │ │ │ + │ active │ │ IDLE │ + │ │ │ │ + │ │ ◄───────────── │ │ + └──────────┘ 系统非空闲 └──────────┘ + + Wi-Fi 场景 DFS 简化流程图 + +在 Wi-Fi 工作的 active 状态与系统空闲的 IDLE 状态转换，Wi-Fi 任务结束后，系统经过一段时间释放了所有锁进入 IDLE 状态，此时 DFS 机制降低频率到设定最低值，忽略了转换状态期间的调频动作，方便理解。 + +简化过后的 DFS + Modem sleep 模式理想状态下的电流大小如下图所示： + +.. code-block:: text + + 电流 ▲ Wi-Fi 任务结束 + 大小 | / modem sleep + | / + | ┌─────┐ ┌─────┐ + | │ │ │ │ + | | | | | 锁释放完 + | | | | | DFS 降频 + | | | | | IDLE + | | | | | / + | | | | | / + | | │ | │ / + | │ └─┐ │ └─┐ + | ────────┘ └───────────────┘ └───────── + | + └─────────────────────────────────────────────────────► + 时间 + DFS + Modem sleep 模式理想电流图 + +Auto Light-sleep 模式 + Wi-Fi 场景 +------------------------------------ + +Auto Light-sleep 模式在 Wi-Fi 场景下是 ESP-IDF 电源管理机制、DTIM 机制和 Light-sleep 模式的结合。开启电源管理是其前置条件，auto 体现在系统进入 IDLE 状态超过设定值后自动进入 light sleep。同时 Auto Light-sleep 模式同样遵循 DTIM 机制，会自动苏醒，可以与 AP 保持 Wi-Fi 连接。 + +Auto Light-sleep 模式在 Wi-Fi 场景下休眠机制与纯系统下一样，仍然依赖于电源管理机制，进入休眠的条件为系统处于 IDLE 状态的时间超过设定时间，并且系统会提前判断空闲时间是否满足条件，若满足直接休眠。该过程为自动进行。休眠时会自动关闭 RF、8 MHz 振荡器、40 MHz 高速晶振、PLL，门控数字内核时钟，暂停 CPU 工作。 + +Auto Light-sleep 模式在 Wi-Fi 场景下遵循 DTIM 机制，自动在 DTIM 帧到来前苏醒，相当于系统自动设置了一个 Wi-Fi 唤醒源，因此用户无需再配置唤醒源。同时系统主动发包时也可以唤醒。 + +Auto Light-sleep 模式在 Wi-Fi 场景下工作流程较为复杂，但全程都是自动进行，具体如下图所示： + +.. code-block:: text + + ┌────────┐ + │ │ + │ DFS │ + │ │ + └───┬────┘ + │ + ▼ + ┌──────────┐ 系统空闲 ┌──────────┐ 超过设定时间 ┌──────────┐ + │ │ ─────────────► │ │ ────────────► │ │ + │ │ │ │ │ auto │ + │ active │ │ IDLE │ │ light │ + │ │ │ │ │ sleep │ + │ │ ◄───────────── │ │ │ │ + └──────────┘ 系统非空闲 └──────────┘ └────┬────┘ + ▲ │ + │ DTIM 周期到来 / 主动发包 │ + └──────────────────────────────────────────────────────────────┘ + + Auto Light-sleep 模式工作流程图 + +Auto Light-sleep 模式在 Wi-Fi 场景下经常与 Modem-sleep 模式同时开启，这里给出 Modem + Auto Light-sleep 模式的理想电流图，关键节点均在图上标出。 + +.. code-block:: text + + DTIM 周期 + 电流 ▲ │ ◄───────────────────► │ + 大小 | ┌─────┐ ┌─────┐ + | │ │ \ │ │ + | | | \ | | + | | | Wi-Fi 任务结束 | | + | | | modem sleep | | + | | | | | + | | | | | 系统判断空闲 + | DTIM | | 系统 IDLE | | 时间超过设定值 + | 到来前 | │ DFS 降频 | │ light sleep + | \ | └─┐ / | └─┐ / + | \ │ └─┐ / │ └─┐ / + | ────────┘ └─────────────┘ └───────── + | + └─────────────────────────────────────────────────────► + 时间 + Modem + Auto Light-sleep 模式理想电流图 + +Auto Light-sleep 模式在 Wi-Fi 场景下可用于需要保持 Wi-Fi 连接，可以实时响应 AP 发来数据的场景。并且在未接收到命令时，CPU 可以处于空闲状态。比如 Wi-Fi 开关的应用，大部分时间 CPU 都是空闲的，直到收到控制命令，CPU 才需要进行 GPIO 的操作。 + + +Deep-sleep 模式 + Wi-Fi 场景 +------------------------------ + +Deep-sleep 模式在 Wi-Fi 场景下与纯系统下基本相同，详情可以参考 :ref:`Deep-sleep 模式`，这里不再介绍。 + + +如何配置 Wi-Fi 场景下低功耗模式 +---------------------------------------- + +介绍完 Wi-Fi 场景下低功耗模式后，本节将介绍公共配置选项、每种模式独有的配置选项，以及相应低功耗模式 API 的使用说明，同时给出相应模式推荐的配置（包含纯系统下的低功耗推荐配置）以及该配置的具体表现。 + +.. note:: + + 下文为配置选项的简单介绍，点击相应链接获取详细内容。 + +公共配置选项 +++++++++++++++ + +- 功耗类： + + - Max Wi-Fi TX power (dBm) (:ref:`CONFIG_ESP_PHY_MAX_WIFI_TX_POWER`) + +- 速度优化类： + + - Wi-Fi IRAM 速度优化 (:ref:`CONFIG_ESP_WIFI_IRAM_OPT`) + - Wi-Fi RX IRAM 速度优化 (:ref:`CONFIG_ESP_WIFI_RX_IRAM_OPT`) + - Wi-Fi Sleep IRAM 速度优化 (:ref:`CONFIG_ESP_WIFI_SLP_IRAM_OPT`) + + +- Wi-Fi 协议类： + + - Minimum active time (:ref:`CONFIG_ESP_WIFI_SLP_DEFAULT_MIN_ACTIVE_TIME`) + + - Maximum keep alive time (:ref:`CONFIG_ESP_WIFI_SLP_DEFAULT_MAX_ACTIVE_TIME`) + + - 周期性发送无条件 ARP (:ref:`CONFIG_LWIP_ESP_GRATUITOUS_ARP`) + + - 丢失 beacon 时睡眠优化 (:ref:`CONFIG_ESP_WIFI_SLP_BEACON_LOST_OPT`) + + +.. _Modem-sleep 模式配置: + +Modem-sleep 模式配置 ++++++++++++++++++++++++ + +- 可配置选项 + + - Min Modem + 该参数表示 station 按照 DTIM 周期工作，在每个 DTIM 前醒来接收 beacon，这样不会漏掉广播信息，但是 DTIM 周期由 AP 决定，如果 DTIM 周期较短，省电效果会降低。 + + - Max Modem + 该参数表示 station 会自定义一个 listen interval，并以 listen interval 为周期醒来接受 beacon。这样在 listen interval 较大时会省电，但是容易漏听 DTIM，错过广播数据。 + + +- 配置方法 + + - 调用 API，选择模式参数 + + .. code-block:: none + + typedef enum { + WIFI_PS_NONE, + WIFI_PS_MIN_MODEM, + WIFI_PS_MAX_MODEM, + } wifi_ps_type_t; + esp_err_t esp_wifi_set_ps(wifi_ps_type_t type); + + 若选择 WIFI_PS_MAX_MODEM，还需配置 listen interval，示例如下:: + + #define LISTEN_INTERVAL 3 + wifi_config_t wifi_config = { + .sta = { + .ssid = "SSID", + .password = "Password", + .listen_interval = LISTEN_INTERVAL, + }, + }; + ESP_ERROR_CHECK(esp_wifi_set_mode(WIFI_MODE_STA)); + ESP_ERROR_CHECK(esp_wifi_set_config(ESP_IF_WIFI_STA, &wifi_config)); + ESP_ERROR_CHECK(esp_wifi_start()); + +- 推荐配置 + + 这里给出的推荐配置是 Min Modem-sleep 模式 + DFS 开启的配置 + + .. list-table:: + :header-rows: 1 + :widths: 20 15 + + * - 配置名称 + - 设置情况 + + * - WIFI_PS_MIN_MODEM + - ON + + * - CONFIG_PM_ENABLE + - ON + + * - RTOS Tick rate (Hz) + - 1000 + + * - ``max_freq_mhz`` + - 160 + + * - ``min_freq_mhz`` + - 40 + + * - ``light_sleep_enable`` + - false + +- 配置表现 + + .. todo - add sleep-current/esp32c5_modem_sleep.inc + + .. only:: not esp32c5 + + .. include:: ../sleep-current/{IDF_TARGET_PATH_NAME}_modem_sleep.inc + + +Auto Light-sleep 模式 + Wi-Fi 场景配置 ++++++++++++++++++++++++++++++++++++++++++ + +Auto Light-sleep 在 Wi-Fi 场景下的配置比纯系统下少了唤醒源的配置要求，其余几乎与纯系统下配置一致，因此可配置选项、配置步骤、推荐配置的详细介绍可以参考上文 :ref:`Deep-sleep 模式`。同时 Wi-Fi 相关配置保持默认。 + +- 配置表现 + + 该配置表现为 Auto Light-sleep 模式纯系统推荐配置 + 默认的 Wi-Fi 相关配置在 Wi-Fi 场景的表现。 + + .. todo - add sleep-current/esp32c5_light_sleep.inc + + .. only:: not esp32c5 + + .. include:: ../sleep-current/{IDF_TARGET_PATH_NAME}_light_sleep.inc + +Deep-sleep 模式 + Wi-Fi 场景配置 ++++++++++++++++++++++++++++++++++++ + +Deep-sleep 模式在 Wi-Fi 场景下的配置与纯系统下配置基本一致，因此可配置选项、配置步骤、推荐配置的详细介绍可以参考上文 :ref:`Deep-sleep 模式`。同时 Wi-Fi 相关配置保持默认。 + +- 配置表现 + + 该配置表现为 Deep-sleep 模式纯系统推荐配置 + 默认的 Wi-Fi 相关配置在 Wi-Fi 场景的表现。 + + .. only:: esp32 + + 平均电流约 5.0 μA + + .. only:: esp32s2 + + 平均电流约 5.0 μA + + .. only:: esp32s3 + + 平均电流约 6.9 μA + + .. only:: esp32c3 + + 平均电流约 4.8 μA + + .. only:: esp32c2 + + 平均电流约 4.9 μA diff --git a/docs/zh_CN/api-guides/sleep-current/esp32_light_sleep.inc b/docs/zh_CN/api-guides/sleep-current/esp32_light_sleep.inc index 42f805079a4..802eeb4ff5e 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32_light_sleep.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32_light_sleep.inc @@ -2,11 +2,11 @@ :header-rows: 1 :widths: 20 10 20 20 20 - * - CPU frequency + * - CPU 频率 - DTIM - - Average current(mA) - - Max current(mA) - - Min current(mA) + - 平均电流 (mA) + - 最大电流 (mA) + - 最小电流 (mA) * - 160 MHz - 1 diff --git a/docs/zh_CN/api-guides/sleep-current/esp32_modem_sleep.inc b/docs/zh_CN/api-guides/sleep-current/esp32_modem_sleep.inc index b35e5478b67..2777ce0b827 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32_modem_sleep.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32_modem_sleep.inc @@ -2,12 +2,12 @@ :header-rows: 1 :widths: 20 10 10 20 20 20 - * - CPU frequency + * - CPU 频率 - DFS - DTIM - - Average current(mA) - - Max current(mA) - - Min current(mA) + - 平均电流 (mA) + - 最大电流 (mA) + - 最小电流 (mA) * - 160 MHz - ON diff --git a/docs/zh_CN/api-guides/sleep-current/esp32_summary.inc b/docs/zh_CN/api-guides/sleep-current/esp32_summary.inc index b264dae15bc..40ea647ba68 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32_summary.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32_summary.inc @@ -3,10 +3,10 @@ :widths: 20 20 30 20 20 * - 项目 - - Modem Sleep - - Modem Sleep+DFS - - auto light Sleep - - Deep Sleep + - Modem-sleep + - Modem-sleep+DFS + - Auto Light-sleep + - Deep-sleep * - 休眠 - 自动 diff --git a/docs/zh_CN/api-guides/sleep-current/esp32c2_light_sleep.inc b/docs/zh_CN/api-guides/sleep-current/esp32c2_light_sleep.inc index 050ffeabbfd..b63da54ebc7 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32c2_light_sleep.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32c2_light_sleep.inc @@ -2,11 +2,11 @@ :header-rows: 1 :widths: 20 10 20 20 20 - * - CPU frequency + * - CPU 频率 - DTIM - - Average current(mA) - - Max current(mA) - - Min current(mA) + - 平均电流 (mA) + - 最大电流 (mA) + - 最小电流 (mA) * - 120 MHz - 1 diff --git a/docs/zh_CN/api-guides/sleep-current/esp32c2_modem_sleep.inc b/docs/zh_CN/api-guides/sleep-current/esp32c2_modem_sleep.inc index 814808725ca..762b649a95d 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32c2_modem_sleep.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32c2_modem_sleep.inc @@ -2,12 +2,12 @@ :header-rows: 1 :widths: 20 10 10 20 20 20 - * - CPU frequency + * - CPU 频率 - DFS - DTIM - - Average current(mA) - - Max current(mA) - - Min current(mA) + - 平均电流 (mA) + - 最大电流 (mA) + - 最小电流 (mA) * - 120 MHz - ON diff --git a/docs/zh_CN/api-guides/sleep-current/esp32c2_summary.inc b/docs/zh_CN/api-guides/sleep-current/esp32c2_summary.inc index 70357324d49..9767d4c9b3e 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32c2_summary.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32c2_summary.inc @@ -3,10 +3,10 @@ :widths: 20 20 30 20 20 * - 项目 - - Modem Sleep - - Modem Sleep+DFS - - auto light Sleep - - Deep Sleep + - Modem-sleep + - Modem-sleep+DFS + - Auto Light-sleep + - Deep-sleep * - 休眠 - 自动 diff --git a/docs/zh_CN/api-guides/sleep-current/esp32c3_light_sleep.inc b/docs/zh_CN/api-guides/sleep-current/esp32c3_light_sleep.inc index a36ad970257..3321f15b449 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32c3_light_sleep.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32c3_light_sleep.inc @@ -2,11 +2,11 @@ :header-rows: 1 :widths: 20 10 20 20 20 - * - CPU frequency + * - CPU 频率 - DTIM - - Average current(mA) - - Max current(mA) - - Min current(mA) + - 平均电流 (mA) + - 最大电流 (mA) + - 最小电流 (mA) * - 160 MHz - 1 diff --git a/docs/zh_CN/api-guides/sleep-current/esp32c3_modem_sleep.inc b/docs/zh_CN/api-guides/sleep-current/esp32c3_modem_sleep.inc index 81128a9967c..632fe362e5f 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32c3_modem_sleep.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32c3_modem_sleep.inc @@ -2,12 +2,12 @@ :header-rows: 1 :widths: 20 10 10 20 20 20 - * - CPU frequency + * - CPU 频率 - DFS - DTIM - - Average current(mA) - - Max current(mA) - - Min current(mA) + - 平均电流 (mA) + - 最大电流 (mA) + - 最小电流 (mA) * - 160 MHz - ON diff --git a/docs/zh_CN/api-guides/sleep-current/esp32c3_summary.inc b/docs/zh_CN/api-guides/sleep-current/esp32c3_summary.inc index 48168ce2a10..279fb9f023c 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32c3_summary.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32c3_summary.inc @@ -3,10 +3,10 @@ :widths: 20 20 30 20 20 * - 项目 - - Modem Sleep - - Modem Sleep+DFS - - auto light Sleep - - Deep Sleep + - Modem-sleep + - Modem-sleep+DFS + - Auto Ligh-sleep + - Deep-sleep * - 休眠 - 自动 diff --git a/docs/zh_CN/api-guides/sleep-current/esp32c6_light_sleep.inc b/docs/zh_CN/api-guides/sleep-current/esp32c6_light_sleep.inc index 5e8500b6517..5540f34a3e2 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32c6_light_sleep.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32c6_light_sleep.inc @@ -2,11 +2,11 @@ :header-rows: 1 :widths: 20 10 20 20 20 - * - CPU frequency + * - CPU 频率 - DTIM - - Average current(mA) - - Max current(mA) - - Min current(mA) + - 平均电流 (mA) + - 最大电流 (mA) + - 最小电流 (mA) * - 160 MHz - 1 diff --git a/docs/zh_CN/api-guides/sleep-current/esp32c6_modem_sleep.inc b/docs/zh_CN/api-guides/sleep-current/esp32c6_modem_sleep.inc index e1c06637ae4..e2b1588cd2b 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32c6_modem_sleep.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32c6_modem_sleep.inc @@ -2,12 +2,12 @@ :header-rows: 1 :widths: 20 10 10 20 20 20 - * - CPU frequency + * - CPU 频率 - DFS - DTIM - - Average current(mA) - - Max current(mA) - - Min current(mA) + - 平均电流 (mA) + - 最大电流 (mA) + - 最小电流 (mA) * - 160 MHz - ON diff --git a/docs/zh_CN/api-guides/sleep-current/esp32c6_summary.inc b/docs/zh_CN/api-guides/sleep-current/esp32c6_summary.inc index e865abc938d..5357fabe16d 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32c6_summary.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32c6_summary.inc @@ -3,10 +3,10 @@ :widths: 20 20 30 20 20 * - 项目 - - Modem Sleep - - Modem Sleep+DFS - - auto light Sleep - - Deep Sleep + - Modem-sleep + - Modem-sleep+DFS + - Auto Light-sleep + - Deep-sleep * - 休眠 - 自动 diff --git a/docs/zh_CN/api-guides/sleep-current/esp32s2_light_sleep.inc b/docs/zh_CN/api-guides/sleep-current/esp32s2_light_sleep.inc index 64c8b09d864..3a03a846504 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32s2_light_sleep.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32s2_light_sleep.inc @@ -2,11 +2,11 @@ :header-rows: 1 :widths: 20 10 20 20 20 - * - CPU frequency + * - CPU 频率 - DTIM - - Average current(mA) - - Max current(mA) - - Min current(mA) + - 平均电流 (mA) + - 最大电流 (mA) + - 最小电流 (mA) * - 160 MHz - 1 diff --git a/docs/zh_CN/api-guides/sleep-current/esp32s2_modem_sleep.inc b/docs/zh_CN/api-guides/sleep-current/esp32s2_modem_sleep.inc index 81eae107f39..0724a6e88c6 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32s2_modem_sleep.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32s2_modem_sleep.inc @@ -2,12 +2,12 @@ :header-rows: 1 :widths: 20 10 10 20 20 20 - * - CPU frequency + * - CPU 频率 - DFS - DTIM - - Average current(mA) - - Max current(mA) - - Min current(mA) + - 平均电流 (mA) + - 最大电流 (mA) + - 最小电流 (mA) * - 160 MHz - ON diff --git a/docs/zh_CN/api-guides/sleep-current/esp32s2_summary.inc b/docs/zh_CN/api-guides/sleep-current/esp32s2_summary.inc index 4481b3a9f13..f43c1672a1b 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32s2_summary.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32s2_summary.inc @@ -3,10 +3,10 @@ :widths: 20 20 30 20 20 * - 项目 - - Modem Sleep - - Modem Sleep+DFS - - auto light Sleep - - Deep Sleep + - Modem-sleep + - Modem-sleep+DFS + - Auto Light-sleep + - Deep-sleep * - 休眠 - 自动 diff --git a/docs/zh_CN/api-guides/sleep-current/esp32s3_light_sleep.inc b/docs/zh_CN/api-guides/sleep-current/esp32s3_light_sleep.inc index 62fca14049d..cb09ce347dc 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32s3_light_sleep.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32s3_light_sleep.inc @@ -2,11 +2,11 @@ :header-rows: 1 :widths: 20 10 20 20 20 - * - CPU frequency + * - CPU 频率 - DTIM - - Average current(mA) - - Max current(mA) - - Min current(mA) + - 平均电流 (mA) + - 最大电流 (mA) + - 最小电流 (mA) * - 160 MHz - 1 diff --git a/docs/zh_CN/api-guides/sleep-current/esp32s3_modem_sleep.inc b/docs/zh_CN/api-guides/sleep-current/esp32s3_modem_sleep.inc index ac94c917c44..4e91fa4caa7 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32s3_modem_sleep.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32s3_modem_sleep.inc @@ -2,12 +2,12 @@ :header-rows: 1 :widths: 20 10 10 20 20 20 - * - CPU frequency + * - CPU 频率 - DFS - DTIM - - Average current(mA) - - Max current(mA) - - Min current(mA) + - 平均电流 (mA) + - 最大电流 (mA) + - 最小电流 (mA) * - 160 MHz - ON diff --git a/docs/zh_CN/api-guides/sleep-current/esp32s3_summary.inc b/docs/zh_CN/api-guides/sleep-current/esp32s3_summary.inc index 69d9394cb65..e9131c91133 100644 --- a/docs/zh_CN/api-guides/sleep-current/esp32s3_summary.inc +++ b/docs/zh_CN/api-guides/sleep-current/esp32s3_summary.inc @@ -3,10 +3,10 @@ :widths: 20 20 30 20 20 * - 项目 - - Modem Sleep - - Modem Sleep+DFS - - auto light Sleep - - Deep Sleep + - Modem-sleep + - Modem-sleep+DFS + - Auto Light-sleep + - Deep-sleep * - 休眠 - 自动 diff --git a/docs/zh_CN/api-guides/wifi.rst b/docs/zh_CN/api-guides/wifi.rst index 6f37da81af2..581cf1cd43f 100644 --- a/docs/zh_CN/api-guides/wifi.rst +++ b/docs/zh_CN/api-guides/wifi.rst @@ -1727,7 +1727,7 @@ WPA2-Enterprise 是企业无线网络的安全认证机制。在连接到接入 {IDF_TARGET_NAME} Wi-Fi 节能模式 ----------------------------------------- -本小节将简单介绍Wi-Fi节能模式相关的概念和使用方式，更加详细的介绍请参考 :doc:`低功耗模式使用指南 <../api-guides/low-power-mode>`。 +本小节将简单介绍Wi-Fi节能模式相关的概念和使用方式，更加详细的介绍请参考 :doc:`低功耗模式使用指南 <../api-guides/low-power-mode/index>`。 station 睡眠 ++++++++++++++++++++++ From 28a3227b2f7dedec437ca39f40584c9935c6d206 Mon Sep 17 00:00:00 2001 From: morris Date: Mon, 1 Jul 2024 17:11:33 +0800 Subject: [PATCH 104/113] feat(mipi_dsi): update low level functions to include underrun interrupt --- components/esp_lcd/dsi/esp_lcd_panel_dpi.c | 29 ++++----- components/esp_lcd/dsi/mipi_dsi_priv.h | 5 +- .../mipi_dsi_lcd/main/test_mipi_dsi_panel.c | 6 +- .../hal/esp32p4/include/hal/mipi_dsi_brg_ll.h | 59 ++++++++++++++++++- components/soc/esp32p4/include/soc/reg_base.h | 2 + 5 files changed, 78 insertions(+), 23 deletions(-) diff --git a/components/esp_lcd/dsi/esp_lcd_panel_dpi.c b/components/esp_lcd/dsi/esp_lcd_panel_dpi.c index e3d0e8a8b93..e4fcdc7e543 100644 --- a/components/esp_lcd/dsi/esp_lcd_panel_dpi.c +++ b/components/esp_lcd/dsi/esp_lcd_panel_dpi.c @@ -32,12 +32,12 @@ struct esp_lcd_dpi_panel_t { esp_lcd_panel_t base; // Base class of generic lcd panel esp_lcd_dsi_bus_handle_t bus; // DSI bus handle uint8_t virtual_channel; // Virtual channel ID, index from 0 - uint8_t cur_fb_index; // Current frame buffer index - uint8_t num_fbs; // Number of frame buffers + uint8_t cur_fb_index; // Current frame buffer index + uint8_t num_fbs; // Number of frame buffers uint8_t *fbs[DPI_PANEL_MAX_FB_NUM]; // Frame buffers uint32_t h_pixels; // Horizontal pixels uint32_t v_pixels; // Vertical pixels - size_t frame_buffer_size; // Frame buffer size + size_t fb_size; // Frame buffer size, in bytes size_t bits_per_pixel; // Bits per pixel lcd_color_rgb_pixel_format_t pixel_format; // RGB Pixel format dw_gdma_channel_handle_t dma_chan; // DMA channel @@ -126,7 +126,7 @@ static esp_err_t dpi_panel_create_dma_link(esp_lcd_dpi_panel_t *dpi_panel) // create DMA link lists dw_gdma_link_list_config_t link_list_config = { - .num_items = DPI_PANEL_LLI_PER_FRAME, + .num_items = DPI_PANEL_MIN_DMA_NODES_PER_LINK, .link_type = DW_GDMA_LINKED_LIST_TYPE_SINGLY, }; for (int i = 0; i < dpi_panel->num_fbs; i++) { @@ -191,21 +191,21 @@ esp_err_t esp_lcd_new_panel_dpi(esp_lcd_dsi_bus_handle_t bus, const esp_lcd_dpi_ uint32_t cache_line_size = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_EXT_MEM, CACHE_TYPE_DATA); // DMA doesn't have requirement on the buffer alignment, but the cache does uint32_t alignment = cache_line_size; - size_t frame_buffer_size = panel_config->video_timing.h_size * panel_config->video_timing.v_size * bits_per_pixel / 8; + size_t fb_size = panel_config->video_timing.h_size * panel_config->video_timing.v_size * bits_per_pixel / 8; uint8_t *frame_buffer = NULL; for (int i = 0; i < num_fbs; i++) { - frame_buffer = heap_caps_aligned_calloc(alignment, 1, frame_buffer_size, MALLOC_CAP_SPIRAM | MALLOC_CAP_8BIT); + frame_buffer = heap_caps_aligned_calloc(alignment, 1, fb_size, MALLOC_CAP_SPIRAM | MALLOC_CAP_8BIT); ESP_GOTO_ON_FALSE(frame_buffer, ESP_ERR_NO_MEM, err, TAG, "no memory for frame buffer"); dpi_panel->fbs[i] = frame_buffer; ESP_LOGD(TAG, "fb[%d] @%p", i, frame_buffer); // preset the frame buffer with black color // the frame buffer address alignment is ensured by `heap_caps_aligned_calloc` - // while the value of the frame_buffer_size may not be aligned to the cache line size + // while the value of the fb_size may not be aligned to the cache line size // but that's not a problem because the `heap_caps_aligned_calloc` internally allocated a buffer whose size is aligned up to the cache line size - ESP_GOTO_ON_ERROR(esp_cache_msync(frame_buffer, frame_buffer_size, ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED), + ESP_GOTO_ON_ERROR(esp_cache_msync(frame_buffer, fb_size, ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED), err, TAG, "cache write back failed"); } - dpi_panel->frame_buffer_size = frame_buffer_size; + dpi_panel->fb_size = fb_size; dpi_panel->bits_per_pixel = bits_per_pixel; dpi_panel->h_pixels = panel_config->video_timing.h_size; dpi_panel->v_pixels = panel_config->video_timing.v_size; @@ -282,6 +282,7 @@ esp_err_t esp_lcd_new_panel_dpi(esp_lcd_dsi_bus_handle_t bus, const esp_lcd_dpi_ mipi_dsi_brg_ll_set_underrun_discard_count(hal->bridge, panel_config->video_timing.h_size); // use the DW_GDMA as the flow controller mipi_dsi_brg_ll_set_flow_controller(hal->bridge, MIPI_DSI_LL_FLOW_CONTROLLER_DMA); + mipi_dsi_brg_ll_set_multi_block_number(hal->bridge, DPI_PANEL_MIN_DMA_NODES_PER_LINK); mipi_dsi_brg_ll_set_burst_len(hal->bridge, 256); mipi_dsi_brg_ll_set_empty_threshold(hal->bridge, 1024 - 256); // enable DSI bridge @@ -381,7 +382,7 @@ static esp_err_t dpi_panel_init(esp_lcd_panel_t *panel) .burst_len = 16, .width = DW_GDMA_TRANS_WIDTH_64, }, - .size = dpi_panel->frame_buffer_size * 8 / 64, + .size = dpi_panel->fb_size * 8 / 64, }; for (int i = 0; i < dpi_panel->num_fbs; i++) { link_list = dpi_panel->link_lists[i]; @@ -419,7 +420,7 @@ static esp_err_t dpi_panel_draw_bitmap(esp_lcd_panel_t *panel, int x_start, int uint8_t cur_fb_index = dpi_panel->cur_fb_index; uint8_t *frame_buffer = dpi_panel->fbs[cur_fb_index]; uint8_t *draw_buffer = (uint8_t *)color_data; - size_t frame_buffer_size = dpi_panel->frame_buffer_size; + size_t fb_size = dpi_panel->fb_size; size_t bits_per_pixel = dpi_panel->bits_per_pixel; // clip to boundaries @@ -434,11 +435,11 @@ static esp_err_t dpi_panel_draw_bitmap(esp_lcd_panel_t *panel, int x_start, int uint8_t draw_buf_fb_index = 0; // check if the user draw buffer resides in any frame buffer's memory range // if so, we don't need to copy the data, just do cache write back - if (draw_buffer >= dpi_panel->fbs[0] && draw_buffer < dpi_panel->fbs[0] + frame_buffer_size) { + if (draw_buffer >= dpi_panel->fbs[0] && draw_buffer < dpi_panel->fbs[0] + fb_size) { draw_buf_fb_index = 0; - } else if (draw_buffer >= dpi_panel->fbs[1] && draw_buffer < dpi_panel->fbs[1] + frame_buffer_size) { + } else if (draw_buffer >= dpi_panel->fbs[1] && draw_buffer < dpi_panel->fbs[1] + fb_size) { draw_buf_fb_index = 1; - } else if (draw_buffer >= dpi_panel->fbs[2] && draw_buffer < dpi_panel->fbs[2] + frame_buffer_size) { + } else if (draw_buffer >= dpi_panel->fbs[2] && draw_buffer < dpi_panel->fbs[2] + fb_size) { draw_buf_fb_index = 2; } else { do_copy = true; diff --git a/components/esp_lcd/dsi/mipi_dsi_priv.h b/components/esp_lcd/dsi/mipi_dsi_priv.h index eebf93e2e89..bb6fd2fe63c 100644 --- a/components/esp_lcd/dsi/mipi_dsi_priv.h +++ b/components/esp_lcd/dsi/mipi_dsi_priv.h @@ -29,9 +29,8 @@ #define DSI_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT #endif -#define DPI_PANEL_MAX_FB_NUM 3 // maximum number of supported frame buffers for DPI panel - -#define DPI_PANEL_LLI_PER_FRAME 1 // NOTE: we assume ONE DMA link item can carry the WHOLE image (1920*1080) +#define DPI_PANEL_MAX_FB_NUM 3 // maximum number of frame buffers that can be maintained by the driver +#define DPI_PANEL_MIN_DMA_NODES_PER_LINK 1 // NOTE: we assume 1 DMA link item can carry the WHOLE image #ifdef __cplusplus extern "C" { diff --git a/components/esp_lcd/test_apps/mipi_dsi_lcd/main/test_mipi_dsi_panel.c b/components/esp_lcd/test_apps/mipi_dsi_lcd/main/test_mipi_dsi_panel.c index eec61a14b7f..a31d26e01fd 100644 --- a/components/esp_lcd/test_apps/mipi_dsi_lcd/main/test_mipi_dsi_panel.c +++ b/components/esp_lcd/test_apps/mipi_dsi_lcd/main/test_mipi_dsi_panel.c @@ -222,16 +222,16 @@ TEST_CASE("MIPI DSI with multiple frame buffers (ILI9881C)", "[mipi_dsi]") uint16_t *fbs[3]; TEST_ESP_OK(esp_lcd_dpi_panel_get_frame_buffer(mipi_dpi_panel, 3, (void **)&fbs[0], (void **)&fbs[1], (void **)&fbs[2])); - for (int i = 0; i < 3; i++) { + for (int i = 0; i < 9; i++) { uint16_t color_byte = rand() & 0xFFFF; int x_start = rand() % (MIPI_DSI_LCD_H_RES - 100); int y_start = rand() % (MIPI_DSI_LCD_V_RES - 100); for (int j = y_start; j < y_start + 100; j++) { for (int k = x_start; k < x_start + 100; k++) { - fbs[i][j * MIPI_DSI_LCD_H_RES + k] = color_byte; + fbs[i % 3][j * MIPI_DSI_LCD_H_RES + k] = color_byte; } } - esp_lcd_panel_draw_bitmap(mipi_dpi_panel, x_start, y_start, x_start + 100, y_start + 100, fbs[i]); + esp_lcd_panel_draw_bitmap(mipi_dpi_panel, x_start, y_start, x_start + 100, y_start + 100, fbs[i % 3]); vTaskDelay(pdMS_TO_TICKS(1000)); } diff --git a/components/hal/esp32p4/include/hal/mipi_dsi_brg_ll.h b/components/hal/esp32p4/include/hal/mipi_dsi_brg_ll.h index 7c399550bbc..adfdacad701 100644 --- a/components/hal/esp32p4/include/hal/mipi_dsi_brg_ll.h +++ b/components/hal/esp32p4/include/hal/mipi_dsi_brg_ll.h @@ -14,6 +14,7 @@ #include "hal/lcd_types.h" #define MIPI_DSI_LL_GET_BRG(bus_id) (bus_id == 0 ? &MIPI_DSI_BRIDGE : NULL) +#define MIPI_DSI_LL_EVENT_UNDERRUN (1 << 0) #ifdef __cplusplus extern "C" { @@ -35,6 +36,46 @@ static inline void mipi_dsi_brg_ll_enable(dsi_brg_dev_t *dev, bool en) dev->en.dsi_en = en; } +/** + * @brief Enable DSI bridge interrupt for specific event mask + * + * @param dev Pointer to the DSI bridge controller register base address + * @param mask Event mask + * @param enable True to enable, False to disable + */ +static inline void mipi_dsi_brg_ll_enable_interrupt(dsi_brg_dev_t *dev, uint32_t mask, bool enable) +{ + if (enable) { + dev->int_ena.val |= mask; + } else { + dev->int_ena.val &= ~mask; + } +} + +/** + * @brief Clear DSI bridge interrupt for specific event mask + * + * @param dev Pointer to the DSI bridge controller register base address + * @param mask Event mask + */ +__attribute__((always_inline)) +static inline void mipi_dsi_brg_ll_clear_interrupt_status(dsi_brg_dev_t *dev, uint32_t mask) +{ + dev->int_clr.val = mask; +} + +/** + * @brief Get interrupt status for DSI bridge + * + * @param dev Pointer to the DSI bridge controller register base address + * @return Interrupt status + */ +__attribute__((always_inline)) +static inline uint32_t mipi_dsi_brg_ll_get_interrupt_status(dsi_brg_dev_t *dev) +{ + return dev->int_st.val; +} + /** * @brief Set the number of 64-bit words in one dma burst transfer * @@ -242,7 +283,7 @@ static inline void mipi_dsi_brg_ll_enable_ref_clock(dsi_brg_dev_t *dev, bool en) * @param dev Pointer to the DSI bridge controller register base address * @param controller Flow controller */ -static inline void mipi_dsi_brg_ll_set_flow_controller(dsi_brg_dev_t* dev, mipi_dsi_ll_flow_controller_t controller) +static inline void mipi_dsi_brg_ll_set_flow_controller(dsi_brg_dev_t *dev, mipi_dsi_ll_flow_controller_t controller) { dev->dma_flow_ctrl.dsi_dma_flow_controller = controller; } @@ -255,9 +296,21 @@ static inline void mipi_dsi_brg_ll_set_flow_controller(dsi_brg_dev_t* dev, mipi_ * @param dev Pointer to the DSI bridge controller register base address * @param number Number of blocks */ -static inline void mipi_dsi_brg_ll_set_multi_block_number(dsi_brg_dev_t* dev, uint32_t number) +static inline void mipi_dsi_brg_ll_set_multi_block_number(dsi_brg_dev_t *dev, uint32_t number) { dev->dma_flow_ctrl.dma_flow_multiblk_num = number; + dev->dma_frame_interval.dma_multiblk_en = number > 1; +} + +/** + * @brief Get the FIFO depth of the DSI bridge + * + * @param dev Pointer to the DSI bridge controller register base address + * @return FIFO depth + */ +static inline uint32_t mipi_dsi_brg_ll_get_fifo_depth(dsi_brg_dev_t *dev) +{ + return dev->fifo_flow_status.raw_buf_depth; } /** @@ -266,7 +319,7 @@ static inline void mipi_dsi_brg_ll_set_multi_block_number(dsi_brg_dev_t* dev, ui * @param dev Pointer to the DSI bridge controller register base address * @param std YUV-RGB conversion standard */ -static inline void mipi_dsi_brg_ll_set_yuv_convert_std(dsi_brg_dev_t* dev, lcd_yuv_conv_std_t std) +static inline void mipi_dsi_brg_ll_set_yuv_convert_std(dsi_brg_dev_t *dev, lcd_yuv_conv_std_t std) { switch (std) { case LCD_YUV_CONV_STD_BT601: diff --git a/components/soc/esp32p4/include/soc/reg_base.h b/components/soc/esp32p4/include/soc/reg_base.h index 4c2bbc2c7eb..9a4b6fc0654 100644 --- a/components/soc/esp32p4/include/soc/reg_base.h +++ b/components/soc/esp32p4/include/soc/reg_base.h @@ -59,7 +59,9 @@ #define DR_REG_DDRPHY_BASE (DR_REG_HPPERIPH0_BASE + 0x9D000) #define DR_REG_PVT_BASE (DR_REG_HPPERIPH0_BASE + 0x9E000) #define DR_REG_CSI_HOST_BASE (DR_REG_HPPERIPH0_BASE + 0x9F000) +#define DR_REG_CSI_BRG_BASE (DR_REG_HPPERIPH0_BASE + 0x9F800) #define DR_REG_DSI_HOST_BASE (DR_REG_HPPERIPH0_BASE + 0xA0000) +#define DR_REG_DSI_BRG_BASE (DR_REG_HPPERIPH0_BASE + 0xA0800) #define DR_REG_ISP_BASE (DR_REG_HPPERIPH0_BASE + 0xA1000) #define DR_REG_RMT_BASE (DR_REG_HPPERIPH0_BASE + 0xA2000) #define DR_REG_BITSCRAM_BASE (DR_REG_HPPERIPH0_BASE + 0xA3000) From 943033f9d60869a73d187f20a10a92929ac29076 Mon Sep 17 00:00:00 2001 From: zwx Date: Tue, 9 Jul 2024 11:12:31 +0800 Subject: [PATCH 105/113] fix(openthread): make ot task queue sending non-permanent blocking --- components/openthread/lib | 2 +- .../openthread/src/esp_openthread_cli.c | 7 +- .../src/esp_openthread_lwip_netif.c | 6 ++ .../src/esp_openthread_task_queue.c | 4 +- examples/openthread/ot_br/main/esp_ot_br.c | 84 ++++++++++--------- examples/openthread/ot_br/sdkconfig.defaults | 2 +- 6 files changed, 60 insertions(+), 45 deletions(-) diff --git a/components/openthread/lib b/components/openthread/lib index 34d698a2749..203c78501e9 160000 --- a/components/openthread/lib +++ b/components/openthread/lib @@ -1 +1 @@ -Subproject commit 34d698a274940730901b934caa023a3281aca53e +Subproject commit 203c78501e9a6ea9ca3a929e6f9b6b9691ef16ee diff --git a/components/openthread/src/esp_openthread_cli.c b/components/openthread/src/esp_openthread_cli.c index 6ce998a4305..b2a76a4df0c 100644 --- a/components/openthread/src/esp_openthread_cli.c +++ b/components/openthread/src/esp_openthread_cli.c @@ -99,8 +99,11 @@ static void ot_cli_loop(void *context) printf("Internal error: %s\n", esp_err_to_name(err)); } } else { - esp_openthread_cli_input(line); - xTaskNotifyWait(0, 0, NULL, portMAX_DELAY); + if (esp_openthread_cli_input(line) == ESP_OK) { + xTaskNotifyWait(0, 0, NULL, portMAX_DELAY); + } else { + printf("Openthread task is busy, failed to run command: %s\n", line); + } } linenoiseHistoryAdd(line); } diff --git a/components/openthread/src/esp_openthread_lwip_netif.c b/components/openthread/src/esp_openthread_lwip_netif.c index 29be440ae09..94c8e16861e 100644 --- a/components/openthread/src/esp_openthread_lwip_netif.c +++ b/components/openthread/src/esp_openthread_lwip_netif.c @@ -23,6 +23,12 @@ #define OPENTHREAD_IP6_MTU 1280 +#if CONFIG_OPENTHREAD_BORDER_ROUTER +#if CONFIG_LWIP_IPV6_NUM_ADDRESSES != 12 +#error CONFIG_LWIP_IPV6_NUM_ADDRESSES should be set to 12, please configure it using `idf.py menuconfig` +#endif +#endif + static err_t openthread_netif_init(struct netif *netif); static void openthread_netif_input(void *h, void *buffer, size_t len, void *eb); diff --git a/components/openthread/src/esp_openthread_task_queue.c b/components/openthread/src/esp_openthread_task_queue.c index 32bb4f20020..9d9bf87e6f3 100644 --- a/components/openthread/src/esp_openthread_task_queue.c +++ b/components/openthread/src/esp_openthread_task_queue.c @@ -21,6 +21,8 @@ static QueueHandle_t s_task_queue = NULL; static int s_task_queue_event_fd = -1; static const char *task_queue_workflow = "task_queue"; +#define OT_TASK_QUEUE_SENDING_WAIT_TIME pdMS_TO_TICKS(100) + typedef struct { esp_openthread_task_t task; void *arg; @@ -60,7 +62,7 @@ esp_err_t IRAM_ATTR esp_openthread_task_queue_post(esp_openthread_task_t task, v ESP_RETURN_ON_FALSE_ISR(xQueueSendFromISR(s_task_queue, &task_storage, &task_woken), ESP_FAIL, OT_PLAT_LOG_TAG, "Failed to post task to OpenThread task queue"); } else { - ESP_RETURN_ON_FALSE(xQueueSend(s_task_queue, &task_storage, portMAX_DELAY), ESP_FAIL, OT_PLAT_LOG_TAG, + ESP_RETURN_ON_FALSE(xQueueSend(s_task_queue, &task_storage, OT_TASK_QUEUE_SENDING_WAIT_TIME), ESP_FAIL, OT_PLAT_LOG_TAG, "Failed to post task to OpenThread task queue"); } ret = write(s_task_queue_event_fd, &val, sizeof(val)); diff --git a/examples/openthread/ot_br/main/esp_ot_br.c b/examples/openthread/ot_br/main/esp_ot_br.c index d29718c4aeb..bf887803a93 100644 --- a/examples/openthread/ot_br/main/esp_ot_br.c +++ b/examples/openthread/ot_br/main/esp_ot_br.c @@ -73,29 +73,15 @@ static void ot_task_worker(void *aContext) // Initialize the OpenThread stack ESP_ERROR_CHECK(esp_openthread_init(&config)); - - // Initialize border routing features - esp_openthread_lock_acquire(portMAX_DELAY); -#if CONFIG_OPENTHREAD_STATE_INDICATOR_ENABLE - ESP_ERROR_CHECK(esp_openthread_state_indicator_init(esp_openthread_get_instance())); -#endif ESP_ERROR_CHECK(esp_netif_attach(openthread_netif, esp_openthread_netif_glue_init(&config))); - + esp_openthread_lock_acquire(portMAX_DELAY); (void)otLoggingSetLevel(CONFIG_LOG_DEFAULT_LEVEL); esp_openthread_cli_init(); - -#if CONFIG_OPENTHREAD_BR_AUTO_START - ESP_ERROR_CHECK(esp_openthread_border_router_init()); - otOperationalDatasetTlvs dataset; - otError error = otDatasetGetActiveTlvs(esp_openthread_get_instance(), &dataset); - ESP_ERROR_CHECK(esp_openthread_auto_start((error == OT_ERROR_NONE) ? &dataset : NULL)); -#endif // CONFIG_OPENTHREAD_BR_AUTO_START - esp_cli_custom_command_init(); + esp_openthread_cli_create_task(); esp_openthread_lock_release(); // Run the main loop - esp_openthread_cli_create_task(); esp_openthread_launch_mainloop(); // Clean up @@ -105,36 +91,15 @@ static void ot_task_worker(void *aContext) vTaskDelete(NULL); } -void app_main(void) +void ot_br_init(void *ctx) { - // Used eventfds: - // * netif - // * task queue - // * border router - esp_vfs_eventfd_config_t eventfd_config = { -#if CONFIG_OPENTHREAD_RADIO_NATIVE || CONFIG_OPENTHREAD_RADIO_SPINEL_SPI - // * radio driver (A native radio device needs a eventfd for radio driver.) - // * SpiSpinelInterface (The Spi Spinel Interface needs a eventfd.) - // The above will not exist at the same time. - .max_fds = 4, -#else - .max_fds = 3, -#endif - }; - ESP_ERROR_CHECK(esp_vfs_eventfd_register(&eventfd_config)); - - ESP_ERROR_CHECK(nvs_flash_init()); - ESP_ERROR_CHECK(esp_netif_init()); - ESP_ERROR_CHECK(esp_event_loop_create_default()); - #if CONFIG_EXAMPLE_CONNECT_WIFI #if CONFIG_OPENTHREAD_BR_AUTO_START ESP_ERROR_CHECK(example_connect()); + ESP_ERROR_CHECK(esp_wifi_set_ps(WIFI_PS_MAX_MODEM)); #if CONFIG_ESP_COEX_SW_COEXIST_ENABLE && CONFIG_OPENTHREAD_RADIO_NATIVE - ESP_ERROR_CHECK(esp_wifi_set_ps(WIFI_PS_MIN_MODEM)); ESP_ERROR_CHECK(esp_coex_wifi_i154_enable()); #else - ESP_ERROR_CHECK(esp_wifi_set_ps(WIFI_PS_NONE)); #if CONFIG_EXTERNAL_COEX_ENABLE ot_br_external_coexist_init(); @@ -155,5 +120,44 @@ void app_main(void) ESP_ERROR_CHECK(mdns_init()); ESP_ERROR_CHECK(mdns_hostname_set("esp-ot-br")); - xTaskCreate(ot_task_worker, "ot_br_main", 20480, xTaskGetCurrentTaskHandle(), 5, NULL); + + // Initialize border routing features + esp_openthread_lock_acquire(portMAX_DELAY); +#if CONFIG_OPENTHREAD_STATE_INDICATOR_ENABLE + ESP_ERROR_CHECK(esp_openthread_state_indicator_init(esp_openthread_get_instance())); +#endif + +#if CONFIG_OPENTHREAD_BR_AUTO_START + ESP_ERROR_CHECK(esp_openthread_border_router_init()); + otOperationalDatasetTlvs dataset; + otError error = otDatasetGetActiveTlvs(esp_openthread_get_instance(), &dataset); + ESP_ERROR_CHECK(esp_openthread_auto_start((error == OT_ERROR_NONE) ? &dataset : NULL)); +#endif // CONFIG_OPENTHREAD_BR_AUTO_START + + esp_openthread_lock_release(); + vTaskDelete(NULL); +} + +void app_main(void) +{ + // Used eventfds: + // * netif + // * task queue + // * border router + esp_vfs_eventfd_config_t eventfd_config = { +#if CONFIG_OPENTHREAD_RADIO_NATIVE || CONFIG_OPENTHREAD_RADIO_SPINEL_SPI + // * radio driver (A native radio device needs a eventfd for radio driver.) + // * SpiSpinelInterface (The Spi Spinel Interface needs a eventfd.) + // The above will not exist at the same time. + .max_fds = 4, +#else + .max_fds = 3, +#endif + }; + ESP_ERROR_CHECK(esp_vfs_eventfd_register(&eventfd_config)); + ESP_ERROR_CHECK(nvs_flash_init()); + ESP_ERROR_CHECK(esp_netif_init()); + ESP_ERROR_CHECK(esp_event_loop_create_default()); + xTaskCreate(ot_task_worker, "ot_br_main", 8192, xTaskGetCurrentTaskHandle(), 5, NULL); + xTaskCreate(ot_br_init, "ot_br_init", 6144, NULL, 4, NULL); } diff --git a/examples/openthread/ot_br/sdkconfig.defaults b/examples/openthread/ot_br/sdkconfig.defaults index 6620bfa46b1..619ab0f7e78 100644 --- a/examples/openthread/ot_br/sdkconfig.defaults +++ b/examples/openthread/ot_br/sdkconfig.defaults @@ -31,7 +31,7 @@ CONFIG_OPENTHREAD_RADIO_SPINEL_UART=y # lwIP # CONFIG_LWIP_IPV6_FORWARD=y -CONFIG_LWIP_IPV6_NUM_ADDRESSES=8 +CONFIG_LWIP_IPV6_NUM_ADDRESSES=12 CONFIG_LWIP_MULTICAST_PING=y CONFIG_LWIP_NETIF_STATUS_CALLBACK=y CONFIG_LWIP_HOOK_IP6_ROUTE_DEFAULT=y From 348d834f9765ad555a5818774d45f6e0b5bb3666 Mon Sep 17 00:00:00 2001 From: Zhang Shuxian Date: Fri, 12 Jul 2024 15:36:07 +0800 Subject: [PATCH 106/113] docs: Update cn trans and provide proper indentation for 2 files --- .../en/contribute/install-pre-commit-hook.rst | 22 +++++++++---------- .../release-5.x/5.4/system.rst | 7 +++--- .../contribute/install-pre-commit-hook.rst | 7 +++--- .../release-5.x/5.4/system.rst | 10 +++++++-- 4 files changed, 25 insertions(+), 21 deletions(-) diff --git a/docs/en/contribute/install-pre-commit-hook.rst b/docs/en/contribute/install-pre-commit-hook.rst index 98d76a84a36..17a69bd6efb 100644 --- a/docs/en/contribute/install-pre-commit-hook.rst +++ b/docs/en/contribute/install-pre-commit-hook.rst @@ -6,7 +6,7 @@ Install Pre-commit Hook for ESP-IDF Project Install ``pre-commit`` ---------------------- -Run ``pip install pre-commit`` +Run ``pip install pre-commit``. Install ``pre-commit`` Hook --------------------------- @@ -20,10 +20,10 @@ Install ``pre-commit`` Hook Uninstall ``pre-commit`` Hook ----------------------------- -Run ``pre-commit uninstall`` +Run ``pre-commit uninstall``. -What Is More? -------------- +Related Documents +------------------- For detailed usage, please refer to the documentation of pre-commit_. @@ -34,17 +34,17 @@ Common Problems For Windows Users ``/usr/bin/env: python: Permission denied.`` - If you are in Git Bash, please check the python executable location by run ``which python``. + If you are in Git Bash, please check the python executable location by run ``which python``. - If the executable is under ``~/AppData/Local/Microsoft/WindowsApps/``, then it is a link to Windows AppStore, not a real one. + If the executable is under ``~/AppData/Local/Microsoft/WindowsApps/``, then it is a link to Windows AppStore, not a real one. - Please install Python manually and update this in your ``PATH`` environment variable. + Please install Python manually and update this in your ``PATH`` environment variable. Your ``USERPROFILE`` contains non-ASCII characters - ``pre-commit`` may fail when initializing an environment for a particular hook when the path of ``pre-commit``'s cache contains non-ASCII characters. The solution is to set ``PRE_COMMIT_HOME`` to a path containing only standard characters before running pre-commit. + ``pre-commit`` may fail when initializing an environment for a particular hook when the path of ``pre-commit``'s cache contains non-ASCII characters. The solution is to set ``PRE_COMMIT_HOME`` to a path containing only standard characters before running pre-commit. - - CMD: ``set PRE_COMMIT_HOME=C:\somepath\pre-commit`` - - PowerShell: ``$Env:PRE_COMMIT_HOME = "C:\somepath\pre-commit"`` - - git bash: ``export PRE_COMMIT_HOME="/c/somepath/pre-commit"`` + - CMD: ``set PRE_COMMIT_HOME=C:\somepath\pre-commit`` + - PowerShell: ``$Env:PRE_COMMIT_HOME = "C:\somepath\pre-commit"`` + - git bash: ``export PRE_COMMIT_HOME="/c/somepath/pre-commit"`` diff --git a/docs/en/migration-guides/release-5.x/5.4/system.rst b/docs/en/migration-guides/release-5.x/5.4/system.rst index ae7414bf5d1..e6e0ede0156 100644 --- a/docs/en/migration-guides/release-5.x/5.4/system.rst +++ b/docs/en/migration-guides/release-5.x/5.4/system.rst @@ -9,9 +9,8 @@ Log - `esp_log_buffer_hex` is deprecated, use `ESP_LOG_BUFFER_HEX` instead. - `esp_log_buffer_char` is deprecated, use `ESP_LOG_BUFFER_CHAR` instead. -ESP rom ---- +ESP ROM +--------- -- All target-specific header files has been moved from `components/esp_rom/include/{target}/` to `/esp_rom/{target}/include/{target}/`, and `components/esp_rom/CMakeLists.txt` has been modified accordingly. If you encounter an error indicating a missing header file, such as ``fatal error: esp32s3/rom/efuse.h: No such file or directory``, try removing the leading relative path from the header file include statement. In your current and future development, when including any header files from the components/esp_rom folder, directly include the header file name without the target-specific relative folder path. +- All target-specific header files has been moved from `components/esp_rom/include/{target}/` to `/esp_rom/{target}/include/{target}/`, and `components/esp_rom/CMakeLists.txt` has been modified accordingly. If you encounter an error indicating a missing header file, such as ``fatal error: esp32s3/rom/efuse.h: No such file or directory``, try removing the leading relative path from the header file include command. In your current and future development, when including any header files located in `components/esp_rom` path, directly use the header file name without the chip-specific relative folder path. - All target-specific `rom/miniz.h` files are removed because they are deprecated. - diff --git a/docs/zh_CN/contribute/install-pre-commit-hook.rst b/docs/zh_CN/contribute/install-pre-commit-hook.rst index bf4fec4bb27..cf87e210fa5 100644 --- a/docs/zh_CN/contribute/install-pre-commit-hook.rst +++ b/docs/zh_CN/contribute/install-pre-commit-hook.rst @@ -1,9 +1,8 @@ 为 ESP-IDF 安装 pre-commit 钩子 -========================================== +=================================== :link_to_translation:`en:[English]` - 安装 ``pre-commit`` 工具 --------------------------- @@ -23,7 +22,7 @@ 运行 ``pre-commit uninstall`` 。 -更多 +相关文档 --------- 更多详细使用方法，请参考 pre-commit_ 文档。 @@ -31,7 +30,7 @@ .. _pre-commit: https://pre-commit.com/ Windows 用户常见问题 --------------------------------- +----------------------- ``/usr/bin/env: python: Permission denied.`` diff --git a/docs/zh_CN/migration-guides/release-5.x/5.4/system.rst b/docs/zh_CN/migration-guides/release-5.x/5.4/system.rst index 3644a6ea439..dbe6984ddd7 100644 --- a/docs/zh_CN/migration-guides/release-5.x/5.4/system.rst +++ b/docs/zh_CN/migration-guides/release-5.x/5.4/system.rst @@ -3,8 +3,14 @@ :link_to_translation:`en:[English]` -Log ---- +日志 +------ - `esp_log_buffer_hex` 已弃用，应使用 `ESP_LOG_BUFFER_HEX` 替代。 - `esp_log_buffer_char` 已弃用，应使用 `ESP_LOG_BUFFER_CHAR` 替代。 + +ESP ROM +--------- + +- 针对特定目标的头文件已从 `components/esp_rom/include/{target}/` 移至 `/esp_rom/{target}/include/{target}/`，`components/esp_rom/CMakeLists.txt` 文件已相应更新。如果遇到报错提示缺少头文件，例如 ``fatal error: esp32s3/rom/efuse.h: No such file or directory``，请在头文件包含命令中删除前导的相对路径。在今后的开发中，如果需要包含 `components/esp_rom` 路径下的任何头文件，请直接使用头文件名，无需包含特定芯片的相对文件夹路径。 +- 所有特定目标的 `rom/miniz.h` 文件已移除，因为它们已经被弃用。 From d562f9f4f0010eddb5d2ed092ce8194526be6a6d Mon Sep 17 00:00:00 2001 From: liuning Date: Fri, 19 Jul 2024 19:23:58 +0800 Subject: [PATCH 107/113] fix(coex): fix esp32 crash issue, fix esp32c6 rx issue --- components/esp_rom/esp32c5/ld/esp32c5.rom.pp.ld | 2 +- components/esp_wifi/lib | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/components/esp_rom/esp32c5/ld/esp32c5.rom.pp.ld b/components/esp_rom/esp32c5/ld/esp32c5.rom.pp.ld index 3a6126a9079..54d3ae9e75f 100644 --- a/components/esp_rom/esp32c5/ld/esp32c5.rom.pp.ld +++ b/components/esp_rom/esp32c5/ld/esp32c5.rom.pp.ld @@ -260,7 +260,7 @@ trcAmpduSetState = 0x40000fa0; trc_set_bf_report_rate = 0x40000fa4; trc_onPPTxDone = 0x40000fa8; wDevCheckBlockError = 0x40000fac; -wDev_AppendRxBlocks = 0x40000fb0; +/*wDev_AppendRxBlocks = 0x40000fb0;*/ wDev_DiscardFrame = 0x40000fb4; wDev_GetNoiseFloor = 0x40000fb8; wDev_IndicateAmpdu = 0x40000fbc; diff --git a/components/esp_wifi/lib b/components/esp_wifi/lib index eff8552fc2c..ce181b3e947 160000 --- a/components/esp_wifi/lib +++ b/components/esp_wifi/lib @@ -1 +1 @@ -Subproject commit eff8552fc2c890de9304250192e542d7a38c3480 +Subproject commit ce181b3e947d3d8495c17b9881930816bb94ed58 From 2bf74cf86d9203deba2aaf2ebdefb36d07d1e89d Mon Sep 17 00:00:00 2001 From: "nilesh.kale" Date: Fri, 7 Jun 2024 16:19:42 +0530 Subject: [PATCH 108/113] feat: enable flash encyption support in esp32c61 This commit add support for flash ecnyrption in ESP32C61. --- .../bootloader_support/src/flash_encrypt.c | 2 -- .../include/hal/spi_flash_encrypted_ll.h | 26 +++++++++---------- .../soc/esp32c61/include/soc/soc_caps.h | 2 +- 3 files changed, 13 insertions(+), 17 deletions(-) diff --git a/components/bootloader_support/src/flash_encrypt.c b/components/bootloader_support/src/flash_encrypt.c index 4f568cea1c2..da57e4189a5 100644 --- a/components/bootloader_support/src/flash_encrypt.c +++ b/components/bootloader_support/src/flash_encrypt.c @@ -13,8 +13,6 @@ #include "esp_secure_boot.h" #include "hal/efuse_hal.h" -//TODO:[ESP32C61] IDf-9232 - #if CONFIG_IDF_TARGET_ESP32 #define CRYPT_CNT ESP_EFUSE_FLASH_CRYPT_CNT #define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT diff --git a/components/hal/esp32c61/include/hal/spi_flash_encrypted_ll.h b/components/hal/esp32c61/include/hal/spi_flash_encrypted_ll.h index 82b2b1d47f4..d35c179cbd7 100644 --- a/components/hal/esp32c61/include/hal/spi_flash_encrypted_ll.h +++ b/components/hal/esp32c61/include/hal/spi_flash_encrypted_ll.h @@ -15,18 +15,16 @@ #include #include #include "soc/hp_system_reg.h" -#include "soc/xts_aes_reg.h" +#include "soc/spi_mem_reg.h" #include "soc/soc.h" #include "soc/soc_caps.h" #include "hal/assert.h" -// TODO: [ESP32C61] IDF-9232, inherit from c6 - #ifdef __cplusplus extern "C" { #endif -/// Choose type of chip you want to encrypt manully +/// Choose type of chip you want to encrypt manually typedef enum { FLASH_ENCRYPTION_MANU = 0, ///!< Manually encrypt the flash chip. @@ -53,7 +51,7 @@ static inline void spi_flash_encrypt_ll_disable(void) } /** - * Choose type of chip you want to encrypt manully + * Choose type of chip you want to encrypt manually * * @param type The type of chip to be encrypted * @@ -63,7 +61,7 @@ static inline void spi_flash_encrypt_ll_type(flash_encrypt_ll_type_t type) { // Our hardware only support flash encryption HAL_ASSERT(type == FLASH_ENCRYPTION_MANU); - REG_SET_FIELD(XTS_AES_DESTINATION_REG(0), XTS_AES_DESTINATION, type); + REG_SET_FIELD(SPI_MEM_XTS_DESTINATION_REG(0), SPI_MEM_XTS_DESTINATION, type); } /** @@ -74,7 +72,7 @@ static inline void spi_flash_encrypt_ll_type(flash_encrypt_ll_type_t type) static inline void spi_flash_encrypt_ll_buffer_length(uint32_t size) { // Desired block should not be larger than the block size. - REG_SET_FIELD(XTS_AES_LINESIZE_REG(0), XTS_AES_LINESIZE, size >> 5); + REG_SET_FIELD(SPI_MEM_XTS_LINESIZE_REG(0), SPI_MEM_XTS_LINESIZE, size >> 5); } /** @@ -89,7 +87,7 @@ static inline void spi_flash_encrypt_ll_plaintext_save(uint32_t address, const u { uint32_t plaintext_offs = (address % SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX); HAL_ASSERT(plaintext_offs + size <= SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX); - memcpy((void *)(XTS_AES_PLAIN_MEM(0) + plaintext_offs), buffer, size); + memcpy((void *)(SPI_MEM_XTS_PLAIN_BASE_REG(0) + plaintext_offs), buffer, size); } /** @@ -99,7 +97,7 @@ static inline void spi_flash_encrypt_ll_plaintext_save(uint32_t address, const u */ static inline void spi_flash_encrypt_ll_address_save(uint32_t flash_addr) { - REG_SET_FIELD(XTS_AES_PHYSICAL_ADDRESS_REG(0), XTS_AES_PHYSICAL_ADDRESS, flash_addr); + REG_SET_FIELD(SPI_MEM_XTS_PHYSICAL_ADDRESS_REG(0), SPI_MEM_XTS_PHYSICAL_ADDRESS, flash_addr); } /** @@ -107,7 +105,7 @@ static inline void spi_flash_encrypt_ll_address_save(uint32_t flash_addr) */ static inline void spi_flash_encrypt_ll_calculate_start(void) { - REG_SET_FIELD(XTS_AES_TRIGGER_REG(0), XTS_AES_TRIGGER, 1); + REG_SET_FIELD(SPI_MEM_XTS_TRIGGER_REG(0), SPI_MEM_XTS_TRIGGER, 1); } /** @@ -115,7 +113,7 @@ static inline void spi_flash_encrypt_ll_calculate_start(void) */ static inline void spi_flash_encrypt_ll_calculate_wait_idle(void) { - while(REG_GET_FIELD(XTS_AES_STATE_REG(0), XTS_AES_STATE) == 0x1) { + while(REG_GET_FIELD(SPI_MEM_XTS_STATE_REG(0), SPI_MEM_XTS_STATE) == 0x1) { } } @@ -124,8 +122,8 @@ static inline void spi_flash_encrypt_ll_calculate_wait_idle(void) */ static inline void spi_flash_encrypt_ll_done(void) { - REG_SET_BIT(XTS_AES_RELEASE_REG(0), XTS_AES_RELEASE); - while(REG_GET_FIELD(XTS_AES_STATE_REG(0), XTS_AES_STATE) != 0x3) { + REG_SET_BIT(SPI_MEM_XTS_RELEASE_REG(0), SPI_MEM_XTS_RELEASE); + while(REG_GET_FIELD(SPI_MEM_XTS_STATE_REG(0), SPI_MEM_XTS_STATE) != 0x3) { } } @@ -134,7 +132,7 @@ static inline void spi_flash_encrypt_ll_done(void) */ static inline void spi_flash_encrypt_ll_destroy(void) { - REG_SET_BIT(XTS_AES_DESTROY_REG(0), XTS_AES_DESTROY); + REG_SET_BIT(SPI_MEM_XTS_DESTROY_REG(0), SPI_MEM_XTS_DESTROY); } /** diff --git a/components/soc/esp32c61/include/soc/soc_caps.h b/components/soc/esp32c61/include/soc/soc_caps.h index 812cb484c4d..47ac1eed8b0 100644 --- a/components/soc/esp32c61/include/soc/soc_caps.h +++ b/components/soc/esp32c61/include/soc/soc_caps.h @@ -47,7 +47,7 @@ // \#define SOC_DIG_SIGN_SUPPORTED 1 //TODO: [ESP32C61] IDF-9325 #define SOC_ECC_SUPPORTED 1 #define SOC_ECC_EXTENDED_MODES_SUPPORTED 1 -#define SOC_FLASH_ENC_SUPPORTED 1 //TODO: [ESP32C61] IDF-9232 +#define SOC_FLASH_ENC_SUPPORTED 1 // \#define SOC_SECURE_BOOT_SUPPORTED 1 //TODO: [ESP32C61] IDF-9233 // \#define SOC_BOD_SUPPORTED 1 //TODO: [ESP32C61] IDF-9254 // \#define SOC_APM_SUPPORTED 1 //TODO: [ESP32C61] IDF-9230 From 33e7f004e37ee81f500494ec4eb3422b6f96fa39 Mon Sep 17 00:00:00 2001 From: Xu Si Yu Date: Wed, 26 Jun 2024 19:55:10 +0800 Subject: [PATCH 109/113] fix(common_components): unregister event handler if wifi disconnect and stop reconnecting --- .../include/protocol_examples_common.h | 32 +++++++++++++++++ .../protocol_examples_common/wifi_connect.c | 35 ++----------------- 2 files changed, 34 insertions(+), 33 deletions(-) diff --git a/examples/common_components/protocol_examples_common/include/protocol_examples_common.h b/examples/common_components/protocol_examples_common/include/protocol_examples_common.h index fc2e54cd352..b23f452acc7 100644 --- a/examples/common_components/protocol_examples_common/include/protocol_examples_common.h +++ b/examples/common_components/protocol_examples_common/include/protocol_examples_common.h @@ -35,6 +35,38 @@ extern "C" { #define EXAMPLE_NETIF_DESC_PPP "example_netif_ppp" #endif +#if CONFIG_EXAMPLE_WIFI_SCAN_METHOD_FAST +#define EXAMPLE_WIFI_SCAN_METHOD WIFI_FAST_SCAN +#elif CONFIG_EXAMPLE_WIFI_SCAN_METHOD_ALL_CHANNEL +#define EXAMPLE_WIFI_SCAN_METHOD WIFI_ALL_CHANNEL_SCAN +#endif + +#if CONFIG_EXAMPLE_WIFI_CONNECT_AP_BY_SIGNAL +#define EXAMPLE_WIFI_CONNECT_AP_SORT_METHOD WIFI_CONNECT_AP_BY_SIGNAL +#elif CONFIG_EXAMPLE_WIFI_CONNECT_AP_BY_SECURITY +#define EXAMPLE_WIFI_CONNECT_AP_SORT_METHOD WIFI_CONNECT_AP_BY_SECURITY +#endif + +#if CONFIG_EXAMPLE_WIFI_AUTH_OPEN +#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_OPEN +#elif CONFIG_EXAMPLE_WIFI_AUTH_WEP +#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WEP +#elif CONFIG_EXAMPLE_WIFI_AUTH_WPA_PSK +#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WPA_PSK +#elif CONFIG_EXAMPLE_WIFI_AUTH_WPA2_PSK +#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WPA2_PSK +#elif CONFIG_EXAMPLE_WIFI_AUTH_WPA_WPA2_PSK +#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WPA_WPA2_PSK +#elif CONFIG_EXAMPLE_WIFI_AUTH_WPA2_ENTERPRISE +#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WPA2_ENTERPRISE +#elif CONFIG_EXAMPLE_WIFI_AUTH_WPA3_PSK +#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WPA3_PSK +#elif CONFIG_EXAMPLE_WIFI_AUTH_WPA2_WPA3_PSK +#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WPA2_WPA3_PSK +#elif CONFIG_EXAMPLE_WIFI_AUTH_WAPI_PSK +#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WAPI_PSK +#endif + /* Example default interface, prefer the ethernet one if running in example-test (CI) configuration */ #if CONFIG_EXAMPLE_CONNECT_ETHERNET #define EXAMPLE_INTERFACE get_example_netif_from_desc(EXAMPLE_NETIF_DESC_ETH) diff --git a/examples/common_components/protocol_examples_common/wifi_connect.c b/examples/common_components/protocol_examples_common/wifi_connect.c index e4e14686887..ed95bccb2fe 100644 --- a/examples/common_components/protocol_examples_common/wifi_connect.c +++ b/examples/common_components/protocol_examples_common/wifi_connect.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Unlicense OR CC0-1.0 */ @@ -26,38 +26,6 @@ static SemaphoreHandle_t s_semph_get_ip_addrs = NULL; static SemaphoreHandle_t s_semph_get_ip6_addrs = NULL; #endif -#if CONFIG_EXAMPLE_WIFI_SCAN_METHOD_FAST -#define EXAMPLE_WIFI_SCAN_METHOD WIFI_FAST_SCAN -#elif CONFIG_EXAMPLE_WIFI_SCAN_METHOD_ALL_CHANNEL -#define EXAMPLE_WIFI_SCAN_METHOD WIFI_ALL_CHANNEL_SCAN -#endif - -#if CONFIG_EXAMPLE_WIFI_CONNECT_AP_BY_SIGNAL -#define EXAMPLE_WIFI_CONNECT_AP_SORT_METHOD WIFI_CONNECT_AP_BY_SIGNAL -#elif CONFIG_EXAMPLE_WIFI_CONNECT_AP_BY_SECURITY -#define EXAMPLE_WIFI_CONNECT_AP_SORT_METHOD WIFI_CONNECT_AP_BY_SECURITY -#endif - -#if CONFIG_EXAMPLE_WIFI_AUTH_OPEN -#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_OPEN -#elif CONFIG_EXAMPLE_WIFI_AUTH_WEP -#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WEP -#elif CONFIG_EXAMPLE_WIFI_AUTH_WPA_PSK -#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WPA_PSK -#elif CONFIG_EXAMPLE_WIFI_AUTH_WPA2_PSK -#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WPA2_PSK -#elif CONFIG_EXAMPLE_WIFI_AUTH_WPA_WPA2_PSK -#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WPA_WPA2_PSK -#elif CONFIG_EXAMPLE_WIFI_AUTH_WPA2_ENTERPRISE -#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WPA2_ENTERPRISE -#elif CONFIG_EXAMPLE_WIFI_AUTH_WPA3_PSK -#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WPA3_PSK -#elif CONFIG_EXAMPLE_WIFI_AUTH_WPA2_WPA3_PSK -#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WPA2_WPA3_PSK -#elif CONFIG_EXAMPLE_WIFI_AUTH_WAPI_PSK -#define EXAMPLE_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_WAPI_PSK -#endif - static int s_retry_num = 0; static void example_handler_on_wifi_disconnect(void *arg, esp_event_base_t event_base, @@ -75,6 +43,7 @@ static void example_handler_on_wifi_disconnect(void *arg, esp_event_base_t event xSemaphoreGive(s_semph_get_ip6_addrs); } #endif + example_wifi_sta_do_disconnect(); return; } ESP_LOGI(TAG, "Wi-Fi disconnected, trying to reconnect..."); From f92efd98e9c008e494a3d8e5990fcd88d5abe24b Mon Sep 17 00:00:00 2001 From: Rahul Tank Date: Mon, 22 Jul 2024 15:05:59 +0530 Subject: [PATCH 110/113] fix(nimble): Increase Timer stack size for nimble application --- examples/bluetooth/nimble/ble_htp/htp_prph/sdkconfig.defaults | 1 + examples/bluetooth/nimble/blehr/sdkconfig.defaults | 1 + examples/bluetooth/nimble/power_save/sdkconfig.defaults | 1 + 3 files changed, 3 insertions(+) diff --git a/examples/bluetooth/nimble/ble_htp/htp_prph/sdkconfig.defaults b/examples/bluetooth/nimble/ble_htp/htp_prph/sdkconfig.defaults index c829fc5c002..09631ee6856 100644 --- a/examples/bluetooth/nimble/ble_htp/htp_prph/sdkconfig.defaults +++ b/examples/bluetooth/nimble/ble_htp/htp_prph/sdkconfig.defaults @@ -10,3 +10,4 @@ CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY=n CONFIG_BTDM_CTRL_MODE_BTDM=n CONFIG_BT_BLUEDROID_ENABLED=n CONFIG_BT_NIMBLE_ENABLED=y +CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=4000 diff --git a/examples/bluetooth/nimble/blehr/sdkconfig.defaults b/examples/bluetooth/nimble/blehr/sdkconfig.defaults index c829fc5c002..09631ee6856 100644 --- a/examples/bluetooth/nimble/blehr/sdkconfig.defaults +++ b/examples/bluetooth/nimble/blehr/sdkconfig.defaults @@ -10,3 +10,4 @@ CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY=n CONFIG_BTDM_CTRL_MODE_BTDM=n CONFIG_BT_BLUEDROID_ENABLED=n CONFIG_BT_NIMBLE_ENABLED=y +CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=4000 diff --git a/examples/bluetooth/nimble/power_save/sdkconfig.defaults b/examples/bluetooth/nimble/power_save/sdkconfig.defaults index 8b57fab433b..7f51e2e7a5c 100644 --- a/examples/bluetooth/nimble/power_save/sdkconfig.defaults +++ b/examples/bluetooth/nimble/power_save/sdkconfig.defaults @@ -19,3 +19,4 @@ CONFIG_FREERTOS_USE_TICKLESS_IDLE=y CONFIG_FREERTOS_HZ=1000 # Minimum number of ticks to enter sleep mode for CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP=3 +CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=4000 From 893bd25c0b0c9a66da4cb6e8621682fbd2e85e27 Mon Sep 17 00:00:00 2001 From: Armando Date: Tue, 23 Jul 2024 10:00:24 +0800 Subject: [PATCH 111/113] fix(psram): corrected psram early stage function name --- components/esp_psram/esp_psram.c | 2 +- components/esp_system/system_init_fn.txt | 7 ++++++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/components/esp_psram/esp_psram.c b/components/esp_psram/esp_psram.c index debbf9de31b..59176e7c74e 100644 --- a/components/esp_psram/esp_psram.c +++ b/components/esp_psram/esp_psram.c @@ -90,7 +90,7 @@ typedef struct { static psram_ctx_t s_psram_ctx; static const DRAM_ATTR char TAG[] = "esp_psram"; -ESP_SYSTEM_INIT_FN(init_psram, CORE, BIT(0), 103) +ESP_SYSTEM_INIT_FN(add_psram_to_heap, CORE, BIT(0), 103) { #if CONFIG_SPIRAM_BOOT_INIT && (CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC) if (esp_psram_is_initialized()) { diff --git a/components/esp_system/system_init_fn.txt b/components/esp_system/system_init_fn.txt index 1ba1dcc6dca..0af7db87331 100644 --- a/components/esp_system/system_init_fn.txt +++ b/components/esp_system/system_init_fn.txt @@ -41,7 +41,12 @@ CORE: 100: init_heap in components/heap/heap_caps_init.c on BIT(0) CORE: 101: esp_timer_init_nonos in components/esp_timer/src/esp_timer_init.c on BIT(0) CORE: 102: init_newlib in components/newlib/newlib_init.c on BIT(0) -CORE: 103: init_psram in components/esp_psram/esp_psram.c on BIT(0) + +# Add the psram to heap, psram vaddr region is reserved when initialising the heap, after +# psram is initialised (and necessary reservation for psram usage), the rest of the psram +# will be added to the heap +CORE: 103: add_psram_to_heap in components/esp_psram/esp_psram.c on BIT(0) + CORE: 104: init_brownout in components/esp_system/startup_funcs.c on BIT(0) CORE: 105: init_newlib_time in components/esp_system/startup_funcs.c on BIT(0) From e06d0134f2473d786b822dbb0ccabb1b4901e0c3 Mon Sep 17 00:00:00 2001 From: Armando Date: Tue, 23 Jul 2024 10:50:14 +0800 Subject: [PATCH 112/113] fix(camera): fixed c2m cache ops --- components/esp_driver_cam/csi/src/esp_cam_ctlr_csi.c | 2 +- components/esp_driver_cam/isp_dvp/src/esp_cam_ctlr_isp_dvp.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/components/esp_driver_cam/csi/src/esp_cam_ctlr_csi.c b/components/esp_driver_cam/csi/src/esp_cam_ctlr_csi.c index 21b09869dc1..ebfcdb3fccc 100644 --- a/components/esp_driver_cam/csi/src/esp_cam_ctlr_csi.c +++ b/components/esp_driver_cam/csi/src/esp_cam_ctlr_csi.c @@ -350,7 +350,7 @@ IRAM_ATTR static bool csi_dma_trans_done_callback(dw_gdma_channel_handle_t chan, dw_gdma_channel_enable_ctrl(chan, true); if ((ctlr->trans.buffer != ctlr->backup_buffer) || ctlr->bk_buffer_exposed) { - esp_err_t ret = esp_cache_msync((void *)(ctlr->trans.buffer), ctlr->trans.received_size, ESP_CACHE_MSYNC_FLAG_INVALIDATE); + esp_err_t ret = esp_cache_msync((void *)(ctlr->trans.buffer), ctlr->trans.received_size, ESP_CACHE_MSYNC_FLAG_DIR_M2C); assert(ret == ESP_OK); assert(ctlr->cbs.on_trans_finished); if (ctlr->cbs.on_trans_finished) { diff --git a/components/esp_driver_cam/isp_dvp/src/esp_cam_ctlr_isp_dvp.c b/components/esp_driver_cam/isp_dvp/src/esp_cam_ctlr_isp_dvp.c index 852b35aba1f..10446d3749c 100644 --- a/components/esp_driver_cam/isp_dvp/src/esp_cam_ctlr_isp_dvp.c +++ b/components/esp_driver_cam/isp_dvp/src/esp_cam_ctlr_isp_dvp.c @@ -469,7 +469,7 @@ IRAM_ATTR static bool s_dvp_dma_trans_done_callback(dw_gdma_channel_handle_t cha dw_gdma_channel_enable_ctrl(chan, true); if ((dvp_ctlr->trans.buffer != dvp_ctlr->backup_buffer) || dvp_ctlr->bk_buffer_exposed) { - esp_err_t ret = esp_cache_msync((void *)(dvp_ctlr->trans.buffer), dvp_ctlr->trans.received_size, ESP_CACHE_MSYNC_FLAG_INVALIDATE); + esp_err_t ret = esp_cache_msync((void *)(dvp_ctlr->trans.buffer), dvp_ctlr->trans.received_size, ESP_CACHE_MSYNC_FLAG_DIR_M2C); assert(ret == ESP_OK); assert(dvp_ctlr->cbs.on_trans_finished); if (dvp_ctlr->cbs.on_trans_finished) { From fdffa19958c20c7210e3d3ffe01daa48d474fe49 Mon Sep 17 00:00:00 2001 From: Jan Beran Date: Tue, 23 Jul 2024 17:26:42 +0800 Subject: [PATCH 113/113] Docs: document inversion in kconfig --- docs/en/api-reference/kconfig.rst | 7 +++++++ docs/zh_CN/api-reference/kconfig.rst | 7 +++++++ 2 files changed, 14 insertions(+) diff --git a/docs/en/api-reference/kconfig.rst b/docs/en/api-reference/kconfig.rst index 71fe9ce7eb4..19ca3e0f97e 100644 --- a/docs/en/api-reference/kconfig.rst +++ b/docs/en/api-reference/kconfig.rst @@ -61,6 +61,13 @@ The standard Kconfig_ tools ignore unknown options in ``sdkconfig``. So if a dev 3. ``kconfgen`` post-processes ``sdkconfig`` files and generates all build outputs (``sdkconfig.h``, ``sdkconfig.cmake``, and ``auto.conf``) by adding a list of compatibility statements, i.e., the values of old options are set for new options after modification. If users still use old options in their code, this will prevent it from breaking. 4. :ref:`configuration-deprecated-options` are automatically generated by ``kconfgen``. +The structure of the ``sdkconfig.rename`` file is as follows: + +* Lines starting with ``#`` and empty lines will be ignored. +* All other lines should follow one of these formats: + * ``CONFIG_DEPRECATED_NAME CONFIG_NEW_NAME``, where ``CONFIG_DEPRECATED_NAME`` is the old config name which was renamed in a newer ESP-IDF version to ``CONFIG_NEW_NAME``. + * ``CONFIG_DEPRECATED_NAME !CONFIG_NEW_INVERTED_NAME`` where ``CONFIG_NEW_INVERTED_NAME`` was introduced in a newer ESP-IDF version by Boolean inversion of the logic value of ``CONFIG_DEPRECATED_NAME``. + .. _configuration-options-reference: Configuration Options Reference diff --git a/docs/zh_CN/api-reference/kconfig.rst b/docs/zh_CN/api-reference/kconfig.rst index 7590f27b40e..1da2defaf6e 100644 --- a/docs/zh_CN/api-reference/kconfig.rst +++ b/docs/zh_CN/api-reference/kconfig.rst @@ -61,6 +61,13 @@ Kconfig 选项的向后兼容性 3. ``kconfgen`` 通过添加兼容性语句列表（即经过修改后，将旧选项的值设置为新选项的值），后处理 ``sdkconfig`` 文件，并生成所有构建结果（ ``sdkconfig.h``、 ``sdkconfig.cmake`` 以及 ``auto.conf``）。如果用户在其代码中仍然使用旧选项，此举可以防止用户代码出现问题。 4. ``kconfgen`` 会自动生成 :ref:`configuration-deprecated-options`。 +``sdkconfig.rename`` 文件的结构如下： + +* 以 ``#`` 开头的行和空行将被忽略。 +* 其他所有行应遵循以下格式之一： + * ``CONFIG_DEPRECATED_NAME CONFIG_NEW_NAME``，其中 ``CONFIG_DEPRECATED_NAME`` 是旧配置名称，在较新的 ESP-IDF 版本中已更名为 ``CONFIG_NEW_NAME``。 + * ``CONFIG_DEPRECATED_NAME !CONFIG_NEW_INVERTED_NAME``，其中 ``CONFIG_NEW_INVERTED_NAME`` 是在较新的 ESP-IDF 版本中通过布尔反转 ``CONFIG_DEPRECATED_NAME`` 的逻辑值而引入的新配置名称。 + .. _configuration-options-reference: 配置选项参考