fix(rv64v): remain needs to be modified only if vleff does not trigge…

…r an exception (#543)

src/cpu/cpu-exec.c

@@ -632,11 +632,13 @@ void cpu_exec(uint64_t n) {
 #ifdef CONFIG_RVV
     //The processing logic when the fof instruction is abnormal but not trap.
     //TODO Rewrite him in a better way
-    void set_fofNoExceptionState(int* cause);
-    set_fofNoExceptionState(&cause);
-    // fof is committed, so the instruction count should be updated
-    n_remain_total -= 1;
-    n_remain -= 1;
+    bool set_fofNoExceptionState();
+    if (set_fofNoExceptionState()){
+      // fof is committed, so the instruction count should be updated
+      cause = 0;
+      n_remain_total -= 1;
+      n_remain -= 1;
+    }
 #endif
     n_remain -= prev_s->idx_in_bb - 1;
     // Here is exception handle

src/isa/riscv64/instr/rvv/vldst_impl.c

@@ -31,15 +31,23 @@
 #include "../local-include/intr.h"
 
 uint64_t fofvl = 0;
-uint64_t mtvaltmp = 0;
+uint64_t tvaltmp = 0;
 
-void set_fofNoExceptionState(int* cause){
+bool set_fofNoExceptionState(){
   if (fofvl != 0){
-    *cause = 0;
     vl->val = fofvl;
-    INTR_TVAL_REG(EX_LAF) = mtvaltmp;
+    INTR_TVAL_REG(EX_LAF) = tvaltmp;
+
+    fofvl = 0;
+    tvaltmp = 0;
+
+#ifndef CONFIG_SHARE
     difftest_skip_dut(1,0);
+#endif
+    return true;
   }
+
+  return false;
 }
 
 void isa_vec_misalign_data_addr_check(vaddr_t vaddr, int len, int type);
@@ -932,7 +940,7 @@ void vldff(Decode *s, int mode, int mmu_mode) {
 
         if (idx != 0) {
           fofvl = idx;
-          mtvaltmp = INTR_TVAL_REG(EX_LAF);
+          tvaltmp = INTR_TVAL_REG(EX_LAF);
         }
 
         isa_vec_misalign_data_addr_check(addr, s->v_width, MEM_TYPE_READ);