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CSR: add switch for cycle, instret and htimedelta #388

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Commits on Jul 11, 2024

  1. CSR: add switch for cycle, instret and htimedelta

    As old CSR module of XiangShan does not support any unpriv counter, it's better to add switch of unpriv counter in NEMU.
    
    Also, openSBI asks that time and htimedelta should either implemented or both unimplemented. This patch add some marco to meet this.
    cebarobot committed Jul 11, 2024
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