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OpenXiangShan / riscv-isa-sim Public

forked from riscv-software-src/riscv-isa-sim

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CI for difftest

fix(csr): duplicate add_csr for marchid and mimpid #31

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fix(csr): duplicate add_csr for marchid and mimpid

fix(csr): duplicate add_csr for marchid and mimpid #31

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- Usage
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Build spike-so for difftest (rocket_chip)

succeeded Sep 11, 2024 in 4m 59s

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