diff --git a/src/coreclr/jit/emitarm64.cpp b/src/coreclr/jit/emitarm64.cpp index ff88d9fe29c98..0eb805bb4d478 100644 --- a/src/coreclr/jit/emitarm64.cpp +++ b/src/coreclr/jit/emitarm64.cpp @@ -1309,13 +1309,13 @@ emitAttr emitter::emitInsLoadStoreSize(instrDesc* id) // clang-format off static const char * const xRegNames[] = { - #define REGDEF(name, rnum, mask, xname, wname) xname, + #define REGDEF(name, rnum, mask, xname, wname, regTypeTag) xname, #include "register.h" }; static const char * const wRegNames[] = { - #define REGDEF(name, rnum, mask, xname, wname) wname, + #define REGDEF(name, rnum, mask, xname, wname, regTypeTag) wname, #include "register.h" }; diff --git a/src/coreclr/jit/emitloongarch64.cpp b/src/coreclr/jit/emitloongarch64.cpp index 9a10ef23e9894..0f295f9c90f68 100644 --- a/src/coreclr/jit/emitloongarch64.cpp +++ b/src/coreclr/jit/emitloongarch64.cpp @@ -3909,7 +3909,7 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp) // clang-format off static const char* const RegNames[] = { - #define REGDEF(name, rnum, mask, sname) sname, + #define REGDEF(name, rnum, mask, sname, regTypeTag) sname, #include "register.h" }; // clang-format on diff --git a/src/coreclr/jit/emitxarch.cpp b/src/coreclr/jit/emitxarch.cpp index e8ff553f80cc8..af145908a3389 100644 --- a/src/coreclr/jit/emitxarch.cpp +++ b/src/coreclr/jit/emitxarch.cpp @@ -10413,7 +10413,7 @@ const char* emitter::emitRegName(regNumber reg, emitAttr attr, bool varName) con const char* emitter::emitXMMregName(unsigned reg) const { static const char* const regNames[] = { -#define REGDEF(name, rnum, mask, sname) "x" sname, +#define REGDEF(name, rnum, mask, sname, regTypeTag) "x" sname, #include "register.h" }; @@ -10431,7 +10431,7 @@ const char* emitter::emitXMMregName(unsigned reg) const const char* emitter::emitYMMregName(unsigned reg) const { static const char* const regNames[] = { -#define REGDEF(name, rnum, mask, sname) "y" sname, +#define REGDEF(name, rnum, mask, sname, regTypeTag) "y" sname, #include "register.h" }; @@ -10449,7 +10449,7 @@ const char* emitter::emitYMMregName(unsigned reg) const const char* emitter::emitZMMregName(unsigned reg) const { static const char* const regNames[] = { -#define REGDEF(name, rnum, mask, sname) "z" sname, +#define REGDEF(name, rnum, mask, sname, regTypeTag) "z" sname, #include "register.h" }; diff --git a/src/coreclr/jit/regMaskTPOps.cpp b/src/coreclr/jit/regMaskTPOps.cpp index 30654e34a34e8..c39f2ab21844b 100644 --- a/src/coreclr/jit/regMaskTPOps.cpp +++ b/src/coreclr/jit/regMaskTPOps.cpp @@ -26,3 +26,17 @@ bool regMaskTP::IsRegNumInMask(regNumber reg) { return (low & genRegMask(reg)) != 0; } + +/* static */ const int regMaskTP::getRegisterTypeIndex(regNumber reg) +{ + static const BYTE _registerTypeIndex[] = { +#ifdef TARGET_ARM64 +#define REGDEF(name, rnum, mask, xname, wname, regTypeTag) regTypeTag, +#else +#define REGDEF(name, rnum, mask, sname, regTypeTag) regTypeTag, +#endif +#include "register.h" + }; + + return _registerTypeIndex[reg]; +} diff --git a/src/coreclr/jit/register.h b/src/coreclr/jit/register.h index 2c51271372595..8555c6b7d4664 100644 --- a/src/coreclr/jit/register.h +++ b/src/coreclr/jit/register.h @@ -16,15 +16,15 @@ #if defined(TARGET_X86) /* -REGDEF(name, rnum, mask, sname) */ -REGDEF(EAX, 0, 0x01, "eax" ) -REGDEF(ECX, 1, 0x02, "ecx" ) -REGDEF(EDX, 2, 0x04, "edx" ) -REGDEF(EBX, 3, 0x08, "ebx" ) -REGDEF(ESP, 4, 0x10, "esp" ) -REGDEF(EBP, 5, 0x20, "ebp" ) -REGDEF(ESI, 6, 0x40, "esi" ) -REGDEF(EDI, 7, 0x80, "edi" ) +REGDEF(name, rnum, mask, sname, regTypeTag) */ +REGDEF(EAX, 0, 0x01, "eax", 0) +REGDEF(ECX, 1, 0x02, "ecx", 0) +REGDEF(EDX, 2, 0x04, "edx", 0) +REGDEF(EBX, 3, 0x08, "ebx", 0) +REGDEF(ESP, 4, 0x10, "esp", 0) +REGDEF(EBP, 5, 0x20, "ebp", 0) +REGDEF(ESI, 6, 0x40, "esi", 0) +REGDEF(EDI, 7, 0x80, "edi", 0) REGALIAS(RAX, EAX) REGALIAS(RCX, ECX) REGALIAS(RDX, EDX) @@ -37,23 +37,23 @@ REGALIAS(RDI, EDI) #else // !defined(TARGET_X86) /* -REGDEF(name, rnum, mask, sname) */ -REGDEF(RAX, 0, 0x0001, "rax" ) -REGDEF(RCX, 1, 0x0002, "rcx" ) -REGDEF(RDX, 2, 0x0004, "rdx" ) -REGDEF(RBX, 3, 0x0008, "rbx" ) -REGDEF(RSP, 4, 0x0010, "rsp" ) -REGDEF(RBP, 5, 0x0020, "rbp" ) -REGDEF(RSI, 6, 0x0040, "rsi" ) -REGDEF(RDI, 7, 0x0080, "rdi" ) -REGDEF(R8, 8, 0x0100, "r8" ) -REGDEF(R9, 9, 0x0200, "r9" ) -REGDEF(R10, 10, 0x0400, "r10" ) -REGDEF(R11, 11, 0x0800, "r11" ) -REGDEF(R12, 12, 0x1000, "r12" ) -REGDEF(R13, 13, 0x2000, "r13" ) -REGDEF(R14, 14, 0x4000, "r14" ) -REGDEF(R15, 15, 0x8000, "r15" ) +REGDEF(name, rnum, mask, sname, regTypeTag) */ +REGDEF(RAX, 0, 0x0001, "rax", 0) +REGDEF(RCX, 1, 0x0002, "rcx", 0) +REGDEF(RDX, 2, 0x0004, "rdx", 0) +REGDEF(RBX, 3, 0x0008, "rbx", 0) +REGDEF(RSP, 4, 0x0010, "rsp", 0) +REGDEF(RBP, 5, 0x0020, "rbp", 0) +REGDEF(RSI, 6, 0x0040, "rsi", 0) +REGDEF(RDI, 7, 0x0080, "rdi", 0) +REGDEF(R8, 8, 0x0100, "r8" , 0) +REGDEF(R9, 9, 0x0200, "r9" , 0) +REGDEF(R10, 10, 0x0400, "r10", 0) +REGDEF(R11, 11, 0x0800, "r11", 0) +REGDEF(R12, 12, 0x1000, "r12", 0) +REGDEF(R13, 13, 0x2000, "r13", 0) +REGDEF(R14, 14, 0x4000, "r14", 0) +REGDEF(R15, 15, 0x8000, "r15", 0) REGALIAS(EAX, RAX) REGALIAS(ECX, RCX) @@ -83,55 +83,55 @@ REGALIAS(EDI, RDI) #endif // !TARGET_AMD64 -REGDEF(XMM0, 0+XMMBASE, XMMMASK(0), "mm0" ) -REGDEF(XMM1, 1+XMMBASE, XMMMASK(1), "mm1" ) -REGDEF(XMM2, 2+XMMBASE, XMMMASK(2), "mm2" ) -REGDEF(XMM3, 3+XMMBASE, XMMMASK(3), "mm3" ) -REGDEF(XMM4, 4+XMMBASE, XMMMASK(4), "mm4" ) -REGDEF(XMM5, 5+XMMBASE, XMMMASK(5), "mm5" ) -REGDEF(XMM6, 6+XMMBASE, XMMMASK(6), "mm6" ) -REGDEF(XMM7, 7+XMMBASE, XMMMASK(7), "mm7" ) +REGDEF(XMM0, 0+XMMBASE, XMMMASK(0), "mm0", 1) +REGDEF(XMM1, 1+XMMBASE, XMMMASK(1), "mm1", 1) +REGDEF(XMM2, 2+XMMBASE, XMMMASK(2), "mm2", 1) +REGDEF(XMM3, 3+XMMBASE, XMMMASK(3), "mm3", 1) +REGDEF(XMM4, 4+XMMBASE, XMMMASK(4), "mm4", 1) +REGDEF(XMM5, 5+XMMBASE, XMMMASK(5), "mm5", 1) +REGDEF(XMM6, 6+XMMBASE, XMMMASK(6), "mm6", 1) +REGDEF(XMM7, 7+XMMBASE, XMMMASK(7), "mm7", 1) #ifdef TARGET_AMD64 -REGDEF(XMM8, 8+XMMBASE, XMMMASK(8), "mm8" ) -REGDEF(XMM9, 9+XMMBASE, XMMMASK(9), "mm9" ) -REGDEF(XMM10, 10+XMMBASE, XMMMASK(10), "mm10" ) -REGDEF(XMM11, 11+XMMBASE, XMMMASK(11), "mm11" ) -REGDEF(XMM12, 12+XMMBASE, XMMMASK(12), "mm12" ) -REGDEF(XMM13, 13+XMMBASE, XMMMASK(13), "mm13" ) -REGDEF(XMM14, 14+XMMBASE, XMMMASK(14), "mm14" ) -REGDEF(XMM15, 15+XMMBASE, XMMMASK(15), "mm15" ) - -REGDEF(XMM16, 16+XMMBASE, XMMMASK(16), "mm16" ) -REGDEF(XMM17, 17+XMMBASE, XMMMASK(17), "mm17" ) -REGDEF(XMM18, 18+XMMBASE, XMMMASK(18), "mm18" ) -REGDEF(XMM19, 19+XMMBASE, XMMMASK(19), "mm19" ) -REGDEF(XMM20, 20+XMMBASE, XMMMASK(20), "mm20" ) -REGDEF(XMM21, 21+XMMBASE, XMMMASK(21), "mm21" ) -REGDEF(XMM22, 22+XMMBASE, XMMMASK(22), "mm22" ) -REGDEF(XMM23, 23+XMMBASE, XMMMASK(23), "mm23" ) - -REGDEF(XMM24, 24+XMMBASE, XMMMASK(24), "mm24" ) -REGDEF(XMM25, 25+XMMBASE, XMMMASK(25), "mm25" ) -REGDEF(XMM26, 26+XMMBASE, XMMMASK(26), "mm26" ) -REGDEF(XMM27, 27+XMMBASE, XMMMASK(27), "mm27" ) -REGDEF(XMM28, 28+XMMBASE, XMMMASK(28), "mm28" ) -REGDEF(XMM29, 29+XMMBASE, XMMMASK(29), "mm29" ) -REGDEF(XMM30, 30+XMMBASE, XMMMASK(30), "mm30" ) -REGDEF(XMM31, 31+XMMBASE, XMMMASK(31), "mm31" ) +REGDEF(XMM8, 8+XMMBASE, XMMMASK(8), "mm8", 1) +REGDEF(XMM9, 9+XMMBASE, XMMMASK(9), "mm9", 1) +REGDEF(XMM10, 10+XMMBASE, XMMMASK(10), "mm10", 1) +REGDEF(XMM11, 11+XMMBASE, XMMMASK(11), "mm11", 1) +REGDEF(XMM12, 12+XMMBASE, XMMMASK(12), "mm12", 1) +REGDEF(XMM13, 13+XMMBASE, XMMMASK(13), "mm13", 1) +REGDEF(XMM14, 14+XMMBASE, XMMMASK(14), "mm14", 1) +REGDEF(XMM15, 15+XMMBASE, XMMMASK(15), "mm15", 1) + +REGDEF(XMM16, 16+XMMBASE, XMMMASK(16), "mm16", 1) +REGDEF(XMM17, 17+XMMBASE, XMMMASK(17), "mm17", 1) +REGDEF(XMM18, 18+XMMBASE, XMMMASK(18), "mm18", 1) +REGDEF(XMM19, 19+XMMBASE, XMMMASK(19), "mm19", 1) +REGDEF(XMM20, 20+XMMBASE, XMMMASK(20), "mm20", 1) +REGDEF(XMM21, 21+XMMBASE, XMMMASK(21), "mm21", 1) +REGDEF(XMM22, 22+XMMBASE, XMMMASK(22), "mm22", 1) +REGDEF(XMM23, 23+XMMBASE, XMMMASK(23), "mm23", 1) + +REGDEF(XMM24, 24+XMMBASE, XMMMASK(24), "mm24", 1) +REGDEF(XMM25, 25+XMMBASE, XMMMASK(25), "mm25", 1) +REGDEF(XMM26, 26+XMMBASE, XMMMASK(26), "mm26", 1) +REGDEF(XMM27, 27+XMMBASE, XMMMASK(27), "mm27", 1) +REGDEF(XMM28, 28+XMMBASE, XMMMASK(28), "mm28", 1) +REGDEF(XMM29, 29+XMMBASE, XMMMASK(29), "mm29", 1) +REGDEF(XMM30, 30+XMMBASE, XMMMASK(30), "mm30", 1) +REGDEF(XMM31, 31+XMMBASE, XMMMASK(31), "mm31", 1) #endif // !TARGET_AMD64 -REGDEF(K0, 0+KBASE, KMASK(0), "k0" ) -REGDEF(K1, 1+KBASE, KMASK(1), "k1" ) -REGDEF(K2, 2+KBASE, KMASK(2), "k2" ) -REGDEF(K3, 3+KBASE, KMASK(3), "k3" ) -REGDEF(K4, 4+KBASE, KMASK(4), "k4" ) -REGDEF(K5, 5+KBASE, KMASK(5), "k5" ) -REGDEF(K6, 6+KBASE, KMASK(6), "k6" ) -REGDEF(K7, 7+KBASE, KMASK(7), "k7" ) +REGDEF(K0, 0+KBASE, KMASK(0), "k0", 2) +REGDEF(K1, 1+KBASE, KMASK(1), "k1", 2) +REGDEF(K2, 2+KBASE, KMASK(2), "k2", 2) +REGDEF(K3, 3+KBASE, KMASK(3), "k3", 2) +REGDEF(K4, 4+KBASE, KMASK(4), "k4", 2) +REGDEF(K5, 5+KBASE, KMASK(5), "k5", 2) +REGDEF(K6, 6+KBASE, KMASK(6), "k6", 2) +REGDEF(K7, 7+KBASE, KMASK(7), "k7", 2) -REGDEF(STK, 8+KBASE, 0x0000, "STK" ) +REGDEF(STK, 8+KBASE, 0x0000, "STK", 3) #elif defined(TARGET_ARM) #include "registerarm.h" diff --git a/src/coreclr/jit/registerarm.h b/src/coreclr/jit/registerarm.h index dfebf8199047e..9225f00541d0f 100644 --- a/src/coreclr/jit/registerarm.h +++ b/src/coreclr/jit/registerarm.h @@ -13,59 +13,59 @@ #endif /* -REGDEF(name, rnum, mask, sname) */ -REGDEF(R0, 0, 0x0001, "r0" ) -REGDEF(R1, 1, 0x0002, "r1" ) -REGDEF(R2, 2, 0x0004, "r2" ) -REGDEF(R3, 3, 0x0008, "r3" ) -REGDEF(R4, 4, 0x0010, "r4" ) -REGDEF(R5, 5, 0x0020, "r5" ) -REGDEF(R6, 6, 0x0040, "r6" ) -REGDEF(R7, 7, 0x0080, "r7" ) -REGDEF(R8, 8, 0x0100, "r8" ) -REGDEF(R9, 9, 0x0200, "r9" ) -REGDEF(R10, 10, 0x0400, "r10" ) -REGDEF(R11, 11, 0x0800, "r11" ) -REGDEF(R12, 12, 0x1000, "r12" ) -REGDEF(SP, 13, 0x2000, "sp" ) -REGDEF(LR, 14, 0x4000, "lr" ) -REGDEF(PC, 15, 0x8000, "pc" ) +REGDEF(name, rnum, mask, sname, regTypeTag) */ +REGDEF(R0, 0, 0x0001, "r0", 0) +REGDEF(R1, 1, 0x0002, "r1", 0) +REGDEF(R2, 2, 0x0004, "r2", 0) +REGDEF(R3, 3, 0x0008, "r3", 0) +REGDEF(R4, 4, 0x0010, "r4", 0) +REGDEF(R5, 5, 0x0020, "r5", 0) +REGDEF(R6, 6, 0x0040, "r6", 0) +REGDEF(R7, 7, 0x0080, "r7", 0) +REGDEF(R8, 8, 0x0100, "r8", 0) +REGDEF(R9, 9, 0x0200, "r9", 0) +REGDEF(R10, 10, 0x0400, "r10",0) +REGDEF(R11, 11, 0x0800, "r11",0) +REGDEF(R12, 12, 0x1000, "r12",0) +REGDEF(SP, 13, 0x2000, "sp", 0) +REGDEF(LR, 14, 0x4000, "lr", 0) +REGDEF(PC, 15, 0x8000, "pc", 0) #define FPBASE 16 #define VFPMASK(x) (((int64_t)1) << (x+FPBASE)) -REGDEF(F0, 0+FPBASE, VFPMASK(0), "f0") -REGDEF(F1, 1+FPBASE, VFPMASK(1), "f1") -REGDEF(F2, 2+FPBASE, VFPMASK(2), "f2") -REGDEF(F3, 3+FPBASE, VFPMASK(3), "f3") -REGDEF(F4, 4+FPBASE, VFPMASK(4), "f4") -REGDEF(F5, 5+FPBASE, VFPMASK(5), "f5") -REGDEF(F6, 6+FPBASE, VFPMASK(6), "f6") -REGDEF(F7, 7+FPBASE, VFPMASK(7), "f7") -REGDEF(F8, 8+FPBASE, VFPMASK(8), "f8") -REGDEF(F9, 9+FPBASE, VFPMASK(9), "f9") -REGDEF(F10, 10+FPBASE, VFPMASK(10), "f10") -REGDEF(F11, 11+FPBASE, VFPMASK(11), "f11") -REGDEF(F12, 12+FPBASE, VFPMASK(12), "f12") -REGDEF(F13, 13+FPBASE, VFPMASK(13), "f13") -REGDEF(F14, 14+FPBASE, VFPMASK(14), "f14") -REGDEF(F15, 15+FPBASE, VFPMASK(15), "f15") -REGDEF(F16, 16+FPBASE, VFPMASK(16), "f16") -REGDEF(F17, 17+FPBASE, VFPMASK(17), "f17") -REGDEF(F18, 18+FPBASE, VFPMASK(18), "f18") -REGDEF(F19, 19+FPBASE, VFPMASK(19), "f19") -REGDEF(F20, 20+FPBASE, VFPMASK(20), "f20") -REGDEF(F21, 21+FPBASE, VFPMASK(21), "f21") -REGDEF(F22, 22+FPBASE, VFPMASK(22), "f22") -REGDEF(F23, 23+FPBASE, VFPMASK(23), "f23") -REGDEF(F24, 24+FPBASE, VFPMASK(24), "f24") -REGDEF(F25, 25+FPBASE, VFPMASK(25), "f25") -REGDEF(F26, 26+FPBASE, VFPMASK(26), "f26") -REGDEF(F27, 27+FPBASE, VFPMASK(27), "f27") -REGDEF(F28, 28+FPBASE, VFPMASK(28), "f28") -REGDEF(F29, 29+FPBASE, VFPMASK(29), "f29") -REGDEF(F30, 30+FPBASE, VFPMASK(30), "f30") -REGDEF(F31, 31+FPBASE, VFPMASK(31), "f31") +REGDEF(F0, 0+FPBASE, VFPMASK(0), "f0", 1) +REGDEF(F1, 1+FPBASE, VFPMASK(1), "f1", 1) +REGDEF(F2, 2+FPBASE, VFPMASK(2), "f2", 1) +REGDEF(F3, 3+FPBASE, VFPMASK(3), "f3", 1) +REGDEF(F4, 4+FPBASE, VFPMASK(4), "f4", 1) +REGDEF(F5, 5+FPBASE, VFPMASK(5), "f5", 1) +REGDEF(F6, 6+FPBASE, VFPMASK(6), "f6", 1) +REGDEF(F7, 7+FPBASE, VFPMASK(7), "f7", 1) +REGDEF(F8, 8+FPBASE, VFPMASK(8), "f8", 1) +REGDEF(F9, 9+FPBASE, VFPMASK(9), "f9", 1) +REGDEF(F10, 10+FPBASE, VFPMASK(10), "f10", 1) +REGDEF(F11, 11+FPBASE, VFPMASK(11), "f11", 1) +REGDEF(F12, 12+FPBASE, VFPMASK(12), "f12", 1) +REGDEF(F13, 13+FPBASE, VFPMASK(13), "f13", 1) +REGDEF(F14, 14+FPBASE, VFPMASK(14), "f14", 1) +REGDEF(F15, 15+FPBASE, VFPMASK(15), "f15", 1) +REGDEF(F16, 16+FPBASE, VFPMASK(16), "f16", 1) +REGDEF(F17, 17+FPBASE, VFPMASK(17), "f17", 1) +REGDEF(F18, 18+FPBASE, VFPMASK(18), "f18", 1) +REGDEF(F19, 19+FPBASE, VFPMASK(19), "f19", 1) +REGDEF(F20, 20+FPBASE, VFPMASK(20), "f20", 1) +REGDEF(F21, 21+FPBASE, VFPMASK(21), "f21", 1) +REGDEF(F22, 22+FPBASE, VFPMASK(22), "f22", 1) +REGDEF(F23, 23+FPBASE, VFPMASK(23), "f23", 1) +REGDEF(F24, 24+FPBASE, VFPMASK(24), "f24", 1) +REGDEF(F25, 25+FPBASE, VFPMASK(25), "f25", 1) +REGDEF(F26, 26+FPBASE, VFPMASK(26), "f26", 1) +REGDEF(F27, 27+FPBASE, VFPMASK(27), "f27", 1) +REGDEF(F28, 28+FPBASE, VFPMASK(28), "f28", 1) +REGDEF(F29, 29+FPBASE, VFPMASK(29), "f29", 1) +REGDEF(F30, 30+FPBASE, VFPMASK(30), "f30", 1) +REGDEF(F31, 31+FPBASE, VFPMASK(31), "f31", 1) // Allow us to call R11/FP, SP, LR and PC by their register number names @@ -75,7 +75,7 @@ REGALIAS(R14, LR) REGALIAS(R15, PC) // This must be last! -REGDEF(STK, 32+FPBASE, 0x0000, "STK") +REGDEF(STK, 32+FPBASE, 0x0000, "STK", 2) /*****************************************************************************/ #undef REGDEF diff --git a/src/coreclr/jit/registerarm64.h b/src/coreclr/jit/registerarm64.h index e8c126fac148c..ad7c5f895dafd 100644 --- a/src/coreclr/jit/registerarm64.h +++ b/src/coreclr/jit/registerarm64.h @@ -15,39 +15,39 @@ #define RMASK(x) (1ULL << (x)) /* -REGDEF(name, rnum, mask, xname, wname) */ -REGDEF(R0, 0, 0x0001, "x0" , "w0" ) -REGDEF(R1, 1, 0x0002, "x1" , "w1" ) -REGDEF(R2, 2, 0x0004, "x2" , "w2" ) -REGDEF(R3, 3, 0x0008, "x3" , "w3" ) -REGDEF(R4, 4, 0x0010, "x4" , "w4" ) -REGDEF(R5, 5, 0x0020, "x5" , "w5" ) -REGDEF(R6, 6, 0x0040, "x6" , "w6" ) -REGDEF(R7, 7, 0x0080, "x7" , "w7" ) -REGDEF(R8, 8, 0x0100, "x8" , "w8" ) -REGDEF(R9, 9, 0x0200, "x9" , "w9" ) -REGDEF(R10, 10, 0x0400, "x10", "w10" ) -REGDEF(R11, 11, 0x0800, "x11", "w11" ) -REGDEF(R12, 12, 0x1000, "x12", "w12" ) -REGDEF(R13, 13, 0x2000, "x13", "w13" ) -REGDEF(R14, 14, 0x4000, "x14", "w14" ) -REGDEF(R15, 15, 0x8000, "x15", "w15" ) -REGDEF(IP0, 16, 0x10000, "xip0","wip0" ) -REGDEF(IP1, 17, 0x20000, "xip1","wip1" ) -REGDEF(PR, 18, 0x40000, "xpr", "wpr" ) -REGDEF(R19, 19, 0x80000, "x19", "w19" ) -REGDEF(R20, 20, 0x100000, "x20", "w20" ) -REGDEF(R21, 21, 0x200000, "x21", "w21" ) -REGDEF(R22, 22, 0x400000, "x22", "w22" ) -REGDEF(R23, 23, 0x800000, "x23", "w23" ) -REGDEF(R24, 24, 0x1000000, "x24", "w24" ) -REGDEF(R25, 25, 0x2000000, "x25", "w25" ) -REGDEF(R26, 26, 0x4000000, "x26", "w26" ) -REGDEF(R27, 27, 0x8000000, "x27", "w27" ) -REGDEF(R28, 28, 0x10000000, "x28", "w28" ) -REGDEF(FP, 29, 0x20000000, "fp" , "w29" ) -REGDEF(LR, 30, 0x40000000, "lr" , "w30" ) -REGDEF(ZR, 31, 0x80000000, "xzr", "wzr" ) +REGDEF(name, rnum, mask, xname, wname, regTypeTag) */ +REGDEF(R0, 0, 0x0001, "x0" , "w0", 0) +REGDEF(R1, 1, 0x0002, "x1" , "w1", 0) +REGDEF(R2, 2, 0x0004, "x2" , "w2", 0) +REGDEF(R3, 3, 0x0008, "x3" , "w3", 0) +REGDEF(R4, 4, 0x0010, "x4" , "w4", 0) +REGDEF(R5, 5, 0x0020, "x5" , "w5", 0) +REGDEF(R6, 6, 0x0040, "x6" , "w6", 0) +REGDEF(R7, 7, 0x0080, "x7" , "w7", 0) +REGDEF(R8, 8, 0x0100, "x8" , "w8", 0) +REGDEF(R9, 9, 0x0200, "x9" , "w9", 0) +REGDEF(R10, 10, 0x0400, "x10", "w10", 0) +REGDEF(R11, 11, 0x0800, "x11", "w11", 0) +REGDEF(R12, 12, 0x1000, "x12", "w12", 0) +REGDEF(R13, 13, 0x2000, "x13", "w13", 0) +REGDEF(R14, 14, 0x4000, "x14", "w14", 0) +REGDEF(R15, 15, 0x8000, "x15", "w15", 0) +REGDEF(IP0, 16, 0x10000, "xip0","wip0",0) +REGDEF(IP1, 17, 0x20000, "xip1","wip1",0) +REGDEF(PR, 18, 0x40000, "xpr", "wpr", 0) +REGDEF(R19, 19, 0x80000, "x19", "w19", 0) +REGDEF(R20, 20, 0x100000, "x20", "w20", 0) +REGDEF(R21, 21, 0x200000, "x21", "w21", 0) +REGDEF(R22, 22, 0x400000, "x22", "w22", 0) +REGDEF(R23, 23, 0x800000, "x23", "w23", 0) +REGDEF(R24, 24, 0x1000000, "x24", "w24", 0) +REGDEF(R25, 25, 0x2000000, "x25", "w25", 0) +REGDEF(R26, 26, 0x4000000, "x26", "w26", 0) +REGDEF(R27, 27, 0x8000000, "x27", "w27", 0) +REGDEF(R28, 28, 0x10000000, "x28", "w28", 0) +REGDEF(FP, 29, 0x20000000, "fp" , "w29", 0) +REGDEF(LR, 30, 0x40000000, "lr" , "w30", 0) +REGDEF(ZR, 31, 0x80000000, "xzr", "wzr", 0) // Allow us to call IP0,IP1,PR,FP,LR by their register number names REGALIAS(R16, IP0) @@ -60,39 +60,39 @@ REGALIAS(R30, LR) #define VMASK(x) (1ULL << (VBASE+(x))) /* -REGDEF(name, rnum, mask, xname, wname) */ -REGDEF(V0, 0+VBASE, VMASK(0), "d0", "s0") -REGDEF(V1, 1+VBASE, VMASK(1), "d1", "s1") -REGDEF(V2, 2+VBASE, VMASK(2), "d2", "s2") -REGDEF(V3, 3+VBASE, VMASK(3), "d3", "s3") -REGDEF(V4, 4+VBASE, VMASK(4), "d4", "s4") -REGDEF(V5, 5+VBASE, VMASK(5), "d5", "s5") -REGDEF(V6, 6+VBASE, VMASK(6), "d6", "s6") -REGDEF(V7, 7+VBASE, VMASK(7), "d7", "s7") -REGDEF(V8, 8+VBASE, VMASK(8), "d8", "s8") -REGDEF(V9, 9+VBASE, VMASK(9), "d9", "s9") -REGDEF(V10, 10+VBASE, VMASK(10), "d10", "s10") -REGDEF(V11, 11+VBASE, VMASK(11), "d11", "s11") -REGDEF(V12, 12+VBASE, VMASK(12), "d12", "s12") -REGDEF(V13, 13+VBASE, VMASK(13), "d13", "s13") -REGDEF(V14, 14+VBASE, VMASK(14), "d14", "s14") -REGDEF(V15, 15+VBASE, VMASK(15), "d15", "s15") -REGDEF(V16, 16+VBASE, VMASK(16), "d16", "s16") -REGDEF(V17, 17+VBASE, VMASK(17), "d17", "s17") -REGDEF(V18, 18+VBASE, VMASK(18), "d18", "s18") -REGDEF(V19, 19+VBASE, VMASK(19), "d19", "s19") -REGDEF(V20, 20+VBASE, VMASK(20), "d20", "s20") -REGDEF(V21, 21+VBASE, VMASK(21), "d21", "s21") -REGDEF(V22, 22+VBASE, VMASK(22), "d22", "s22") -REGDEF(V23, 23+VBASE, VMASK(23), "d23", "s23") -REGDEF(V24, 24+VBASE, VMASK(24), "d24", "s24") -REGDEF(V25, 25+VBASE, VMASK(25), "d25", "s25") -REGDEF(V26, 26+VBASE, VMASK(26), "d26", "s26") -REGDEF(V27, 27+VBASE, VMASK(27), "d27", "s27") -REGDEF(V28, 28+VBASE, VMASK(28), "d28", "s28") -REGDEF(V29, 29+VBASE, VMASK(29), "d29", "s29") -REGDEF(V30, 30+VBASE, VMASK(30), "d30", "s30") -REGDEF(V31, 31+VBASE, VMASK(31), "d31", "s31") +REGDEF(name, rnum, mask, xname, wname, regTypeTag) */ +REGDEF(V0, 0+VBASE, VMASK(0), "d0", "s0", 1) +REGDEF(V1, 1+VBASE, VMASK(1), "d1", "s1", 1) +REGDEF(V2, 2+VBASE, VMASK(2), "d2", "s2", 1) +REGDEF(V3, 3+VBASE, VMASK(3), "d3", "s3", 1) +REGDEF(V4, 4+VBASE, VMASK(4), "d4", "s4", 1) +REGDEF(V5, 5+VBASE, VMASK(5), "d5", "s5", 1) +REGDEF(V6, 6+VBASE, VMASK(6), "d6", "s6", 1) +REGDEF(V7, 7+VBASE, VMASK(7), "d7", "s7", 1) +REGDEF(V8, 8+VBASE, VMASK(8), "d8", "s8", 1) +REGDEF(V9, 9+VBASE, VMASK(9), "d9", "s9", 1) +REGDEF(V10, 10+VBASE, VMASK(10), "d10", "s10", 1) +REGDEF(V11, 11+VBASE, VMASK(11), "d11", "s11", 1) +REGDEF(V12, 12+VBASE, VMASK(12), "d12", "s12", 1) +REGDEF(V13, 13+VBASE, VMASK(13), "d13", "s13", 1) +REGDEF(V14, 14+VBASE, VMASK(14), "d14", "s14", 1) +REGDEF(V15, 15+VBASE, VMASK(15), "d15", "s15", 1) +REGDEF(V16, 16+VBASE, VMASK(16), "d16", "s16", 1) +REGDEF(V17, 17+VBASE, VMASK(17), "d17", "s17", 1) +REGDEF(V18, 18+VBASE, VMASK(18), "d18", "s18", 1) +REGDEF(V19, 19+VBASE, VMASK(19), "d19", "s19", 1) +REGDEF(V20, 20+VBASE, VMASK(20), "d20", "s20", 1) +REGDEF(V21, 21+VBASE, VMASK(21), "d21", "s21", 1) +REGDEF(V22, 22+VBASE, VMASK(22), "d22", "s22", 1) +REGDEF(V23, 23+VBASE, VMASK(23), "d23", "s23", 1) +REGDEF(V24, 24+VBASE, VMASK(24), "d24", "s24", 1) +REGDEF(V25, 25+VBASE, VMASK(25), "d25", "s25", 1) +REGDEF(V26, 26+VBASE, VMASK(26), "d26", "s26", 1) +REGDEF(V27, 27+VBASE, VMASK(27), "d27", "s27", 1) +REGDEF(V28, 28+VBASE, VMASK(28), "d28", "s28", 1) +REGDEF(V29, 29+VBASE, VMASK(29), "d29", "s29", 1) +REGDEF(V30, 30+VBASE, VMASK(30), "d30", "s30", 1) +REGDEF(V31, 31+VBASE, VMASK(31), "d31", "s31", 1) // TODO-SVE: Fix once we add predicate registers REGALIAS(P0, V0) @@ -117,9 +117,9 @@ REGALIAS(P15, V15) // The registers with values 64 (NBASE) and above are not real register numbers #define NBASE 64 -REGDEF(SP, 0+NBASE, 0x0000, "sp", "wsp?") +REGDEF(SP, 0+NBASE, 0x0000, "sp", "wsp?", 2) // This must be last! -REGDEF(STK, 1+NBASE, 0x0000, "STK", "STK") +REGDEF(STK, 1+NBASE, 0x0000, "STK", "STK", 2) /*****************************************************************************/ #undef RMASK diff --git a/src/coreclr/jit/registerloongarch64.h b/src/coreclr/jit/registerloongarch64.h index 8f3cd157016bb..288bb020a93ad 100644 --- a/src/coreclr/jit/registerloongarch64.h +++ b/src/coreclr/jit/registerloongarch64.h @@ -15,39 +15,39 @@ #define RMASK(x) (1ULL << (x)) /* -REGDEF(name, rnum, mask, sname) */ -REGDEF(R0, 0, 0x0001, "zero") -REGDEF(RA, 1, 0x0002, "ra" ) -REGDEF(TP, 2, 0x0004, "tp" ) -REGDEF(SP, 3, 0x0008, "sp" ) -REGDEF(A0, 4, 0x0010, "a0" ) -REGDEF(A1, 5, 0x0020, "a1" ) -REGDEF(A2, 6, 0x0040, "a2" ) -REGDEF(A3, 7, 0x0080, "a3" ) -REGDEF(A4, 8, 0x0100, "a4" ) -REGDEF(A5, 9, 0x0200, "a5" ) -REGDEF(A6, 10, 0x0400, "a6" ) -REGDEF(A7, 11, 0x0800, "a7" ) -REGDEF(T0, 12, 0x1000, "t0" ) -REGDEF(T1, 13, 0x2000, "t1" ) -REGDEF(T2, 14, 0x4000, "t2" ) -REGDEF(T3, 15, 0x8000, "t3" ) -REGDEF(T4, 16, 0x10000, "t4" ) -REGDEF(T5, 17, 0x20000, "t5" ) -REGDEF(T6, 18, 0x40000, "t6" ) -REGDEF(T7, 19, 0x80000, "t7" ) -REGDEF(T8, 20, 0x100000, "t8" ) -REGDEF(X0, 21, 0x200000, "x0" ) -REGDEF(FP, 22, 0x400000, "fp" ) -REGDEF(S0, 23, 0x800000, "s0" ) -REGDEF(S1, 24, 0x1000000, "s1" ) -REGDEF(S2, 25, 0x2000000, "s2" ) -REGDEF(S3, 26, 0x4000000, "s3" ) -REGDEF(S4, 27, 0x8000000, "s4" ) -REGDEF(S5, 28, 0x10000000, "s5" ) -REGDEF(S6, 29, 0x20000000, "s6" ) -REGDEF(S7, 30, 0x40000000, "s7" ) -REGDEF(S8, 31, 0x80000000, "s8" ) +REGDEF(name, rnum, mask, sname, regTypeTag) */ +REGDEF(R0, 0, 0x0001, "zero", 0) +REGDEF(RA, 1, 0x0002, "ra" , 0) +REGDEF(TP, 2, 0x0004, "tp" , 0) +REGDEF(SP, 3, 0x0008, "sp" , 0) +REGDEF(A0, 4, 0x0010, "a0" , 0) +REGDEF(A1, 5, 0x0020, "a1" , 0) +REGDEF(A2, 6, 0x0040, "a2" , 0) +REGDEF(A3, 7, 0x0080, "a3" , 0) +REGDEF(A4, 8, 0x0100, "a4" , 0) +REGDEF(A5, 9, 0x0200, "a5" , 0) +REGDEF(A6, 10, 0x0400, "a6" , 0) +REGDEF(A7, 11, 0x0800, "a7" , 0) +REGDEF(T0, 12, 0x1000, "t0" , 0) +REGDEF(T1, 13, 0x2000, "t1" , 0) +REGDEF(T2, 14, 0x4000, "t2" , 0) +REGDEF(T3, 15, 0x8000, "t3" , 0) +REGDEF(T4, 16, 0x10000, "t4" , 0) +REGDEF(T5, 17, 0x20000, "t5" , 0) +REGDEF(T6, 18, 0x40000, "t6" , 0) +REGDEF(T7, 19, 0x80000, "t7" , 0) +REGDEF(T8, 20, 0x100000, "t8" , 0) +REGDEF(X0, 21, 0x200000, "x0" , 0) +REGDEF(FP, 22, 0x400000, "fp" , 0) +REGDEF(S0, 23, 0x800000, "s0" , 0) +REGDEF(S1, 24, 0x1000000, "s1" , 0) +REGDEF(S2, 25, 0x2000000, "s2" , 0) +REGDEF(S3, 26, 0x4000000, "s3" , 0) +REGDEF(S4, 27, 0x8000000, "s4" , 0) +REGDEF(S5, 28, 0x10000000, "s5" , 0) +REGDEF(S6, 29, 0x20000000, "s6" , 0) +REGDEF(S7, 30, 0x40000000, "s7" , 0) +REGDEF(S8, 31, 0x80000000, "s8" , 0) //NOTE for LoongArch64: // The `REG_R21` which alias `REG_X0` is specially reserved !!! @@ -64,44 +64,44 @@ REGALIAS(R21, X0) /* REGDEF(name, rnum, mask, sname) */ -REGDEF(F0, 0+FBASE, FMASK(0), "f0") -REGDEF(F1, 1+FBASE, FMASK(1), "f1") -REGDEF(F2, 2+FBASE, FMASK(2), "f2") -REGDEF(F3, 3+FBASE, FMASK(3), "f3") -REGDEF(F4, 4+FBASE, FMASK(4), "f4") -REGDEF(F5, 5+FBASE, FMASK(5), "f5") -REGDEF(F6, 6+FBASE, FMASK(6), "f6") -REGDEF(F7, 7+FBASE, FMASK(7), "f7") -REGDEF(F8, 8+FBASE, FMASK(8), "f8") -REGDEF(F9, 9+FBASE, FMASK(9), "f9") -REGDEF(F10, 10+FBASE, FMASK(10), "f10") -REGDEF(F11, 11+FBASE, FMASK(11), "f11") -REGDEF(F12, 12+FBASE, FMASK(12), "f12") -REGDEF(F13, 13+FBASE, FMASK(13), "f13") -REGDEF(F14, 14+FBASE, FMASK(14), "f14") -REGDEF(F15, 15+FBASE, FMASK(15), "f15") -REGDEF(F16, 16+FBASE, FMASK(16), "f16") -REGDEF(F17, 17+FBASE, FMASK(17), "f17") -REGDEF(F18, 18+FBASE, FMASK(18), "f18") -REGDEF(F19, 19+FBASE, FMASK(19), "f19") -REGDEF(F20, 20+FBASE, FMASK(20), "f20") -REGDEF(F21, 21+FBASE, FMASK(21), "f21") -REGDEF(F22, 22+FBASE, FMASK(22), "f22") -REGDEF(F23, 23+FBASE, FMASK(23), "f23") -REGDEF(F24, 24+FBASE, FMASK(24), "f24") -REGDEF(F25, 25+FBASE, FMASK(25), "f25") -REGDEF(F26, 26+FBASE, FMASK(26), "f26") -REGDEF(F27, 27+FBASE, FMASK(27), "f27") -REGDEF(F28, 28+FBASE, FMASK(28), "f28") -REGDEF(F29, 29+FBASE, FMASK(29), "f29") -REGDEF(F30, 30+FBASE, FMASK(30), "f30") -REGDEF(F31, 31+FBASE, FMASK(31), "f31") +REGDEF(F0, 0+FBASE, FMASK(0), "f0", 1) +REGDEF(F1, 1+FBASE, FMASK(1), "f1", 1) +REGDEF(F2, 2+FBASE, FMASK(2), "f2", 1) +REGDEF(F3, 3+FBASE, FMASK(3), "f3", 1) +REGDEF(F4, 4+FBASE, FMASK(4), "f4", 1) +REGDEF(F5, 5+FBASE, FMASK(5), "f5", 1) +REGDEF(F6, 6+FBASE, FMASK(6), "f6", 1) +REGDEF(F7, 7+FBASE, FMASK(7), "f7", 1) +REGDEF(F8, 8+FBASE, FMASK(8), "f8", 1) +REGDEF(F9, 9+FBASE, FMASK(9), "f9", 1) +REGDEF(F10, 10+FBASE, FMASK(10), "f10", 1) +REGDEF(F11, 11+FBASE, FMASK(11), "f11", 1) +REGDEF(F12, 12+FBASE, FMASK(12), "f12", 1) +REGDEF(F13, 13+FBASE, FMASK(13), "f13", 1) +REGDEF(F14, 14+FBASE, FMASK(14), "f14", 1) +REGDEF(F15, 15+FBASE, FMASK(15), "f15", 1) +REGDEF(F16, 16+FBASE, FMASK(16), "f16", 1) +REGDEF(F17, 17+FBASE, FMASK(17), "f17", 1) +REGDEF(F18, 18+FBASE, FMASK(18), "f18", 1) +REGDEF(F19, 19+FBASE, FMASK(19), "f19", 1) +REGDEF(F20, 20+FBASE, FMASK(20), "f20", 1) +REGDEF(F21, 21+FBASE, FMASK(21), "f21", 1) +REGDEF(F22, 22+FBASE, FMASK(22), "f22", 1) +REGDEF(F23, 23+FBASE, FMASK(23), "f23", 1) +REGDEF(F24, 24+FBASE, FMASK(24), "f24", 1) +REGDEF(F25, 25+FBASE, FMASK(25), "f25", 1) +REGDEF(F26, 26+FBASE, FMASK(26), "f26", 1) +REGDEF(F27, 27+FBASE, FMASK(27), "f27", 1) +REGDEF(F28, 28+FBASE, FMASK(28), "f28", 1) +REGDEF(F29, 29+FBASE, FMASK(29), "f29", 1) +REGDEF(F30, 30+FBASE, FMASK(30), "f30", 1) +REGDEF(F31, 31+FBASE, FMASK(31), "f31", 1) // The registers with values 64 (NBASE) and above are not real register numbers #define NBASE 64 // This must be last! -REGDEF(STK, 0+NBASE, 0x0000, "STK") +REGDEF(STK, 0+NBASE, 0x0000, "STK", 2) /*****************************************************************************/ #undef RMASK diff --git a/src/coreclr/jit/registerriscv64.h b/src/coreclr/jit/registerriscv64.h index fe6d3cf8ece42..4be9bcb235602 100644 --- a/src/coreclr/jit/registerriscv64.h +++ b/src/coreclr/jit/registerriscv64.h @@ -15,39 +15,39 @@ #define RMASK(x) (1ULL << (x)) /* -REGDEF(name, rnum, mask, sname) */ -REGDEF(R0, 0, 0x0001, "zero") -REGDEF(RA, 1, 0x0002, "ra" ) -REGDEF(SP, 2, 0x0004, "sp" ) -REGDEF(GP, 3, 0x0008, "gp" ) -REGDEF(TP, 4, 0x0010, "tp" ) -REGDEF(T0, 5, 0x0020, "t0" ) -REGDEF(T1, 6, 0x0040, "t1" ) -REGDEF(T2, 7, 0x0080, "t2" ) -REGDEF(FP, 8, 0x0100, "fp" ) -REGDEF(S1, 9, 0x0200, "s1" ) -REGDEF(A0, 10, 0x0400, "a0" ) -REGDEF(A1, 11, 0x0800, "a1" ) -REGDEF(A2, 12, 0x1000, "a2" ) -REGDEF(A3, 13, 0x2000, "a3" ) -REGDEF(A4, 14, 0x4000, "a4" ) -REGDEF(A5, 15, 0x8000, "a5" ) -REGDEF(A6, 16, 0x10000, "a6" ) -REGDEF(A7, 17, 0x20000, "a7" ) -REGDEF(S2, 18, 0x40000, "s2" ) -REGDEF(S3, 19, 0x80000, "s3" ) -REGDEF(S4, 20, 0x100000, "s4" ) -REGDEF(S5, 21, 0x200000, "s5" ) -REGDEF(S6, 22, 0x400000, "s6" ) -REGDEF(S7, 23, 0x800000, "s7" ) -REGDEF(S8, 24, 0x1000000, "s8" ) -REGDEF(S9, 25, 0x2000000, "s9" ) -REGDEF(S10, 26, 0x4000000, "s10" ) -REGDEF(S11, 27, 0x8000000, "s11" ) -REGDEF(T3, 28, 0x10000000, "t3" ) -REGDEF(T4, 29, 0x20000000, "t4" ) -REGDEF(T5, 30, 0x40000000, "t5" ) -REGDEF(T6, 31, 0x80000000, "t6" ) +REGDEF(name, rnum, mask, sname, regTypeTag) */ +REGDEF(R0, 0, 0x0001, "zero", 0) +REGDEF(RA, 1, 0x0002, "ra" , 0) +REGDEF(SP, 2, 0x0004, "sp" , 0) +REGDEF(GP, 3, 0x0008, "gp" , 0) +REGDEF(TP, 4, 0x0010, "tp" , 0) +REGDEF(T0, 5, 0x0020, "t0" , 0) +REGDEF(T1, 6, 0x0040, "t1" , 0) +REGDEF(T2, 7, 0x0080, "t2", 0) +REGDEF(FP, 8, 0x0100, "fp", 0) +REGDEF(S1, 9, 0x0200, "s1", 0) +REGDEF(A0, 10, 0x0400, "a0", 0) +REGDEF(A1, 11, 0x0800, "a1", 0) +REGDEF(A2, 12, 0x1000, "a2", 0) +REGDEF(A3, 13, 0x2000, "a3", 0) +REGDEF(A4, 14, 0x4000, "a4", 0) +REGDEF(A5, 15, 0x8000, "a5", 0) +REGDEF(A6, 16, 0x10000, "a6", 0) +REGDEF(A7, 17, 0x20000, "a7", 0) +REGDEF(S2, 18, 0x40000, "s2", 0) +REGDEF(S3, 19, 0x80000, "s3", 0) +REGDEF(S4, 20, 0x100000, "s4", 0) +REGDEF(S5, 21, 0x200000, "s5", 0) +REGDEF(S6, 22, 0x400000, "s6", 0) +REGDEF(S7, 23, 0x800000, "s7", 0) +REGDEF(S8, 24, 0x1000000, "s8", 0) +REGDEF(S9, 25, 0x2000000, "s9", 0) +REGDEF(S10, 26, 0x4000000, "s10", 0) +REGDEF(S11, 27, 0x8000000, "s11", 0) +REGDEF(T3, 28, 0x10000000, "t3", 0) +REGDEF(T4, 29, 0x20000000, "t4", 0) +REGDEF(T5, 30, 0x40000000, "t5", 0) +REGDEF(T6, 31, 0x80000000, "t6", 0) REGALIAS(R8, FP) REGALIAS(ZERO, R0) @@ -56,44 +56,44 @@ REGALIAS(ZERO, R0) #define FMASK(x) (1ULL << (FBASE+(x))) /* -REGDEF(name, rnum, mask, sname) */ -REGDEF(F0, 0+FBASE, FMASK(0), "f0") -REGDEF(F1, 1+FBASE, FMASK(1), "f1") -REGDEF(F2, 2+FBASE, FMASK(2), "f2") -REGDEF(F3, 3+FBASE, FMASK(3), "f3") -REGDEF(F4, 4+FBASE, FMASK(4), "f4") -REGDEF(F5, 5+FBASE, FMASK(5), "f5") -REGDEF(F6, 6+FBASE, FMASK(6), "f6") -REGDEF(F7, 7+FBASE, FMASK(7), "f7") -REGDEF(F8, 8+FBASE, FMASK(8), "f8") -REGDEF(F9, 9+FBASE, FMASK(9), "f9") -REGDEF(F10, 10+FBASE, FMASK(10), "f10") -REGDEF(F11, 11+FBASE, FMASK(11), "f11") -REGDEF(F12, 12+FBASE, FMASK(12), "f12") -REGDEF(F13, 13+FBASE, FMASK(13), "f13") -REGDEF(F14, 14+FBASE, FMASK(14), "f14") -REGDEF(F15, 15+FBASE, FMASK(15), "f15") -REGDEF(F16, 16+FBASE, FMASK(16), "f16") -REGDEF(F17, 17+FBASE, FMASK(17), "f17") -REGDEF(F18, 18+FBASE, FMASK(18), "f18") -REGDEF(F19, 19+FBASE, FMASK(19), "f19") -REGDEF(F20, 20+FBASE, FMASK(20), "f20") -REGDEF(F21, 21+FBASE, FMASK(21), "f21") -REGDEF(F22, 22+FBASE, FMASK(22), "f22") -REGDEF(F23, 23+FBASE, FMASK(23), "f23") -REGDEF(F24, 24+FBASE, FMASK(24), "f24") -REGDEF(F25, 25+FBASE, FMASK(25), "f25") -REGDEF(F26, 26+FBASE, FMASK(26), "f26") -REGDEF(F27, 27+FBASE, FMASK(27), "f27") -REGDEF(F28, 28+FBASE, FMASK(28), "f28") -REGDEF(F29, 29+FBASE, FMASK(29), "f29") -REGDEF(F30, 30+FBASE, FMASK(30), "f30") -REGDEF(F31, 31+FBASE, FMASK(31), "f31") +REGDEF(name, rnum, mask, sname, regTypeTag) */ +REGDEF(F0, 0+FBASE, FMASK(0), "f0", 1) +REGDEF(F1, 1+FBASE, FMASK(1), "f1", 1) +REGDEF(F2, 2+FBASE, FMASK(2), "f2", 1) +REGDEF(F3, 3+FBASE, FMASK(3), "f3", 1) +REGDEF(F4, 4+FBASE, FMASK(4), "f4", 1) +REGDEF(F5, 5+FBASE, FMASK(5), "f5", 1) +REGDEF(F6, 6+FBASE, FMASK(6), "f6", 1) +REGDEF(F7, 7+FBASE, FMASK(7), "f7", 1) +REGDEF(F8, 8+FBASE, FMASK(8), "f8", 1) +REGDEF(F9, 9+FBASE, FMASK(9), "f9", 1) +REGDEF(F10, 10+FBASE, FMASK(10), "f10", 1) +REGDEF(F11, 11+FBASE, FMASK(11), "f11", 1) +REGDEF(F12, 12+FBASE, FMASK(12), "f12", 1) +REGDEF(F13, 13+FBASE, FMASK(13), "f13", 1) +REGDEF(F14, 14+FBASE, FMASK(14), "f14", 1) +REGDEF(F15, 15+FBASE, FMASK(15), "f15", 1) +REGDEF(F16, 16+FBASE, FMASK(16), "f16", 1) +REGDEF(F17, 17+FBASE, FMASK(17), "f17", 1) +REGDEF(F18, 18+FBASE, FMASK(18), "f18", 1) +REGDEF(F19, 19+FBASE, FMASK(19), "f19", 1) +REGDEF(F20, 20+FBASE, FMASK(20), "f20", 1) +REGDEF(F21, 21+FBASE, FMASK(21), "f21", 1) +REGDEF(F22, 22+FBASE, FMASK(22), "f22", 1) +REGDEF(F23, 23+FBASE, FMASK(23), "f23", 1) +REGDEF(F24, 24+FBASE, FMASK(24), "f24", 1) +REGDEF(F25, 25+FBASE, FMASK(25), "f25", 1) +REGDEF(F26, 26+FBASE, FMASK(26), "f26", 1) +REGDEF(F27, 27+FBASE, FMASK(27), "f27", 1) +REGDEF(F28, 28+FBASE, FMASK(28), "f28", 1) +REGDEF(F29, 29+FBASE, FMASK(29), "f29", 1) +REGDEF(F30, 30+FBASE, FMASK(30), "f30", 1) +REGDEF(F31, 31+FBASE, FMASK(31), "f31", 1) // The registers with values 64 (NBASE) and above are not real register numbers #define NBASE 64 -REGDEF(STK, 0+NBASE, 0x0000, "STK") +REGDEF(STK, 0+NBASE, 0x0000, "STK", 2) /*****************************************************************************/ #undef RMASK diff --git a/src/coreclr/jit/regset.cpp b/src/coreclr/jit/regset.cpp index a033e49fcad1f..0aeb6a65e7834 100644 --- a/src/coreclr/jit/regset.cpp +++ b/src/coreclr/jit/regset.cpp @@ -25,12 +25,12 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX #if defined(TARGET_ARM64) const regMaskSmall regMasks[] = { -#define REGDEF(name, rnum, mask, xname, wname) mask, +#define REGDEF(name, rnum, mask, xname, wname, regTypeTag) mask, #include "register.h" }; #else // !TARGET_ARM64 const regMaskSmall regMasks[] = { -#define REGDEF(name, rnum, mask, sname) mask, +#define REGDEF(name, rnum, mask, sname, regTypeTag) mask, #include "register.h" }; #endif diff --git a/src/coreclr/jit/target.h b/src/coreclr/jit/target.h index 582be1fd2adb9..7217dba6b5e12 100644 --- a/src/coreclr/jit/target.h +++ b/src/coreclr/jit/target.h @@ -109,7 +109,7 @@ inline bool compUnixX86Abi() #if defined(TARGET_ARM) || defined(TARGET_LOONGARCH64) || defined(TARGET_RISCV64) enum _regNumber_enum : unsigned { -#define REGDEF(name, rnum, mask, sname) REG_##name = rnum, +#define REGDEF(name, rnum, mask, sname, regTypeTag) REG_##name = rnum, #define REGALIAS(alias, realname) REG_##alias = REG_##realname, #include "register.h" @@ -121,7 +121,7 @@ enum _regNumber_enum : unsigned enum _regMask_enum : uint64_t { RBM_NONE = 0, -#define REGDEF(name, rnum, mask, sname) RBM_##name = mask, +#define REGDEF(name, rnum, mask, sname, regTypeTag) RBM_##name = mask, #define REGALIAS(alias, realname) RBM_##alias = RBM_##realname, #include "register.h" }; @@ -130,7 +130,7 @@ enum _regMask_enum : uint64_t enum _regNumber_enum : unsigned { -#define REGDEF(name, rnum, mask, xname, wname) REG_##name = rnum, +#define REGDEF(name, rnum, mask, xname, wname, regTypeTag) REG_##name = rnum, #define REGALIAS(alias, realname) REG_##alias = REG_##realname, #include "register.h" @@ -142,7 +142,7 @@ enum _regNumber_enum : unsigned enum _regMask_enum : uint64_t { RBM_NONE = 0, -#define REGDEF(name, rnum, mask, xname, wname) RBM_##name = mask, +#define REGDEF(name, rnum, mask, xname, wname, regTypeTag) RBM_##name = mask, #define REGALIAS(alias, realname) RBM_##alias = RBM_##realname, #include "register.h" }; @@ -151,7 +151,7 @@ enum _regMask_enum : uint64_t enum _regNumber_enum : unsigned { -#define REGDEF(name, rnum, mask, sname) REG_##name = rnum, +#define REGDEF(name, rnum, mask, sname, regTypeTag) REG_##name = rnum, #define REGALIAS(alias, realname) REG_##alias = REG_##realname, #include "register.h" @@ -164,7 +164,7 @@ enum _regMask_enum : uint64_t { RBM_NONE = 0, -#define REGDEF(name, rnum, mask, sname) RBM_##name = mask, +#define REGDEF(name, rnum, mask, sname, regTypeTag) RBM_##name = mask, #define REGALIAS(alias, realname) RBM_##alias = RBM_##realname, #include "register.h" }; @@ -173,7 +173,7 @@ enum _regMask_enum : uint64_t enum _regNumber_enum : unsigned { -#define REGDEF(name, rnum, mask, sname) REG_##name = rnum, +#define REGDEF(name, rnum, mask, sname, regTypeTag) REG_##name = rnum, #define REGALIAS(alias, realname) REG_##alias = REG_##realname, #include "register.h" @@ -186,7 +186,7 @@ enum _regMask_enum : unsigned { RBM_NONE = 0, -#define REGDEF(name, rnum, mask, sname) RBM_##name = mask, +#define REGDEF(name, rnum, mask, sname, regTypeTag) RBM_##name = mask, #define REGALIAS(alias, realname) RBM_##alias = RBM_##realname, #include "register.h" }; @@ -246,6 +246,7 @@ struct regMaskTP #ifdef HAS_MORE_THAN_64_REGISTERS regMaskSmall high; #endif + inline static const int getRegisterTypeIndex(regNumber reg); public: diff --git a/src/coreclr/jit/utils.cpp b/src/coreclr/jit/utils.cpp index 7ea584267e900..37fc3a0728cfb 100644 --- a/src/coreclr/jit/utils.cpp +++ b/src/coreclr/jit/utils.cpp @@ -139,9 +139,9 @@ const char* getRegName(regNumber reg) static const char* const regNames[] = { #if defined(TARGET_ARM64) -#define REGDEF(name, rnum, mask, xname, wname) xname, +#define REGDEF(name, rnum, mask, xname, wname, regTypeTag) xname, #else -#define REGDEF(name, rnum, mask, sname) sname, +#define REGDEF(name, rnum, mask, sname, regTypeTag) sname, #endif #include "register.h" }; @@ -227,7 +227,7 @@ const char* getRegNameFloat(regNumber reg, var_types type) #elif defined(TARGET_ARM64) static const char* regNamesFloat[] = { -#define REGDEF(name, rnum, mask, xname, wname) xname, +#define REGDEF(name, rnum, mask, xname, wname, regTypeTag) xname, #include "register.h" }; assert((unsigned)reg < ArrLen(regNamesFloat)); @@ -237,7 +237,7 @@ const char* getRegNameFloat(regNumber reg, var_types type) #elif defined(TARGET_LOONGARCH64) static const char* regNamesFloat[] = { -#define REGDEF(name, rnum, mask, sname) sname, +#define REGDEF(name, rnum, mask, sname, regTypeTag) sname, #include "register.h" }; @@ -247,16 +247,16 @@ const char* getRegNameFloat(regNumber reg, var_types type) #else static const char* regNamesFloat[] = { -#define REGDEF(name, rnum, mask, sname) "x" sname, +#define REGDEF(name, rnum, mask, sname, regTypeTag) "x" sname, #include "register.h" }; #ifdef FEATURE_SIMD static const char* regNamesYMM[] = { -#define REGDEF(name, rnum, mask, sname) "y" sname, +#define REGDEF(name, rnum, mask, sname, regTypeTag) "y" sname, #include "register.h" }; static const char* regNamesZMM[] = { -#define REGDEF(name, rnum, mask, sname) "z" sname, +#define REGDEF(name, rnum, mask, sname, regTypeTag) "z" sname, #include "register.h" }; #endif // FEATURE_SIMD