From edccae2f8521cca2796cb60ec794ec24627d9588 Mon Sep 17 00:00:00 2001
From: Kunal Pathak <Kunal.Pathak@microsoft.com>
Date: Fri, 31 May 2024 08:11:20 -0700
Subject: [PATCH] Change some more methods to return SingleTypeRegMask

---
 src/coreclr/jit/compiler.hpp  | 2 +-
 src/coreclr/jit/lsra.h        | 6 +++---
 src/coreclr/jit/lsrabuild.cpp | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/coreclr/jit/compiler.hpp b/src/coreclr/jit/compiler.hpp
index 9ff94ab0cfb9e..53c60267b9f62 100644
--- a/src/coreclr/jit/compiler.hpp
+++ b/src/coreclr/jit/compiler.hpp
@@ -942,7 +942,7 @@ inline regNumber genRegNumFromMask(const SingleTypeRegSet& mask)
     regNumber regNum = (regNumber)genLog2(mask);
 
     /* Make sure we got it right */
-    assert(genRegMask(regNum) == mask);
+    assert(genSingleTypeRegMask(regNum) == mask);
 
     return regNum;
 }
diff --git a/src/coreclr/jit/lsra.h b/src/coreclr/jit/lsra.h
index 411f9306e6e44..216f65474dd23 100644
--- a/src/coreclr/jit/lsra.h
+++ b/src/coreclr/jit/lsra.h
@@ -624,7 +624,7 @@ class LinearScan : public LinearScanInterface
     // This is the main driver
     virtual PhaseStatus doLinearScan();
 
-    static bool isSingleRegister(regMaskTP regMask)
+    static bool isSingleRegister(SingleTypeRegSet regMask)
     {
         return (genExactlyOneBit(regMask));
     }
@@ -2735,7 +2735,7 @@ class RefPosition
 
     // isFixedRefOfRegMask indicates that the RefPosition has a fixed assignment to the register
     // specified by the given mask
-    bool isFixedRefOfRegMask(regMaskTP regMask)
+    bool isFixedRefOfRegMask(SingleTypeRegSet regMask)
     {
         assert(genMaxOneBit(regMask));
         return (registerAssignment == regMask);
@@ -2744,7 +2744,7 @@ class RefPosition
     // isFixedRefOfReg indicates that the RefPosition has a fixed assignment to the given register
     bool isFixedRefOfReg(regNumber regNum)
     {
-        return (isFixedRefOfRegMask(genRegMask(regNum)));
+        return (isFixedRefOfRegMask(genSingleTypeRegMask(regNum)));
     }
 
 #ifdef TARGET_ARM64
diff --git a/src/coreclr/jit/lsrabuild.cpp b/src/coreclr/jit/lsrabuild.cpp
index 379e0d20cb350..271cf4eb7044c 100644
--- a/src/coreclr/jit/lsrabuild.cpp
+++ b/src/coreclr/jit/lsrabuild.cpp
@@ -3082,7 +3082,7 @@ RefPosition* LinearScan::BuildDef(GenTree* tree, SingleTypeRegSet dstCandidates,
 
     if (dstCandidates != RBM_NONE)
     {
-        assert((tree->GetRegNum() == REG_NA) || (dstCandidates == genRegMask(tree->GetRegByIndex(multiRegIdx))));
+        assert((tree->GetRegNum() == REG_NA) || (dstCandidates == genSingleTypeRegMask(tree->GetRegByIndex(multiRegIdx))));
     }
 
     RegisterType type;
@@ -3105,7 +3105,7 @@ RefPosition* LinearScan::BuildDef(GenTree* tree, SingleTypeRegSet dstCandidates,
     {
         if (!tree->IsMultiRegNode() || (multiRegIdx == 0))
         {
-            assert((dstCandidates == RBM_NONE) || (dstCandidates == genRegMask(tree->GetRegNum())));
+            assert((dstCandidates == RBM_NONE) || (dstCandidates == genSingleTypeRegMask(tree->GetRegNum())));
             dstCandidates = genSingleTypeRegMask(tree->GetRegNum());
         }
         else