Improve standalone cores #193
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Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Microwatt will want that as it uses init_done to select whether to run the SDRAM init code or the user code at reset. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
On some standalone core implementations, such with Microwatt, the main system bus is 64-bit, but the wishbone to access the CSRs is 32-bit. To avoid extra logic & muxes and just wire these together, it's useful to be able to specify a larger alignemnt (64-bit) for the CSRs so that the generated csr.h contains the right offsets. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Name it wb_ctrl rather than just wb, which makes the resulting core signal names a bit more descriptive. IE. The DRAM control bus (by opposition to the use/data buss(es). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
enjoy-digital
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May 12, 2020
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Thanks, it's merge with minor changes and to use the new |
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This adds a few options & improvements to standalone LiteDRAM generation as used by Microwatt