soc_core/soc_core_args: specify default cpu (vexriscv)

enjoy-digital · Nov 1, 2019 · edb1731 · edb1731
1 parent cc607f0
commit edb1731
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/litex/soc/integration/soc_core.py b/litex/soc/integration/soc_core.py
@@ -540,7 +540,7 @@ def __getattr__(self, name):
 def soc_core_args(parser):
     # CPU parameters
     parser.add_argument("--cpu-type", default=None,
-                        help="select CPU: {}".format(", ".join(iter(cpu.CPUS.keys()))))
+                        help="select CPU: {}, (default=vexriscv)".format(", ".join(iter(cpu.CPUS.keys()))))
     parser.add_argument("--cpu-variant", default=None,
                         help="select CPU variant, (default=standard)")
     parser.add_argument("--cpu-reset-address", default=None, type=int,