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arc_startup.s line 81-82, here data cache is invalidated by writing to AUX_DC_IVDC and it is immediately enabled by writing to AUX_DC_CTRL. But according to documentation you first should wait on FS bit in DC_CTRL.
The text was updated successfully, but these errors were encountered:
Issue Summary
Bug
Development Environment
HOST OS
All
TOOLCHAIN
All
BOARD
N/A
ARC CORE
All
Bug Description
arc_startup.s line 81-82, here data cache is invalidated by writing to AUX_DC_IVDC and it is immediately enabled by writing to AUX_DC_CTRL. But according to documentation you first should wait on FS bit in DC_CTRL.
The text was updated successfully, but these errors were encountered: