diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 9b20dd0b1a0e..b1e83dfda788 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -2383,7 +2383,7 @@ (set (match_operand:GPI 0 "register_operand" "=r") (plus:GPI (ANY_EXTEND:GPI (match_dup 1)) (match_dup 2)))] "" - "adds\\t%0, %2, %1, xt" + "adds\\t%0, %2, %w1, xt" [(set_attr "type" "alus_ext")] ) @@ -2397,7 +2397,7 @@ (set (match_operand:GPI 0 "register_operand" "=r") (minus:GPI (match_dup 1) (ANY_EXTEND:GPI (match_dup 2))))] "" - "subs\\t%0, %1, %2, xt" + "subs\\t%0, %1, %w2, xt" [(set_attr "type" "alus_ext")] ) @@ -2415,7 +2415,7 @@ (match_dup 2)) (match_dup 3)))] "" - "adds\\t%0, %3, %1, xt %2" + "adds\\t%0, %3, %w1, xt %2" [(set_attr "type" "alus_ext")] ) @@ -2433,7 +2433,7 @@ (ashift:GPI (ANY_EXTEND:GPI (match_dup 2)) (match_dup 3))))] "" - "subs\\t%0, %1, %2, xt %3" + "subs\\t%0, %1, %w2, xt %3" [(set_attr "type" "alus_ext")] ) @@ -2549,7 +2549,7 @@ (plus:GPI (ANY_EXTEND:GPI (match_operand:ALLX 1 "register_operand" "r")) (match_operand:GPI 2 "register_operand" "r")))] "" - "add\\t%0, %2, %1, xt" + "add\\t%0, %2, %w1, xt" [(set_attr "type" "alu_ext")] ) @@ -2571,7 +2571,7 @@ (match_operand 2 "aarch64_imm3" "Ui3")) (match_operand:GPI 3 "register_operand" "r")))] "" - "add\\t%0, %3, %1, xt %2" + "add\\t%0, %3, %w1, xt %2" [(set_attr "type" "alu_ext")] ) @@ -2819,7 +2819,7 @@ "* operands[3] = GEN_INT (aarch64_uxt_size (INTVAL(operands[2]), INTVAL (operands[3]))); - return \"add\t%0, %4, %1, uxt%e3 %2\";" + return \"add\t%0, %4, %w1, uxt%e3 %2\";" [(set_attr "type" "alu_ext")] ) @@ -3305,7 +3305,7 @@ (ANY_EXTEND:GPI (match_operand:ALLX 2 "register_operand" "r"))))] "" - "sub\\t%0, %1, %2, xt" + "sub\\t%0, %1, %w2, xt" [(set_attr "type" "alu_ext")] ) @@ -3328,7 +3328,7 @@ (match_operand:ALLX 2 "register_operand" "r")) (match_operand 3 "aarch64_imm3" "Ui3"))))] "" - "sub\\t%0, %1, %2, xt %3" + "sub\\t%0, %1, %w2, xt %3" [(set_attr "type" "alu_ext")] ) @@ -3607,7 +3607,7 @@ "* operands[3] = GEN_INT (aarch64_uxt_size (INTVAL (operands[2]), INTVAL (operands[3]))); - return \"sub\t%0, %4, %1, uxt%e3 %2\";" + return \"sub\t%0, %4, %w1, uxt%e3 %2\";" [(set_attr "type" "alu_ext")] ) @@ -4054,7 +4054,7 @@ (match_operand:ALLX 0 "register_operand" "r")) (match_operand:GPI 1 "register_operand" "r")))] "" - "cmp\\t%1, %0, xt" + "cmp\\t%1, %w0, xt" [(set_attr "type" "alus_ext")] ) @@ -4066,7 +4066,7 @@ (match_operand 1 "aarch64_imm3" "Ui3")) (match_operand:GPI 2 "register_operand" "r")))] "" - "cmp\\t%2, %0, xt %1" + "cmp\\t%2, %w0, xt %1" [(set_attr "type" "alus_ext")] ) diff --git a/gcc/testsuite/gcc.target/aarch64/adds3.c b/gcc/testsuite/gcc.target/aarch64/adds3.c index c5518bdcaf20..e938c8049cf6 100644 --- a/gcc/testsuite/gcc.target/aarch64/adds3.c +++ b/gcc/testsuite/gcc.target/aarch64/adds3.c @@ -58,4 +58,4 @@ int main () return 0; } -/* { dg-final { scan-assembler-times "adds\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, sxtw" 2 } } */ +/* { dg-final { scan-assembler-times "adds\tx\[0-9\]+, x\[0-9\]+, w\[0-9\]+, sxtw" 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/cmp.c b/gcc/testsuite/gcc.target/aarch64/cmp.c index ee57dd283bf3..a6487a4f77ac 100644 --- a/gcc/testsuite/gcc.target/aarch64/cmp.c +++ b/gcc/testsuite/gcc.target/aarch64/cmp.c @@ -58,4 +58,5 @@ cmp_di_test4 (int a, s64 b, s64 c) } /* { dg-final { scan-assembler-times "cmp\tw\[0-9\]+, w\[0-9\]+" 2 } } */ -/* { dg-final { scan-assembler-times "cmp\tx\[0-9\]+, x\[0-9\]+" 4 } } */ +/* { dg-final { scan-assembler-times "cmp\tx\[0-9\]+, x\[0-9\]+" 2 } } */ +/* { dg-final { scan-assembler-times "cmp\tx\[0-9\]+, w\[0-9\]+, sxtw" 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/extend-syntax.c b/gcc/testsuite/gcc.target/aarch64/extend-syntax.c new file mode 100644 index 000000000000..23fa9f4ffc5a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/extend-syntax.c @@ -0,0 +1,120 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +// Hits *add_uxtdi_shift2 (*add_uxt_shift2). +/* +** add1: +** add x0, x0, w1, uxtw 3 +** ret +*/ +unsigned long long *add1(unsigned long long *p, unsigned x) +{ + return p + x; +} + +// Hits *add_zero_extendsi_di (*add__). +/* +** add2: +** add x0, x0, w1, uxtw +** ret +*/ +unsigned long long add2(unsigned long long x, unsigned y) +{ + return x + y; +} + +// Hits *add_extendsi_shft_di (*add__shft_). +/* +** add3: +** add x0, x0, w1, sxtw 3 +** ret +*/ +double *add3(double *p, int x) +{ + return p + x; +} + +// Hits *sub_zero_extendsi_di (*sub__). +/* +** sub1: +** sub x0, x0, w1, uxtw +** ret +*/ +unsigned long long sub1(unsigned long long x, unsigned n) +{ + return x - n; +} + +// Hits *sub_uxtdi_shift2 (*sub_uxt_shift2). +/* +** sub2: +** sub x0, x0, w1, uxtw 3 +** ret +*/ +double *sub2(double *x, unsigned n) +{ + return x - n; +} + +// Hits *sub_extendsi_shft_di (*sub__shft_). +/* +** sub3: +** sub x0, x0, w1, sxtw 3 +** ret +*/ +double *sub3(double *p, int n) +{ + return p - n; +} + +// Hits *adds_zero_extendsi_di (*adds__). +int adds1(unsigned long long x, unsigned y) +{ + /* { dg-final { scan-assembler-times "adds\tx\[0-9\]+, x\[0-9\]+, w\[0-9\]+, uxtw" 1 } } */ + unsigned long long l = x + y; + return !!l; +} + +// Hits *adds_extendsi_shift_di (*adds__shift_). +int adds2(long long x, int y) +{ + /* { dg-final { scan-assembler-times "adds\tx\[0-9\]+, x\[0-9\]+, w\[0-9\]+, sxtw 3" 1 } } */ + long long t = x + ((long long)y << 3); + return !!t; +} + +// Hits *subs_zero_extendsi_di (*subs__). +unsigned long long z; +int subs1(unsigned long long x, unsigned y) +{ + /* { dg-final { scan-assembler-times "subs\tx\[0-9\]+, x\[0-9\]+, w\[0-9\]+, uxtw" 1 } } */ + unsigned long long t = x - y; + z = t; + return !!t; +} + +// Hits *subs_extendsi_shift_di (*subs__shift_). +unsigned long long *w; +int subs2(unsigned long long *x, int y) +{ + /* { dg-final { scan-assembler-times "subs\tx\[0-9\]+, x\[0-9\]+, w\[0-9\]+, sxtw 3" 1 } } */ + unsigned long long *t = x - y; + w = t; + return !!t; +} + +// Hits *cmp_swp_zero_extendsi_regdi (*cmp_swp__reg). +int cmp(unsigned long long x, unsigned y) +{ + /* { dg-final { scan-assembler-times "cmp\tx\[0-9\]+, w\[0-9\]+, uxtw" 1 } } */ + return !!(x - y); +} + +// Hits *cmp_swp_extendsi_shft_di (*cmp_swp__shft_). +int cmp2(unsigned long long x, int y) +{ + /* { dg-final { scan-assembler-times "cmp\tx\[0-9\]+, w\[0-9\]+, sxtw 3" 1 } } */ + return x == ((unsigned long long)y << 3); +} + +/* { dg-final { check-function-bodies "**" "" "" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/subs3.c b/gcc/testsuite/gcc.target/aarch64/subs3.c index 59581bf1ab79..0470a3bde343 100644 --- a/gcc/testsuite/gcc.target/aarch64/subs3.c +++ b/gcc/testsuite/gcc.target/aarch64/subs3.c @@ -58,4 +58,4 @@ int main () return 0; } -/* { dg-final { scan-assembler-times "subs\tx\[0-9\]+, x\[0-9\]+, x\[0-9\]+, sxtw" 2 } } */ +/* { dg-final { scan-assembler-times "subs\tx\[0-9\]+, x\[0-9\]+, w\[0-9\]+, sxtw" 2 } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/subsp.c b/gcc/testsuite/gcc.target/aarch64/subsp.c index 6ef6b2c90ae6..341b83dca863 100644 --- a/gcc/testsuite/gcc.target/aarch64/subsp.c +++ b/gcc/testsuite/gcc.target/aarch64/subsp.c @@ -16,4 +16,4 @@ f2 (int *x, int y) } /* { dg-final { scan-assembler "sub\tsp, sp, x\[0-9\]*\n" } } */ -/* { dg-final { scan-assembler "sub\tsp, sp, x\[0-9\]*, sxtw 4\n" } } */ +/* { dg-final { scan-assembler "sub\tsp, sp, w\[0-9\]*, sxtw 4\n" } } */