From 3d3a3a49e20f006fa88e4fec5ad236864faa3a35 Mon Sep 17 00:00:00 2001 From: Ravi Bangoria Date: Fri, 7 Apr 2023 16:54:59 +0530 Subject: [PATCH] perf script ibs: Change bit description according to latest AMD PPR ("Processor Programming Reference") Some of the IBS_OP_DATA2 bit descriptions were stale (taken from old version of PPR). Change it according to latest PPR. Signed-off-by: Ravi Bangoria Acked-by: Namhyung Kim Cc: Adrian Hunter Cc: Ananth Narayan Cc: Ian Rogers Cc: Ingo Molnar Cc: Jiri Olsa Cc: Kajol Jain Cc: Kan Liang Cc: Leo Yan Cc: Peter Zijlstra Cc: Sandipan Das Cc: Santosh Shukla Cc: Stephane Eranian Link: https://lore.kernel.org/r/20230407112459.548-5-ravi.bangoria@amd.com Signed-off-by: Arnaldo Carvalho de Melo --- tools/perf/util/amd-sample-raw.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/tools/perf/util/amd-sample-raw.c b/tools/perf/util/amd-sample-raw.c index b0e70ce9d87a41..6a6ddba76c750d 100644 --- a/tools/perf/util/amd-sample-raw.c +++ b/tools/perf/util/amd-sample-raw.c @@ -105,17 +105,17 @@ static void pr_ibs_op_data2_extended(union ibs_op_data2 reg) static const char * const data_src_str[] = { "", " DataSrc 1=Local L3 or other L1/L2 in CCX", - " DataSrc 2=A peer cache in a near CCX", - " DataSrc 3=Data returned from DRAM", + " DataSrc 2=Another CCX cache in the same NUMA node", + " DataSrc 3=DRAM", " DataSrc 4=(reserved)", - " DataSrc 5=A peer cache in a far CCX", - " DataSrc 6=DRAM address map with \"long latency\" bit set", - " DataSrc 7=Data returned from MMIO/Config/PCI/APIC", - " DataSrc 8=Extension Memory (S-Link, GenZ, etc)", + " DataSrc 5=Another CCX cache in a different NUMA node", + " DataSrc 6=Long-latency DIMM", + " DataSrc 7=MMIO/Config/PCI/APIC", + " DataSrc 8=Extension Memory", " DataSrc 9=(reserved)", " DataSrc 10=(reserved)", " DataSrc 11=(reserved)", - " DataSrc 12=Peer Agent Memory", + " DataSrc 12=Coherent Memory of a different processor type", /* 13 to 31 are reserved. Avoid printing them. */ }; int data_src = (reg.data_src_hi << 3) | reg.data_src_lo;