From e785e97b1263b944db0aff138ff123d8bcd45615 Mon Sep 17 00:00:00 2001
From: Matheus Catarino <matheus-catarino@hotmail.com>
Date: Sat, 17 Aug 2024 10:54:27 -0300
Subject: [PATCH] fix: esp32p4-xesppie fmt-slice bug

---
 build.zig           | 3 +--
 main/CMakeLists.txt | 2 +-
 main/lib.zig        | 2 +-
 3 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/build.zig b/build.zig
index af0870e..631ecfb 100644
--- a/build.zig
+++ b/build.zig
@@ -593,13 +593,12 @@ const riscv_targets = &[_]std.Target.Query{
         .abi = .none,
         .cpu_features_add = std.Target.riscv.featureSet(&.{ .m, .a, .c }),
     },
-    // esp32-p4
+    // esp32-p4 have .xesppie cpu-feature (espressif vendor extension)
     .{
         .cpu_arch = .riscv32,
         .cpu_model = .{ .explicit = &std.Target.riscv.cpu.esp32p4 },
         .os_tag = .freestanding,
         .abi = .eabihf,
-        .cpu_features_sub = std.Target.riscv.featureSet(&.{.xesppie}), // FIXME
     },
 };
 const xtensa_targets = &[_]std.Target.Query{
diff --git a/main/CMakeLists.txt b/main/CMakeLists.txt
index 80a50f7..3f6af0a 100644
--- a/main/CMakeLists.txt
+++ b/main/CMakeLists.txt
@@ -68,7 +68,7 @@ if(CONFIG_IDF_TARGET_ARCH_RISCV)
         set(TARGET_CPU_MODEL "generic_rv32+m+a+c")
     elseif(CONFIG_IDF_TARGET_ESP32P4)
         string(REGEX REPLACE "-none" "-eabihf" ZIG_TARGET ${ZIG_TARGET})
-        set(TARGET_CPU_MODEL "esp32p4-xesppie")
+        set(TARGET_CPU_MODEL "esp32p4")
     else()
         set(TARGET_CPU_MODEL "generic_rv32+m+c")
     endif()
diff --git a/main/lib.zig b/main/lib.zig
index 132d014..55d9823 100644
--- a/main/lib.zig
+++ b/main/lib.zig
@@ -24,7 +24,7 @@ export fn app_main() callconv(.C) void {
         \\* Compiler Backend: {s}
         \\
     , .{
-        builtin.zig_version_string,
+        @as([]const u8, builtin.zig_version_string), // fix esp32p4(.xesppie) fmt-slice bug
         @tagName(builtin.zig_backend),
     });