Implement full mtval
#2929
main.yml
on: pull_request
Synthesize full core
59s
Build regression tests (riscv-tests)
46s
Build regression tests (riscv-arch-test)
45s
Run unit tests
8m 13s
Check code formatting and typing
54s
Run regression tests (riscv-tests)
3m 51s
Run regression tests (riscv-arch-test)
12m 43s
Artifacts
Produced during runtime
Name | Size | |
---|---|---|
verilog-full-core
|
460 KB |
|