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Synthesis benchmark for FUs (#449)
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tilk committed Jul 25, 2023
1 parent b4869f0 commit b7fcd8b
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38 changes: 15 additions & 23 deletions constants/ecp5_pinout.py
Original file line number Diff line number Diff line change
@@ -1,25 +1,17 @@
ecp5_bg381_pins = """
A4 A5 B5 C5 C4 A3 B4 B3 E4 C3 D5 D3 F4 E5 E3
F5 A2 B2 B1 C2 C1 D2 D1 E1 H4 H5 G5 H3 G3 F2
F3 E2 G2 H2 F1 G1 J4 J3 J5 K3 H1 K2 J1 K1 K4
L4 K5 L5 M5 M4 N4 N5 P5 N3 L3 M3 L2 N2 L1 M1
N1 P1 P2 P3 P4 R1 U1 T1 V1 W1 V2 Y2 W2 T2 R2
U2 R3 T3 V3 U3 Y3 R4 V4 R5 W4 W5 T8 Y6 Y7 T9
Y8 W8 T10 W9 W10 W11 Y11 Y12 W13 T11 W14 Y14
T12 Y15 Y16 T13 Y17 W17 T14 W18 Y19 W20 T17
U16 U17 U18 T18 R18 U19 T19 U20 R20 T20 P20
P18 N20 P19 N19 T16 R17 P16 R16 N17 P17 M17
N18 N16 M18 L17 L18 L16 M19 M20 L19 L20 K20
K19 J20 J19 K18 H20 J18 G19 G20 F19 F20 E20
E19 D19 D20 C20 K17 K16 J16 H17 J17 H18 H16
G18 G16 F17 F18 E17 E18 D18 F16 E16 D17 C18
B20 B19 A19 A18 B18 C17 A17 B17 D16 B16 C16
A16 E15 C15 D15 B15 A15 E14 C14 D14 A14 E13
C13 D13 B13 A13 E12 A12 D12 C12 E11 B12 D11
C11 A11 B11 A10 B10 C10 A9 B9 E10 D10 C9 E9
A8 D9 A7 B8 D8 C8 E8 C7 D7 C6 E7 D6 B6 E6 A6
ecp5_bg756_pins = """
C17 A17 A18 E17 P27 N27 R26 P28 R7 P5 P6 N6 AK32 AJ32 AM30 AL30 AK31 AJ31 AM31 AL32 AG28 AG29 AJ28 AH28 AH30 AG30
AK29 AK30 AH32 AG32 AJ2 AK2 AJ29 AJ30 AG3 AH3 AJ3 AK3 AL3 AG1 AH1 AJ1 AK1 AM28 AM29 AL28 AK28 AL1 AM2 C5 D5 C4 C3
D4 E4 F4 F5 B1 C2 D3 D2 F3 E3 C1 D1 F2 E1 F1 H1 H2 H3 J3 K3 K2 J1 K1 L1 L2 L3 J4 K4 H6 H5 J7 J6 K6 K7 K5 L4 N3 N4
L7 L6 N7 P7 P4 T7 R6 T6 U6 U7 R4 T5 T4 U5 U4 V4 V6 V7 P2 P3 R3 T3 N1 P1 U2 U3 R1 T2 W3 Y3 T1 U1 V1 W1 Y7 Y6 Y5 W5
Y4 W4 AB7 AC6 AB5 AB6 AC7 AD7 AD6 AE6 AE5 AE4 AB3 AB4 AC5 AD4 W2 Y1 AD3 AE3 AC3 AB2 AC2 AE2 AB1 AC1 AD1 AE1 C28 D28
C29 C30 D29 E29 F29 F28 B32 C31 D30 D31 F30 E30 C32 D32 F31 E32 F32 H32 H31 H30 J30 K30 K31 J32 K32 L32 L31 L30 J29
K29 H27 H28 J26 J27 K27 K26 K28 L29 N30 N29 L26 L27 N26 P26 P29 T26 R27 T27 U27 U26 R29 T28 T29 U28 U29 V29 V27 V26
P31 P30 R30 T30 N32 P32 U31 U30 R32 T31 W30 Y30 T32 U32 V32 W32 Y26 Y27 Y28 W28 Y29 W29 AB26 AC27 AB28 AB27 AC26
AD26 AD27 AE27 AE28 AE29 AB30 AB29 AC28 AD29 W31 Y32 AD30 AE30 AC30 AB31 AC31 AE31 AB32 AC32 AD32 AE32 A24 C24 D24
F24 A25 B25 C25 D25 E25 A26 B26 C26 D26 A28 A29 A30 A31 D7 C7 B29 B30 B7 A7 F8 E8 D8 C8 B8 A8 F9 D9 C9 A9 F10 E10
D10 C10 B10 A10 F11 E11 D11 C11 B11 A11 F13 D13 C13 A13 F14 E14 D14 C14 B14 A14 B3 B4 F15 D15 C15 A15 F16 E16 D16
C16 B16 A16 B17 D17 F17 A2 A3 C18 D18 F18 A19 B19 C19 D19 E19 F19 A20 C20 D20 F20 A22 B22 C22 D22 E22 F22 A23 B23
C23 D23 E23 F23 A4 A5
""".split()

ecp5_bg381_pclk = """
G3 F2 G2 H2 L19 L20 J20 J19 B12 D11 B11 A10
""".split()
ecp5_bg756_pclk = "C17 A17 A18 E17 P27 N27 R26 P28 R7 P5 P6 N6".split()
115 changes: 85 additions & 30 deletions constants/ecp5_platforms.py
Original file line number Diff line number Diff line change
@@ -1,10 +1,14 @@
from collections.abc import Callable, Iterable
from itertools import chain
from typing import TypeAlias
from amaranth.build.dsl import Subsignal
from amaranth.vendor.lattice_ecp5 import LatticeECP5Platform
from amaranth.build import Resource, Attrs, Pins, Clock, PinsN

from constants.ecp5_pinout import ecp5_bg381_pins, ecp5_bg381_pclk
from constants.ecp5_pinout import ecp5_bg756_pins, ecp5_bg756_pclk

from coreblocks.peripherals.wishbone import WishboneParameters
from coreblocks.transactions.lib import AdapterBase

__all__ = ["make_ecp5_platform"]

Expand All @@ -31,51 +35,102 @@ def WishboneResource( # noqa: N802
return Resource.family(*args, default_name="wishbone", ios=io)


def make_ecp5_platform(wb_params: WishboneParameters):
pin_bag = ecp5_bg381_pins[:]
def AdapterResource(*args, en, done, data_in, data_out, conn=None): # noqa: N802
io = []

io.append(Subsignal("en", Pins(en, dir="i", conn=conn, assert_width=1)))
io.append(Subsignal("done", Pins(done, dir="o", conn=conn, assert_width=1)))
if data_in:
io.append(Subsignal("data_in", Pins(data_in, dir="i", conn=conn)))
if data_out:
io.append(Subsignal("data_out", Pins(data_out, dir="o", conn=conn)))

return Resource.family(*args, default_name="adapter", ios=io)


def p(count: int = 1):
return " ".join([pin_bag.pop() for _ in range(count)])
class PinManager:
def __init__(self, pins: Iterable[str]):
self.pin_bag = list(pins)

def named_pin(names: list[str]):
def p(self, count: int = 1):
return " ".join([self.pin_bag.pop() for _ in range(count)])

def named_pin(self, names: list[str]):
for name in names:
if name in pin_bag:
pin_bag.remove(name)
if name in self.pin_bag:
self.pin_bag.remove(name)
return name


ResourceBuilder: TypeAlias = Callable[[PinManager], list[Resource]]


def wishbone_resources(wb_params: WishboneParameters):
def make_resources(pins: PinManager) -> list[Resource]:
return [
WishboneResource(
0,
dat_r=pins.p(wb_params.data_width),
dat_w=pins.p(wb_params.data_width),
rst=pins.p(),
ack=pins.p(),
adr=pins.p(wb_params.addr_width),
cyc=pins.p(),
stall=pins.p(),
err=pins.p(),
lock=pins.p(),
rty=pins.p(),
sel=pins.p(wb_params.data_width // wb_params.granularity),
stb=pins.p(),
we=pins.p(),
),
]

return make_resources


def adapter_resources(adapter: AdapterBase, number: int):
def make_resources(pins: PinManager) -> list[Resource]:
return [
AdapterResource(
number,
en=pins.p(),
done=pins.p(),
data_in=pins.p(adapter.data_in.shape().width),
data_out=pins.p(adapter.data_out.shape().width),
)
]

return make_resources


def append_resources(*args: ResourceBuilder):
def make_resources(pins: PinManager):
return list(chain.from_iterable(map(lambda f: f(pins), args)))

return make_resources


def make_ecp5_platform(resource_builder: ResourceBuilder):
pins = PinManager(ecp5_bg756_pins)

# Tutorial for synthesis in amaranth:
# https://github.com/RobertBaruch/amaranth-tutorial/blob/main/9_synthesis.md
class ECP5BG381Platform(LatticeECP5Platform):
class ECP5BG756Platform(LatticeECP5Platform):
device = "LFE5UM5G-85F"
package = "BG381"
package = "BG756"
speed = "8"
default_clk = "clk"
default_rst = "rst"

resources = [
Resource("rst", 0, PinsN(p(), dir="i"), Attrs(IO_TYPE="LVCMOS33")),
Resource("clk", 0, Pins(named_pin(ecp5_bg381_pclk), dir="i"), Clock(12e6), Attrs(IO_TYPE="LVCMOS33")),
WishboneResource(
0,
dat_r=p(wb_params.data_width),
dat_w=p(wb_params.data_width),
rst=p(),
ack=p(),
adr=p(wb_params.addr_width),
cyc=p(),
stall=p(),
err=p(),
lock=p(),
rty=p(),
sel=p(wb_params.data_width // wb_params.granularity),
stb=p(),
we=p(),
),
]
Resource("rst", 0, PinsN(pins.p(), dir="i"), Attrs(IO_TYPE="LVCMOS33")),
Resource("clk", 0, Pins(pins.named_pin(ecp5_bg756_pclk), dir="i"), Clock(12e6), Attrs(IO_TYPE="LVCMOS33")),
] + resource_builder(pins)

connectors = []

def toolchain_program(self):
pass

return ECP5BG381Platform
return ECP5BG756Platform
2 changes: 1 addition & 1 deletion coreblocks/fu/div_unit.py
Original file line number Diff line number Diff line change
Expand Up @@ -138,7 +138,7 @@ def _abs(s: Value) -> Value:
@dataclass
class DivComponent(FunctionalComponentParams):
_: KW_ONLY
ipc: int = 4 # iterations per cycle
ipc: int = 3 # iterations per cycle
div_fn = DivFn()

def get_module(self, gen_params: GenParams) -> FuncUnit:
Expand Down
2 changes: 1 addition & 1 deletion coreblocks/params/configurations.py
Original file line number Diff line number Diff line change
Expand Up @@ -116,7 +116,7 @@ def replace(self, **kwargs):
RSBlockComponent(
[
MulComponent(mul_unit_type=MulType.SEQUENCE_MUL),
DivComponent(ipc=3),
DivComponent(),
],
rs_entries=2,
),
Expand Down
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