{"payload":{"pageCount":3,"repositories":[{"type":"Public","name":"NEMU","owner":"OpenXiangShan","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":18,"issueCount":34,"starsCount":232,"forksCount":84,"license":"Other","participation":[0,3,4,6,0,1,1,5,1,2,1,0,3,1,0,0,7,2,0,0,11,2,0,6,4,2,1,15,2,1,3,3,15,8,8,3,2,13,5,7,5,10,10,14,5,14,10,30,17,13,6,14],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-29T14:07:05.815Z"}},{"type":"Public","name":"XiangShan-doc","owner":"OpenXiangShan","isFork":false,"description":"Documentation for XiangShan","allTopics":[],"primaryLanguage":{"name":"TeX","color":"#3D6117"},"pullRequestCount":2,"issueCount":6,"starsCount":341,"forksCount":130,"license":"Creative Commons Attribution 4.0 International","participation":[0,0,4,6,2,8,0,0,4,0,0,3,0,1,0,2,2,3,2,0,1,3,0,5,7,1,0,0,0,3,0,3,0,0,0,2,2,1,2,1,3,1,6,1,0,3,9,0,2,1,1,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-29T12:38:16.026Z"}},{"type":"Public","name":"XiangShan","owner":"OpenXiangShan","isFork":false,"description":"Open-source high-performance RISC-V processor","allTopics":["chisel","risc-v","microarchitecture"],"primaryLanguage":{"name":"Scala","color":"#c22d40"},"pullRequestCount":49,"issueCount":54,"starsCount":4737,"forksCount":646,"license":"Other","participation":[53,31,35,77,59,53,37,20,20,28,27,34,24,33,23,22,11,13,1,3,15,34,42,20,43,42,40,82,61,49,37,62,57,36,70,44,51,24,50,52,57,53,53,31,35,24,19,49,54,60,33,37],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-29T12:16:05.146Z"}},{"type":"Public","name":"rocket-chip","owner":"OpenXiangShan","isFork":true,"description":"Rocket Chip Generator","allTopics":[],"primaryLanguage":{"name":"Scala","color":"#c22d40"},"pullRequestCount":0,"issueCount":0,"starsCount":4,"forksCount":1119,"license":"Other","participation":[6,5,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,1,0,0,0,0,0,2,1,0,0,0,1,0,1,0,1,0,0,1,0,0,0,4,1,1],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-29T07:39:44.462Z"}},{"type":"Public","name":"ready-to-run","owner":"OpenXiangShan","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"Shell","color":"#89e051"},"pullRequestCount":0,"issueCount":3,"starsCount":3,"forksCount":7,"license":null,"participation":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1,0,2,1,4,0,5,0,0,0,0,0,0,0,0,1,2,3,2,1,1,5,5,3,6,2,6],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-29T05:58:58.516Z"}},{"type":"Public","name":"difftest","owner":"OpenXiangShan","isFork":false,"description":"Modern co-simulation framework for RISC-V CPUs","allTopics":[],"primaryLanguage":{"name":"C++","color":"#f34b7d"},"pullRequestCount":5,"issueCount":5,"starsCount":112,"forksCount":63,"license":"Mulan Permissive Software License, Version 2","participation":[4,3,11,1,0,4,1,8,1,4,0,3,6,4,5,14,1,15,6,0,5,5,6,10,5,3,3,9,5,7,2,11,4,7,2,3,5,1,1,9,4,12,0,2,3,6,3,4,4,7,0,4],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-28T18:00:35.645Z"}},{"type":"Public","name":"OpenLLC","owner":"OpenXiangShan","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"Scala","color":"#c22d40"},"pullRequestCount":0,"issueCount":0,"starsCount":3,"forksCount":3,"license":"Other","participation":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,3,3,1,1,7,4,5,5,10,15,18,1,2,2,0,0,1,0,10],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-28T11:07:37.967Z"}},{"type":"Public","name":"GEM5","owner":"OpenXiangShan","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"C++","color":"#f34b7d"},"pullRequestCount":1,"issueCount":2,"starsCount":56,"forksCount":21,"license":"BSD 3-Clause \"New\" or \"Revised\" License","participation":[2,20,8,8,11,3,16,10,7,7,7,6,7,5,5,16,10,7,6,1,9,1,7,11,4,2,2,8,6,7,2,23,6,3,1,0,0,1,0,4,5,2,0,2,4,9,3,6,0,2,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-27T09:34:55.854Z"}},{"type":"Public","name":"CoupledL2","owner":"OpenXiangShan","isFork":false,"description":"Open-source non-blocking L2 cache","allTopics":[],"primaryLanguage":{"name":"Scala","color":"#c22d40"},"pullRequestCount":4,"issueCount":0,"starsCount":32,"forksCount":19,"license":"Other","participation":[1,7,2,2,3,0,2,1,0,0,2,3,2,1,0,1,0,0,0,0,0,0,0,0,1,2,1,2,0,1,0,1,12,8,4,6,0,3,4,5,2,6,4,9,3,0,8,7,5,2,12,8],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-27T09:29:48.663Z"}},{"type":"Public","name":"OpenNCB","owner":"OpenXiangShan","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"Scala","color":"#c22d40"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":0,"license":null,"participation":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,15,15,5,4,33,66,13,7,9],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-26T07:20:10.292Z"}},{"type":"Public","name":"Utility","owner":"OpenXiangShan","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"Scala","color":"#c22d40"},"pullRequestCount":3,"issueCount":0,"starsCount":7,"forksCount":14,"license":null,"participation":[1,2,0,6,2,2,0,0,0,0,1,1,1,1,1,1,1,3,0,0,1,3,1,0,1,0,0,2,2,1,0,2,0,2,1,2,1,0,0,1,1,1,1,1,0,0,0,0,2,0,2,2],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-26T02:58:14.146Z"}},{"type":"Public","name":"edk2-platforms","owner":"OpenXiangShan","isFork":true,"description":"EDK II sample platform branches and tags","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":477,"license":"Other","participation":[10,28,21,8,7,1,7,0,29,2,0,7,2,4,2,10,32,8,4,3,3,5,4,9,14,16,6,3,4,3,2,5,13,11,21,16,10,12,7,12,5,5,25,18,19,9,0,5,0,0,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-26T02:27:27.291Z"}},{"type":"Public","name":"tl-test-new","owner":"OpenXiangShan","isFork":false,"description":"The Unified TileLink Memory Subsystem Tester for XiangShan","allTopics":[],"primaryLanguage":{"name":"C++","color":"#f34b7d"},"pullRequestCount":0,"issueCount":1,"starsCount":2,"forksCount":0,"license":"Mulan Permissive Software License, Version 2","participation":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,1,15,0,8,28,11,10,19,3,0,4,0,0,0,2,0,0,0,0,1,0,0,0,0,2],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-25T18:41:48.371Z"}},{"type":"Public","name":"riscv-isa-sim","owner":"OpenXiangShan","isFork":true,"description":"Spike, a RISC-V ISA Simulator","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":1,"issueCount":0,"starsCount":5,"forksCount":836,"license":"Other","participation":[1,4,15,3,8,4,2,2,10,18,11,8,2,14,17,4,3,3,4,3,5,3,6,2,4,2,0,6,3,7,15,1,1,8,13,1,19,27,11,22,9,38,21,23,8,9,9,18,9,7,0,2],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-25T09:51:03.234Z"}},{"type":"Public","name":"riscv-hyp-tests","owner":"OpenXiangShan","isFork":true,"description":"A bare-metal application to test specific features of the risc-v hypervisor extension","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":0,"starsCount":1,"forksCount":21,"license":"GNU General Public License v3.0","participation":[0,1,0,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1,0,0,1,1,0,0,0,2,0,3,0,2],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-23T13:01:54.332Z"}},{"type":"Public","name":"nexus-am","owner":"OpenXiangShan","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":2,"issueCount":5,"starsCount":31,"forksCount":25,"license":null,"participation":[0,0,0,1,2,0,0,0,0,0,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,8,0,0,0,0,0,0,1,0,0,0,0,0,0,4,6,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-21T15:46:16.202Z"}},{"type":"Public","name":"DRAMsim3","owner":"OpenXiangShan","isFork":true,"description":"DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator","allTopics":[],"primaryLanguage":{"name":"C++","color":"#f34b7d"},"pullRequestCount":0,"issueCount":0,"starsCount":3,"forksCount":140,"license":"MIT License","participation":[0,0,0,1,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,3,0,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-18T09:39:44.438Z"}},{"type":"Public","name":"tl-test","owner":"OpenXiangShan","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"C++","color":"#f34b7d"},"pullRequestCount":3,"issueCount":1,"starsCount":8,"forksCount":9,"license":"Other","participation":[0,0,0,2,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,2,0,5,0,0,0,0,0,3,8,2,0,0,0,0,0,0,0,0,1,1,0,0,0,3,3,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-18T07:49:53.805Z"}},{"type":"Public","name":"HuanCun","owner":"OpenXiangShan","isFork":false,"description":"Open-source high-performance non-blocking cache","allTopics":[],"primaryLanguage":{"name":"Scala","color":"#c22d40"},"pullRequestCount":1,"issueCount":2,"starsCount":63,"forksCount":33,"license":"Other","participation":[0,5,1,2,0,0,0,0,0,0,1,0,0,2,0,1,0,0,0,0,0,0,0,0,1,1,0,1,1,1,0,2,0,2,0,0,0,0,0,0,1,0,0,0,0,0,0,0,3,0,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-18T04:55:59.588Z"}},{"type":"Public","name":"gcc","owner":"OpenXiangShan","isFork":true,"description":"","allTopics":[],"primaryLanguage":null,"pullRequestCount":0,"issueCount":1,"starsCount":0,"forksCount":4393,"license":"GNU General Public License v2.0","participation":[132,197,233,183,171,259,246,264,210,283,243,156,63,123,249,224,193,216,137,173,133,140,161,117,177,112,108,126,95,96,102,102,124,100,77,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-13T07:22:50.482Z"}},{"type":"Public","name":"OpenAIA","owner":"OpenXiangShan","isFork":false,"description":"The implementation of RISC-V Advanced Interrupt Architecture","allTopics":[],"primaryLanguage":{"name":"SystemVerilog","color":"#DAE1C2"},"pullRequestCount":0,"issueCount":0,"starsCount":4,"forksCount":1,"license":null,"participation":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,2,4,1,0,2,1,0,1,8,1,1,3,0,0,0,4,1,0,0,2,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-11T07:58:03.690Z"}},{"type":"Public","name":"env-scripts","owner":"OpenXiangShan","isFork":false,"description":"Scripts for XiangShan","allTopics":[],"primaryLanguage":{"name":"Verilog","color":"#b2b7f8"},"pullRequestCount":0,"issueCount":0,"starsCount":10,"forksCount":14,"license":null,"participation":[0,0,0,0,0,0,0,0,4,4,0,0,1,0,0,0,2,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,1,1,0,1,0,1,0,2,0,0,0,0,0,0,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-10T08:43:33.617Z"}},{"type":"Public","name":"LibCheckpoint","owner":"OpenXiangShan","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":0,"starsCount":2,"forksCount":1,"license":null,"participation":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,3,5,0,0,13,0,2,0,3,0,0,0,0,3,2,0,0,0,0,2,2,1,2,1,0,1,0,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-05T08:28:07.831Z"}},{"type":"Public","name":"opensbi","owner":"OpenXiangShan","isFork":true,"description":"RISC-V Open Source Supervisor Binary Interface","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":0,"starsCount":1,"forksCount":501,"license":"Other","participation":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-05T03:27:35.495Z"}},{"type":"Public","name":"xfuzz","owner":"OpenXiangShan","isFork":false,"description":"Fuzzing General-Purpose Hardware Designs with Software Fuzzers","allTopics":[],"primaryLanguage":{"name":"Scala","color":"#c22d40"},"pullRequestCount":0,"issueCount":3,"starsCount":10,"forksCount":1,"license":"Other","participation":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,3,0,0,0,1,0,0,2,0,0,0,0,2,0,0,0,2,0,0,0,0,0,1,0,0,0,0,0,0,0,1,1,0,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-04T13:05:32.604Z"}},{"type":"Public","name":"riscv-pk","owner":"OpenXiangShan","isFork":true,"description":"RISC-V Proxy Kernel","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":308,"license":"Other","participation":null,"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-04T11:01:59.336Z"}},{"type":"Public","name":"qemu","owner":"OpenXiangShan","isFork":true,"description":"Official QEMU mirror. Please see https://www.qemu.org/contribute/ for how to submit changes to QEMU. Pull Requests are ignored. Please only use release tarballs from the QEMU website.","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":0,"starsCount":0,"forksCount":5503,"license":"Other","participation":[289,280,366,338,200,187,121,143,53,81,88,235,21,146,240,140,184,219,146,154,160,216,209,262,180,149,97,141,83,135,157,117,136,159,205,171,102,182,165,140,135,176,96,98,19,1,0,0,0,0,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-04T03:06:09.570Z"}},{"type":"Public","name":"YunSuan","owner":"OpenXiangShan","isFork":false,"description":"This repo includes XiangShan's function units","allTopics":[],"primaryLanguage":{"name":"Scala","color":"#c22d40"},"pullRequestCount":0,"issueCount":0,"starsCount":13,"forksCount":11,"license":"Mulan Permissive Software License, Version 2","participation":[0,1,0,0,2,0,0,0,0,0,0,3,2,1,3,2,1,1,0,0,1,0,5,3,4,0,5,4,0,4,2,4,1,5,2,1,3,1,1,2,1,3,2,0,0,2,0,3,1,0,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-03T09:41:42.262Z"}},{"type":"Public","name":"riscv-tests","owner":"OpenXiangShan","isFork":true,"description":"","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":1,"issueCount":0,"starsCount":0,"forksCount":451,"license":"Other","participation":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,2,2,1,2,0,1,0,0,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-09-02T05:43:57.846Z"}},{"type":"Public","name":"gos","owner":"OpenXiangShan","isFork":false,"description":"","allTopics":[],"primaryLanguage":{"name":"C","color":"#555555"},"pullRequestCount":0,"issueCount":0,"starsCount":2,"forksCount":0,"license":null,"participation":[0,1,16,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,12,3,0,5,2,11,29,13,8,29,12,22,18,7,4,6,6,0,23,25,23,32,8,0,9,14,0,0,0,0],"lastUpdated":{"hasBeenPushedTo":true,"timestamp":"2024-08-29T08:22:13.600Z"}}],"repositoryCount":66,"userInfo":null,"searchable":true,"definitions":[],"typeFilters":[{"id":"all","text":"All"},{"id":"public","text":"Public"},{"id":"source","text":"Sources"},{"id":"fork","text":"Forks"},{"id":"archived","text":"Archived"},{"id":"template","text":"Templates"}],"compactMode":false},"title":"OpenXiangShan repositories"}