About EXT_ZVFH

[Liuziying04]

Vector floating-point instructions with an accuracy of 16 bits require support for EXT_ZVFH, but no corresponding instruction set is found in MISA. So what registers or where does EXT_ZVFH support?

[furuame]

zvfh enables SEW=16 for vector FP instructions execution

[nick-knight]

Correct, there is no misa bit for Zvfh. We ran out of bits!