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Add PMOD connections for USB UART, use as default serial port for now.
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cr1901 committed Oct 29, 2018
1 parent 000cf4c commit 8ed4613
Showing 1 changed file with 13 additions and 1 deletion.
14 changes: 13 additions & 1 deletion targets/ice40_up5k_b_evn/base.py
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,18 @@
import platforms.ice40_up5k_b_evn as up5k


# Alternate serial port, using the second 6-pin PMOD port. Follows Digilent
# PMOD Specification Type 4, so e.g. PMOD USBUART can be used.
pmod_serial = [
("serial", 0,
Subsignal("rx", Pins("PMOD:6")),
Subsignal("tx", Pins("PMOD:5")),
Subsignal("rts", Pins("PMOD:4")),
Subsignal("cts", Pins("PMOD:7")),
IOStandard("LVCMOS33"),
),
]

class _CRG(Module):
def __init__(self, platform):
clk12 = platform.request("clk12")
Expand Down Expand Up @@ -63,7 +75,7 @@ def __init__(self, platform, **kwargs):
kwargs['integrated_sram_size']=0

# FIXME: Force either lite or minimal variants of CPUs; full is too big.
platform.add_extension(up5k.serial)
platform.add_extension(pmod_serial)
platform.add_extension(up5k.spiflash)
clk_freq = int(12e6)

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