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Remove fake IB HalfStave and Module volumes #6011
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Dear @iouribelikov @shahor02 here it is the removal of the fake HalfStave and Module from the IB geometry. Please let me know if it is ok or if there are problems. Many thanks and kind regards |
@mario6829 @shahor02 Unfortunately, this PR breaks the track finding. Probably, this happens because the "Module" volume is not present anymore for the Inner Barrel. A quick way to reproduce the potential problem: And this gives: |
@iouribelikov many thanks for spotting the source of the error! I'll check and adapt the code for getting the number of chips to the new geometry tree. Cheers. |
@iouribelikov I changed the name of the IB services container to avoid the string "Module" which made confusion in GeometryTGeo routines. It should work now. Many thansk again. Cheers |
@mario6829 OK. Now it works. Thanks a lot. |
@mario6829 I've added one more fix since the TPC-ITS matching was failing in fullCI. Still, the fullCI fails due producing in ITS primary vertexing for seeding:
@mconcas, substituting this cout by more informative message (see #6156) I get
Any hint why? In principle, the geometry is not supposed to change after this PR, just some fake volumes are removed and alignables definition was changed. |
Hi, this is actually the tracker part. It tells us that allocated memory (configurable in params) is not enough wrt estimation of the needed memory for cell finding. I frankly don't know why we see this at this point, I assume the tracker is running always on the same data in this tests. Is this out of the workflow? Or some kind of test on macro? |
@mconcas ok, thanks. The sample is statistically random, always 5pbpb events. @mpuccio I put the ITS data + needed files in https://cernbox.cern.ch/index.php/s/E1cCscdo6Zkjtu4
Could you check, and if the buffers allocation parameters indeed need to be changed, do this? |
Hi @shahor02, how urgent is this? With the timeframe approach I removed this static allocation and thus the need of adjusting this parameters on CPU (it will need to be then adjusted for the GPU part...). If super urgent I will tune the parameter otherwise I would use the new tracker. |
Actually, I see that the ITS hit generation is wrong, on IB layers they are all assigned to stave #1 of corresponding layer. |
I would say urgent but on the geometry side, not the tracker :) |
It could then be that, being all the clusters on the same stave, we just compute too many tracklets on the same phi/zed bin interval, exceeding the parameter made projecting the average. |
Sure, so far it is only geometry building problem, no need for your or Max's intervention. |
@mario6829 , @shahor02 ,
An extremely dirty fix could be just adding (below that line 350): |
@iouribelikov thanks, I would prefer bit cleaner fix mario6829#1 |
@shahor02 done (merge, rebase, forcepush): now I am recompiling locally, hopes it works... |
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@mario6829 @shahor02
For me, it seems to work.
yes, some CI tests are broken for other reasons, thanks for testing, merging. |
* Remove fake IB HalfStave and Module volumes * Change IB service container name (to avoid "Module") * Adding dummy commit to trigger anothe CI check * RecoGeomHelper: Fix calculation of nLadders on inner layers * Fix getChipIndex for inner layers Co-authored-by: Mario Sitta <Mario.Sitta@cern.ch> Co-authored-by: Ruben Shahoyan <shahor02@users.noreply.github.com> Co-authored-by: shahoian <ruben.shahoyan@cern.ch>
The fake volumes HalfStave and Module were removed from the Inner Barrel geometry tree. Now the Chip volume is directly placed in the Stave volume (i.e. the Chip volume is a direct daughter of the Stave). All other (passive) elements (glue, FPC, capacitors) are still together in a physical volume to speed up traversing the volume tree (since the Stave is an Assembly). Only the Chip is an alignable volume.