Multiple Memories Proposal Support #21
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The multiple memories proposal recently moved to Stage 5 alongside the GC proposal and others, in order to maintain compatibility with latest spec I have implemented the proposal.
The multiple memories proposal is largely the removal of a restriction as opposed to entirely new behaviour. Instances are now able to address more than one memory, be it imported or described in the module itself. Theres a number of advantages to this and particularly this will play nice with the threads proposal, where memories can be marked as shared and concurrently accessed from different module instances. Without multiple memories all memory operations would need to be atomic to be safe, whereas with this proposal a separate memory can be constructed for shared thread communication.