"memory" opcode sanity checks

CHANGELOG.md

@@ -10,11 +10,11 @@ Description of the upcoming release here.
 
 ### Added
 
-- [#1433](https://github.com/FuelLabs/fuel-core/pull/1433): Add "sanity" benchmarks for flow opcodes
-- [#1430](https://github.com/FuelLabs/fuel-core/pull/1430): Add "sanity" benchmarks for crypto opcodes
+- [#1444](https://github.com/FuelLabs/fuel-core/pull/1444): Add "sanity" benchmarks for memory opcodes.
+- [#1437](https://github.com/FuelLabs/fuel-core/pull/1437): Add some transaction throughput tests for basic transfers.
 - [#1436](https://github.com/FuelLabs/fuel-core/pull/1436): Add a github action to continuously test beta-4.
+- [#1433](https://github.com/FuelLabs/fuel-core/pull/1433): Add "sanity" benchmarks for flow opcodes.
 - [#1430](https://github.com/FuelLabs/fuel-core/pull/1430): Add "sanity" benchmarks for crypto opcodes.
-- [#1437](https://github.com/FuelLabs/fuel-core/pull/1437): Add some transaction throughput tests for basic transfers.
 - [#1432](https://github.com/FuelLabs/fuel-core/pull/1432): Add a new `--api-request-timeout` argument to control TTL for GraphQL requests.
 - [#1426](https://github.com/FuelLabs/fuel-core/pull/1426) Split keygen into a create and a binary
 - [#1419](https://github.com/FuelLabs/fuel-core/pull/1419): Add additional "sanity" benchmarks for arithmetic op code instructions.

benches/benches/block_target_gas.rs

@@ -3,6 +3,7 @@ use block_target_gas_set::{
     contract::run_contract,
     crypto::run_crypto,
     flow::run_flow,
+    memory::run_memory,
 };
 use criterion::{
     criterion_group,
@@ -183,6 +184,8 @@ fn block_target_gas(c: &mut Criterion) {
 
     run_flow(&mut group);
 
+    run_memory(&mut group);
+
     group.finish();
 }
 

benches/benches/block_target_gas_set/alu.rs

@@ -26,13 +26,6 @@ pub fn run_alu(group: &mut BenchmarkGroup<WallTime>) {
         vec![],
     );
 
-    run(
-        "alu/aloc opcode",
-        group,
-        [op::aloc(0x10), op::jmpb(RegId::ZERO, 0)].to_vec(),
-        vec![],
-    );
-
     run(
         "alu/and opcode",
         group,

benches/benches/block_target_gas_set/memory.rs

@@ -0,0 +1,293 @@
+use crate::{
+    utils::{
+        arb_dependent_cost_values,
+        set_full_word,
+    },
+    *,
+};
+
+// ALOC: Allocate memory
+// CFE: Extend call frame
+// CFEI: Extend call frame immediate
+// CFS: Shrink call frame
+// CFSI: Shrink call frame immediate
+// LB: Load byte
+// LW: Load word
+// MCL: Memory clear
+// MCLI: Memory clear immediate
+// MCP: Memory copy
+// MCPI: Memory copy immediate
+// MEQ: Memory equality
+// POPH: Pop a set of high registers from stack
+// POPL: Pop a set of low registers from stack
+// PSHH: Push a set of high registers to stack
+// PSHL: Push a set of low registers to stack
+// SB: Store byte
+// SW: Store word
+pub fn run_memory(group: &mut BenchmarkGroup<WallTime>) {
+    run(
+        "memory/aloc opcode",
+        group,
+        [
+            op::movi(0x10, 1000),
+            op::aloc(0x10),
+            op::jmpb(RegId::ZERO, 0),
+        ]
+        .to_vec(),
+        vec![],
+    );
+
+    // Extend by 10 10 times and then shrink by 100 once. This is to hopefully allow the extend to be
+    // the dominant opcode
+    run(
+        "memory/cfe opcode",
+        group,
+        vec![
+            op::movi(0x10, 10),
+            op::movi(0x11, 100),
+            op::cfe(0x10),
+            op::cfe(0x10),
+            op::cfe(0x10),
+            op::cfe(0x10),
+            op::cfe(0x10),
+            op::cfe(0x10),
+            op::cfe(0x10),
+            op::cfe(0x10),
+            op::cfe(0x10),
+            op::cfe(0x10),
+            op::cfs(0x11),
+            op::jmpb(RegId::ZERO, 10),
+        ],
+        vec![],
+    );
+
+    // Extend by 10 10 times and then shrink by 100 once. This is to hopefully allow the extend to be
+    // the dominant opcode
+    run(
+        "memory/cfei opcode",
+        group,
+        vec![
+            op::cfei(10),
+            op::cfei(10),
+            op::cfei(10),
+            op::cfei(10),
+            op::cfei(10),
+            op::cfei(10),
+            op::cfei(10),
+            op::cfei(10),
+            op::cfei(10),
+            op::cfei(10),
+            op::cfei(10),
+            op::cfsi(100),
+            op::jmpb(RegId::ZERO, 10),
+        ],
+        vec![],
+    );
+
+    // Extend by 100 once and then shrink by 10 10 times. This is to hopefully allow the shrink to
+    // be the dominant opcode
+    run(
+        "memory/cfs opcode",
+        group,
+        vec![
+            op::movi(0x10, 100),
+            op::movi(0x11, 10),
+            op::cfe(0x10),
+            op::cfs(0x11),
+            op::cfs(0x11),
+            op::cfs(0x11),
+            op::cfs(0x11),
+            op::cfs(0x11),
+            op::cfs(0x11),
+            op::cfs(0x11),
+            op::cfs(0x11),
+            op::cfs(0x11),
+            op::cfs(0x11),
+            op::jmpb(RegId::ZERO, 10),
+        ],
+        vec![],
+    );
+
+    // Extend by 100 once and then shrink by 10 10 times. This is to hopefully allow the shrink to
+    // be the dominant opcode
+    run(
+        "memory/cfsi opcode",
+        group,
+        vec![
+            op::cfei(100),
+            op::cfsi(10),
+            op::cfsi(10),
+            op::cfsi(10),
+            op::cfsi(10),
+            op::cfsi(10),
+            op::cfsi(10),
+            op::cfsi(10),
+            op::cfsi(10),
+            op::cfsi(10),
+            op::cfsi(10),
+            op::jmpb(RegId::ZERO, 10),
+        ],
+        vec![],
+    );
+
+    run(
+        "memory/lb opcode",
+        group,
+        [op::lb(0x10, RegId::ONE, 10), op::jmpb(RegId::ZERO, 0)].to_vec(),
+        vec![],
+    );
+
+    run(
+        "memory/lw opcode",
+        group,
+        [op::lw(0x10, RegId::ONE, 10), op::jmpb(RegId::ZERO, 0)].to_vec(),
+        vec![],
+    );
+
+    for i in arb_dependent_cost_values() {
+        let id = format!("memory/mcl opcode {:?}", i);
+        run(
+            &id,
+            group,
+            vec![
+                op::movi(0x11, i),
+                op::aloc(0x11),
+                op::move_(0x10, RegId::HP),
+                op::mcl(0x10, 0x11),
+                op::jmpb(RegId::ZERO, 0),
+            ],
+            vec![],
+        );
+    }
+
+    for i in arb_dependent_cost_values() {
+        let id = format!("memory/mcli opcode {:?}", i);
+        run(
+            &id,
+            group,
+            vec![
+                op::movi(0x11, i),
+                op::aloc(0x11),
+                op::move_(0x10, RegId::HP),
+                op::mcli(0x10, i),
+                op::jmpb(RegId::ZERO, 0),
+            ],
+            vec![],
+        );
+    }
+
+    for i in arb_dependent_cost_values() {
+        let id = format!("memory/mcp opcode {:?}", i);
+        run(
+            &id,
+            group,
+            vec![
+                op::movi(0x11, i),
+                op::aloc(0x11),
+                op::move_(0x10, RegId::HP),
+                op::mcp(0x10, RegId::ZERO, 0x11),
+                op::jmpb(RegId::ZERO, 0),
+            ],
+            vec![],
+        );
+    }
+
+    let valid_values: Vec<_> = arb_dependent_cost_values()
+        .iter()
+        .copied()
+        .take_while(|p| *p < (1 << 12)) // 12 bits
+        .collect();
+    for val in valid_values {
+        let id = format!("memory/mcpi opcode {:?}", val);
+        let val_as_u16 = (val).try_into().unwrap();
+        run(
+            &id,
+            group,
+            vec![
+                op::movi(0x11, val),
+                op::aloc(0x11),
+                op::move_(0x10, RegId::HP),
+                op::mcpi(0x10, RegId::ZERO, val_as_u16),
+                op::jmpb(RegId::ZERO, 0),
+            ],
+            vec![],
+        );
+    }
+
+    for i in arb_dependent_cost_values() {
+        let id = format!("memory/meq opcode {:?}", i);
+        let mut script = set_full_word(0x13, i as u64);
+        script.extend(vec![
+            op::meq(0x10, RegId::ZERO, RegId::ZERO, 0x13),
+            op::jmpb(RegId::ZERO, 0),
+        ]);
+        run(&id, group, script, vec![]);
+    }
+
+    let full_mask = (1 << 24) - 1;
+
+    // Assumes that `pshh` has a correct cost
+    run(
+        "memory/poph opcode",
+        group,
+        vec![
+            op::pshh(full_mask),
+            op::poph(full_mask),
+            op::jmpb(RegId::ZERO, 1),
+        ],
+        vec![],
+    );
+
+    // Assumes that `pshl` has a correct cost
+    run(
+        "memory/popl opcode",
+        group,
+        vec![
+            op::pshl(full_mask),
+            op::popl(full_mask),
+            op::jmpb(RegId::ZERO, 1),
+        ],
+        vec![],
+    );
+
+    run(
+        "memory/pshh opcode",
+        group,
+        vec![op::pshh(full_mask), op::jmpb(RegId::ZERO, 0)],
+        vec![],
+    );
+
+    run(
+        "memory/pshl opcode",
+        group,
+        vec![op::pshl(full_mask), op::jmpb(RegId::ZERO, 0)],
+        vec![],
+    );
+
+    run(
+        "memory/sb opcode",
+        group,
+        vec![
+            op::aloc(RegId::ONE),
+            op::move_(0x10, RegId::HP),
+            op::movi(0x11, 50),
+            op::sb(0x10, 0x11, 0),
+            op::jmpb(RegId::ZERO, 0),
+        ],
+        vec![],
+    );
+
+    run(
+        "memory/sw opcode",
+        group,
+        vec![
+            op::movi(0x10, 8),
+            op::aloc(0x10),
+            op::move_(0x10, RegId::HP),
+            op::movi(0x11, 50),
+            op::sw(0x10, 0x11, 0),
+            op::jmpb(RegId::ZERO, 0),
+        ],
+        vec![],
+    );
+}

benches/benches/block_target_gas_set/mod.rs

@@ -5,3 +5,5 @@ pub mod crypto;
 pub mod flow;
 
 pub mod contract;
+
+pub mod memory;

benches/benches/utils.rs

@@ -1,9 +1,15 @@
 use core::iter::successors;
 use ethnum::U256;
-use fuel_core_types::fuel_asm::{
-    op,
-    Instruction,
-    RegId,
+use fuel_core_types::{
+    fuel_asm::{
+        op,
+        Instruction,
+        RegId,
+    },
+    fuel_types::{
+        RegisterId,
+        Word,
+    },
 };
 
 /// Allocates a byte array from heap and initializes it. Then points `reg` to it.
@@ -37,3 +43,15 @@ pub fn arb_dependent_cost_values() -> Vec<u32> {
     linear.extend(l);
     linear
 }
+
+/// Set a register `r` to a Word-sized number value using left-shifts
+pub fn set_full_word(r: RegisterId, v: Word) -> Vec<Instruction> {
+    let r = u8::try_from(r).unwrap();
+    let mut ops = vec![op::movi(r, 0)];
+    for byte in v.to_be_bytes() {
+        ops.push(op::ori(r, r, byte as u16));
+        ops.push(op::slli(r, r, 8));
+    }
+    ops.pop().unwrap(); // Remove last shift
+    ops
+}