Merge branch 'espressif:master' into master

.gitlab/CODEOWNERS

@@ -140,6 +140,7 @@
 /components/protocomm/                @esp-idf-codeowners/app-utilities/provisioning
 /components/pthread/                  @esp-idf-codeowners/system
 /components/riscv/                    @esp-idf-codeowners/system
+/components/rt/                       @esp-idf-codeowners/system
 /components/sdmmc/                    @esp-idf-codeowners/storage
 /components/soc/                      @esp-idf-codeowners/peripherals @esp-idf-codeowners/system
 /components/spi_flash/                @esp-idf-codeowners/peripherals

.gitlab/ci/default-build-test-rules.yml

@@ -7,8 +7,8 @@
 #
 # This file should ONLY be used during bringup. Should be reset to empty after the bringup process
 extra_default_build_targets:
-  - esp32p4
   - esp32c5
+  - esp32c61
 
 bypass_check_test_targets:
   - esp32c61

.gitlab/ci/post_deploy.yml

@@ -3,6 +3,7 @@ generate_failed_jobs_report:
   tags: [build, shiny]
   image: $ESP_ENV_IMAGE
   when: always
+  dependencies: []  # Do not download artifacts from the previous stages
   artifacts:
     expire_in: 1 week
     when: always

CMakeLists.txt

@@ -136,6 +136,10 @@ if(CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE)
     list(APPEND compile_definitions "-DNDEBUG")
 endif()
 
+if(CONFIG_COMPILER_NO_MERGE_CONSTANTS)
+    list(APPEND compile_options "-fno-merge-constants")
+endif()
+
 if(CONFIG_COMPILER_STACK_CHECK_MODE_NORM)
     list(APPEND compile_options "-fstack-protector")
 elseif(CONFIG_COMPILER_STACK_CHECK_MODE_STRONG)

Kconfig

@@ -510,6 +510,15 @@ mainmenu "Espressif IoT Development Framework Configuration"
             help
                 Stack smashing protection.
 
+        config COMPILER_NO_MERGE_CONSTANTS
+            bool "Disable merging const sections"
+            depends on IDF_TOOLCHAIN_GCC
+            help
+                Disable merging identical constants (string/floating-point) across compilation units.
+                This helps in better size analysis of the application binary as the rodata section
+                distribution is more uniform across libraries. On downside, it may increase
+                the binary size and hence should be used during development phase only.
+
         config COMPILER_WARN_WRITE_STRINGS
             bool "Enable -Wwrite-strings warning flag"
             default "n"

components/app_trace/Kconfig

@@ -14,6 +14,7 @@ menu "Application Level Tracing"
 
         config APPTRACE_DEST_NONE
             bool "None"
+
     endchoice
 
     config APPTRACE_DEST_UART
@@ -60,7 +61,7 @@ menu "Application Level Tracing"
     endchoice
 
     config APPTRACE_UART_TX_GPIO
-        int "UART TX on GPIO#"
+        int "UART TX on GPIO<num>"
         depends on APPTRACE_DEST_UART_NOUSB
         range 0 46
         default 12 if IDF_TARGET_ESP32
@@ -70,7 +71,7 @@ menu "Application Level Tracing"
             This GPIO is used for UART TX pin.
 
     config APPTRACE_UART_RX_GPIO
-        int "UART RX on GPIO#"
+        int "UART RX on GPIO<num>"
         depends on APPTRACE_DEST_UART_NOUSB
         range 0 46
         default 13 if IDF_TARGET_ESP32
@@ -213,7 +214,7 @@ menu "Application Level Tracing"
             depends on APPTRACE_SV_ENABLE
             default APPTRACE_SV_DEST_JTAG
             help
-                SystemView witt transfer data trough defined interface.
+                SystemView will transfer data through the defined interface.
 
             config APPTRACE_SV_DEST_JTAG
                 bool "Data destination JTAG"

components/app_trace/test_apps/.build-test-rules.yml

@@ -8,6 +8,6 @@ components/app_trace/test_apps:
     - driver
     - esp_hw_support
   disable:
-    - if: IDF_TARGET == "esp32c5"
+    - if: IDF_TARGET in ["esp32c5", "esp32c61"]
       temporary: true
-      reason: not support yet # TODO: [ESP32C5] IDF-8705
+      reason: not support yet # TODO: [ESP32C5] IDF-8705, [ESP32C61] IDF-9306

components/app_update/test_apps/.build-test-rules.yml

@@ -2,6 +2,6 @@
 
 components/app_update/test_apps:
   disable:
-    - if: IDF_TARGET in ["esp32c5"]
+    - if: IDF_TARGET in ["esp32c5", "esp32c61"]
       temporary: true
-      reason: target esp32c5 is not supported yet  # TODO: [ESP32C5] IDF-8640, IDF-10317
+      reason: target esp32c5 is not supported yet  # TODO: [ESP32C5] IDF-8640, IDF-10317, [ESP32C61] IDF-9245

components/bootloader/Kconfig.log.format

@@ -28,9 +28,11 @@ menu "Format"
 
         config BOOTLOADER_LOG_TIMESTAMP_SOURCE_NONE
             bool "None"
-            depends on No  # hide it now, turn it on final MR
+            depends on NO_SYMBOL  # hide it now, turn it on final MR
+
         config BOOTLOADER_LOG_TIMESTAMP_SOURCE_CPU_TICKS
             bool "Milliseconds Since Boot"
+
     endchoice # BOOTLOADER_LOG_TIMESTAMP_SOURCE
 
 endmenu

components/bootloader/Kconfig.projbuild

@@ -145,7 +145,7 @@ menu "Bootloader config"
 
     config BOOTLOADER_FACTORY_RESET
         bool "GPIO triggers factory reset"
-        default N
+        default n
         select BOOTLOADER_RESERVE_RTC_MEM if SOC_RTC_FAST_MEM_SUPPORTED
         help
             Allows to reset the device to factory settings:
@@ -200,7 +200,7 @@ menu "Bootloader config"
 
     config BOOTLOADER_APP_TEST
         bool "GPIO triggers boot from test app partition"
-        default N
+        default n
         depends on !BOOTLOADER_APP_ANTI_ROLLBACK
         help
             Allows to run the test app from "TEST" partition.
@@ -763,7 +763,7 @@ menu "Security features"
     config SECURE_BOOT_ENABLE_AGGRESSIVE_KEY_REVOKE
         bool "Enable Aggressive key revoke strategy"
         depends on SECURE_BOOT && SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY
-        default N
+        default n
         help
             If this option is set, ROM bootloader will revoke the public key digest burned in efuse block
             if it fails to verify the signature of software bootloader with it.
@@ -779,7 +779,7 @@ menu "Security features"
     config SECURE_BOOT_FLASH_BOOTLOADER_DEFAULT
         bool "Flash bootloader along with other artifacts when using the default flash command"
         depends on SECURE_BOOT_V2_ENABLED && SECURE_BOOT_BUILD_SIGNED_BINARIES
-        default N
+        default n
         help
             When Secure Boot V2 is enabled, by default the bootloader is not flashed along with other artifacts
             like the application and the partition table images, i.e. bootloader has to be separately flashed
@@ -819,7 +819,7 @@ menu "Security features"
     config SECURE_BOOT_INSECURE
         bool "Allow potentially insecure options"
         depends on SECURE_BOOT
-        default N
+        default n
         help
             You can disable some of the default protections offered by secure boot, in order to enable testing or a
             custom combination of security features.
@@ -830,7 +830,7 @@ menu "Security features"
 
     config SECURE_FLASH_ENC_ENABLED
         bool "Enable flash encryption on boot (READ DOCS FIRST)"
-        default N
+        default n
         select SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE
         help
             If this option is set, flash contents will be encrypted by the bootloader on first boot.
@@ -917,7 +917,7 @@ menu "Security features"
         config SECURE_BOOT_ALLOW_ROM_BASIC
             bool "Leave ROM BASIC Interpreter available on reset"
             depends on (SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT) && IDF_TARGET_ESP32
-            default N
+            default n
             help
                 By default, the BASIC ROM Console starts on reset if no valid bootloader is
                 read from the flash.
@@ -932,7 +932,7 @@ menu "Security features"
             bool "Allow JTAG Debugging"
             depends on SECURE_BOOT_INSECURE || SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
             select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE
-            default N
+            default n
             help
                 If not set (default), the bootloader will permanently disable JTAG (across entire chip) on first boot
                 when either secure boot or flash encryption is enabled.
@@ -979,7 +979,7 @@ menu "Security features"
         config SECURE_BOOT_ALLOW_UNUSED_DIGEST_SLOTS
             bool "Leave unused digest slots available (not revoke)"
             depends on SECURE_BOOT_INSECURE && SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS
-            default N
+            default n
             help
                 If not set (default), during startup in the app all unused digest slots will be revoked.
                 To revoke unused slot will be called esp_efuse_set_digest_revoke(num_digest) for each digest.
@@ -998,7 +998,7 @@ menu "Security features"
             bool "Leave UART bootloader encryption enabled"
             depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
             select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE
-            default N
+            default n
             help
                 If not set (default), the bootloader will permanently disable UART bootloader encryption access on
                 first boot. If set, the UART bootloader will still be able to access hardware encryption.
@@ -1008,7 +1008,7 @@ menu "Security features"
         config SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC
             bool "Leave UART bootloader decryption enabled"
             depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && IDF_TARGET_ESP32
-            default N
+            default n
             help
                 If not set (default), the bootloader will permanently disable UART bootloader decryption access on
                 first boot. If set, the UART bootloader will still be able to access hardware decryption.
@@ -1020,7 +1020,7 @@ menu "Security features"
             bool "Leave UART bootloader flash cache enabled"
             depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT && \
                 (IDF_TARGET_ESP32 || SOC_EFUSE_DIS_DOWNLOAD_ICACHE || SOC_EFUSE_DIS_DOWNLOAD_DCACHE) # NOERROR
-            default N
+            default n
             select SECURE_FLASH_SKIP_WRITE_PROTECTION_CACHE if SECURE_FLASH_HAS_WRITE_PROTECTION_CACHE
             help
                 If not set (default), the bootloader will permanently disable UART bootloader flash cache access on
@@ -1031,7 +1031,7 @@ menu "Security features"
         config SECURE_FLASH_REQUIRE_ALREADY_ENABLED
             bool "Require flash encryption to be already enabled"
             depends on SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT
-            default N
+            default n
             help
                 If not set (default), and flash encryption is not yet enabled in eFuses, the 2nd stage bootloader
                 will enable flash encryption: generate the flash encryption key and program eFuses.

components/bootloader_support/src/flash_encrypt.c

@@ -13,8 +13,6 @@
 #include "esp_secure_boot.h"
 #include "hal/efuse_hal.h"
 
-//TODO:[ESP32C61] IDf-9232
-
 #if CONFIG_IDF_TARGET_ESP32
 #define CRYPT_CNT ESP_EFUSE_FLASH_CRYPT_CNT
 #define WR_DIS_CRYPT_CNT ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT

components/bootloader_support/test_apps/bootloader_support/README.md

@@ -1,2 +1,2 @@
-| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |

components/bt/CMakeLists.txt

@@ -117,6 +117,7 @@ if(CONFIG_BT_ENABLED)
             common/btc/include
             common/include
             porting/mem/
+            porting/include
         )
     list(APPEND include_dirs ${common_include_dirs})
 
@@ -573,29 +574,51 @@ if(CONFIG_BT_ENABLED)
 
 
     if(CONFIG_BT_LE_CONTROLLER_NPL_OS_PORTING_SUPPORT)
+        list(APPEND srcs
+                "porting/npl/freertos/src/npl_os_freertos.c"
+                "porting/mem/os_msys_init.c"
+                "porting/transport/src/hci_transport.c"
+        )
+
+        if(CONFIG_BT_CONTROLLER_DISABLED)
             list(APPEND srcs
-                    "porting/npl/freertos/src/npl_os_freertos.c"
-                    "porting/mem/os_msys_init.c"
+                "host/nimble/nimble/porting/nimble/src/hal_uart.c"
             )
-
-            if(CONFIG_BT_CONTROLLER_DISABLED)
+        elseif(CONFIG_BT_LE_HCI_INTERFACE_USE_RAM)
+            if(CONFIG_BT_NIMBLE_ENABLED)
                 list(APPEND srcs
-                        "host/nimble/nimble/porting/nimble/src/hal_uart.c"
-                    )
+                    "porting/transport/driver/vhci/hci_driver_nimble.c"
+                    "host/nimble/nimble/nimble/transport/esp_ipc/src/hci_esp_ipc.c"
+                )
+            else()
+                list(APPEND srcs
+                    "porting/transport/driver/vhci/hci_driver_standard.c"
+                )
             endif()
-            list(APPEND include_dirs
-                    porting/include
-                    porting/npl/freertos/include
-                    porting/transport/include
-            )
-
-            if(CONFIG_BT_LE_HCI_INTERFACE_USE_UART)
+        elseif(CONFIG_BT_LE_HCI_INTERFACE_USE_UART)
                 list(APPEND srcs
-                        "porting/transport/uart/hci_uart.c"
-                    )
+                    "porting/transport/driver/common/hci_driver_util.c"
+                    "porting/transport/driver/common/hci_driver_h4.c"
+                    "porting/transport/driver/common/hci_driver_mem.c"
+                    "porting/transport/driver/uart/hci_driver_uart_config.c"
+                )
+            if(CONFIG_BT_LE_UART_HCI_DMA_MODE)
+                list(APPEND srcs
+                    "porting/transport/driver/uart/hci_driver_uart_dma.c"
+                )
+            else()
+                list(APPEND srcs
+                    "porting/transport/driver/uart/hci_driver_uart.c"
+                )
             endif()
-    endif()
+        endif()
 
+        list(APPEND include_dirs
+                porting/include
+                porting/npl/freertos/include
+                porting/transport/include
+        )
+    endif()
 
     if(NOT (CONFIG_BT_LE_CRYPTO_STACK_MBEDTLS OR CONFIG_BT_NIMBLE_CRYPTO_STACK_MBEDTLS))
         list(APPEND include_dirs
@@ -621,7 +644,6 @@ if(CONFIG_BT_ENABLED)
     if(CONFIG_BT_NIMBLE_ENABLED)
 
         list(APPEND include_dirs
-
                     host/nimble/nimble/nimble/host/include
                     host/nimble/nimble/nimble/include
                     host/nimble/nimble/nimble/host/services/ans/include
@@ -725,10 +747,12 @@ if(CONFIG_BT_ENABLED)
                 "host/nimble/nimble/porting/npl/freertos/src/nimble_port_freertos.c"
                 "host/nimble/port/src/nvs_port.c"
             )
+
             list(APPEND include_dirs
                 host/nimble/nimble/porting/nimble/include
                 host/nimble/port/include
                 host/nimble/nimble/nimble/transport/include
+                host/nimble/nimble/nimble/include
             )
 
             if(CONFIG_BT_CONTROLLER_DISABLED)
@@ -762,6 +786,7 @@ if(CONFIG_BT_ENABLED)
         if(CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE AND CONFIG_BT_CONTROLLER_ENABLED)
             list(APPEND srcs
                 "host/nimble/esp-hci/src/esp_nimble_hci.c"
+                "host/nimble/nimble/nimble/transport/esp_ipc_legacy/src/hci_esp_ipc_legacy.c"
             )
             list(APPEND include_dirs ${nimble_hci_include_dirs})
         endif()