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cpu/msp430: update to modern gcc/ELF/newlib toolchain #12457

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merged 47 commits into from
Aug 5, 2020

Commits on Aug 5, 2020

  1. Revert "cpu/msp430_common: add real malloc/free functions"

    This reverts commit 419cedf.
    kaspar030 committed Aug 5, 2020
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  2. Revert "cpu/msp430_common: set top of heap for sbrk"

    This reverts commit 55f4331.
    kaspar030 committed Aug 5, 2020
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  30. gnrc_tcp: abs() -> labs() for int32_t

    Fixes compilation on msp430 and probably avr.
    kaspar030 committed Aug 5, 2020
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  33. cpu/msp430_common: add NOPs to irq functions

    They might not be necessary, but GCC warns if they're absent.
    Thus let's pay the one or two extra instructions for silencing the
    warnings.
    kaspar030 committed Aug 5, 2020
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  35. cpu/msp430_common: update thread_stack_init to changed ABI

    The old mspgcc used R15-R12 for args 0-3. The newer MSP430 EABI uses
    R12-15.
    
    See https://www.ti.com/lit/an/slaa664/slaa664.pdf for more details.
    kaspar030 committed Aug 5, 2020
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  44. cpu: remove cc430

    The only board with this chipset was the chronos, which has been
    removed.
    kaspar030 committed Aug 5, 2020
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  45. cpu/msp430_common: increase THREAD_STACKSIZE_DEFAULT to 384

    Both tests/pthread_tls and tests/prng_sha256prng fail without this, but
    other platforms run fine with their defaults. Lets consider the higher
    value a better default.
    kaspar030 committed Aug 5, 2020
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  46. tests/periph_gpio: bench port 1 on z1

    /* Port 1:
         *  P1.0 is not assigned by default
         *  P1.1 is the bootstrap-loader (BSL) TX pin -> input, special function, default to GND
         *       THIS PIN MUST *NEVER* BE USED IN NORMAL EXECUTION, SINCE IT INTERFERES WITH UART0 !!!
         *  P1.2 receives the FIFOP interrupt from CC2420 -> input, GPIO, default to GND
         *  P1.3 receives the FIFO/GIO0 interrupt from CC2420 -> input, GPIO, default to GND
         *  P1.4 receives the CCA/GIO1 signal from CC2420 -> input, GPIO, default to GND
         *  P1.5 is wired to Vcc -> input, GPIO, default to Vcc
         *  P1.6 receives interrupt INT1 from accelerometer -> input, GPIO, default to GND
         *  P1.7 receives interrupt INT2 from accelerometer -> input, GPIO, default to GND
         */
    
    (test starts indexing at 0)
    kaspar030 committed Aug 5, 2020
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