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[AMDGPU] Remove add/sub combines corrupting carry bit #91

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@vosen vosen commented May 20, 2024

Isel would apply optimizations in the form of uaddo_carry (add x, y), 0, cc => uaddo_carry x, y, cc. This preserves the correct addition result, but not correct cc bit. For large x and y it could set cc = 0 on the lhs and cc = 1 on the rhs

vosen added 2 commits May 20, 2024 17:27
Isel would apply optimizations in the form of uaddo_carry (add x, y), 0, cc => uaddo_carry x, y, cc. This preserves the correct addition result, but not correct cc bit. For large x and y it could set cc = 0 on the lhs and cc = 1 on the rhs
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waarmond commented Jun 5, 2024

@searlmc1 Have you seen this?

@searlmc1 searlmc1 deleted the branch ROCm:amd-staging June 14, 2024 20:54
@searlmc1 searlmc1 closed this Jun 14, 2024
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3 participants