Sysdk base kernel

arch/arm/boot/dts/imx6q-nitrogen6x.dts

@@ -42,6 +42,12 @@
  */
 
 /dts-v1/;
+
+/* Reserve last 64MB for TA to run properly, ideally it should be done
+   by bootloader/firmware.
+*/
+/memreserve/ 0x4c000000 0x4000000;
+
 #include "imx6q.dtsi"
 #include "imx6qdl-nitrogen6x.dtsi"
 

arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi

@@ -49,6 +49,7 @@
 	};
 
 	chosen {
+		bootargs = "console=ttymxc1,115200 root=/dev/mmcblk0p2 rw ip=none video=mxcfb0:dev=ldb,1024x600M@60,if=RGB666 video=mxcfb1:off video=mxcfb2:off loglevel=3 rootwait";
 		stdout-path = &uart2;
 	};
 

arch/arm/boot/dts/imx6qdl.dtsi

@@ -71,6 +71,11 @@
 		};
 	};
 
+	psci {
+		compatible      = "arm,psci-0.2";
+		method          = "smc";
+	};
+
 	soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -286,6 +291,13 @@
 			status = "disabled";
 		};
 
+		firmware {
+			optee {
+				compatible = "linaro,optee-tz";
+				method = "smc";
+                       };
+		};
+
 		aips-bus@02000000 { /* AIPS1 */
 			compatible = "fsl,aips-bus", "simple-bus";
 			#address-cells = <1>;

arch/arm/configs/nitrogen6x_defconfig

@@ -402,3 +402,7 @@ CONFIG_LIBCRC32C=y
 CONFIG_FONTS=y
 CONFIG_FONT_8x8=y
 CONFIG_FONT_8x16=y
+CONFIG_MX6_ADD_TIMER_OFFSET=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+CONFIG_ARM_PSCI=y

drivers/clocksource/Kconfig

@@ -532,6 +532,13 @@ config CLKSRC_IMX_GPT
 	depends on ARM && CLKDEV_LOOKUP
 	select CLKSRC_MMIO
 
+config MX6_ADD_TIMER_OFFSET
+	bool "Add bootloader time offset to kernel timer time"
+	default n
+	help
+	   Enabling this will using time since reset insted of time since
+	   timer init.
+
 config CLKSRC_IMX_TPM
 	bool "Clocksource using i.MX TPM" if COMPILE_TEST
 	depends on ARM && CLKDEV_LOOKUP && GENERIC_CLOCKEVENTS

drivers/clocksource/timer-imx-gpt.c

@@ -98,6 +98,16 @@ struct imx_gpt_data {
 			      struct clock_event_device *ced);
 };
 
+#if defined(CONFIG_MX6_ADD_TIMER_OFFSET)
+static s64 offset_ns = 0;
+
+/* Getter method of start time offset (IBC till now ) */
+inline s64 mxc_get_time_offset(void)
+{
+	return offset_ns;
+}
+#endif
+
 static inline struct imx_timer *to_imx_timer(struct clock_event_device *ced)
 {
 	return container_of(ced, struct imx_timer, ced);
@@ -505,6 +515,14 @@ static int __init mxc_timer_init_dt(struct device_node *np,  enum imx_gpt_type t
 
 	imxtm->type = type;
 
+/* Using time since reset insted of time since timer init. */
+#if defined(CONFIG_MX6_ADD_TIMER_OFFSET)
+	/* The GPT is running at 3MHz set from IBC. Thus, 1 tick is equivalent to 1/3 us (or 1us needs 3 ticks) */
+	offset_ns = (__raw_readl(imxtm->base + (V2_TCN)) / 3) * 1000 ;
+	pr_info("mxc_clocksource_init \n");
+	pr_info("Init and register the timer to the framework with a %lld ns offset. \n", offset_ns);
+#endif
+
 	ret = _mxc_timer_init(imxtm);
 	if (ret)
 		return ret;

include/linux/time.h

@@ -39,6 +39,10 @@ static inline int timeval_compare(const struct timeval *lhs, const struct timeva
 	return lhs->tv_usec - rhs->tv_usec;
 }
 
+#if defined(CONFIG_MX6_ADD_TIMER_OFFSET)
+extern s64 mxc_get_time_offset(void);
+#endif
+
 extern time64_t mktime64(const unsigned int year, const unsigned int mon,
 			const unsigned int day, const unsigned int hour,
 			const unsigned int min, const unsigned int sec);
@@ -167,6 +171,10 @@ static inline bool timespec_inject_offset_valid(const struct timespec *ts)
 extern u32 (*arch_gettimeoffset)(void);
 #endif
 
+#if defined(CONFIG_MX6_ADD_TIMER_OFFSET)
+extern s64 mxc_get_time_offset(void);
+#endif
+
 struct itimerval;
 extern int do_setitimer(int which, struct itimerval *value,
 			struct itimerval *ovalue);

kernel/time/timekeeping.c

@@ -658,6 +658,10 @@ static void timekeeping_forward_now(struct timekeeper *tk)
 	tk_normalize_xtime(tk);
 
 	nsec = clocksource_cyc2ns(delta, tk->tkr_raw.mult, tk->tkr_raw.shift);
+
+#if defined(CONFIG_MX6_ADD_TIMER_OFFSET)
+       	nsec += mxc_get_time_offset();
+#endif
 	timespec64_add_ns(&tk->raw_time, nsec);
 }