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Optimize >>> to ShiftRightLogical on arm64 (#85258)
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EgorBo committed Apr 24, 2023
1 parent 1f8d401 commit 48b5311
Showing 1 changed file with 6 additions and 0 deletions.
6 changes: 6 additions & 0 deletions src/coreclr/jit/hwintrinsicarm64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1519,6 +1519,8 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic,

case NI_Vector64_ShiftLeft:
case NI_Vector128_ShiftLeft:
case NI_Vector64_op_LeftShift:
case NI_Vector128_op_LeftShift:
{
assert(sig->numArgs == 2);

Expand All @@ -1531,6 +1533,8 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic,

case NI_Vector64_ShiftRightArithmetic:
case NI_Vector128_ShiftRightArithmetic:
case NI_Vector64_op_RightShift:
case NI_Vector128_op_RightShift:
{
assert(sig->numArgs == 2);
genTreeOps op = varTypeIsUnsigned(simdBaseType) ? GT_RSZ : GT_RSH;
Expand All @@ -1544,6 +1548,8 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic,

case NI_Vector64_ShiftRightLogical:
case NI_Vector128_ShiftRightLogical:
case NI_Vector64_op_UnsignedRightShift:
case NI_Vector128_op_UnsignedRightShift:
{
assert(sig->numArgs == 2);

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