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Fix failures on GNR for AVX10v1
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khushal1996 committed May 13, 2024
1 parent b55f3ea commit 9651e4e
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Showing 4 changed files with 4 additions and 0 deletions.
1 change: 1 addition & 0 deletions src/coreclr/jit/hwintrinsiccodegenxarch.cpp
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Expand Up @@ -760,6 +760,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
case InstructionSet_AVX512VBMI_VL:
case InstructionSet_AVX10v1:
case InstructionSet_AVX10v1_V256:
case InstructionSet_AVX10v1_V512:
{
genAvxFamilyIntrinsic(node, instOptions);
break;
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1 change: 1 addition & 0 deletions src/coreclr/jit/hwintrinsicxarch.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3670,6 +3670,7 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic,
case NI_AVX10v1_PermuteVar16x16:
case NI_AVX10v1_PermuteVar32x8:
case NI_AVX10v1_PermuteVar4x64:
case NI_AVX10v1_V512_PermuteVar64x8:
{
simdBaseJitType = getBaseJitTypeOfSIMDType(sig->retTypeSigClass);

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1 change: 1 addition & 0 deletions src/coreclr/jit/lowerxarch.cpp
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Expand Up @@ -10897,6 +10897,7 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node)
case NI_AVX512F_FixupScalar:
case NI_AVX512F_VL_Fixup:
case NI_AVX10v1_Fixup:
case NI_AVX10v1_FixupScalar:
{
if (!isContainedImm)
{
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1 change: 1 addition & 0 deletions src/coreclr/jit/lsraxarch.cpp
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Expand Up @@ -2593,6 +2593,7 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou
case NI_AVX10v1_PermuteVar4x64x2:
case NI_AVX10v1_PermuteVar8x32x2:
case NI_AVX10v1_PermuteVar16x16x2:
case NI_AVX10v1_V512_PermuteVar64x8x2:
{
assert(numArgs == 3);
assert(isRMW);
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