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JIT: Avoid xchg for resolution #81216

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64 changes: 45 additions & 19 deletions src/coreclr/jit/lsra.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -7386,12 +7386,15 @@ void LinearScan::insertSwap(
// available, and to handle that case appropriately.
// It is also up to the caller to cache the return value, as this is not cheap to compute.

regNumber LinearScan::getTempRegForResolution(BasicBlock* fromBlock, BasicBlock* toBlock, var_types type)
regNumber LinearScan::getTempRegForResolution(BasicBlock* fromBlock,
BasicBlock* toBlock,
var_types type,
VARSET_VALARG_TP sharedCriticalLiveSet)
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Please add a comment about sharedCriticalLiveSet in method summary.

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Whoops, added.

{
// TODO-Throughput: This would be much more efficient if we add RegToVarMaps instead of VarToRegMaps
// and they would be more space-efficient as well.
VarToRegMap fromVarToRegMap = getOutVarToRegMap(fromBlock->bbNum);
VarToRegMap toVarToRegMap = getInVarToRegMap(toBlock->bbNum);
VarToRegMap toVarToRegMap = toBlock == nullptr ? nullptr : getInVarToRegMap(toBlock->bbNum);

#ifdef TARGET_ARM
regMaskTP freeRegs;
Expand All @@ -7417,20 +7420,44 @@ regNumber LinearScan::getTempRegForResolution(BasicBlock* fromBlock, BasicBlock*
INDEBUG(freeRegs = stressLimitRegs(nullptr, freeRegs));

// We are only interested in the variables that are live-in to the "to" block.
VarSetOps::Iter iter(compiler, toBlock->bbLiveIn);
VarSetOps::Iter iter(compiler, toBlock == nullptr ? fromBlock->bbLiveOut : toBlock->bbLiveIn);
unsigned varIndex = 0;
while (iter.NextElem(&varIndex) && freeRegs != RBM_NONE)
{
regNumber fromReg = getVarReg(fromVarToRegMap, varIndex);
regNumber toReg = getVarReg(toVarToRegMap, varIndex);
assert(fromReg != REG_NA && toReg != REG_NA);
assert(fromReg != REG_NA);
if (fromReg != REG_STK)
{
freeRegs &= ~genRegMask(fromReg, getIntervalForLocalVar(varIndex)->registerType);
}
if (toReg != REG_STK)

if (toBlock != nullptr)
{
regNumber toReg = getVarReg(toVarToRegMap, varIndex);
assert(toReg != REG_NA);
if (toReg != REG_STK)
{
freeRegs &= ~genRegMask(toReg, getIntervalForLocalVar(varIndex)->registerType);
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}
}
}

if (toBlock == nullptr)
{
// Resolution of critical edge that was determined to be shared (i.e.
// all vars requiring resolution are going into the same registers for
// all successor edges).

VarSetOps::Iter iter(compiler, sharedCriticalLiveSet);
varIndex = 0;
while (iter.NextElem(&varIndex) && freeRegs != RBM_NONE)
{
freeRegs &= ~genRegMask(toReg, getIntervalForLocalVar(varIndex)->registerType);
regNumber reg = getVarReg(sharedCriticalVarToRegMap, varIndex);
assert(reg != REG_NA);
if (reg != REG_STK)
{
freeRegs &= ~genRegMask(reg, getIntervalForLocalVar(varIndex)->registerType);
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Suggested change
freeRegs &= ~genRegMask(reg, getIntervalForLocalVar(varIndex)->registerType);
freeRegs &= ~genRegMask(reg ARM_ARG( getIntervalForLocalVar(varIndex)->registerType));

}
}
}

Expand All @@ -7448,6 +7475,11 @@ regNumber LinearScan::getTempRegForResolution(BasicBlock* fromBlock, BasicBlock*
}
else
{
if ((freeRegs & RBM_CALLEE_TRASH) != 0)
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can you add a comment saying we prefer callee-trash registers among the available free temp registers to avoid prolog/epilog save/restore.

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Done.

{
freeRegs &= RBM_CALLEE_TRASH;
}

regNumber tempReg = genRegNumFromMask(genFindLowestBit(freeRegs));
return tempReg;
}
Expand Down Expand Up @@ -7940,7 +7972,6 @@ void LinearScan::resolveEdges()
// The resolutionCandidateVars set was initialized with all the lclVars that are live-in to
// any block. We now intersect that set with any lclVars that ever spilled or split.
// If there are no candidates for resolution, simply return.

VarSetOps::IntersectionD(compiler, resolutionCandidateVars, splitOrSpilledVars);
if (VarSetOps::IsEmpty(compiler, resolutionCandidateVars))
{
Expand Down Expand Up @@ -8194,32 +8225,29 @@ void LinearScan::resolveEdge(BasicBlock* fromBlock,
break;
}

#ifndef TARGET_XARCH
// We record tempregs for beginning and end of each block.
// For amd64/x86 we only need a tempReg for float - we'll use xchg for int.
// TODO-Throughput: It would be better to determine the tempRegs on demand, but the code below
// modifies the varToRegMaps so we don't have all the correct registers at the time
// we need to get the tempReg.
regNumber tempRegInt =
(resolveType == ResolveSharedCritical) ? REG_NA : getTempRegForResolution(fromBlock, toBlock, TYP_INT);
#endif // !TARGET_XARCH
regNumber tempRegInt = getTempRegForResolution(fromBlock, toBlock, TYP_INT, liveSet);
regNumber tempRegFlt = REG_NA;
#ifdef TARGET_ARM
regNumber tempRegDbl = REG_NA;
#endif
if ((compiler->compFloatingPointUsed) && (resolveType != ResolveSharedCritical))
if (compiler->compFloatingPointUsed)
{
#ifdef TARGET_ARM
// Try to reserve a double register for TYP_DOUBLE and use it for TYP_FLOAT too if available.
tempRegDbl = getTempRegForResolution(fromBlock, toBlock, TYP_DOUBLE);
tempRegDbl = getTempRegForResolution(fromBlock, toBlock, TYP_DOUBLE, liveSet);
if (tempRegDbl != REG_NA)
{
tempRegFlt = tempRegDbl;
}
else
#endif // TARGET_ARM
{
tempRegFlt = getTempRegForResolution(fromBlock, toBlock, TYP_FLOAT);
tempRegFlt = getTempRegForResolution(fromBlock, toBlock, TYP_FLOAT, liveSet);
}
}

Expand Down Expand Up @@ -8486,18 +8514,16 @@ void LinearScan::resolveEdge(BasicBlock* fromBlock,
tempReg = tempRegFlt;
}
#ifdef TARGET_XARCH
else
else if (tempRegInt == REG_NA)
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I didn't follow this change. What is this about?

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Previously we would always use xchg/swap. Now we only do that if we weren't able to get a temporary register.

{
useSwap = true;
}
#else // !TARGET_XARCH

#endif
else
{
tempReg = tempRegInt;
}

#endif // !TARGET_XARCH
if (useSwap || tempReg == REG_NA)
{
// First, we have to figure out the destination register for what's currently in fromReg,
Expand Down
5 changes: 4 additions & 1 deletion src/coreclr/jit/lsra.h
Original file line number Diff line number Diff line change
Expand Up @@ -1352,7 +1352,10 @@ class LinearScan : public LinearScanInterface
// the block)
VarToRegMap setInVarToRegMap(unsigned int bbNum, VarToRegMap srcVarToRegMap);

regNumber getTempRegForResolution(BasicBlock* fromBlock, BasicBlock* toBlock, var_types type);
regNumber getTempRegForResolution(BasicBlock* fromBlock,
BasicBlock* toBlock,
var_types type,
VARSET_VALARG_TP sharedCriticalLiveSet);

#ifdef DEBUG
void dumpVarToRegMap(VarToRegMap map);
Expand Down