Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

JIT: Handle half accesses for SIMDs in local morph #89520

Merged
merged 3 commits into from
Jul 27, 2023
Merged

JIT: Handle half accesses for SIMDs in local morph #89520

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
06b5d0a
JIT: Handle half/quarter accesses for SIMDs in local morph
jakobbotsch Jul 26, 2023
99a452e
Add a test for #89456
jakobbotsch Jul 27, 2023
10d9afb
Handle SIMD8 halves for ARM64, remove quarter handling
jakobbotsch Jul 27, 2023
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
129 changes: 100 additions & 29 deletions src/coreclr/jit/lclmorph.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -936,18 +936,45 @@ class LocalAddressVisitor final : public GenTreeVisitor<LocalAddressVisitor>
var_types elementType = indir->TypeGet();
lclNode = indir->gtGetOp1()->BashToLclVar(m_compiler, lclNum);

if (elementType == TYP_FLOAT)
switch (elementType)
{
GenTree* indexNode = m_compiler->gtNewIconNode(offset / genTypeSize(elementType));
hwiNode = m_compiler->gtNewSimdGetElementNode(elementType, lclNode, indexNode, CORINFO_TYPE_FLOAT,
genTypeSize(varDsc));
}
else
{
assert(elementType == TYP_SIMD12);
assert(genTypeSize(varDsc) == 16);
hwiNode = m_compiler->gtNewSimdHWIntrinsicNode(elementType, lclNode, NI_Vector128_AsVector3,
CORINFO_TYPE_FLOAT, 16);
case TYP_FLOAT:
{
GenTree* indexNode = m_compiler->gtNewIconNode(offset / genTypeSize(elementType));
hwiNode = m_compiler->gtNewSimdGetElementNode(elementType, lclNode, indexNode,
CORINFO_TYPE_FLOAT, genTypeSize(varDsc));
break;
}
case TYP_SIMD12:
{
assert(genTypeSize(varDsc) == 16);
hwiNode = m_compiler->gtNewSimdHWIntrinsicNode(elementType, lclNode, NI_Vector128_AsVector3,
CORINFO_TYPE_FLOAT, 16);
break;
}
case TYP_SIMD8:
#if defined(FEATURE_SIMD) && defined(TARGET_XARCH)
case TYP_SIMD16:
tannergooding marked this conversation as resolved.
Show resolved Hide resolved
case TYP_SIMD32:
#endif
{
assert(genTypeSize(elementType) * 2 == genTypeSize(varDsc));
if (offset == 0)
{
hwiNode = m_compiler->gtNewSimdGetLowerNode(elementType, lclNode, CORINFO_TYPE_FLOAT,
genTypeSize(varDsc));
}
else
{
assert(offset == genTypeSize(elementType));
hwiNode = m_compiler->gtNewSimdGetUpperNode(elementType, lclNode, CORINFO_TYPE_FLOAT,
genTypeSize(varDsc));
}

break;
}
default:
unreached();
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Are we confident that unreached() is "correct" here or can/should we simply bail out of the transformation?

The main consideration would probably be that Vector<T> and Vector64<T> are backed by ulong fields. That shouldn't normally be an issue, but with all the various Unsafe.As/BitCast and other tricks, I'm not positive its not possible to see something here still.

Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I think it's fine -- SelectLocalIndirTransform only returns WithElement/GetElement for the cases that we can handle here.

}

indir = hwiNode;
Expand All @@ -962,23 +989,50 @@ class LocalAddressVisitor final : public GenTreeVisitor<LocalAddressVisitor>
GenTree* simdLclNode = m_compiler->gtNewLclVarNode(lclNum);
GenTree* elementNode = indir->AsIndir()->Data();

if (elementType == TYP_FLOAT)
switch (elementType)
{
GenTree* indexNode = m_compiler->gtNewIconNode(offset / genTypeSize(elementType));
hwiNode =
m_compiler->gtNewSimdWithElementNode(varDsc->TypeGet(), simdLclNode, indexNode, elementNode,
CORINFO_TYPE_FLOAT, genTypeSize(varDsc));
}
else
{
assert(elementType == TYP_SIMD12);
assert(varDsc->TypeGet() == TYP_SIMD16);

// We inverse the operands here and take elementNode as the main value and simdLclNode[3] as the
// new value. This gives us a new TYP_SIMD16 with all elements in the right spots
GenTree* indexNode = m_compiler->gtNewIconNode(3, TYP_INT);
hwiNode = m_compiler->gtNewSimdWithElementNode(TYP_SIMD16, elementNode, indexNode, simdLclNode,
CORINFO_TYPE_FLOAT, 16);
case TYP_FLOAT:
{
GenTree* indexNode = m_compiler->gtNewIconNode(offset / genTypeSize(elementType));
hwiNode =
m_compiler->gtNewSimdWithElementNode(varDsc->TypeGet(), simdLclNode, indexNode, elementNode,
CORINFO_TYPE_FLOAT, genTypeSize(varDsc));
break;
}
case TYP_SIMD12:
{
assert(varDsc->TypeGet() == TYP_SIMD16);

// We inverse the operands here and take elementNode as the main value and simdLclNode[3] as the
// new value. This gives us a new TYP_SIMD16 with all elements in the right spots
GenTree* indexNode = m_compiler->gtNewIconNode(3, TYP_INT);
hwiNode = m_compiler->gtNewSimdWithElementNode(TYP_SIMD16, elementNode, indexNode, simdLclNode,
CORINFO_TYPE_FLOAT, 16);
break;
}
case TYP_SIMD8:
#if defined(FEATURE_SIMD) && defined(TARGET_XARCH)
case TYP_SIMD16:
case TYP_SIMD32:
#endif
{
assert(genTypeSize(elementType) * 2 == genTypeSize(varDsc));
if (offset == 0)
{
hwiNode = m_compiler->gtNewSimdWithLowerNode(varDsc->TypeGet(), simdLclNode, elementNode,
CORINFO_TYPE_FLOAT, genTypeSize(varDsc));
}
else
{
assert(offset == genTypeSize(elementType));
hwiNode = m_compiler->gtNewSimdWithUpperNode(varDsc->TypeGet(), simdLclNode, elementNode,
CORINFO_TYPE_FLOAT, genTypeSize(varDsc));
}

break;
}
default:
unreached();
}

indir->ChangeType(varDsc->TypeGet());
Expand Down Expand Up @@ -1112,9 +1166,10 @@ class LocalAddressVisitor final : public GenTreeVisitor<LocalAddressVisitor>
#ifdef FEATURE_HW_INTRINSICS
if (varTypeIsSIMD(varDsc))
{
// We have two cases we want to handle:
// We have three cases we want to handle:
// 1. Vector2/3/4 and Quaternion where we have 4x float fields
// 2. Plane where we have 1x Vector3 and 1x float field
// 3. Accesses of halves of larger SIMD types

if (indir->TypeIs(TYP_FLOAT))
{
Expand All @@ -1125,11 +1180,27 @@ class LocalAddressVisitor final : public GenTreeVisitor<LocalAddressVisitor>
}
else if (indir->TypeIs(TYP_SIMD12))
{
if ((offset == 0) && m_compiler->IsBaselineSimdIsaSupported())
if ((offset == 0) && (varDsc->TypeGet() == TYP_SIMD16) && m_compiler->IsBaselineSimdIsaSupported())
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

We could adjust this to handle TYP_SIMD32/TYP_SIMD64 if desired, correct? Just not worth it as part of this PR?

Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Yeah, let's leave that for a separate PR if desired. This was just a drive-by fix for #89456.

{
return isDef ? IndirTransform::WithElement : IndirTransform::GetElement;
}
}
#ifdef TARGET_ARM64
else if (indir->TypeIs(TYP_SIMD8))
{
if ((varDsc->TypeGet() == TYP_SIMD16) && ((offset % 8) == 0))
{
return isDef ? IndirTransform::WithElement : IndirTransform::GetElement;
}
}
#endif
#if defined(FEATURE_SIMD) && defined(TARGET_XARCH)
else if (indir->TypeIs(TYP_SIMD16, TYP_SIMD32) && (genTypeSize(indir) * 2 == genTypeSize(varDsc)) &&
((offset % genTypeSize(indir)) == 0))
{
return isDef ? IndirTransform::WithElement : IndirTransform::GetElement;
}
#endif // FEATURE_SIMD && TARGET_XARCH
}
#endif // FEATURE_HW_INTRINSICS

Expand Down
36 changes: 36 additions & 0 deletions src/tests/JIT/Regression/JitBlue/Runtime_89456/Runtime_89456.cs
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,36 @@
// Licensed to the .NET Foundation under one or more agreements.
// The .NET Foundation licenses this file to you under the MIT license.

using System.Numerics;
using System.Runtime.CompilerServices;
using System.Runtime.Intrinsics;
using Xunit;

public class Runtime_89456
{
[MethodImpl(MethodImplOptions.NoInlining)]
private static Vector3 Reinterp128(Vector128<float> v)
{
return Unsafe.As<Vector128<float>, Vector3>(ref v);
}

[MethodImpl(MethodImplOptions.NoInlining)]
private static Vector3 Reinterp256(Vector256<float> v)
{
return Unsafe.As<Vector256<float>, Vector3>(ref v);
}

[MethodImpl(MethodImplOptions.NoInlining)]
private static Vector3 Reinterp512(Vector512<float> v)
{
return Unsafe.As<Vector512<float>, Vector3>(ref v);
}

[Fact]
public static void TestEntryPoint()
{
Reinterp128(default);
Reinterp256(default);
Reinterp512(default);
}
}
8 changes: 8 additions & 0 deletions src/tests/JIT/Regression/JitBlue/Runtime_89456/Runtime_89456.csproj
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
<Project Sdk="Microsoft.NET.Sdk">
<PropertyGroup>
<Optimize>True</Optimize>
</PropertyGroup>
<ItemGroup>
<Compile Include="$(MSBuildProjectName).cs" />
</ItemGroup>
</Project>
Loading