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Emit armv8.4 ldapur* for volatile loads with contained offsets #89681
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Original file line number | Diff line number | Diff line change |
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@@ -1157,7 +1157,9 @@ emitAttr emitter::emitInsTargetRegSize(instrDesc* id) | |
case INS_ldrb: | ||
case INS_strb: | ||
case INS_ldurb: | ||
case INS_ldapurb: | ||
case INS_sturb: | ||
case INS_stlurb: | ||
result = EA_4BYTE; | ||
break; | ||
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||
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@@ -1172,6 +1174,8 @@ emitAttr emitter::emitInsTargetRegSize(instrDesc* id) | |
case INS_strh: | ||
case INS_ldurh: | ||
case INS_sturh: | ||
case INS_ldapurh: | ||
case INS_stlurh: | ||
result = EA_4BYTE; | ||
break; | ||
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@@ -1209,6 +1213,8 @@ emitAttr emitter::emitInsTargetRegSize(instrDesc* id) | |
case INS_str: | ||
case INS_ldur: | ||
case INS_stur: | ||
case INS_ldapur: | ||
case INS_stlur: | ||
result = id->idOpSize(); | ||
break; | ||
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@@ -1237,7 +1243,9 @@ emitAttr emitter::emitInsLoadStoreSize(instrDesc* id) | |
case INS_ldrb: | ||
case INS_strb: | ||
case INS_ldurb: | ||
case INS_ldapurb: | ||
case INS_sturb: | ||
case INS_stlurb: | ||
case INS_ldrsb: | ||
case INS_ldursb: | ||
result = EA_1BYTE; | ||
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@@ -1252,6 +1260,8 @@ emitAttr emitter::emitInsLoadStoreSize(instrDesc* id) | |
case INS_sturh: | ||
case INS_ldrsh: | ||
case INS_ldursh: | ||
case INS_ldapurh: | ||
case INS_stlurh: | ||
result = EA_2BYTE; | ||
break; | ||
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@@ -1275,6 +1285,8 @@ emitAttr emitter::emitInsLoadStoreSize(instrDesc* id) | |
case INS_str: | ||
case INS_ldur: | ||
case INS_stur: | ||
case INS_ldapur: | ||
case INS_stlur: | ||
result = id->idOpSize(); | ||
break; | ||
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@@ -2372,6 +2384,12 @@ emitter::code_t emitter::emitInsCode(instruction ins, insFormat fmt) | |
return false; | ||
} | ||
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// true if this 'imm' can be encoded as the offset in an unscaled ldr/str instruction | ||
/*static*/ bool emitter::emitIns_valid_imm_for_unscaled_ldst_offset(INT64 imm) | ||
{ | ||
return (imm >= -256) && (imm <= 255); | ||
} | ||
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// true if this 'imm' can be encoded as the offset in a ldr/str instruction | ||
/*static*/ bool emitter::emitIns_valid_imm_for_ldst_offset(INT64 imm, emitAttr attr) | ||
{ | ||
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@@ -5505,6 +5523,8 @@ void emitter::emitIns_R_R_I( | |
isLdSt = true; | ||
break; | ||
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case INS_ldapurb: | ||
case INS_stlurb: | ||
case INS_ldurb: | ||
case INS_sturb: | ||
// size is ignored | ||
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@@ -5522,7 +5542,9 @@ void emitter::emitIns_R_R_I( | |
break; | ||
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case INS_ldurh: | ||
case INS_ldapurh: | ||
case INS_sturh: | ||
case INS_stlurh: | ||
// size is ignored | ||
unscaledOp = true; | ||
scale = 0; | ||
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@@ -5550,6 +5572,8 @@ void emitter::emitIns_R_R_I( | |
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case INS_ldur: | ||
case INS_stur: | ||
case INS_ldapur: | ||
case INS_stlur: | ||
// Is the target a vector register? | ||
if (isVectorRegister(reg1)) | ||
{ | ||
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@@ -8813,8 +8837,6 @@ void emitter::emitIns_Call(EmitCallType callType, | |
{ | ||
/* This is an indirect call (either a virtual call or func ptr call) */ | ||
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id->idSetIsCallRegPtr(); | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Why was this removed for arm32? There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I mentioned it in https://github.com/dotnet/runtime/pull/89681/files#r1278410873 comment, basically, it sets a bit that is unused for arm, so I removed that bit because I needed to extend |
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if (isJump) | ||
{ | ||
ins = INS_br_tail; // INS_br_tail Reg | ||
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I added a bit here since we now have more than 512 instructions (and that for sure will be increasing in future) but I also removed an used (on arm)
_idCallRegPtr
bit so the total size of the struct remains the same - 16b