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Add core power labels to caravel and caravan top level layouts #367

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RTimothyEdwards
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Modified the "create_top_pins.sh" script to also add the labels (not pins) for the core power signals (e.g., vdda_core). This is necessary for caravan in particular for user projects to pass precheck. Ran the script to create the core power labels for both caravel and caravan. Note that this also fixes incorrect use references in caravel.mag. Moved two port labels in the caravel power routing cell down so that they are not the first to be discovered with using "goto" in the label generation script; otherwise the pin generation script will pick a label on top of a spare logic cell and then copy up extra unwanted labels from the spare cell.

(not pins) for the core power signals (e.g., vdda_core).  This is
necessary for caravan in particular for user projects to pass
precheck.
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Caravel and Caravan top level layouts missing core power labels
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