Merge branch 'bugfix/esp_timer_prevents_delay_for_isr_dispatch_callba…

…cks_v5.1' into 'release/v5.1'

fix(esp_timer): Fix delay in ISR dispatch callbacks (v5.1)

See merge request espressif/esp-idf!25471

components/esp_pm/linker.lf

@@ -44,13 +44,11 @@ entries:
 archive: libesp_timer.a
 entries:
     if PM_SLP_IRAM_OPT = y:
+        esp_timer_impl_common:esp_timer_impl_lock (noflash)
+        esp_timer_impl_common:esp_timer_impl_unlock (noflash)
         if ESP_TIMER_IMPL_TG0_LAC = y:
-            esp_timer_impl_lac:esp_timer_impl_lock (noflash)
-            esp_timer_impl_lac:esp_timer_impl_unlock (noflash)
             esp_timer_impl_lac:esp_timer_impl_advance (noflash)
         elif ESP_TIMER_IMPL_SYSTIMER = y:
-            esp_timer_impl_systimer:esp_timer_impl_lock (noflash)
-            esp_timer_impl_systimer:esp_timer_impl_unlock (noflash)
             esp_timer_impl_systimer:esp_timer_impl_advance (noflash)
 
 [mapping:newlib_pm]

components/esp_timer/CMakeLists.txt

@@ -2,7 +2,8 @@ idf_build_get_property(target IDF_TARGET)
 
 set(srcs "src/esp_timer.c"
          "src/ets_timer_legacy.c"
-         "src/system_time.c")
+         "src/system_time.c"
+         "src/esp_timer_impl_common.c")
 
 if(CONFIG_ESP_TIMER_IMPL_TG0_LAC)
     list(APPEND srcs "src/esp_timer_impl_lac.c")

components/esp_timer/private_include/esp_timer_impl.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -142,3 +142,12 @@ uint64_t esp_timer_impl_get_alarm_reg(void);
  */
 void esp_timer_impl_init_system_time(void);
 #endif
+
+#if CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
+/**
+ * @brief Set the next alarm if there is such an alarm in the cached array.
+ *
+ * @note Available only when CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD is enabled.
+ */
+void esp_timer_impl_try_to_set_next_alarm(void);
+#endif

components/esp_timer/src/esp_timer.c

@@ -492,6 +492,7 @@ static void IRAM_ATTR timer_alarm_handler(void* arg)
     bool isr_timers_processed = false;
 
 #ifdef CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
+    esp_timer_impl_try_to_set_next_alarm();
     // process timers with ISR dispatch method
     isr_timers_processed = timer_process_alarm(ESP_TIMER_ISR);
     xHigherPriorityTaskWoken = s_isr_dispatch_need_yield;

components/esp_timer/src/esp_timer_impl_common.c

@@ -0,0 +1,70 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "esp_timer_impl.h"
+#include "esp_timer.h"
+#include "esp_err.h"
+#include "esp_task.h"
+#include "esp_attr.h"
+
+/* Spinlock used to protect access to the hardware registers. */
+portMUX_TYPE s_time_update_lock = portMUX_INITIALIZER_UNLOCKED;
+
+/* Alarm values to generate interrupt on match
+ * [0] - for ESP_TIMER_TASK alarms,
+ * [1] - for ESP_TIMER_ISR alarms.
+*/
+uint64_t timestamp_id[2] = { UINT64_MAX, UINT64_MAX };
+
+void esp_timer_impl_lock(void)
+{
+    portENTER_CRITICAL(&s_time_update_lock);
+}
+
+void esp_timer_impl_unlock(void)
+{
+    portEXIT_CRITICAL(&s_time_update_lock);
+}
+
+void esp_timer_private_lock(void) __attribute__((alias("esp_timer_impl_lock")));
+void esp_timer_private_unlock(void) __attribute__((alias("esp_timer_impl_unlock")));
+
+void IRAM_ATTR esp_timer_impl_set_alarm(uint64_t timestamp)
+{
+    esp_timer_impl_set_alarm_id(timestamp, 0);
+}
+
+#ifdef CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD
+void IRAM_ATTR esp_timer_impl_try_to_set_next_alarm(void) {
+    portENTER_CRITICAL_ISR(&s_time_update_lock);
+    unsigned now_alarm_idx;  // ISR is called due to this current alarm
+    unsigned next_alarm_idx; // The following alarm after now_alarm_idx
+    if (timestamp_id[0] < timestamp_id[1]) {
+        now_alarm_idx = 0;
+        next_alarm_idx = 1;
+    } else {
+        now_alarm_idx = 1;
+        next_alarm_idx = 0;
+    }
+
+    if (timestamp_id[next_alarm_idx] != UINT64_MAX) {
+        // The following alarm is valid and can be used.
+        // Remove the current alarm from consideration.
+        esp_timer_impl_set_alarm_id(UINT64_MAX, now_alarm_idx);
+    } else {
+        // There is no the following alarm.
+        // Remove the current alarm from consideration as well.
+        timestamp_id[now_alarm_idx] = UINT64_MAX;
+    }
+    portEXIT_CRITICAL_ISR(&s_time_update_lock);
+}
+#endif
+
+/* FIXME: This value is safe for 80MHz APB frequency, should be modified to depend on clock frequency. */
+uint64_t IRAM_ATTR esp_timer_impl_get_min_period_us(void)
+{
+    return 50;
+}

components/esp_timer/src/esp_timer_impl_lac.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -99,18 +99,10 @@ static intr_handle_t s_timer_interrupt_handle[ISR_HANDLERS] = { NULL };
 static intr_handler_t s_alarm_handler = NULL;
 
 /* Spinlock used to protect access to the hardware registers. */
-portMUX_TYPE s_time_update_lock = portMUX_INITIALIZER_UNLOCKED;
+extern portMUX_TYPE s_time_update_lock;
 
-
-void esp_timer_impl_lock(void)
-{
-    portENTER_CRITICAL(&s_time_update_lock);
-}
-
-void esp_timer_impl_unlock(void)
-{
-    portEXIT_CRITICAL(&s_time_update_lock);
-}
+/* Alarm values to generate interrupt on match */
+extern uint64_t timestamp_id[2];
 
 uint64_t IRAM_ATTR esp_timer_impl_get_counter_reg(void)
 {
@@ -152,7 +144,7 @@ int64_t esp_timer_get_time(void) __attribute__((alias("esp_timer_impl_get_time")
 
 void IRAM_ATTR esp_timer_impl_set_alarm_id(uint64_t timestamp, unsigned alarm_id)
 {
-    static uint64_t timestamp_id[2] = { UINT64_MAX, UINT64_MAX };
+    assert(alarm_id < sizeof(timestamp_id) / sizeof(timestamp_id[0]));
     portENTER_CRITICAL_SAFE(&s_time_update_lock);
     timestamp_id[alarm_id] = timestamp;
     timestamp = MIN(timestamp_id[0], timestamp_id[1]);
@@ -180,16 +172,12 @@ void IRAM_ATTR esp_timer_impl_set_alarm_id(uint64_t timestamp, unsigned alarm_id
     portEXIT_CRITICAL_SAFE(&s_time_update_lock);
 }
 
-void IRAM_ATTR esp_timer_impl_set_alarm(uint64_t timestamp)
-{
-    esp_timer_impl_set_alarm_id(timestamp, 0);
-}
-
 static void IRAM_ATTR timer_alarm_isr(void *arg)
 {
 #if ISR_HANDLERS == 1
     /* Clear interrupt status */
     REG_WRITE(INT_CLR_REG, TIMG_LACT_INT_CLR);
+
     /* Call the upper layer handler */
     (*s_alarm_handler)(arg);
 #else
@@ -333,12 +321,6 @@ void esp_timer_impl_deinit(void)
     s_alarm_handler = NULL;
 }
 
-/* FIXME: This value is safe for 80MHz APB frequency, should be modified to depend on clock frequency. */
-uint64_t IRAM_ATTR esp_timer_impl_get_min_period_us(void)
-{
-    return 50;
-}
-
 uint64_t esp_timer_impl_get_alarm_reg(void)
 {
     portENTER_CRITICAL_SAFE(&s_time_update_lock);
@@ -353,5 +335,3 @@ uint64_t esp_timer_impl_get_alarm_reg(void)
 void esp_timer_private_update_apb_freq(uint32_t apb_ticks_per_us) __attribute__((alias("esp_timer_impl_update_apb_freq")));
 void esp_timer_private_set(uint64_t new_us) __attribute__((alias("esp_timer_impl_set")));
 void esp_timer_private_advance(int64_t time_diff_us) __attribute__((alias("esp_timer_impl_advance")));
-void esp_timer_private_lock(void) __attribute__((alias("esp_timer_impl_lock")));
-void esp_timer_private_unlock(void) __attribute__((alias("esp_timer_impl_unlock")));

components/esp_timer/src/esp_timer_impl_systimer.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -55,17 +55,10 @@ static intr_handler_t s_alarm_handler = NULL;
 static systimer_hal_context_t systimer_hal;
 
 /* Spinlock used to protect access to the hardware registers. */
-static portMUX_TYPE s_time_update_lock = portMUX_INITIALIZER_UNLOCKED;
+extern portMUX_TYPE s_time_update_lock;
 
-void esp_timer_impl_lock(void)
-{
-    portENTER_CRITICAL(&s_time_update_lock);
-}
-
-void esp_timer_impl_unlock(void)
-{
-    portEXIT_CRITICAL(&s_time_update_lock);
-}
+/* Alarm values to generate interrupt on match */
+extern uint64_t timestamp_id[2];
 
 uint64_t IRAM_ATTR esp_timer_impl_get_counter_reg(void)
 {
@@ -83,19 +76,14 @@ int64_t esp_timer_get_time(void) __attribute__((alias("esp_timer_impl_get_time")
 
 void IRAM_ATTR esp_timer_impl_set_alarm_id(uint64_t timestamp, unsigned alarm_id)
 {
-    static uint64_t timestamp_id[2] = { UINT64_MAX, UINT64_MAX };
+    assert(alarm_id < sizeof(timestamp_id) / sizeof(timestamp_id[0]));
     portENTER_CRITICAL_SAFE(&s_time_update_lock);
     timestamp_id[alarm_id] = timestamp;
     timestamp = MIN(timestamp_id[0], timestamp_id[1]);
     systimer_hal_set_alarm_target(&systimer_hal, SYSTIMER_ALARM_ESPTIMER, timestamp);
     portEXIT_CRITICAL_SAFE(&s_time_update_lock);
 }
 
-void IRAM_ATTR esp_timer_impl_set_alarm(uint64_t timestamp)
-{
-    esp_timer_impl_set_alarm_id(timestamp, 0);
-}
-
 static void IRAM_ATTR timer_alarm_isr(void *arg)
 {
 #if ISR_HANDLERS == 1
@@ -244,11 +232,6 @@ void esp_timer_impl_deinit(void)
     s_alarm_handler = NULL;
 }
 
-uint64_t IRAM_ATTR esp_timer_impl_get_min_period_us(void)
-{
-    return 50;
-}
-
 uint64_t esp_timer_impl_get_alarm_reg(void)
 {
     portENTER_CRITICAL_SAFE(&s_time_update_lock);
@@ -260,5 +243,3 @@ uint64_t esp_timer_impl_get_alarm_reg(void)
 void esp_timer_private_update_apb_freq(uint32_t apb_ticks_per_us) __attribute__((alias("esp_timer_impl_update_apb_freq")));
 void esp_timer_private_set(uint64_t new_us) __attribute__((alias("esp_timer_impl_set")));
 void esp_timer_private_advance(int64_t time_diff_us) __attribute__((alias("esp_timer_impl_advance")));
-void esp_timer_private_lock(void) __attribute__((alias("esp_timer_impl_lock")));
-void esp_timer_private_unlock(void) __attribute__((alias("esp_timer_impl_unlock")));

components/esp_timer/test_apps/main/test_esp_timer.c

@@ -1216,4 +1216,73 @@ TEST_CASE("Test that CPU1 can handle esp_timer ISR even when CPU0 is blocked", "
     TEST_ESP_OK(esp_timer_delete(timer));
 }
 #endif // not CONFIG_FREERTOS_UNICORE
+
+volatile uint64_t task_t1;
+volatile uint64_t isr_t1;
+const uint64_t period_task_ms = 200;
+const uint64_t period_isr_ms = 20;
+
+void task_timer_cb(void *arg) {
+    uint64_t t2 = esp_timer_get_time();
+    uint64_t dt_task_ms = (t2 - task_t1) / 1000;
+    task_t1 = t2;
+    printf("task callback, %d msec\n", (int)dt_task_ms);
+    vTaskDelay((period_task_ms / 2) / portTICK_PERIOD_MS);  // very long callback in timer task
+    static bool first_run = true;
+    if (first_run) {
+        first_run = false;
+    } else {
+        TEST_ASSERT_INT_WITHIN(period_task_ms / 3, period_task_ms, dt_task_ms);
+    }
+}
+
+void IRAM_ATTR isr_timer_cb(void *arg) {
+    uint64_t t2 = esp_timer_get_time();
+    uint64_t dt_isr_ms = (t2 - isr_t1) / 1000;
+    isr_t1 = t2;
+    esp_rom_printf("isr callback, %d msec\n", (int)dt_isr_ms);
+    static bool first_run = true;
+    if (first_run) {
+        first_run = false;
+    } else {
+        TEST_ASSERT_INT_WITHIN(period_isr_ms / 3, period_isr_ms, dt_isr_ms);
+    }
+}
+
+TEST_CASE("Test ISR dispatch callbacks are not blocked even if TASK callbacks take more time", "[esp_timer][isr_dispatch]")
+{
+    esp_timer_handle_t task_timer_handle;
+    esp_timer_handle_t isr_timer_handle;
+
+    const esp_timer_create_args_t task_timer_args = {
+        .callback = &task_timer_cb,
+        .arg = NULL,
+        .dispatch_method = ESP_TIMER_TASK,
+        .name = "task_timer",
+        .skip_unhandled_events = true,
+    };
+
+    const esp_timer_create_args_t isr_timer_args = {
+        .callback = &isr_timer_cb,
+        .arg = NULL,
+        .dispatch_method = ESP_TIMER_ISR,
+        .name = "isr_timer",
+        .skip_unhandled_events = true,
+    };
+
+    ESP_ERROR_CHECK(esp_timer_create(&task_timer_args, &task_timer_handle));
+    ESP_ERROR_CHECK(esp_timer_create(&isr_timer_args, &isr_timer_handle));
+    ESP_ERROR_CHECK(esp_timer_start_periodic(task_timer_handle, period_task_ms * 1000));
+    task_t1 = esp_timer_get_time();
+    ESP_ERROR_CHECK(esp_timer_start_periodic(isr_timer_handle, period_isr_ms * 1000));
+    isr_t1 = esp_timer_get_time();
+
+    vTaskDelay(period_task_ms * 5 / portTICK_PERIOD_MS);
+
+    TEST_ESP_OK(esp_timer_stop(task_timer_handle));
+    TEST_ESP_OK(esp_timer_stop(isr_timer_handle));
+    TEST_ESP_OK(esp_timer_delete(task_timer_handle));
+    TEST_ESP_OK(esp_timer_delete(isr_timer_handle));
+}
+
 #endif // CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD

components/esp_timer/test_apps/pytest_esp_timer_ut.py

@@ -10,6 +10,7 @@
     pytest.param('single_core', marks=[pytest.mark.esp32]),
     pytest.param('freertos_compliance', marks=[pytest.mark.esp32]),
     pytest.param('isr_dispatch_esp32', marks=[pytest.mark.esp32]),
+    pytest.param('isr_dispatch_esp32c3', marks=[pytest.mark.esp32c3]),
     pytest.param('cpu1_esp32', marks=[pytest.mark.esp32]),
     pytest.param('any_cpu_esp32', marks=[pytest.mark.esp32]),
     pytest.param('cpu1_esp32s3', marks=[pytest.mark.esp32s3]),

components/esp_timer/test_apps/sdkconfig.ci.isr_dispatch_esp32c3

@@ -0,0 +1,2 @@
+CONFIG_IDF_TARGET="esp32c3"
+CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD=y