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Revert "[Driver] Arbitrary precision integers are only for FPGA (#13379)" #13729

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May 10, 2024
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4 changes: 1 addition & 3 deletions clang/lib/Driver/ToolChains/Clang.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -10380,6 +10380,7 @@ static void getOtherSPIRVTransOpts(Compilation &C,
",+SPV_INTEL_fpga_reg,+SPV_INTEL_blocking_pipes"
",+SPV_INTEL_function_pointers,+SPV_INTEL_kernel_attributes"
",+SPV_INTEL_io_pipes,+SPV_INTEL_inline_assembly"
",+SPV_INTEL_arbitrary_precision_integers"
",+SPV_INTEL_float_controls2,+SPV_INTEL_vector_compute"
",+SPV_INTEL_fast_composite"
",+SPV_INTEL_arbitrary_precision_fixed_point"
Expand Down Expand Up @@ -10412,9 +10413,6 @@ static void getOtherSPIRVTransOpts(Compilation &C,
",+SPV_INTEL_tensor_float32_conversion"
",+SPV_INTEL_optnone"
",+SPV_KHR_non_semantic_info";
if (C.getDriver().IsFPGAHWMode() || C.getDriver().IsFPGAEmulationMode())
ExtArg += ",+SPV_INTEL_arbitrary_precision_integers";

if (IsCPU)
ExtArg += ",+SPV_INTEL_fp_max_error";

Expand Down
21 changes: 9 additions & 12 deletions clang/test/Driver/sycl-spirv-ext.c
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64-unknown-unknown %s -### 2>&1 \
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_fpga-unknown-unknown %s -### 2>&1 \
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT,CHECK-FPGA-EMULATION
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT
// RUN: %clang -target x86_64-unknown-linux-gnu -fintelfpga %s -### 2>&1 \
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT,CHECK-FPGA-EMULATION
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_fpga-unknown-unknown -Xshardware %s -### 2>&1 \
// RUN: | FileCheck %s -check-prefixes=CHECK-FPGA-HW
// RUN: %clang -target x86_64-unknown-linux-gnu -fintelfpga -Xshardware %s -### 2>&1 \
Expand All @@ -13,9 +13,9 @@
// RUN: %clang -target x86_64-unknown-linux-gnu -fintelfpga -Xssimulation %s -### 2>&1 \
// RUN: | FileCheck %s -check-prefixes=CHECK-FPGA-HW
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_fpga-unknown-unknown -Xsemulator %s -### 2>&1 \
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT,CHECK-FPGA-EMULATION
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT
// RUN: %clang -target x86_64-unknown-linux-gnu -fintelfpga -Xsemulator %s -### 2>&1 \
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT,CHECK-FPGA-EMULATION
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_gen-unknown-unknown %s -### 2>&1 \
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_gen-unknown-unknown %s -### 2>&1 \
Expand All @@ -34,7 +34,7 @@
// CHECK-DEFAULT-SAME:,+SPV_INTEL_unstructured_loop_controls,+SPV_INTEL_fpga_reg
// CHECK-DEFAULT-SAME:,+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers
// CHECK-DEFAULT-SAME:,+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes
// CHECK-DEFAULT-SAME:,+SPV_INTEL_inline_assembly
// CHECK-DEFAULT-SAME:,+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers
// CHECK-DEFAULT-SAME:,+SPV_INTEL_float_controls2
// CHECK-DEFAULT-SAME:,+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite
// CHECK-DEFAULT-SAME:,+SPV_INTEL_arbitrary_precision_fixed_point
Expand All @@ -56,9 +56,7 @@
// CHECK-DEFAULT-SAME:,+SPV_INTEL_masked_gather_scatter
// CHECK-DEFAULT-SAME:,+SPV_INTEL_tensor_float32_conversion
// CHECK-DEFAULT-SAME:,+SPV_INTEL_optnone
// CHECK-DEFAULT-SAME:,+SPV_KHR_non_semantic_info
// CHECK-FPGA-EMULATION-SAME:,+SPV_INTEL_arbitrary_precision_integers
// CHECK-DEFAULT-SAME:"
// CHECK-DEFAULT-SAME:,+SPV_KHR_non_semantic_info"
// CHECK-FPGA-HW: llvm-spirv{{.*}}"-spirv-ext=-all
// CHECK-FPGA-HW-SAME:,+SPV_EXT_shader_atomic_float_add
// CHECK-FPGA-HW-SAME:,+SPV_EXT_shader_atomic_float_min_max
Expand All @@ -70,7 +68,7 @@
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_unstructured_loop_controls,+SPV_INTEL_fpga_reg
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_inline_assembly
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_float_controls2
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_arbitrary_precision_fixed_point
Expand All @@ -87,8 +85,7 @@
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_cluster_attributes,+SPV_INTEL_loop_fuse
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_dsp_control
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_memory_accesses
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_memory_attributes
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_arbitrary_precision_integers"
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_memory_attributes"
// CHECK-CPU: llvm-spirv{{.*}}"-spirv-allow-unknown-intrinsics=llvm.genx.,llvm.fpbuiltin"
// CHECK-CPU-SAME: {{.*}}"-spirv-ext=-all
// CHECK-CPU-SAME:,+SPV_EXT_shader_atomic_float_add
Expand All @@ -101,7 +98,7 @@
// CHECK-CPU-SAME:,+SPV_INTEL_unstructured_loop_controls,+SPV_INTEL_fpga_reg
// CHECK-CPU-SAME:,+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers
// CHECK-CPU-SAME:,+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes
// CHECK-CPU-SAME:,+SPV_INTEL_inline_assembly
// CHECK-CPU-SAME:,+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers
// CHECK-CPU-SAME:,+SPV_INTEL_float_controls2
// CHECK-CPU-SAME:,+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite
// CHECK-CPU-SAME:,+SPV_INTEL_arbitrary_precision_fixed_point
Expand Down
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