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[SYCL][COMPAT] Add vectorized_ternary and vectorized_with_pred. #15550
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Add vectorized_ternary and vectorized_with_pred. Update relu and vectorized_binary. Signed-off-by: Tang, Jiajun jiajun.tang@intel.com
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Thanks for the contribution to the headers and for extending the testing helpers. I've left a few comments.
sycl/include/syclcompat/math.hpp
Outdated
return {relu(a[0]), relu(a[1])}; | ||
sycl::vec<ValueT, NumElements>> | ||
relu(const sycl::vec<ValueT, NumElements> a) { | ||
sycl::vec<T, NumElements> ret; |
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sycl::vec<T, NumElements> ret; | |
sycl::vec<ValueT, NumElements> ret; |
sycl/include/syclcompat/math.hpp
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const auto v1 = sycl::vec<unsigned, 1>(a).as<VecT>(); | ||
const auto v2 = sycl::vec<unsigned, 1>(b).as<VecT>(); | ||
const auto v3 = sycl::vec<unsigned, 1>(c).as<VecT>(); | ||
auto temp = |
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NIT: Can we rename temp to v4 for consistency with the vectorized_binary
implementation?
test_vectorized_with_pred<syclcompat::maximum, uint32_t>( | ||
0x00010002, 0x00040002, 0x00030000, &pred_hi, &pred_lo); | ||
test_vectorized_with_pred<syclcompat::minimum, uint32_t>( | ||
0x00010002, 0x00040002, 0x00030000, &pred_hi, &pred_lo); |
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It seems that the values of the pred
icates are not tested. Could you please ensure they are right?
test_vectorized_ternary<syclcompat::minimum, syclcompat::minimum, uint32_t>( | ||
0x00010002, 0x00040002, 0x00080004, 0x00030000); | ||
test_vectorized_ternary<syclcompat::minimum, syclcompat::minimum, uint32_t>( | ||
0x00010002, 0x00040002, 0x00080004, 0x00030000, true); |
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It feels strange that all the new tests return the same values with the same operators despite the operations being different. Could you please double check if that is the case?
@@ -101,6 +146,27 @@ int main() { | |||
0xFFF8FFFD); | |||
test_vectorized_unary<syclcompat::abs, uint32_t>(0xFFFBFFFD, 0x00050003); | |||
test_vectorized_sum_abs_diff<uint32_t>(0x00010002, 0x00040002, 0x00000003); |
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While the vectorized_binary
with relu
is being tested through the vectorized_ternary
, It could be good to have at least a case testing that the relu
is working as intended with vectorized_binary
.
Add vectorized_ternary and vectorized_with_pred.
Update relu and vectorized_binary.
Signed-off-by: Tang, Jiajun jiajun.tang@intel.com