Write driver for AST2400/2500 Hash and Crypto Engine

[mx-shift]

Notes from my experiments:

• HACE can only access RAM
  • HACE address registers assume offset into RAM rather than full AHB address
  • FIT SHA verification is done before copying to RAM(?) so HACE doesn't help
• Writes to the hash, crypto, and RSA "engine control" registers start the operation
• Hash, crypto, and RSA can run in parallel
• Command queue is just queue of register writes
  • Commands are tag, register offset within HACE register map, and data
  • It looks like tag changes get written to the tag register automagically
  • Writes to tag register can block(?) based on whether the engines are idle or busy
  • Useful operation seems to be:
    • Enable interrupts on tag register write and completion
    • Queue a "transaction" (series of register writes) with the same "tag": write data src, write hash dest, write data len, write engine start
    • When tag register write interrupt fires, that transaction is starting
    • When completion interrupt fires, the transaction is done.
    • Using only tag register write interrupt would miss completion of last transaction in queue.

[mdmillerii]

I've been spending much of my free time working on this driver and have one about 90% ready to touch hardware bringup. I need to work on completions and probably clean up and chain the multi-stage hmac hashing. EDIT: I am ignoring the RSA engine for now. This driver is through the crypto layer and is exposed to the kernel and to userspace via sockets or using libkcapi as a helper.

[MaxPower2005]

@mdmillerii Where can I download this driver/patch? I would like to give it a try on my AST2500 hardware.

[mdmillerii]

I haven't had a chance to work on this in several weeks, but I can try to post my WIP.