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Merge pull request torvalds#329 from tobetter/odroidxu4-4.14.y
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Odroidxu4 4.14.y
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@mdrjr
mdrjr committed Dec 6, 2017
2 parents bb4bdb4 + 34ce203 commit 117276e
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Showing 16 changed files with 837 additions and 279 deletions.
15 changes: 14 additions & 1 deletion arch/arm/boot/dts/exynos5.dtsi
100644 → 100755
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Expand Up @@ -149,7 +149,7 @@
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};

/*
i2c_2: i2c@12C80000 {
compatible = "samsung,s3c2440-i2c";
reg = <0x12C80000 0x100>;
Expand All @@ -159,6 +159,19 @@
samsung,sysreg-phandle = <&sysreg_system_controller>;
status = "disabled";
};
*/
i2c_2: i2c-hdmi {
compatible = "i2c-gpio";
gpios = <&gpa0 6 0
&gpa0 7 0>;
#i2c-gpio,sda-open-drain;
#i2c-gpio,scl-open-drain;
#i2c-gpio,scl-output-only;
i2c-gpio,delay-us = <5>; /* ~50 kHz */
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};

i2c_3: i2c@12C90000 {
compatible = "samsung,s3c2440-i2c";
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13 changes: 11 additions & 2 deletions arch/arm/boot/dts/exynos5420-pinctrl.dtsi
100644 → 100755
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Expand Up @@ -523,14 +523,14 @@
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
};

/*
i2c2_bus: i2c2-bus {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
};

*/
uart2_data: uart2-data {
samsung,pins = "gpa1-0", "gpa1-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
Expand Down Expand Up @@ -728,3 +728,12 @@
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV4>;
};
};

&pinctrl_3 {
hdmi_i2c_bus: hdmi-i2c-gpio {
samsung,pins = "gpa0-6", "gpa0-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
};
};
17 changes: 10 additions & 7 deletions arch/arm/boot/dts/exynos5420.dtsi
100644 → 100755
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Expand Up @@ -185,9 +185,10 @@
compatible = "samsung,exynos5420-audss-clock";
reg = <0x03810000 0x0C>;
#clock-cells = <1>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
<&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
clocks = <&clock CLK_FOUT_EPLL>, <&clock CLK_FIN_PLL>,
<&clock CLK_MOUT_USER_MAU_EPLL>, <&clock CLK_SCLK_MAUDIO0>,
<&clock CLK_SCLK_MAUPCM0>;
clock-names = "fout_epll", "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
};

mfc: codec@11000000 {
Expand Down Expand Up @@ -1121,9 +1122,6 @@
opp-shared;

opp00 {
opp-hz = /bits/ 64 <100000000>;
};
opp01 {
opp-hz = /bits/ 64 <200000000>;
};
};
Expand Down Expand Up @@ -1427,13 +1425,18 @@
pinctrl-names = "default";
pinctrl-0 = <&i2c1_bus>;
};

/*
&i2c_2 {
clocks = <&clock CLK_I2C2>;
clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_bus>;
};
*/
&i2c_2 {
pinctrl-names = "default";
pinctrl-0 = <&hdmi_i2c_bus>;
};

&i2c_3 {
clocks = <&clock CLK_I2C3>;
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51 changes: 15 additions & 36 deletions arch/arm/boot/dts/exynos5422-odroidxu3-audio.dtsi
100644 → 100755
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Expand Up @@ -29,58 +29,37 @@
"Speakers", "SPKL",
"Speakers", "SPKR";

assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>,
<&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MOUT_USER_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
<&clock_audss EXYNOS_DOUT_SRP>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>,
<&clock_audss EXYNOS_DOUT_I2S>;

assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>,
<&clock CLK_FOUT_EPLL>,
<&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>;

assigned-clock-rates = <0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<196608001>,
<(196608002 / 2)>,
<196608000>;
clocks = <&clock CLK_FOUT_EPLL>,
<&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MOUT_USER_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
<&clock_audss EXYNOS_DOUT_SRP>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>,
<&clock CLK_MAU_EPLL>;
clock-names = "fout_epll", "mout_sclk_epll",
"mout_mau_epll","mout_mau_epll_user",
"mout_audss", "mout_i2s",
"dout_srp","dout_aud_bus",
"mau_epll_clk";

cpu {
sound-dai = <&i2s0 0>;
};
codec {
sound-dai = <&hdmi>, <&max98090>;
sound-dai = <&max98090>, <&hdmi>;
};
};
};

&clock_audss {
assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
<&clock CLK_FOUT_EPLL>;
assigned-clock-rates = <(196608000 / 256)>,
<196608000>;
};

&hsi2c_5 {
status = "okay";
max98090: max98090@10 {
compatible = "maxim,max98090";
reg = <0x10>;
interrupt-parent = <&gpx3>;
interrupts = <2 IRQ_TYPE_NONE>;
clocks = <&i2s0 CLK_I2S_CDCLK>;
clock-names = "mclk";
#sound-dai-cells = <0>;
};
};
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2 changes: 0 additions & 2 deletions arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
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Expand Up @@ -118,8 +118,6 @@
};

&i2c_2 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
/* used by HDMI DDC */
status = "okay";
};
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55 changes: 21 additions & 34 deletions arch/arm/boot/dts/exynos5422-odroidxu4.dts
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Expand Up @@ -33,54 +33,41 @@
};
};

dummy_codec: spdif-transmitter {
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
status = "okay";
};

sound: sound {
compatible = "samsung,odroid-xu3-audio";
model = "Odroid-XU4";

assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>,
<&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MOUT_USER_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
<&clock_audss EXYNOS_DOUT_SRP>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>,
<&clock_audss EXYNOS_DOUT_I2S>;

assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>,
<&clock CLK_FOUT_EPLL>,
<&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>;

assigned-clock-rates = <0>,
<0>,
<0>,
<0>,
<0>,
<0>,
<196608001>,
<(196608002 / 2)>,
<196608000>;
clocks = <&clock CLK_FOUT_EPLL>,
<&clock CLK_MOUT_EPLL>,
<&clock CLK_MOUT_MAU_EPLL>,
<&clock CLK_MOUT_USER_MAU_EPLL>,
<&clock_audss EXYNOS_MOUT_AUDSS>,
<&clock_audss EXYNOS_MOUT_I2S>,
<&clock_audss EXYNOS_DOUT_SRP>,
<&clock_audss EXYNOS_DOUT_AUD_BUS>,
<&clock CLK_MAU_EPLL>;
clock-names = "fout_epll", "mout_sclk_epll",
"mout_mau_epll","mout_mau_epll_user",
"mout_audss", "mout_i2s",
"dout_srp","dout_aud_bus",
"mau_epll_clk";

cpu {
sound-dai = <&i2s0 0>;
};

codec {
sound-dai = <&hdmi>;
sound-dai = <&dummy_codec>, <&hdmi>;
};
};
};

&clock_audss {
assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
<&clock CLK_FOUT_EPLL>;
assigned-clock-rates = <(196608000 / 256)>,
<196608000>;
};

&i2s0 {
status = "okay";
};
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