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dmaengine: sirf: enable generic dt binding for dma channels
move to support of_dma_request_slave_channel() and dma_request_slave_channel. we add a xlate() to let dma clients be able to find right dma_chan by generic "dmas" properties in dts. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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* CSR SiRFSoC DMA controller | ||
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See dma.txt first | ||
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Required properties: | ||
- compatible: Should be "sirf,prima2-dmac" or "sirf,marco-dmac" | ||
- reg: Should contain DMA registers location and length. | ||
- interrupts: Should contain one interrupt shared by all channel | ||
- #dma-cells: must be <1>. used to represent the number of integer | ||
cells in the dmas property of client device. | ||
- clocks: clock required | ||
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Example: | ||
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Controller: | ||
dmac0: dma-controller@b00b0000 { | ||
compatible = "sirf,prima2-dmac"; | ||
reg = <0xb00b0000 0x10000>; | ||
interrupts = <12>; | ||
clocks = <&clks 24>; | ||
#dma-cells = <1>; | ||
}; | ||
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Client: | ||
Fill the specific dma request line in dmas. In the below example, spi0 read | ||
channel request line is 9 of the 2nd dma controller, while write channel uses | ||
4 of the 2nd dma controller; spi1 read channel request line is 12 of the 1st | ||
dma controller, while write channel uses 13 of the 1st dma controller: | ||
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spi0: spi@b00d0000 { | ||
compatible = "sirf,prima2-spi"; | ||
dmas = <&dmac1 9>, | ||
<&dmac1 4>; | ||
dma-names = "rx", "tx"; | ||
}; | ||
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spi1: spi@b0170000 { | ||
compatible = "sirf,prima2-spi"; | ||
dmas = <&dmac0 12>, | ||
<&dmac0 13>; | ||
dma-names = "rx", "tx"; | ||
}; |
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