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Sun8i emac wip #283
Sun8i emac wip #283
Commits on May 6, 2016
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Documentation: devicetree: add Allwinner sun8i-emac bindings
Add documentation for the Allwinner sun8i-emac. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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ARM: dts: sun8i-h3: add sun8i-emac ethernet driver
The sun8i-emac is an ethernet MAC hardware that support 10/100/1000 speed. This patch enable the sun8i-emac on the Allwinner H3 SoC Device-tree. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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ARM: dts: sun8i: Add Orange Pi PC support
The Orange Pi PC is an SBC based on the Allwinner H3 SoC with a uSD slot, 3 USB ports directly from the SoC, a 10/100M ethernet port using the SoC's integrated PHY, USB OTG, HDMI, a TRRS headphone jack for stereo out and composite out, a microphone, an IR receiver, a CSI connector, 2 LEDs, a 3 pin UART header, and a 40-pin GPIO header. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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ARM: dts: sun8i: Enable sun8i-emac on the Orange PI PC
Enable the sun8i-emac harware present on the Orange PI PC. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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ethernet: add sun8i-emac driver
This patch add support for sun8i-emac ethernet MAC hardware. It could be found in Allwinner H3/A83T/A64 SoCs. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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ethernet: sun8i-emac: add optionnal phy regulator
Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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ethernet: Add myself as maintainers of sun8i-emac
TODO Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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net: phy: sun8i-h3-ephy: Add bindings for Allwinner H3 Ethernet PHY
The Allwinner H3 SoC incorporates an Ethernet PHY. This is enabled and configured through a memory mapped hardware register. This same register also configures the MAC interface mode and TX clock source. Also covered by the register, but not supported in these bindings, are TX/RX clock delay chains and inverters, and an RMII module. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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net: phy: sun8i-h3-ephy: Add driver for Allwinner H3 Ethernet PHY
The Allwinner H3 SoC incorporates an Ethernet PHY. This is enabled and configured through a memory mapped hardware register. This same register also configures the MAC interface mode and TX clock source. Also covered by the register, but not supported in this driver, are TX/RX clock delay chains and inverters, and an RMII module. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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ARM: dts: sun8i-h3: Add H3 Ethernet PHY device node to sun8i-h3.dtsi
The Allwinner H3 SoC incorporates an Ethernet PHY, whose controls are mapped to a system control register. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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ARM: dt: Enable sun8i-emac on the sun8i-h3-orangepi-plus
Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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ARM: dts: sun8i: Add support for H3 usb clocks
Add a node describing the usb-clks found on the H3. Signed-off-by: Reinder de Haan <patchesrdh@mveas.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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ARM: dts: sun8i: Add usbphy and usb host controller nodes
Add nodes describing the H3's usbphy and usb host controller nodes. Signed-off-by: Reinder de Haan <patchesrdh@mveas.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
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