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Adjust multiline case item indent
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dalance committed Mar 21, 2024
1 parent 31b67ea commit 11f23d2
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Showing 4 changed files with 32 additions and 10 deletions.
13 changes: 12 additions & 1 deletion crates/emitter/src/emitter.rs
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,7 @@ pub struct Emitter {
consumed_next_newline: bool,
single_line: bool,
adjust_line: bool,
case_item_indent: Option<usize>,
in_always_ff: bool,
in_generate: bool,
in_direction_modport: bool,
Expand Down Expand Up @@ -55,6 +56,7 @@ impl Default for Emitter {
consumed_next_newline: false,
single_line: false,
adjust_line: false,
case_item_indent: None,
in_always_ff: false,
in_generate: false,
in_direction_modport: false,
Expand Down Expand Up @@ -92,6 +94,10 @@ impl Emitter {
&self.string
}

fn column(&self) -> usize {
self.string.len() - self.string.rfind('\n').unwrap_or(0)
}

fn str(&mut self, x: &str) {
self.string.push_str(x);
}
Expand All @@ -107,7 +113,9 @@ impl Emitter {
}

fn indent(&mut self) {
self.str(&" ".repeat(self.indent * self.format_opt.indent_width));
self.str(&" ".repeat(
self.indent * self.format_opt.indent_width + self.case_item_indent.unwrap_or(0),
));
}

fn newline_push(&mut self) {
Expand Down Expand Up @@ -1341,12 +1349,14 @@ impl VerylWalker for Emitter {

/// Semantic action for non-terminal 'CaseItem'
fn case_item(&mut self, arg: &CaseItem) {
let start = self.column();
match &*arg.case_item_group {
CaseItemGroup::Expression(x) => self.expression(&x.expression),
CaseItemGroup::Defaul(x) => self.defaul(&x.defaul),
}
self.colon(&arg.colon);
self.space(1);
self.case_item_indent = Some(self.column() - start);
match &*arg.case_item_group0 {
CaseItemGroup0::Statement(x) => self.statement(&x.statement),
CaseItemGroup0::LBraceCaseItemGroup0ListRBrace(x) => {
Expand All @@ -1369,6 +1379,7 @@ impl VerylWalker for Emitter {
self.token(&x.r_brace.r_brace_token.replace("end"));
}
}
self.case_item_indent = None;
}

/// Semantic action for non-terminal 'Attribute'
Expand Down
13 changes: 12 additions & 1 deletion crates/formatter/src/formatter.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@ pub struct Formatter {
consumed_next_newline: bool,
single_line: bool,
adjust_line: bool,
case_item_indent: Option<usize>,
}

impl Default for Formatter {
Expand All @@ -31,6 +32,7 @@ impl Default for Formatter {
consumed_next_newline: false,
single_line: false,
adjust_line: false,
case_item_indent: None,
}
}
}
Expand All @@ -52,6 +54,10 @@ impl Formatter {
&self.string
}

fn column(&self) -> usize {
self.string.len() - self.string.rfind('\n').unwrap_or(0)
}

fn str(&mut self, x: &str) {
self.string.push_str(x);
}
Expand All @@ -67,7 +73,9 @@ impl Formatter {
}

fn indent(&mut self) {
self.str(&" ".repeat(self.indent * self.format_opt.indent_width));
self.str(&" ".repeat(
self.indent * self.format_opt.indent_width + self.case_item_indent.unwrap_or(0),
));
}

fn newline_push(&mut self) {
Expand Down Expand Up @@ -707,12 +715,14 @@ impl VerylWalker for Formatter {

/// Semantic action for non-terminal 'CaseItem'
fn case_item(&mut self, arg: &CaseItem) {
let start = self.column();
match &*arg.case_item_group {
CaseItemGroup::Expression(x) => self.expression(&x.expression),
CaseItemGroup::Defaul(x) => self.defaul(&x.defaul),
}
self.colon(&arg.colon);
self.space(1);
self.case_item_indent = Some(self.column() - start);
match &*arg.case_item_group0 {
CaseItemGroup0::Statement(x) => self.statement(&x.statement),
CaseItemGroup0::LBraceCaseItemGroup0ListRBrace(x) => {
Expand All @@ -725,6 +735,7 @@ impl VerylWalker for Formatter {
self.r_brace(&x.r_brace);
}
}
self.case_item_indent = None;
}

/// Semantic action for non-terminal 'AttributeList'
Expand Down
8 changes: 4 additions & 4 deletions testcases/sv/16_case.sv
Original file line number Diff line number Diff line change
Expand Up @@ -8,10 +8,10 @@ module veryl_testcase_Module16;
0: a = 1;
1: a = 1;
2: begin
a = 1;
a = 1;
a = 1;
end
a = 1;
a = 1;
a = 1;
end
y - 1 : a = 1;
default: a = 1;
endcase
Expand Down
8 changes: 4 additions & 4 deletions testcases/veryl/16_case.veryl
Original file line number Diff line number Diff line change
Expand Up @@ -8,10 +8,10 @@ module Module16 {
0: a = 1;
1: a = 1;
2: {
a = 1;
a = 1;
a = 1;
}
a = 1;
a = 1;
a = 1;
}
y - 1 : a = 1;
default: a = 1;
}
Expand Down

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