xtensa: Add xtensa-amd_acp_6_0_adsp_zephyr-elf.

This adds the config and overlay files to enable building
the toolchain needed for the acp_6_0 board in Zephyr.

Signed-off-by: DINESHKUMAR <DineshKumar.Kalva@amd.com>
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>

.github/workflows/ci.yml

@@ -52,6 +52,7 @@ on:
         - riscv64-zephyr-elf
         - sparc-zephyr-elf
         - x86_64-zephyr-elf
+        - xtensa-amd_acp_6_0_adsp_zephyr-elf
         - xtensa-dc233c_zephyr-elf
         - xtensa-espressif_esp32_zephyr-elf
         - xtensa-espressif_esp32s2_zephyr-elf
@@ -166,6 +167,7 @@ jobs:
             riscv64-zephyr-elf)                   build_target_riscv64_zephyr_elf="y";;
             sparc-zephyr-elf)                     build_target_sparc_zephyr_elf="y";;
             x86_64-zephyr-elf)                    build_target_x86_64_zephyr_elf="y";;
+            xtensa-amd_acp_6_0_adsp_zephyr-elf)   build_target_xtensa_amd_acp_6_0_adsp_zephyr_elf="y";;
             xtensa-dc233c_zephyr-elf)             build_target_xtensa_dc233c_zephyr_elf="y";;
             xtensa-espressif_esp32_zephyr-elf)    build_target_xtensa_espressif_esp32_zephyr_elf="y";;
             xtensa-espressif_esp32s2_zephyr-elf)  build_target_xtensa_espressif_esp32s2_zephyr_elf="y";;
@@ -208,6 +210,7 @@ jobs:
           build_target_riscv64_zephyr_elf="y"
           build_target_sparc_zephyr_elf="y"
           build_target_x86_64_zephyr_elf="y"
+          build_target_xtensa_amd_acp_6_0_adsp_zephyr_elf="y"
           build_target_xtensa_dc233c_zephyr_elf="y"
           build_target_xtensa_espressif_esp32_zephyr_elf="y"
           build_target_xtensa_espressif_esp32s2_zephyr_elf="y"
@@ -290,6 +293,7 @@ jobs:
         [ "${build_target_riscv64_zephyr_elf}" == "y" ]                   && MATRIX_TARGETS+='"riscv64-zephyr-elf",'
         [ "${build_target_sparc_zephyr_elf}" == "y" ]                     && MATRIX_TARGETS+='"sparc-zephyr-elf",'
         [ "${build_target_x86_64_zephyr_elf}" == "y" ]                    && MATRIX_TARGETS+='"x86_64-zephyr-elf",'
+        [ "${build_target_xtensa_amd_acp_6_0_adsp_zephyr_elf}" == "y" ]   && MATRIX_TARGETS+='"xtensa-amd_acp_6_0_adsp_zephyr-elf",'
         [ "${build_target_xtensa_dc233c_zephyr_elf}" == "y" ]             && MATRIX_TARGETS+='"xtensa-dc233c_zephyr-elf",'
         [ "${build_target_xtensa_espressif_esp32_zephyr_elf}" == "y" ]    && MATRIX_TARGETS+='"xtensa-espressif_esp32_zephyr-elf",'
         [ "${build_target_xtensa_espressif_esp32s2_zephyr_elf}" == "y" ]  && MATRIX_TARGETS+='"xtensa-espressif_esp32s2_zephyr-elf",'
@@ -1534,6 +1538,9 @@ jobs:
               PLATFORM_ARGS+="-p qemu_x86 "
               PLATFORM_ARGS+="-p qemu_x86_64 "
               ;;
+            xtensa-amd_acp_6_0_adsp_zephyr-elf)
+              PLATFORM_ARGS+="-p acp_6_0 "
+              ;;
             xtensa-dc233c_zephyr-elf)
               PLATFORM_ARGS+="-p qemu_xtensa/dc233c/mmu "
               ;;

README.md

@@ -14,9 +14,10 @@ The toolchains for the following target architectures are supported:
 - RISC-V (32-bit and 64-bit; RV32I, RV32E, RV64I)
 - SPARC (32-bit and 64-bit; SPARC V8, SPARC V9)
 - x86 (32-bit and 64-bit)
-- Xtensa (sample_controller, intel_ace15_mtpm, intel_tgl_adsp,
-  nxp_imx_adsp, nxp_imx8m_adsp, nxp_imx8ulp_adsp, nxp_rt500_adsp,
-  espressif_esp32, espressif_esp32s2, espressif_esp32s3, mt8195_adsp)
+- Xtensa (sample_controller, amd_acp_6_0_adsp, intel_ace15_mtpm,
+  intel_tgl_adsp, nxp_imx_adsp, nxp_imx8m_adsp, nxp_imx8ulp_adsp,
+  nxp_rt500_adsp, espressif_esp32, espressif_esp32s2, espressif_esp32s3,
+  mt8195_adsp)
 
 The following host tools are available as part of the Zephyr SDK:
 

configs/xtensa-amd_acp_6_0_adsp_zephyr-elf.config

@@ -0,0 +1,9 @@
+CT_CONFIG_VERSION="3"
+CT_EXPERIMENTAL=y
+CT_OVERLAY_LOCATION="overlays"
+CT_OVERLAY_NAME="amd_acp_6_0_adsp"
+CT_ARCH_XTENSA=y
+CT_XTENSA_CUSTOM=y
+CT_TARGET_VENDOR="amd_acp_6_0_adsp_zephyr"
+CT_TARGET_CFLAGS="-ftls-model=local-exec"
+CT_CC_GCC_CONFIG_TLS=n