Initial Patch for RISC-V support #82294

clamp03 · 2023-02-17T12:58:20Z

Based on LOONGARCH64, implemented RISC-V.

What I checked are

Successfully cross-build for RISC-V.
Run A simple application "helloworld"
Fail a test in clr.paltest

There are much work to be done. I hope to work together on upstream repo.
Thank you.

Related Issue: #36748

In asmhelpers.S, assigned registers based on LOONGARCH except - t8 => t5 - t7 => t4 (In case of t4 is already used, set t4 to t0 or t3. Then use t4 instead of t7.) *. There are t0 ~ t8 in LOONGARCH. In RIRSCV, only t0 ~ t6.

Fix a bug in a stub. Update unimplemented functions

Fix in emitInsMayWriteToGCReg Update unimplemented functions

Fix bugs

Set JitFramed to True to avoid assert in jit/lclvars.cpp. Implement unimplemented function in codegenriscv64 Now HelloWorld runs with CHECKED build.

Reduce FixupPrecode size to fix a crash.

Fix a crash in Release mode. Instruction generation is in DEBUG macro.

Fixed after upstream rebase

Fix tests build fails

Update RISCV R_R_R instructions

- threading/NamedMutex/test1/paltest_namedmutex_test1 disabled NAMED_MUTEX_USE_PTHREAD_MUTEX - threading/YieldProcessor/test1/paltest_yieldprocessor_test1 wfi is executed in privileged mode. add a fence instruction like loongarch

Update Conditions/Conditional branches

clamp03 · 2023-02-17T13:04:55Z

@jkotas, There are many errors and unimplemented codes. Please review and let me know what you think. Thank you so much.
@wscho77 @HJLeee @JongHeonChoi @alpencolt @gbalykov

am11 · 2023-02-17T13:41:53Z

Great progress! 👍

@clamp03 fwiw, the initial patch was #73385, yours is much advanced progress! ;)

The tracking issue for CoreCLR is #75749.

You may want to split src/coreclr/pal, src/coreclr/vm, src/coreclr/jit etc. into separate PRs as they will be reviewed by different teams.

src/coreclr/pal/inc/pal.h

src/native/external/libunwind/CMakeLists.txt

jkotas · 2023-02-17T16:12:57Z

@clamp03 Thank for working on RISC-V port! Would you mind sharing your motivation for this port? Is there a specific scenario that you are targeting?

You may want to split src/coreclr/pal, src/coreclr/vm, src/coreclr/jit etc. into separate PRs as they will be reviewed by different teams.

+1 This will need to be split into multiple PRs to make the review manageable.

cc @dotnet/jit-contrib @jeffschwMSFT

clamp03 · 2023-02-18T00:36:21Z

@am11 @jkotas Thank you for the review.
I will tidy up codes and split into separate PRs.

We want to run Tizen on risc-v. Many opensource modules except .net runtime are already ported to risc-v. We don't have enough time and resources. We need helps from you and others. Thank you.

BruceForstall · 2023-02-18T01:31:35Z

@richlander

richlander · 2023-02-18T02:06:16Z

Our general policy on ports is covered in this recent post: https://devblogs.microsoft.com/dotnet/why-dotnet/#binary-distributions

Glad to see the interest in the combination of .NET and RISC-V.

broudy3 · 2023-02-18T10:12:39Z

src/coreclr/pal/src/arch/riscv64/context2.S

+LEAF_ENTRY RtlRestoreContext, _TEXT
+#ifdef HAS_ASAN
+    lw  t1, CONTEXT_ContextFlags(a0)
+    andi t1, t1, 0x1 << CONTEXT_FLOATING_POINT_BIT


In arm64 implementation in a similar place CONTEXT_CONTROL_BIT is used instead of CONTEXT_FLOATING_POINT_BIT. Isn't this a bug in loongarch64 implementation?

This time I think we don't need ASAN support for RISC-V.
I removed those and left a TODO comment.

clamp03 · 2023-02-20T04:22:53Z

I pushed four PRs. Thank you!
#82379
#82380
#82381
#82382

clamp03 added 30 commits February 17, 2023 21:18

[WIP] RISCV64 REL BUILD

da21fa4

[WIP] RISCV64 DBG BUILD

9ff3bdc

[WIP] FIX

499e598

[WIP] FIX WHAT I DID FOR THREAD STORE TEST

7433745

[WIP] UPDATE ASSEMBLY FUNCTIONS and ADD CRASH TO UNIMPLEMENTED

7587b73

[WIP] UPDATE CRTHELPERS

c7bd561

[WIP] UPDATE EXCEPTIONHANDLER AND CALLDESCRWORKERRISCV64

4ca0934

[WIP] UPDATE ACTIVATIONHANDLERWRAPPER

8bdde90

[WIP] CALLSIGNALHANDLEWRAPPER

260fdc4

[WIP] FLOATCONVERSION, DBGHELPERS

de1c03e

[WIP] PAL, ASMCONSTANTS, CONTEXT2

1a45b75

[WIP] REMOVE ACTIVATIONHANDLERWRAPPER, DISPATCHEXCEPTIONWRAPPER

da10fc8

[WIP] ADD CRASH INSTRS FOR UNINPLEMENTED

0cb6eb6

[WIP] ASMHELPERS

896a978

In asmhelpers.S, assigned registers based on LOONGARCH except - t8 => t5 - t7 => t4 (In case of t4 is already used, set t4 to t0 or t3. Then use t4 instead of t7.) *. There are t0 ~ t8 in LOONGARCH. In RIRSCV, only t0 ~ t6.

[WIP] PINVOKESTUBS

7c9508c

[WIP] RESTORE getcontext.S and setcontext.S in libunwind

f6e85fa

[WIP] FIX THREADS.CPP

4c12c26

[WIP] FIX PRECODE

f5e184d

[WIP] SET REG

df30a97

[WIP] FIX INTERPRETER

322c2b9

[WIP] Revert Interpreter Code Changes

1120e51

[WIP] JIT

93d30e7

[WIP] JIT

47938e6

[WIP] JIT

a01b735

[WIP] JIT

7bf58ed

[WIP] JIT

da5220a

[WIP] JIT

c7063e9

[WIP] JIT

55a83da

[WIP] JIT

894ac25

[WIP] JIT

a5d54c3

clamp03 added 13 commits February 17, 2023 21:18

[WIP] JIT

a6791ed

[WIP] JIT

15b448e

Fix a bug in a stub. Update unimplemented functions

[WIP] JIT

407e25d

Fix in emitInsMayWriteToGCReg Update unimplemented functions

[WIP] JIT

2b3b528

Fix bugs

[WIP] JIT

5638069

Set JitFramed to True to avoid assert in jit/lclvars.cpp. Implement unimplemented function in codegenriscv64 Now HelloWorld runs with CHECKED build.

[WIP] JIT

9641baf

Reduce FixupPrecode size to fix a crash.

[WIP] JIT

5070785

Fix a crash in Release mode. Instruction generation is in DEBUG macro.

[WIP] JIT

553c1fd

Fixed after upstream rebase

[WIP] TESTS

e7a0474

Fix tests build fails

[WIP] JIT

e147059

Update RISCV R_R_R instructions

[WIP] PALTEST

91ce589

- threading/NamedMutex/test1/paltest_namedmutex_test1 disabled NAMED_MUTEX_USE_PTHREAD_MUTEX - threading/YieldProcessor/test1/paltest_yieldprocessor_test1 wfi is executed in privileged mode. add a fence instruction like loongarch

[WIP] FIX AFTER REBASE

0827ede

Update Conditions/Conditional branches

[WIP] Remove commented codes

6b81f2d

clamp03 requested a review from MichalStrehovsky as a code owner February 17, 2023 12:58

ghost added the community-contribution Indicates that the PR has been added by a community member label Feb 17, 2023

dotnet-issue-labeler bot added the area-VM-coreclr label Feb 17, 2023

am11 reviewed Feb 17, 2023

View reviewed changes

src/coreclr/pal/inc/pal.h Show resolved Hide resolved

am11 reviewed Feb 17, 2023

View reviewed changes

src/native/external/libunwind/CMakeLists.txt Show resolved Hide resolved

broudy3 reviewed Feb 18, 2023

View reviewed changes

clamp03 closed this Feb 20, 2023

ayakael mentioned this pull request Mar 20, 2023

Specify -z notext on linux-musl-x86 and riscv64 #83682

Merged

ghost locked as resolved and limited conversation to collaborators Mar 22, 2023

clamp03 deleted the riscv64 branch April 28, 2023 04:09

Provide feedback

Saved searches

Use saved searches to filter your results more quickly

Initial Patch for RISC-V support #82294

Initial Patch for RISC-V support #82294

clamp03 commented Feb 17, 2023

clamp03 commented Feb 17, 2023

am11 commented Feb 17, 2023

jkotas commented Feb 17, 2023

clamp03 commented Feb 18, 2023 •

edited

Loading

BruceForstall commented Feb 18, 2023

richlander commented Feb 18, 2023 •

edited

Loading

broudy3 Feb 18, 2023

clamp03 Feb 20, 2023

clamp03 commented Feb 20, 2023

Initial Patch for RISC-V support #82294

Initial Patch for RISC-V support #82294

Conversation

clamp03 commented Feb 17, 2023

clamp03 commented Feb 17, 2023

am11 commented Feb 17, 2023

jkotas commented Feb 17, 2023

clamp03 commented Feb 18, 2023 • edited Loading

BruceForstall commented Feb 18, 2023

richlander commented Feb 18, 2023 • edited Loading

broudy3 Feb 18, 2023

Choose a reason for hiding this comment

clamp03 Feb 20, 2023

Choose a reason for hiding this comment

clamp03 commented Feb 20, 2023

clamp03 commented Feb 18, 2023 •

edited

Loading

richlander commented Feb 18, 2023 •

edited

Loading