Arm64/SVE: Add Uzp1 #94529
Arm64/SVE: Add Uzp1 #94529
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch Issue DetailsThis is similar to #93067, except that most of the code added in this PR was generated by the tool, the same tool that generated encodings in #94285. The only thing that I realized the tool does not generate is the entries in I have also added method placeholders for predicate registes which will need to be fixed once we add predicate register support in LSRA. I think the next step for this PR would be to make sure the encodings are correctly generated by comparing it with cordistool or lldb. That won't be possible until we add the actual Z and predicate registers. Contributes to #93095
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| @@ -10571,6 +10619,47 @@ void emitter::emitIns_Call(EmitCallType callType, | |||
| return ureg << 10; | |||
| } | |||
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| /***************************************************************************** | |||
| * | |||
| * Returns an encoding for the specified register used in the 'Vd' position | |||
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| * Returns an encoding for the specified register used in the 'Vd' position | |
| * Returns an encoding for the specified register used in the 'Pd' position |
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| /***************************************************************************** | ||
| * | ||
| * Returns an encoding for the specified register used in the 'Vn' position |
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| * Returns an encoding for the specified register used in the 'Vn' position | |
| * Returns an encoding for the specified register used in the 'Pn' position |
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| /***************************************************************************** | ||
| * | ||
| * Returns an encoding for the specified register used in the 'Vm' position |
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| * Returns an encoding for the specified register used in the 'Vm' position | |
| * Returns an encoding for the specified register used in the 'Pm' position |
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I have a WIP patch which adds one SVE API entry. I'll rebase it on top on this and switch it to use UZP1. |
src/coreclr/jit/codegenarm64.cpp
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| @@ -6702,6 +6702,14 @@ void CodeGen::genArm64EmitterUnitTests() | |||
| theEmitter->emitIns_R_R_R(INS_asrv, EA_4BYTE, REG_R8, REG_R9, REG_R10); | |||
| theEmitter->emitIns_R_R_R(INS_rorv, EA_4BYTE, REG_R8, REG_R9, REG_R10); | |||
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| // TODO-SVE: Fix once we add predicate registers | |||
| theEmitter->emitIns_R_R_R(INS_uzp1, EA_8BYTE, REG_R0, REG_R1, REG_R2, | |||
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This is emitting a neon uzp1, it should be INS_sve_uzp1
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good catch. i will address this and fix the tool.
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fixed and update the file in #94549
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With the above change, you're going to have to add case INS_sve_uzp1 into emitIns_R_R_R()
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yes and many such cases in emitIns* methods.
This is similar to #93067, except that most of the code added in this PR was generated by the tool, the same tool that generated encodings in #94285. The only thing that I realized the tool does not generate is the entries in
emitInsMayWriteToGCReg(). I could add it, but I think it is easier to do it manually.I have also added method placeholders for predicate registes which will need to be fixed once we add predicate register support in LSRA. I think the next step for this PR would be to make sure the encodings are correctly generated by comparing it with cordistool or lldb. That won't be possible until we add the actual Z and predicate registers.
Another TODO would be to fix the PerfScore numbers, not sure where to check that information though.
Contributes to #93095