[Mellanox] Support SN4600C-C64 as T1 switch in dual-ToR scenario #11261
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Signed-off-by: Stephen Sun <stephens@nvidia.com>
- global DSCP_TO_TC_MAP Signed-off-by: Stephen Sun <stephens@nvidia.com>
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…ual ToR scenario Signed-off-by: Stephen Sun <stephens@nvidia.com>
baiwei0427
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Jul 14, 2022
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To cleanly cherry-pick to 202205 it depends on #11448 |
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neethajohn
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Jul 18, 2022
Signed-off-by: Stephen Sun <stephens@nvidia.com>
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Previously it failed because t1-lag timeout is reached. #11478 to extend it. |
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neethajohn
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Jul 19, 2022
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…ario (#11261) - Why I did it Support Mellanox-SN4600C-C64 as T1 switch in dual-ToR scenario This is to port #11032 and #11299 from 202012 to master. Support additional queue and PG in buffer templates, including both traditional and dynamic model Support mapping DSCP 2/6 to lossless traffic in the QoS template. Add macros to generate additional lossless PG in the dynamic model Adjust the order in which the generic/dedicated (with additional lossless queues) macros are checked and called to generate buffer tables in common template buffers_config.j2 Buffer tables are rendered via using macros. Both generic and dedicated macros are defined on our platform. Currently, the generic one is called as long as it is defined, which causes the generic one always being called on our platform. To avoid it, the dedicated macrio is checked and called first and then the generic ones. Support MAP_PFC_PRIORITY_TO_PRIORITY_GROUP on ports with additional lossless queues. On Mellanox-SN4600C-C64, buffer configuration for t1 is calculated as: 40 * 100G downlink ports with 4 lossless PGs/queues, 1 lossy PG, and 3 lossy queues 16 * 100G uplink ports with 2 lossless PGs/queues, 1 lossy PG, and 5 lossy queues Signed-off-by: Stephen Sun <stephens@nvidia.com>
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…ario (sonic-net#11261) - Why I did it Support Mellanox-SN4600C-C64 as T1 switch in dual-ToR scenario This is to port sonic-net#11032 and sonic-net#11299 from 202012 to master. Support additional queue and PG in buffer templates, including both traditional and dynamic model Support mapping DSCP 2/6 to lossless traffic in the QoS template. Add macros to generate additional lossless PG in the dynamic model Adjust the order in which the generic/dedicated (with additional lossless queues) macros are checked and called to generate buffer tables in common template buffers_config.j2 Buffer tables are rendered via using macros. Both generic and dedicated macros are defined on our platform. Currently, the generic one is called as long as it is defined, which causes the generic one always being called on our platform. To avoid it, the dedicated macrio is checked and called first and then the generic ones. Support MAP_PFC_PRIORITY_TO_PRIORITY_GROUP on ports with additional lossless queues. On Mellanox-SN4600C-C64, buffer configuration for t1 is calculated as: 40 * 100G downlink ports with 4 lossless PGs/queues, 1 lossy PG, and 3 lossy queues 16 * 100G uplink ports with 2 lossless PGs/queues, 1 lossy PG, and 5 lossy queues Signed-off-by: Stephen Sun <stephens@nvidia.com>
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Why I did it
Support Mellanox-SN4600C-C64 as T1 switch in dual-ToR scenario
This is to port #11032 and #11299 from 202012 to master.
buffers_config.j2On Mellanox-SN4600C-C64, buffer configuration for t1 is calculated as:
Signed-off-by: Stephen Sun stephens@nvidia.com
How I did it
How to verify it
Run regression test.
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Description for the changelog
Link to config_db schema for YANG module changes
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