armstub8: Initialize CPTR_EL3 with zeros #123
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In both Cortex A53 and A72, every bit of CPTR_EL3 is RES0 except bit 10 and bit 31.
We need bit 10 to be 0, also bit 31 is 0 previously. So zero the entire register in initialization.
Issue #95 pointed this out as well.